DRV8323RS Version

Dependencies:   mbed-dev-f303 FastPWM3

Committer:
benkatz
Date:
Thu Mar 02 15:31:23 2017 +0000
Revision:
20:bf9ea5125d52
Child:
22:60276ba87ac6
Compact version works.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
benkatz 20:bf9ea5125d52 1
benkatz 20:bf9ea5125d52 2 #include "mbed.h"
benkatz 20:bf9ea5125d52 3 #include "hw_setup.h"
benkatz 20:bf9ea5125d52 4 #include "hw_config.h"
benkatz 20:bf9ea5125d52 5 #include "structs.h"
benkatz 20:bf9ea5125d52 6 #include "FastPWM.h"
benkatz 20:bf9ea5125d52 7
benkatz 20:bf9ea5125d52 8 void Init_PWM(GPIOStruct *gpio){
benkatz 20:bf9ea5125d52 9
benkatz 20:bf9ea5125d52 10 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // enable the clock to GPIOC
benkatz 20:bf9ea5125d52 11 RCC->APB1ENR |= 0x00000001; // enable TIM2 clock
benkatz 20:bf9ea5125d52 12 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // enable TIM1 clock
benkatz 20:bf9ea5125d52 13
benkatz 20:bf9ea5125d52 14 //GPIOC->MODER = (1 << 8); // set pin 4 to be general purpose output
benkatz 20:bf9ea5125d52 15 gpio->enable = new DigitalOut(ENABLE_PIN);
benkatz 20:bf9ea5125d52 16 gpio->pwm_u = new FastPWM(PIN_U);
benkatz 20:bf9ea5125d52 17 gpio->pwm_v = new FastPWM(PIN_V);
benkatz 20:bf9ea5125d52 18 gpio->pwm_w = new FastPWM(PIN_W);
benkatz 20:bf9ea5125d52 19
benkatz 20:bf9ea5125d52 20 //ISR Setup
benkatz 20:bf9ea5125d52 21
benkatz 20:bf9ea5125d52 22 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
benkatz 20:bf9ea5125d52 23
benkatz 20:bf9ea5125d52 24 TIM1->DIER |= TIM_DIER_UIE; // enable update interrupt
benkatz 20:bf9ea5125d52 25 TIM1->CR1 = 0x40;//CMS = 10, interrupt only when counting up
benkatz 20:bf9ea5125d52 26 TIM1->CR1 |= TIM_CR1_UDIS;
benkatz 20:bf9ea5125d52 27 TIM1->CR1 |= TIM_CR1_ARPE; // autoreload on,
benkatz 20:bf9ea5125d52 28 TIM1->RCR |= 0x001; // update event once per up/down count of tim1
benkatz 20:bf9ea5125d52 29 TIM1->EGR |= TIM_EGR_UG;
benkatz 20:bf9ea5125d52 30
benkatz 20:bf9ea5125d52 31 //PWM Setup
benkatz 20:bf9ea5125d52 32
benkatz 20:bf9ea5125d52 33 TIM1->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
benkatz 20:bf9ea5125d52 34 //TIM1->ARR = 0x1194; // 20 khz
benkatz 20:bf9ea5125d52 35 TIM1->ARR = 0x8CA; //40 khz
benkatz 20:bf9ea5125d52 36 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
benkatz 20:bf9ea5125d52 37 TIM1->CR1 |= TIM_CR1_CEN;
benkatz 20:bf9ea5125d52 38
benkatz 20:bf9ea5125d52 39 }
benkatz 20:bf9ea5125d52 40
benkatz 20:bf9ea5125d52 41 void Init_ADC(void){
benkatz 20:bf9ea5125d52 42 // ADC Setup
benkatz 20:bf9ea5125d52 43 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
benkatz 20:bf9ea5125d52 44 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
benkatz 20:bf9ea5125d52 45 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;//0x0000002; // Enable clock for GPIOC
benkatz 20:bf9ea5125d52 46
benkatz 20:bf9ea5125d52 47 ADC->CCR = 0x00000006; // Regular simultaneous mode only
benkatz 20:bf9ea5125d52 48 ADC1->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON
benkatz 20:bf9ea5125d52 49 ADC1->SQR3 = 0x000000A; // use PC_0 as input
benkatz 20:bf9ea5125d52 50 ADC2->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON
benkatz 20:bf9ea5125d52 51 ADC2->SQR3 = 0x0000000B; // use PC_1 as input
benkatz 20:bf9ea5125d52 52 GPIOC->MODER |= 0x0000000f; // PC_0, PC_1 are analog inputs
benkatz 20:bf9ea5125d52 53
benkatz 20:bf9ea5125d52 54 }
benkatz 20:bf9ea5125d52 55
benkatz 20:bf9ea5125d52 56 void Init_DAC(void){
benkatz 20:bf9ea5125d52 57 RCC->APB1ENR |= 0x20000000; // Enable clock for DAC
benkatz 20:bf9ea5125d52 58 DAC->CR |= 0x00000001; // DAC control reg, both channels ON
benkatz 20:bf9ea5125d52 59 GPIOA->MODER |= 0x00000300; // PA04 as analog output
benkatz 20:bf9ea5125d52 60 }
benkatz 20:bf9ea5125d52 61
benkatz 20:bf9ea5125d52 62 void Init_All_HW(GPIOStruct *gpio){
benkatz 20:bf9ea5125d52 63 Init_PWM(gpio);
benkatz 20:bf9ea5125d52 64 Init_ADC();
benkatz 20:bf9ea5125d52 65 //Init_DAC();
benkatz 20:bf9ea5125d52 66
benkatz 20:bf9ea5125d52 67 }