Tiger_LCD - Landtiger (LPC1768) graphics LCD demo.

Users » behrooz1980 » Code » Tiger_LCD

Behrooz Abdi / Mbed 2 deprecated Tiger_LCD

Landtiger (LPC1768) graphics LCD demo.

GLCD_LPC1700.cpp@1:ea0f7b1c5daf, 2012-11-04 (annotated)

Committer:: wim
Date:: Sun Nov 04 18:13:01 2012 +0000
Revision:: 1:ea0f7b1c5daf
Parent:: 0:a8090b59eb05
Child:: 2:43ede88fb5a3

werkende versie, text en bitmap correct

Who changed what in which revision?

User	Revision	Line number	New contents of line
wim	0:a8090b59eb05	1	/******************************************************************************/
wim	0:a8090b59eb05	2	/* GLCD_LPC1700 low-level Graphic LCD (320x240 pixels) for LandTiger */
wim	0:a8090b59eb05	3	/* */
wim	0:a8090b59eb05	4	/******************************************************************************/
wim	0:a8090b59eb05	5	/* This file is modified from the uVision/ARM development tools. */
wim	0:a8090b59eb05	6	/* Copyright (c) 2005-2009 Keil Software. All rights reserved. */
wim	0:a8090b59eb05	7	/* This software may only be used under the terms of a valid, current, */
wim	0:a8090b59eb05	8	/* end user licence from KEIL for a compatible version of KEIL software */
wim	0:a8090b59eb05	9	/* development tools. Nothing else gives you the right to use this software. */
wim	0:a8090b59eb05	10	/******************************************************************************/
wim	0:a8090b59eb05	11
wim	0:a8090b59eb05	12	#include "mbed.h"
wim	0:a8090b59eb05	13	#include "GLCD.h"
wim	0:a8090b59eb05	14	#include "Font_24x16.h"
wim	0:a8090b59eb05	15
wim	0:a8090b59eb05	16	/********************* Hardware specific configuration ********************/
wim	0:a8090b59eb05	17
wim	0:a8090b59eb05	18	/* LandTiger 8bit to 16bit LCD Interface
wim	0:a8090b59eb05	19
wim	0:a8090b59eb05	20	PINS:
wim	0:a8090b59eb05	21	- EN = P0.19
wim	0:a8090b59eb05	22	- LE = P0.20
wim	0:a8090b59eb05	23	- DIR = P0.21
wim	0:a8090b59eb05	24	- CS = P0.22
wim	0:a8090b59eb05	25	- RS = P0.23
wim	0:a8090b59eb05	26	- WR = P0.24
wim	0:a8090b59eb05	27	- RD = P0.25
wim	0:a8090b59eb05	28	- DB[0.7] = P2.0...P2.7
wim	0:a8090b59eb05	29	- DB[8.15]= P2.0...P2.7 */
wim	0:a8090b59eb05	30
wim	0:a8090b59eb05	31	#define PIN_EN (1 << 19)
wim	0:a8090b59eb05	32	#define PIN_LE (1 << 20)
wim	0:a8090b59eb05	33	#define PIN_DIR (1 << 21)
wim	0:a8090b59eb05	34	#define PIN_CS (1 << 22)
wim	0:a8090b59eb05	35	#define PIN_RS (1 << 23)
wim	0:a8090b59eb05	36	#define PIN_WR (1 << 24)
wim	0:a8090b59eb05	37	#define PIN_RD (1 << 25)
wim	0:a8090b59eb05	38
wim	0:a8090b59eb05	39	/------------------------- Speed dependant settings -------------------------/
wim	0:a8090b59eb05	40
wim	0:a8090b59eb05	41	/* If processor works on high frequency delay has to be increased, it can be
wim	0:a8090b59eb05	42	increased by factor 2^N by this constant */
wim	0:a8090b59eb05	43	#define DELAY_2N 18
wim	0:a8090b59eb05	44
wim	0:a8090b59eb05	45	/---------------------- Graphic LCD size definitions ------------------------/
wim	0:a8090b59eb05	46
wim	0:a8090b59eb05	47	#define WIDTH 320 /* Screen Width (in pixels) */
wim	0:a8090b59eb05	48	#define HEIGHT 240 /* Screen Hight (in pixels) */
wim	0:a8090b59eb05	49	#define BPP 16 /* Bits per pixel */
wim	0:a8090b59eb05	50	#define BYPP ((BPP+7)/8) /* Bytes per pixel */
wim	0:a8090b59eb05	51
wim	0:a8090b59eb05	52	/--------------- Graphic LCD interface hardware definitions -----------------/
wim	0:a8090b59eb05	53
wim	0:a8090b59eb05	54	/* Pin EN setting to 0 or 1 */
wim	0:a8090b59eb05	55	#define LCD_EN(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_EN) : (LPC_GPIO0->FIOCLR = PIN_EN));
wim	0:a8090b59eb05	56	/* Pin LE setting to 0 or 1 */
wim	0:a8090b59eb05	57	#define LCD_LE(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_LE) : (LPC_GPIO0->FIOCLR = PIN_LE));
wim	0:a8090b59eb05	58	/* Pin DIR setting to 0 or 1 */
wim	0:a8090b59eb05	59	#define LCD_DIR(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_DIR) : (LPC_GPIO0->FIOCLR = PIN_DIR));
wim	0:a8090b59eb05	60	/* Pin CS setting to 0 or 1 */
wim	0:a8090b59eb05	61	#define LCD_CS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
wim	0:a8090b59eb05	62	/* Pin RS setting to 0 or 1 */
wim	0:a8090b59eb05	63	#define LCD_RS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_RS) : (LPC_GPIO0->FIOCLR = PIN_RS));
wim	0:a8090b59eb05	64	/* Pin WR setting to 0 or 1 */
wim	0:a8090b59eb05	65	#define LCD_WR(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_WR) : (LPC_GPIO0->FIOCLR = PIN_WR));
wim	0:a8090b59eb05	66	/* Pin RD setting to 0 or 1 */
wim	0:a8090b59eb05	67	#define LCD_RD(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_RD) : (LPC_GPIO0->FIOCLR = PIN_RD));
wim	0:a8090b59eb05	68
wim	0:a8090b59eb05	69
wim	0:a8090b59eb05	70	#define swap(type, i, j) {type t = i; i = j; j = t;}
wim	0:a8090b59eb05	71
wim	0:a8090b59eb05	72
wim	0:a8090b59eb05	73	/---------------------------- Global variables ------------------------------/
wim	0:a8090b59eb05	74
wim	0:a8090b59eb05	75	/******************************************************************************/
wim	0:a8090b59eb05	76	static volatile unsigned short TextColor = Black, BackColor = White;
wim	0:a8090b59eb05	77	static unsigned short driverCode;
wim	0:a8090b59eb05	78
wim	0:a8090b59eb05	79	/********************** Local auxiliary functions *************************/
wim	0:a8090b59eb05	80
wim	0:a8090b59eb05	81	/*******************************************************************************
wim	0:a8090b59eb05	82	* Delay in while loop cycles *
wim	0:a8090b59eb05	83	* Parameter: cnt: number of while cycles to delay *
wim	0:a8090b59eb05	84	* Return: *
wim	0:a8090b59eb05	85	*******************************************************************************/
wim	0:a8090b59eb05	86
wim	0:a8090b59eb05	87	static void delay (int cnt) {
wim	0:a8090b59eb05	88
wim	0:a8090b59eb05	89	cnt <<= DELAY_2N;
wim	0:a8090b59eb05	90	while (cnt--);
wim	0:a8090b59eb05	91	}
wim	0:a8090b59eb05	92
wim	0:a8090b59eb05	93	__asm void wait()
wim	0:a8090b59eb05	94	{
wim	0:a8090b59eb05	95	nop
wim	0:a8090b59eb05	96	BX lr
wim	0:a8090b59eb05	97	}
wim	0:a8090b59eb05	98
wim	0:a8090b59eb05	99	void wait_delay(int count)
wim	0:a8090b59eb05	100	{
wim	0:a8090b59eb05	101	while(count--);
wim	0:a8090b59eb05	102	}
wim	0:a8090b59eb05	103
wim	0:a8090b59eb05	104	/*******************************************************************************
wim	0:a8090b59eb05	105	* Send 1 short to LCD *
wim	0:a8090b59eb05	106	* Parameter: data: data to be sent *
wim	0:a8090b59eb05	107	* Return: *
wim	0:a8090b59eb05	108	*******************************************************************************/
wim	0:a8090b59eb05	109
wim	0:a8090b59eb05	110	static __inline unsigned char lcd_send (unsigned short data) {
wim	0:a8090b59eb05	111
wim	0:a8090b59eb05	112	LPC_GPIO2->FIODIR \|= 0x000000ff; //P2.0...P2.7 Output
wim	0:a8090b59eb05	113	LCD_DIR(1) //Interface A->B
wim	0:a8090b59eb05	114	LCD_EN(0) //Enable 2A->2B
wim	0:a8090b59eb05	115	LPC_GPIO2->FIOPIN = data; //Write D0..D7
wim	0:a8090b59eb05	116	LCD_LE(1)
wim	0:a8090b59eb05	117	LCD_LE(0) //latch D0..D7
wim	0:a8090b59eb05	118	LPC_GPIO2->FIOPIN = data >> 8; //Write D8..D15
wim	0:a8090b59eb05	119	return(1);
wim	0:a8090b59eb05	120	}
wim	0:a8090b59eb05	121
wim	0:a8090b59eb05	122
wim	0:a8090b59eb05	123	/*******************************************************************************
wim	0:a8090b59eb05	124	* read 1 short from LCD *
wim	0:a8090b59eb05	125	* Parameter: *
wim	0:a8090b59eb05	126	* Return: short data from LCD *
wim	0:a8090b59eb05	127	*******************************************************************************/
wim	0:a8090b59eb05	128
wim	0:a8090b59eb05	129	static __inline unsigned short lcd_read (void) {
wim	0:a8090b59eb05	130	unsigned short id;
wim	0:a8090b59eb05	131	LPC_GPIO2->FIODIR &= 0xffffff00; //P2.0...P2.7 Input
wim	0:a8090b59eb05	132	LCD_DIR(0) //Interface B->A
wim	0:a8090b59eb05	133	LCD_EN(0) //Enable 2B->2A
wim	0:a8090b59eb05	134	wait_delay(80); //delay some times
wim	0:a8090b59eb05	135	id = LPC_GPIO2->FIOPIN & 0x00ff; //Read D8..D15
wim	0:a8090b59eb05	136	LCD_EN(1) //Enable 1B->1A
wim	0:a8090b59eb05	137	wait_delay(80); //delay some times
wim	0:a8090b59eb05	138	id = (id << 8) \| (LPC_GPIO2->FIOPIN & 0x00ff); //Read D0..D7
wim	0:a8090b59eb05	139	LCD_DIR(1)
wim	0:a8090b59eb05	140	return(id);
wim	0:a8090b59eb05	141	}
wim	0:a8090b59eb05	142
wim	0:a8090b59eb05	143	/*******************************************************************************
wim	0:a8090b59eb05	144	* Write command to LCD controller *
wim	0:a8090b59eb05	145	* Parameter: c: command to be written *
wim	0:a8090b59eb05	146	* Return: *
wim	0:a8090b59eb05	147	*******************************************************************************/
wim	0:a8090b59eb05	148
wim	0:a8090b59eb05	149	static __inline void wr_cmd (unsigned char c) {
wim	0:a8090b59eb05	150
wim	0:a8090b59eb05	151	LCD_RS(0)
wim	0:a8090b59eb05	152	LCD_RD(1)
wim	0:a8090b59eb05	153	lcd_send(c);
wim	0:a8090b59eb05	154	LCD_WR(0)
wim	0:a8090b59eb05	155	wait();
wim	0:a8090b59eb05	156	LCD_WR(1)
wim	0:a8090b59eb05	157	}
wim	0:a8090b59eb05	158
wim	0:a8090b59eb05	159
wim	0:a8090b59eb05	160	/*******************************************************************************
wim	0:a8090b59eb05	161	* Write data to LCD controller *
wim	0:a8090b59eb05	162	* Parameter: c: data to be written *
wim	0:a8090b59eb05	163	* Return: *
wim	0:a8090b59eb05	164	*******************************************************************************/
wim	0:a8090b59eb05	165
wim	0:a8090b59eb05	166	static __inline void wr_dat (unsigned short c) {
wim	0:a8090b59eb05	167
wim	0:a8090b59eb05	168	LCD_RS(1)
wim	0:a8090b59eb05	169	LCD_RD(1)
wim	0:a8090b59eb05	170	lcd_send(c);
wim	0:a8090b59eb05	171	LCD_WR(0)
wim	0:a8090b59eb05	172	wait();
wim	0:a8090b59eb05	173	LCD_WR(1)
wim	0:a8090b59eb05	174	}
wim	0:a8090b59eb05	175
wim	0:a8090b59eb05	176	/*******************************************************************************
wim	0:a8090b59eb05	177	* Read data from LCD controller *
wim	0:a8090b59eb05	178	* Parameter: *
wim	0:a8090b59eb05	179	* Return: read data *
wim	0:a8090b59eb05	180	*******************************************************************************/
wim	0:a8090b59eb05	181
wim	0:a8090b59eb05	182	static __inline unsigned short rd_dat (void) {
wim	0:a8090b59eb05	183	unsigned short val = 0;
wim	0:a8090b59eb05	184
wim	0:a8090b59eb05	185	LCD_RS(1)
wim	0:a8090b59eb05	186	LCD_WR(1)
wim	0:a8090b59eb05	187	LCD_RD(0)
wim	0:a8090b59eb05	188	val = lcd_read();
wim	0:a8090b59eb05	189	LCD_RD(1)
wim	0:a8090b59eb05	190	return val;
wim	0:a8090b59eb05	191	}
wim	0:a8090b59eb05	192
wim	0:a8090b59eb05	193	/*******************************************************************************
wim	0:a8090b59eb05	194	* Start of data writing to LCD controller *
wim	0:a8090b59eb05	195	* Parameter: *
wim	0:a8090b59eb05	196	* Return: *
wim	0:a8090b59eb05	197	*******************************************************************************/
wim	0:a8090b59eb05	198
wim	0:a8090b59eb05	199	static __inline void wr_dat_start (void) {
wim	0:a8090b59eb05	200
wim	0:a8090b59eb05	201	LCD_CS(0)
wim	0:a8090b59eb05	202	LCD_RS(1)
wim	0:a8090b59eb05	203	}
wim	0:a8090b59eb05	204
wim	0:a8090b59eb05	205
wim	0:a8090b59eb05	206	/*******************************************************************************
wim	0:a8090b59eb05	207	* Stop of data writing to LCD controller *
wim	0:a8090b59eb05	208	* Parameter: *
wim	0:a8090b59eb05	209	* Return: *
wim	0:a8090b59eb05	210	*******************************************************************************/
wim	0:a8090b59eb05	211
wim	0:a8090b59eb05	212	static __inline void wr_dat_stop (void) {
wim	0:a8090b59eb05	213
wim	0:a8090b59eb05	214	LCD_CS(1)
wim	0:a8090b59eb05	215	}
wim	0:a8090b59eb05	216
wim	0:a8090b59eb05	217
wim	0:a8090b59eb05	218	/*******************************************************************************
wim	0:a8090b59eb05	219	* Data writing to LCD controller *
wim	0:a8090b59eb05	220	* Parameter: c: data to be written *
wim	0:a8090b59eb05	221	* Return: *
wim	0:a8090b59eb05	222	*******************************************************************************/
wim	0:a8090b59eb05	223
wim	0:a8090b59eb05	224	static __inline void wr_dat_only (unsigned short c) {
wim	0:a8090b59eb05	225
wim	0:a8090b59eb05	226	lcd_send(c);
wim	0:a8090b59eb05	227	LCD_WR(0)
wim	0:a8090b59eb05	228	wait();
wim	0:a8090b59eb05	229	LCD_WR(1)
wim	0:a8090b59eb05	230	}
wim	0:a8090b59eb05	231
wim	0:a8090b59eb05	232
wim	0:a8090b59eb05	233	/*******************************************************************************
wim	0:a8090b59eb05	234	* Write to LCD register *
wim	0:a8090b59eb05	235	* Parameter: reg: register to be read *
wim	0:a8090b59eb05	236	* val: value to write to register *
wim	0:a8090b59eb05	237	*******************************************************************************/
wim	0:a8090b59eb05	238
wim	0:a8090b59eb05	239	static __inline void wr_reg (unsigned char reg, unsigned short val) {
wim	0:a8090b59eb05	240
wim	0:a8090b59eb05	241	LCD_CS(0)
wim	0:a8090b59eb05	242	wr_cmd(reg);
wim	0:a8090b59eb05	243	wr_dat(val);
wim	0:a8090b59eb05	244	LCD_CS(1)
wim	0:a8090b59eb05	245	}
wim	0:a8090b59eb05	246
wim	0:a8090b59eb05	247
wim	0:a8090b59eb05	248	/*******************************************************************************
wim	0:a8090b59eb05	249	* Read from LCD register *
wim	0:a8090b59eb05	250	* Parameter: reg: register to be read *
wim	0:a8090b59eb05	251	* Return: value read from register *
wim	0:a8090b59eb05	252	*******************************************************************************/
wim	0:a8090b59eb05	253
wim	0:a8090b59eb05	254	static unsigned short rd_reg (unsigned short reg) {
wim	0:a8090b59eb05	255	unsigned short val = 0;
wim	0:a8090b59eb05	256
wim	0:a8090b59eb05	257	LCD_CS(0)
wim	0:a8090b59eb05	258	wr_cmd(reg);
wim	0:a8090b59eb05	259	val = rd_dat();
wim	0:a8090b59eb05	260	LCD_CS(1)
wim	0:a8090b59eb05	261	return (val);
wim	0:a8090b59eb05	262	}
wim	0:a8090b59eb05	263
wim	0:a8090b59eb05	264
wim	0:a8090b59eb05	265	/********************** Exported functions ********************************/
wim	0:a8090b59eb05	266
wim	0:a8090b59eb05	267	/*******************************************************************************
wim	0:a8090b59eb05	268	* Initialize the Graphic LCD controller *
wim	0:a8090b59eb05	269	* Parameter: *
wim	0:a8090b59eb05	270	* Return: *
wim	0:a8090b59eb05	271	*******************************************************************************/
wim	0:a8090b59eb05	272
wim	0:a8090b59eb05	273	void GLCD_Init (void) {
wim	0:a8090b59eb05	274
wim	0:a8090b59eb05	275	/* Configure the LCD Control pins */
wim	0:a8090b59eb05	276	LPC_GPIO0->FIODIR \|= 0x03f80000;
wim	0:a8090b59eb05	277	LPC_GPIO0->FIOSET = 0x03f80000;
wim	0:a8090b59eb05	278
wim	0:a8090b59eb05	279	delay(5); /* Delay 50 ms */
wim	0:a8090b59eb05	280
wim	0:a8090b59eb05	281	driverCode = rd_reg(0x00);
wim	0:a8090b59eb05	282
wim	0:a8090b59eb05	283	switch (driverCode) {
wim	0:a8090b59eb05	284
wim	0:a8090b59eb05	285	case LGDP4531_ID: { //2.8" TFT LCD Module, DriverIC is LGDP4531
wim	0:a8090b59eb05	286
wim	0:a8090b59eb05	287	wr_reg(0x00,0x0001);
wim	0:a8090b59eb05	288	wr_reg(0x10,0x0628);
wim	0:a8090b59eb05	289	wr_reg(0x12,0x0006);
wim	0:a8090b59eb05	290	wr_reg(0x13,0x0A32);
wim	0:a8090b59eb05	291	wr_reg(0x11,0x0040);
wim	0:a8090b59eb05	292	wr_reg(0x15,0x0050);
wim	0:a8090b59eb05	293	wr_reg(0x12,0x0016);
wim	0:a8090b59eb05	294	delay(15);
wim	0:a8090b59eb05	295	wr_reg(0x10,0x5660);
wim	0:a8090b59eb05	296	delay(15);
wim	0:a8090b59eb05	297	wr_reg(0x13,0x2A4E);
wim	0:a8090b59eb05	298	wr_reg(0x01,0x0100);
wim	0:a8090b59eb05	299	wr_reg(0x02,0x0300);
wim	0:a8090b59eb05	300
wim	0:a8090b59eb05	301	wr_reg(0x03,0x1030);
wim	0:a8090b59eb05	302
wim	0:a8090b59eb05	303	wr_reg(0x08,0x0202);
wim	0:a8090b59eb05	304	wr_reg(0x0A,0x0000);
wim	0:a8090b59eb05	305	wr_reg(0x30,0x0000);
wim	0:a8090b59eb05	306	wr_reg(0x31,0x0402);
wim	0:a8090b59eb05	307	wr_reg(0x32,0x0106);
wim	0:a8090b59eb05	308	wr_reg(0x33,0x0700);
wim	0:a8090b59eb05	309	wr_reg(0x34,0x0104);
wim	0:a8090b59eb05	310	wr_reg(0x35,0x0301);
wim	0:a8090b59eb05	311	wr_reg(0x36,0x0707);
wim	0:a8090b59eb05	312	wr_reg(0x37,0x0305);
wim	0:a8090b59eb05	313	wr_reg(0x38,0x0208);
wim	0:a8090b59eb05	314	wr_reg(0x39,0x0F0B);
wim	0:a8090b59eb05	315	delay(15);
wim	0:a8090b59eb05	316	wr_reg(0x41,0x0002);
wim	0:a8090b59eb05	317	wr_reg(0x60,0x2700);
wim	0:a8090b59eb05	318	wr_reg(0x61,0x0001);
wim	0:a8090b59eb05	319	wr_reg(0x90,0x0119);
wim	0:a8090b59eb05	320	wr_reg(0x92,0x010A);
wim	0:a8090b59eb05	321	wr_reg(0x93,0x0004);
wim	0:a8090b59eb05	322	wr_reg(0xA0,0x0100);
wim	0:a8090b59eb05	323	delay(15);
wim	0:a8090b59eb05	324	wr_reg(0xA0,0x0000);
wim	0:a8090b59eb05	325	delay(20);
wim	0:a8090b59eb05	326
wim	0:a8090b59eb05	327	break;
wim	0:a8090b59eb05	328	}
wim	0:a8090b59eb05	329
wim	0:a8090b59eb05	330	case ILI9328_ID:
wim	0:a8090b59eb05	331	case ILI9325_ID: { //2.8" TFT LCD Module, DriverIC is ILI9325
wim	0:a8090b59eb05	332
wim	0:a8090b59eb05	333	wr_reg(0x00e7,0x0010);
wim	0:a8090b59eb05	334	wr_reg(0x0000,0x0001); //start internal osc
wim	0:a8090b59eb05	335	wr_reg(0x0001,0x0100);
wim	0:a8090b59eb05	336	wr_reg(0x0002,0x0700); //power on sequence
wim	0:a8090b59eb05	337	wr_reg(0x0003,(1<<12)\|(1<<5)\|(1<<4) ); //65K
wim	0:a8090b59eb05	338	wr_reg(0x0004,0x0000);
wim	0:a8090b59eb05	339	wr_reg(0x0008,0x0207);
wim	0:a8090b59eb05	340	wr_reg(0x0009,0x0000);
wim	0:a8090b59eb05	341	wr_reg(0x000a,0x0000); //display setting
wim	0:a8090b59eb05	342	wr_reg(0x000c,0x0001); //display setting
wim	0:a8090b59eb05	343	wr_reg(0x000d,0x0000); //0f3c
wim	0:a8090b59eb05	344	wr_reg(0x000f,0x0000);
wim	0:a8090b59eb05	345	//Power On sequence //
wim	0:a8090b59eb05	346	wr_reg(0x0010,0x0000);
wim	0:a8090b59eb05	347	wr_reg(0x0011,0x0007);
wim	0:a8090b59eb05	348	wr_reg(0x0012,0x0000);
wim	0:a8090b59eb05	349	wr_reg(0x0013,0x0000);
wim	0:a8090b59eb05	350	delay(15);
wim	0:a8090b59eb05	351	wr_reg(0x0010,0x1590);
wim	0:a8090b59eb05	352	wr_reg(0x0011,0x0227);
wim	0:a8090b59eb05	353	delay(15);
wim	0:a8090b59eb05	354	wr_reg(0x0012,0x009c);
wim	0:a8090b59eb05	355	delay(15);
wim	0:a8090b59eb05	356	wr_reg(0x0013,0x1900);
wim	0:a8090b59eb05	357	wr_reg(0x0029,0x0023);
wim	0:a8090b59eb05	358	wr_reg(0x002b,0x000e);
wim	0:a8090b59eb05	359	delay(15);
wim	0:a8090b59eb05	360	wr_reg(0x0020,0x0000);
wim	0:a8090b59eb05	361	wr_reg(0x0021,0x0000);
wim	0:a8090b59eb05	362	///////////////////////////////////////////////////////
wim	0:a8090b59eb05	363	delay(15);
wim	0:a8090b59eb05	364	wr_reg(0x0030,0x0007);
wim	0:a8090b59eb05	365	wr_reg(0x0031,0x0707);
wim	0:a8090b59eb05	366	wr_reg(0x0032,0x0006);
wim	0:a8090b59eb05	367	wr_reg(0x0035,0x0704);
wim	0:a8090b59eb05	368	wr_reg(0x0036,0x1f04);
wim	0:a8090b59eb05	369	wr_reg(0x0037,0x0004);
wim	0:a8090b59eb05	370	wr_reg(0x0038,0x0000);
wim	0:a8090b59eb05	371	wr_reg(0x0039,0x0706);
wim	0:a8090b59eb05	372	wr_reg(0x003c,0x0701);
wim	0:a8090b59eb05	373	wr_reg(0x003d,0x000f);
wim	0:a8090b59eb05	374	delay(15);
wim	0:a8090b59eb05	375	wr_reg(0x0050,0x0000);
wim	0:a8090b59eb05	376	wr_reg(0x0051,0x00ef);
wim	0:a8090b59eb05	377	wr_reg(0x0052,0x0000);
wim	0:a8090b59eb05	378	wr_reg(0x0053,0x013f);
wim	0:a8090b59eb05	379	wr_reg(0x0060,0xa700);
wim	0:a8090b59eb05	380	wr_reg(0x0061,0x0001);
wim	0:a8090b59eb05	381	wr_reg(0x006a,0x0000);
wim	0:a8090b59eb05	382	wr_reg(0x0080,0x0000);
wim	0:a8090b59eb05	383	wr_reg(0x0081,0x0000);
wim	0:a8090b59eb05	384	wr_reg(0x0082,0x0000);
wim	0:a8090b59eb05	385	wr_reg(0x0083,0x0000);
wim	0:a8090b59eb05	386	wr_reg(0x0084,0x0000);
wim	0:a8090b59eb05	387	wr_reg(0x0085,0x0000);
wim	0:a8090b59eb05	388
wim	0:a8090b59eb05	389	wr_reg(0x0090,0x0010);
wim	0:a8090b59eb05	390	wr_reg(0x0092,0x0000);
wim	0:a8090b59eb05	391	wr_reg(0x0093,0x0003);
wim	0:a8090b59eb05	392	wr_reg(0x0095,0x0110);
wim	0:a8090b59eb05	393	wr_reg(0x0097,0x0000);
wim	0:a8090b59eb05	394	wr_reg(0x0098,0x0000);
wim	0:a8090b59eb05	395	//display on sequence
wim	0:a8090b59eb05	396	wr_reg(0x0007,0x0133);
wim	0:a8090b59eb05	397	wr_reg(0x0020,0x0000);
wim	0:a8090b59eb05	398	wr_reg(0x0021,0x0000);
wim	0:a8090b59eb05	399
wim	0:a8090b59eb05	400	break;
wim	0:a8090b59eb05	401	}
wim	0:a8090b59eb05	402
wim	0:a8090b59eb05	403	case ILI9320_ID: { //3.2" TFT LCD Module,DriverIC is ILI9320
wim	0:a8090b59eb05	404	/* Start Initial Sequence --------------------------------------------------*/
wim	0:a8090b59eb05	405	wr_reg(0xE5, 0x8000); /* Set the internal vcore voltage */
wim	0:a8090b59eb05	406	wr_reg(0x00, 0x0001); /* Start internal OSC */
wim	0:a8090b59eb05	407	wr_reg(0x01, 0x0100); /* Set SS and SM bit */
wim	0:a8090b59eb05	408	wr_reg(0x02, 0x0700); /* Set 1 line inversion */
wim	0:a8090b59eb05	409	wr_reg(0x03, 0x1030); /* Set GRAM write direction and BGR=1 */
wim	0:a8090b59eb05	410	wr_reg(0x04, 0x0000); /* Resize register */
wim	0:a8090b59eb05	411	wr_reg(0x08, 0x0202); /* 2 lines each, back and front porch */
wim	0:a8090b59eb05	412	wr_reg(0x09, 0x0000); /* Set non-disp area refresh cyc ISC */
wim	0:a8090b59eb05	413	wr_reg(0x0A, 0x0000); /* FMARK function */
wim	0:a8090b59eb05	414	wr_reg(0x0C, 0x0000); /* RGB interface setting */
wim	0:a8090b59eb05	415	wr_reg(0x0D, 0x0000); /* Frame marker Position */
wim	0:a8090b59eb05	416	wr_reg(0x0F, 0x0000); /* RGB interface polarity */
wim	0:a8090b59eb05	417
wim	0:a8090b59eb05	418	/* Power On sequence -------------------------------------------------------*/
wim	0:a8090b59eb05	419	wr_reg(0x10, 0x0000); /* Reset Power Control 1 */
wim	0:a8090b59eb05	420	wr_reg(0x11, 0x0000); /* Reset Power Control 2 */
wim	0:a8090b59eb05	421	wr_reg(0x12, 0x0000); /* Reset Power Control 3 */
wim	0:a8090b59eb05	422	wr_reg(0x13, 0x0000); /* Reset Power Control 4 */
wim	0:a8090b59eb05	423	delay(20); /* Discharge cap power voltage (200ms)*/
wim	0:a8090b59eb05	424	wr_reg(0x10, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
wim	0:a8090b59eb05	425	wr_reg(0x11, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */
wim	0:a8090b59eb05	426	delay(5); /* Delay 50 ms */
wim	0:a8090b59eb05	427	wr_reg(0x12, 0x0139); /* VREG1OUT voltage */
wim	0:a8090b59eb05	428	delay(5); /* Delay 50 ms */
wim	0:a8090b59eb05	429	wr_reg(0x13, 0x1D00); /* VDV[4:0] for VCOM amplitude */
wim	0:a8090b59eb05	430	wr_reg(0x29, 0x0013); /* VCM[4:0] for VCOMH */
wim	0:a8090b59eb05	431	delay(5); /* Delay 50 ms */
wim	0:a8090b59eb05	432	wr_reg(0x20, 0x0000); /* GRAM horizontal Address */
wim	0:a8090b59eb05	433	wr_reg(0x21, 0x0000); /* GRAM Vertical Address */
wim	0:a8090b59eb05	434
wim	0:a8090b59eb05	435	/* Adjust the Gamma Curve --------------------------------------------------*/
wim	0:a8090b59eb05	436	wr_reg(0x30, 0x0006);
wim	0:a8090b59eb05	437	wr_reg(0x31, 0x0101);
wim	0:a8090b59eb05	438	wr_reg(0x32, 0x0003);
wim	0:a8090b59eb05	439	wr_reg(0x35, 0x0106);
wim	0:a8090b59eb05	440	wr_reg(0x36, 0x0B02);
wim	0:a8090b59eb05	441	wr_reg(0x37, 0x0302);
wim	0:a8090b59eb05	442	wr_reg(0x38, 0x0707);
wim	0:a8090b59eb05	443	wr_reg(0x39, 0x0007);
wim	0:a8090b59eb05	444	wr_reg(0x3C, 0x0600);
wim	0:a8090b59eb05	445	wr_reg(0x3D, 0x020B);
wim	0:a8090b59eb05	446
wim	0:a8090b59eb05	447	/* Set GRAM area -----------------------------------------------------------*/
wim	0:a8090b59eb05	448	wr_reg(0x50, 0x0000); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	449	wr_reg(0x51, (HEIGHT-1)); /* Horizontal GRAM End Address */
wim	0:a8090b59eb05	450	wr_reg(0x52, 0x0000); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	451	wr_reg(0x53, (WIDTH-1)); /* Vertical GRAM End Address */
wim	0:a8090b59eb05	452	wr_reg(0x60, 0x2700); /* Gate Scan Line */
wim	0:a8090b59eb05	453	wr_reg(0x61, 0x0001); /* NDL,VLE, REV */
wim	0:a8090b59eb05	454	wr_reg(0x6A, 0x0000); /* Set scrolling line */
wim	0:a8090b59eb05	455
wim	0:a8090b59eb05	456	/* Partial Display Control -------------------------------------------------*/
wim	0:a8090b59eb05	457	wr_reg(0x80, 0x0000);
wim	0:a8090b59eb05	458	wr_reg(0x81, 0x0000);
wim	0:a8090b59eb05	459	wr_reg(0x82, 0x0000);
wim	0:a8090b59eb05	460	wr_reg(0x83, 0x0000);
wim	0:a8090b59eb05	461	wr_reg(0x84, 0x0000);
wim	0:a8090b59eb05	462	wr_reg(0x85, 0x0000);
wim	0:a8090b59eb05	463
wim	0:a8090b59eb05	464	/* Panel Control -----------------------------------------------------------*/
wim	0:a8090b59eb05	465	wr_reg(0x90, 0x0010);
wim	0:a8090b59eb05	466	wr_reg(0x92, 0x0000);
wim	0:a8090b59eb05	467	wr_reg(0x93, 0x0003);
wim	0:a8090b59eb05	468	wr_reg(0x95, 0x0110);
wim	0:a8090b59eb05	469	wr_reg(0x97, 0x0000);
wim	0:a8090b59eb05	470	wr_reg(0x98, 0x0000);
wim	0:a8090b59eb05	471
wim	0:a8090b59eb05	472	break;
wim	0:a8090b59eb05	473	}
wim	0:a8090b59eb05	474
wim	0:a8090b59eb05	475	case ILI9331_ID: {
wim	0:a8090b59eb05	476	wr_reg(0x00E7, 0x1014);
wim	0:a8090b59eb05	477	wr_reg(0x0001, 0x0100); /* set SS and SM bit */
wim	0:a8090b59eb05	478	wr_reg(0x0002, 0x0200); /* set 1 line inversion */
wim	0:a8090b59eb05	479	wr_reg(0x0003, 0x1030); /* set GRAM write direction and BGR=1 */
wim	0:a8090b59eb05	480	wr_reg(0x0008, 0x0202); /* set the back porch and front porch */
wim	0:a8090b59eb05	481	wr_reg(0x0009, 0x0000); /* set non-display area refresh cycle ISC[3:0] */
wim	0:a8090b59eb05	482	wr_reg(0x000A, 0x0000); /* FMARK function */
wim	0:a8090b59eb05	483	wr_reg(0x000C, 0x0000); /* RGB interface setting */
wim	0:a8090b59eb05	484	wr_reg(0x000D, 0x0000); /* Frame marker Position */
wim	0:a8090b59eb05	485	wr_reg(0x000F, 0x0000); /* RGB interface polarity */
wim	0:a8090b59eb05	486	/* Power On sequence */
wim	0:a8090b59eb05	487	wr_reg(0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
wim	0:a8090b59eb05	488	wr_reg(0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */
wim	0:a8090b59eb05	489	wr_reg(0x0012, 0x0000); /* VREG1OUT voltage */
wim	0:a8090b59eb05	490	wr_reg(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
wim	0:a8090b59eb05	491	delay(200); /* delay 200 ms */
wim	0:a8090b59eb05	492	wr_reg(0x0010, 0x1690); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
wim	0:a8090b59eb05	493	wr_reg(0x0011, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */
wim	0:a8090b59eb05	494	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	495	wr_reg(0x0012, 0x000C); /* Internal reference voltage= Vci */
wim	0:a8090b59eb05	496	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	497	wr_reg(0x0013, 0x0800); /* Set VDV[4:0] for VCOM amplitude */
wim	0:a8090b59eb05	498	wr_reg(0x0029, 0x0011); /* Set VCM[5:0] for VCOMH */
wim	0:a8090b59eb05	499	wr_reg(0x002B, 0x000B); /* Set Frame Rate */
wim	0:a8090b59eb05	500	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	501	wr_reg(0x0020, 0x0000); /* GRAM horizontal Address */
wim	0:a8090b59eb05	502	wr_reg(0x0021, 0x0000); /* GRAM Vertical Address */
wim	0:a8090b59eb05	503	/* Adjust the Gamma Curve */
wim	0:a8090b59eb05	504	wr_reg(0x0030, 0x0000);
wim	0:a8090b59eb05	505	wr_reg(0x0031, 0x0106);
wim	0:a8090b59eb05	506	wr_reg(0x0032, 0x0000);
wim	0:a8090b59eb05	507	wr_reg(0x0035, 0x0204);
wim	0:a8090b59eb05	508	wr_reg(0x0036, 0x160A);
wim	0:a8090b59eb05	509	wr_reg(0x0037, 0x0707);
wim	0:a8090b59eb05	510	wr_reg(0x0038, 0x0106);
wim	0:a8090b59eb05	511	wr_reg(0x0039, 0x0707);
wim	0:a8090b59eb05	512	wr_reg(0x003C, 0x0402);
wim	0:a8090b59eb05	513	wr_reg(0x003D, 0x0C0F);
wim	0:a8090b59eb05	514	/* Set GRAM area */
wim	0:a8090b59eb05	515	wr_reg(0x0050, 0x0000); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	516	wr_reg(0x0051, 0x00EF); /* Horizontal GRAM End Address */
wim	0:a8090b59eb05	517	wr_reg(0x0052, 0x0000); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	518	wr_reg(0x0053, 0x013F); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	519	wr_reg(0x0060, 0x2700); /* Gate Scan Line */
wim	0:a8090b59eb05	520	wr_reg(0x0061, 0x0001); /* NDL,VLE, REV */
wim	0:a8090b59eb05	521	wr_reg(0x006A, 0x0000); /* set scrolling line */
wim	0:a8090b59eb05	522	/* Partial Display Control */
wim	0:a8090b59eb05	523	wr_reg(0x0080, 0x0000);
wim	0:a8090b59eb05	524	wr_reg(0x0081, 0x0000);
wim	0:a8090b59eb05	525	wr_reg(0x0082, 0x0000);
wim	0:a8090b59eb05	526	wr_reg(0x0083, 0x0000);
wim	0:a8090b59eb05	527	wr_reg(0x0084, 0x0000);
wim	0:a8090b59eb05	528	wr_reg(0x0085, 0x0000);
wim	0:a8090b59eb05	529	/* Panel Control */
wim	0:a8090b59eb05	530	wr_reg(0x0090, 0x0010);
wim	0:a8090b59eb05	531	wr_reg(0x0092, 0x0600);
wim	0:a8090b59eb05	532	wr_reg(0x0007,0x0021);
wim	0:a8090b59eb05	533	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	534	wr_reg(0x0007,0x0061);
wim	0:a8090b59eb05	535	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	536	wr_reg(0x0007,0x0133); /* 262K color and display ON */
wim	0:a8090b59eb05	537	break;
wim	0:a8090b59eb05	538	}
wim	0:a8090b59eb05	539
wim	0:a8090b59eb05	540	case SSD1289_ID: { //3.2" TFT LCD Module,DriverIC is SSD1289
wim	0:a8090b59eb05	541
wim	1:ea0f7b1c5daf	542	wr_reg(0x0007,0x0233); delay(5); //0x0233 Set this first or init fails !
wim	1:ea0f7b1c5daf	543
wim	0:a8090b59eb05	544	wr_reg(0x0000,0x0001); delay(5); // osc en
wim	0:a8090b59eb05	545
wim	0:a8090b59eb05	546	wr_reg(0x0003,0xA8A4); delay(5); // powercontrol 1 0xA8A4
wim	0:a8090b59eb05	547	wr_reg(0x000C,0x0000); delay(5); // powercontrol 2
wim	0:a8090b59eb05	548	wr_reg(0x000D,0x080C); delay(5); // powercontrol 3
wim	0:a8090b59eb05	549	wr_reg(0x000E,0x2B00); delay(5); // powercontrol 4
wim	0:a8090b59eb05	550	wr_reg(0x001E,0x00B0); delay(5); // powercontrol 5
wim	0:a8090b59eb05	551
wim	0:a8090b59eb05	552	//orig wr_reg(0x0001,0x2b3F); delay(5); // 0x2b3f Mux=320, BGR, RL=0, TB=1
wim	0:a8090b59eb05	553	wr_reg(0x0001,0x6B3F); delay(5); // 0x6B3F Mux=320, BGR, RL=1, TB=1
wim	0:a8090b59eb05	554	// wr_reg(0x0001,0x293F); delay(5); // 0x293f Mux=320, BGR, RL=0, TB=0
wim	0:a8090b59eb05	555
wim	0:a8090b59eb05	556
wim	0:a8090b59eb05	557	wr_reg(0x0002,0x0600); delay(5); // Driver AC mode
wim	0:a8090b59eb05	558	wr_reg(0x0010,0x0000); delay(5); // Exit Sleep
wim	0:a8090b59eb05	559
wim	0:a8090b59eb05	560	wr_reg(0x0011,0x6078); delay(5); // Entry mode 0x6078 = 65k colors, Hor and Vert Addr Incr, AM=1 vert writing dir
wim	0:a8090b59eb05	561	// wr_reg(0x0011,0x4030); delay(5); // Entry mode 0x4030 = 262k colors, Hor and Vert Addr Incr. AM=0 hor writing dir
wim	0:a8090b59eb05	562
wim	0:a8090b59eb05	563	wr_reg(0x0005,0x0000); delay(5); // Compare Regs (default)
wim	0:a8090b59eb05	564	wr_reg(0x0006,0x0000); delay(5);
wim	0:a8090b59eb05	565
wim	0:a8090b59eb05	566	wr_reg(0x0016,0xEF1C); delay(5); // Hor Porch (default)
wim	0:a8090b59eb05	567	wr_reg(0x0017,0x0003); delay(5); // Ver Porch (default 0103)
wim	0:a8090b59eb05	568	wr_reg(0x0007,0x0233); delay(5); //0x0233
wim	0:a8090b59eb05	569	wr_reg(0x000B,0x0000); delay(5); // Frame cycle control default 5308)
wim	0:a8090b59eb05	570
wim	0:a8090b59eb05	571	wr_reg(0x000F,0x0000); delay(5); // Gate scan start position
wim	0:a8090b59eb05	572
wim	0:a8090b59eb05	573	wr_reg(0x0041,0x0000); delay(5); // Vert Scroll control
wim	0:a8090b59eb05	574	wr_reg(0x0042,0x0000); delay(5);
wim	0:a8090b59eb05	575
wim	0:a8090b59eb05	576	wr_reg(0x0048,0x0000); delay(5); // First screen pos (default)
wim	0:a8090b59eb05	577	wr_reg(0x0049,0x013F); delay(5);
wim	0:a8090b59eb05	578
wim	0:a8090b59eb05	579	wr_reg(0x004A,0x0000); delay(5); // Second screen pos
wim	0:a8090b59eb05	580	wr_reg(0x004B,0x0000); delay(5);
wim	0:a8090b59eb05	581
wim	0:a8090b59eb05	582	wr_reg(0x0044,0xEF00); delay(5); // Hor addr pos
wim	0:a8090b59eb05	583	wr_reg(0x0045,0x0000); delay(5); // Vert Addr pos
wim	0:a8090b59eb05	584	wr_reg(0x0046,0x013F); delay(5);
wim	0:a8090b59eb05	585
wim	0:a8090b59eb05	586	wr_reg(0x0030,0x0707); delay(5); // Gamma
wim	0:a8090b59eb05	587	wr_reg(0x0031,0x0204); delay(5);
wim	0:a8090b59eb05	588	wr_reg(0x0032,0x0204); delay(5);
wim	0:a8090b59eb05	589	wr_reg(0x0033,0x0502); delay(5);
wim	0:a8090b59eb05	590	wr_reg(0x0034,0x0507); delay(5);
wim	0:a8090b59eb05	591	wr_reg(0x0035,0x0204); delay(5);
wim	0:a8090b59eb05	592	wr_reg(0x0036,0x0204); delay(5);
wim	0:a8090b59eb05	593	wr_reg(0x0037,0x0502); delay(5);
wim	0:a8090b59eb05	594	wr_reg(0x003A,0x0302); delay(5);
wim	0:a8090b59eb05	595	wr_reg(0x003B,0x0302); delay(5);
wim	0:a8090b59eb05	596
wim	0:a8090b59eb05	597	wr_reg(0x0023,0x0000); delay(5); // Write data mask (default)
wim	0:a8090b59eb05	598	wr_reg(0x0024,0x0000); delay(5);
wim	0:a8090b59eb05	599
wim	0:a8090b59eb05	600	wr_reg(0x0025,0x8000); delay(5); // Frame freq 65 Hz
wim	0:a8090b59eb05	601	wr_reg(0x004e,0); // Start x
wim	0:a8090b59eb05	602	wr_reg(0x004f,0); // Start y
wim	0:a8090b59eb05	603
wim	0:a8090b59eb05	604	break;
wim	0:a8090b59eb05	605	}
wim	0:a8090b59eb05	606
wim	0:a8090b59eb05	607
wim	0:a8090b59eb05	608	case SSD1298_ID: {
wim	0:a8090b59eb05	609	wr_reg(0x0028,0x0006);
wim	0:a8090b59eb05	610	wr_reg(0x0000,0x0001);
wim	0:a8090b59eb05	611	wr_reg(0x0003,0xaea4); /* power control 1---line frequency and VHG,VGL voltage */
wim	0:a8090b59eb05	612	wr_reg(0x000c,0x0004); /* power control 2---VCIX2 output voltage */
wim	0:a8090b59eb05	613	wr_reg(0x000d,0x000c); /* power control 3---Vlcd63 voltage */
wim	0:a8090b59eb05	614	wr_reg(0x000e,0x2800); /* power control 4---VCOMA voltage VCOML=VCOMH0.9475-VCOMA /
wim	0:a8090b59eb05	615	wr_reg(0x001e,0x00b5); /* POWER CONTROL 5---VCOMH voltage */
wim	0:a8090b59eb05	616	wr_reg(0x0001,0x3b3f);
wim	0:a8090b59eb05	617	wr_reg(0x0002,0x0600);
wim	0:a8090b59eb05	618	wr_reg(0x0010,0x0000);
wim	0:a8090b59eb05	619	wr_reg(0x0011,0x6830);
wim	0:a8090b59eb05	620	wr_reg(0x0005,0x0000);
wim	0:a8090b59eb05	621	wr_reg(0x0006,0x0000);
wim	0:a8090b59eb05	622	wr_reg(0x0016,0xef1c);
wim	0:a8090b59eb05	623	wr_reg(0x0007,0x0033); /* Display control 1 */
wim	0:a8090b59eb05	624	/* when GON=1 and DTE=0,all gate outputs become VGL */
wim	0:a8090b59eb05	625	/* when GON=1 and DTE=0,all gate outputs become VGH */
wim	0:a8090b59eb05	626	/* non-selected gate wires become VGL */
wim	0:a8090b59eb05	627	wr_reg(0x000b,0x0000);
wim	0:a8090b59eb05	628	wr_reg(0x000f,0x0000);
wim	0:a8090b59eb05	629	wr_reg(0x0041,0x0000);
wim	0:a8090b59eb05	630	wr_reg(0x0042,0x0000);
wim	0:a8090b59eb05	631	wr_reg(0x0048,0x0000);
wim	0:a8090b59eb05	632	wr_reg(0x0049,0x013f);
wim	0:a8090b59eb05	633	wr_reg(0x004a,0x0000);
wim	0:a8090b59eb05	634	wr_reg(0x004b,0x0000);
wim	0:a8090b59eb05	635	wr_reg(0x0044,0xef00); /* Horizontal RAM start and end address */
wim	0:a8090b59eb05	636	wr_reg(0x0045,0x0000); /* Vretical RAM start address */
wim	0:a8090b59eb05	637	wr_reg(0x0046,0x013f); /* Vretical RAM end address */
wim	0:a8090b59eb05	638	wr_reg(0x004e,0x0000); /* set GDDRAM x address counter */
wim	0:a8090b59eb05	639	wr_reg(0x004f,0x0000); /* set GDDRAM y address counter */
wim	0:a8090b59eb05	640	/* y control */
wim	0:a8090b59eb05	641	wr_reg(0x0030,0x0707);
wim	0:a8090b59eb05	642	wr_reg(0x0031,0x0202);
wim	0:a8090b59eb05	643	wr_reg(0x0032,0x0204);
wim	0:a8090b59eb05	644	wr_reg(0x0033,0x0502);
wim	0:a8090b59eb05	645	wr_reg(0x0034,0x0507);
wim	0:a8090b59eb05	646	wr_reg(0x0035,0x0204);
wim	0:a8090b59eb05	647	wr_reg(0x0036,0x0204);
wim	0:a8090b59eb05	648	wr_reg(0x0037,0x0502);
wim	0:a8090b59eb05	649	wr_reg(0x003a,0x0302);
wim	0:a8090b59eb05	650	wr_reg(0x003b,0x0302);
wim	0:a8090b59eb05	651	wr_reg(0x0023,0x0000);
wim	0:a8090b59eb05	652	wr_reg(0x0024,0x0000);
wim	0:a8090b59eb05	653	wr_reg(0x0025,0x8000);
wim	0:a8090b59eb05	654	wr_reg(0x0026,0x7000);
wim	0:a8090b59eb05	655	wr_reg(0x0020,0xb0eb);
wim	0:a8090b59eb05	656	wr_reg(0x0027,0x007c);
wim	0:a8090b59eb05	657	break;
wim	0:a8090b59eb05	658	}
wim	0:a8090b59eb05	659
wim	0:a8090b59eb05	660	case SSD2119_ID: {
wim	0:a8090b59eb05	661	/* POWER ON & RESET DISPLAY OFF */
wim	0:a8090b59eb05	662	wr_reg(0x28,0x0006);
wim	0:a8090b59eb05	663	wr_reg(0x00,0x0001);
wim	0:a8090b59eb05	664	wr_reg(0x10,0x0000);
wim	0:a8090b59eb05	665	wr_reg(0x01,0x72ef);
wim	0:a8090b59eb05	666	wr_reg(0x02,0x0600);
wim	0:a8090b59eb05	667	wr_reg(0x03,0x6a38);
wim	0:a8090b59eb05	668	wr_reg(0x11,0x6874);
wim	0:a8090b59eb05	669	wr_reg(0x0f,0x0000); /* RAM WRITE DATA MASK */
wim	0:a8090b59eb05	670	wr_reg(0x0b,0x5308); /* RAM WRITE DATA MASK */
wim	0:a8090b59eb05	671	wr_reg(0x0c,0x0003);
wim	0:a8090b59eb05	672	wr_reg(0x0d,0x000a);
wim	0:a8090b59eb05	673	wr_reg(0x0e,0x2e00);
wim	0:a8090b59eb05	674	wr_reg(0x1e,0x00be);
wim	0:a8090b59eb05	675	wr_reg(0x25,0x8000);
wim	0:a8090b59eb05	676	wr_reg(0x26,0x7800);
wim	0:a8090b59eb05	677	wr_reg(0x27,0x0078);
wim	0:a8090b59eb05	678	wr_reg(0x4e,0x0000);
wim	0:a8090b59eb05	679	wr_reg(0x4f,0x0000);
wim	0:a8090b59eb05	680	wr_reg(0x12,0x08d9);
wim	0:a8090b59eb05	681	/* Adjust the Gamma Curve */
wim	0:a8090b59eb05	682	wr_reg(0x30,0x0000);
wim	0:a8090b59eb05	683	wr_reg(0x31,0x0104);
wim	0:a8090b59eb05	684	wr_reg(0x32,0x0100);
wim	0:a8090b59eb05	685	wr_reg(0x33,0x0305);
wim	0:a8090b59eb05	686	wr_reg(0x34,0x0505);
wim	0:a8090b59eb05	687	wr_reg(0x35,0x0305);
wim	0:a8090b59eb05	688	wr_reg(0x36,0x0707);
wim	0:a8090b59eb05	689	wr_reg(0x37,0x0300);
wim	0:a8090b59eb05	690	wr_reg(0x3a,0x1200);
wim	0:a8090b59eb05	691	wr_reg(0x3b,0x0800);
wim	0:a8090b59eb05	692	wr_reg(0x07,0x0033);
wim	0:a8090b59eb05	693	break;
wim	0:a8090b59eb05	694	}
wim	0:a8090b59eb05	695
wim	0:a8090b59eb05	696
wim	0:a8090b59eb05	697
wim	0:a8090b59eb05	698	#if(0)
wim	0:a8090b59eb05	699
wim	0:a8090b59eb05	700	// Note: unprintable char hidden as space and as nl !!!
wim	0:a8090b59eb05	701	case R61505U_ID1:
wim	0:a8090b59eb05	702	case R61505U_ID2: {
wim	0:a8090b59eb05	703
wim	0:a8090b59eb05	704	/* second release on 3/5 ,luminance is acceptable,water wave appear during camera preview */
wim	0:a8090b59eb05	705	wr_reg(0x0007,0x0000);
wim	0:a8090b59eb05	706	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	707	wr_reg(0x0012,0x011C); /* why need to set several times? */
wim	0:a8090b59eb05	708	wr_reg(0x00A4,0x0001); /* NVM */
wim	0:a8090b59eb05	709	wr_reg(0x0008,0x000F);
wim	0:a8090b59eb05	710	wr_reg(0x000A,0x0008);
wim	0:a8090b59eb05	711	wr_reg(0x000D,0x0008);
wim	0:a8090b59eb05	712	/* GAMMA CONTROL */
wim	0:a8090b59eb05	713	wr_reg(0x0030,0x0707);
wim	0:a8090b59eb05	714	wr_reg(0x0031,0x0007);
wim	0:a8090b59eb05	715	wr_reg(0x0032,0x0603);
wim	0:a8090b59eb05	716	wr_reg(0x0033,0x0700);
wim	0:a8090b59eb05	717	wr_reg(0x0034,0x0202);
wim	0:a8090b59eb05	718	wr_reg(0x0035,0x0002);
wim	0:a8090b59eb05	719	wr_reg(0x0036,0x1F0F);
wim	0:a8090b59eb05	720	wr_reg(0x0037,0x0707);
wim	0:a8090b59eb05	721	wr_reg(0x0038,0x0000);
wim	0:a8090b59eb05	722	wr_reg(0x0039,0x0000);
wim	0:a8090b59eb05	723	wr_reg(0x003A,0x0707);
wim	0:a8090b59eb05	724	wr_reg(0x003B,0x0000);
wim	0:a8090b59eb05	725	wr_reg(0x003C,0x0007);
wim	0:a8090b59eb05	726	wr_reg(0x003D,0x0000);
wim	0:a8090b59eb05	727	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	728	wr_reg(0x0007,0x0001);
wim	0:a8090b59eb05	729	wr_reg(0x0017,0x0001); /* Power supply startup enable */
wim	0:a8090b59eb05	730	delay(50); /* delay 50 ms */
wim	0:a8090b59eb05	731	/* power control */
wim	0:a8090b59eb05	732	wr_reg(0x0010,0x17A0);
wim	0:a8090b59eb05	733	wr_reg(0x0011,0x0217); /* reference voltage VC[2:0] Vciout = 1.00Vcivl /
wim	0:a8090b59eb05	734	wr_reg(0x0012,0x011E); /* Vreg1out = Vcilvl1.80 is it the same as Vgama1out ? /
wim	0:a8090b59eb05	735	wr_reg(0x0013,0x0F00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */
wim	0:a8090b59eb05	736	wr_reg(0x002A,0x0000);
wim	0:a8090b59eb05	737	wr_reg(0x0029,0x000A); /* Vcomh = VCM1[4:0]Vreg1out gate source voltage?? /
wim	0:a8090b59eb05	738	wr_reg(0x0012,0x013E); /* power supply on */
wim	0:a8090b59eb05	739	/* Coordinates Control */
wim	0:a8090b59eb05	740	wr_reg(0x0050,0x0000);
wim	0:a8090b59eb05	741	wr_reg(0x0051,0x00EF);
wim	0:a8090b59eb05	742	wr_reg(0x0052,0x0000);
wim	0:a8090b59eb05	743	wr_reg(0x0053,0x013F);
wim	0:a8090b59eb05	744	/* Pannel Image Control */
wim	0:a8090b59eb05	745	wr_reg(0x0060,0x2700);
wim	0:a8090b59eb05	746	wr_reg(0x0061,0x0001);
wim	0:a8090b59eb05	747	wr_reg(0x006A,0x0000);
wim	0:a8090b59eb05	748	wr_reg(0x0080,0x0000);
wim	0:a8090b59eb05	749	/* Partial Image Control */
wim	0:a8090b59eb05	750	wr_reg(0x0081,0x0000);
wim	0:a8090b59eb05	751	wr_reg(0x0082,0x0000);
wim	0:a8090b59eb05	752	wr_reg(0x0083,0x0000);
wim	0:a8090b59eb05	753	wr_reg(0x0084,0x0000);
wim	0:a8090b59eb05	754	wr_reg(0x0085,0x0000);
wim	0:a8090b59eb05	755	/* Panel Interface Control */
wim	0:a8090b59eb05	756	wr_reg(0x0090,0x0013); /* frenqucy */
wim	0:a8090b59eb05	757	wr_reg(0x0092,0x0300);
wim	0:a8090b59eb05	758	wr_reg(0x0093,0x0005);
wim	0:a8090b59eb05	759	wr_reg(0x0095,0x0000);
wim	0:a8090b59eb05	760	wr_reg(0x0097,0x0000);
wim	0:a8090b59eb05	761	wr_reg(0x0098,0x0000);
wim	0:a8090b59eb05	762
wim	0:a8090b59eb05	763	wr_reg(0x0001,0x0100);
wim	0:a8090b59eb05	764	wr_reg(0x0002,0x0700);
wim	0:a8090b59eb05	765	wr_reg(0x0003,0x1030);
wim	0:a8090b59eb05	766	wr_reg(0x0004,0x0000);
wim	0:a8090b59eb05	767	wr_reg(0x000C,0x0000);
wim	0:a8090b59eb05	768	wr_reg(0x000F,0x0000);
wim	0:a8090b59eb05	769	wr_reg(0x0020,0x0000);
wim	0:a8090b59eb05	770	wr_reg(0x0021,0x0000);
wim	0:a8090b59eb05	771	wr_reg(0x0007,0x0021);
wim	0:a8090b59eb05	772	delay(200); /* delay 200 ms */
wim	0:a8090b59eb05	773	wr_reg(0x0007,0x0061);
wim	0:a8090b59eb05	774	delay(200); /* delay 200 ms */
wim	0:a8090b59eb05	775	wr_reg(0x0007,0x0173);
wim	0:a8090b59eb05	776	break;
wim	0:a8090b59eb05	777	}
wim	0:a8090b59eb05	778
wim	0:a8090b59eb05	779	case SPFD5408B_ID: {
wim	0:a8090b59eb05	780
wim	0:a8090b59eb05	781	wr_reg(0x0001,0x0100); /* Driver Output Contral Register */
wim	0:a8090b59eb05	782	wr_reg(0x0002,0x0700); /* LCD Driving Waveform Contral */
wim	0:a8090b59eb05	783	wr_reg(0x0003,0x1030); /* Entry ModeÉèÖÃ */
wim	0:a8090b59eb05	784
wim	0:a8090b59eb05	785	wr_reg(0x0004,0x0000); /* Scalling Control register */
wim	0:a8090b59eb05	786	wr_reg(0x0008,0x0207); /* Display Control 2 */
wim	0:a8090b59eb05	787	wr_reg(0x0009,0x0000); /* Display Control 3 */
wim	0:a8090b59eb05	788	wr_reg(0x000A,0x0000); /* Frame Cycle Control */
wim	0:a8090b59eb05	789	wr_reg(0x000C,0x0000); /* External Display Interface Control 1 */
wim	0:a8090b59eb05	790	wr_reg(0x000D,0x0000); /* Frame Maker Position */
wim	0:a8090b59eb05	791	wr_reg(0x000F,0x0000); /* External Display Interface Control 2 */
wim	0:a8090b59eb05	792	delay(50);
wim	0:a8090b59eb05	793	wr_reg(0x0007,0x0101); /* Display Control */
wim	0:a8090b59eb05	794	delay(50);
wim	0:a8090b59eb05	795	wr_reg(0x0010,0x16B0); /* Power Control 1 */
wim	0:a8090b59eb05	796	wr_reg(0x0011,0x0001); /* Power Control 2 */
wim	0:a8090b59eb05	797	wr_reg(0x0017,0x0001); /* Power Control 3 */
wim	0:a8090b59eb05	798	wr_reg(0x0012,0x0138); /* Power Control 4 */
wim	0:a8090b59eb05	799	wr_reg(0x0013,0x0800); /* Power Control 5 */
wim	0:a8090b59eb05	800	wr_reg(0x0029,0x0009); /* NVM read data 2 */
wim	0:a8090b59eb05	801	wr_reg(0x002a,0x0009); /* NVM read data 3 */
wim	0:a8090b59eb05	802	wr_reg(0x00a4,0x0000);
wim	0:a8090b59eb05	803	wr_reg(0x0050,0x0000); /* ÉèÖÃ²Ù×÷´°¿ÚµÄXÖá¿ªÊ¼ÁÐ */
wim	0:a8090b59eb05	804	wr_reg(0x0051,0x00EF); /* ÉèÖÃ²Ù×÷´°¿ÚµÄXÖá½áÊøÁÐ */
wim	0:a8090b59eb05	805	wr_reg(0x0052,0x0000); /* ÉèÖÃ²Ù×÷´°¿ÚµÄYÖá¿ªÊ¼ÐÐ */
wim	0:a8090b59eb05	806	wr_reg(0x0053,0x013F); /* ÉèÖÃ²Ù×÷´°¿ÚµÄYÖá½áÊøÐÐ */
wim	0:a8090b59eb05	807
wim	0:a8090b59eb05	808	wr_reg(0x0060,0x2700); /* Driver Output Control */
wim	0:a8090b59eb05	809	/* ÉèÖÃÆÁÄ»µÄµãÊýÒÔ¼°É¨ÃèµÄÆðÊ¼ÐÐ */
wim	0:a8090b59eb05	810	wr_reg(0x0061,0x0003); /* Driver Output Control */
wim	0:a8090b59eb05	811	wr_reg(0x006A,0x0000); /* Vertical Scroll Control */
wim	0:a8090b59eb05	812
wim	0:a8090b59eb05	813	wr_reg(0x0080,0x0000); /* Display Position ¨C Partial Display 1 */
wim	0:a8090b59eb05	814	wr_reg(0x0081,0x0000); /* RAM Address Start ¨C Partial Display 1 */
wim	0:a8090b59eb05	815	wr_reg(0x0082,0x0000); /* RAM address End - Partial Display 1 */
wim	0:a8090b59eb05	816	wr_reg(0x0083,0x0000); /* Display Position ¨C Partial Display 2 */
wim	0:a8090b59eb05	817	wr_reg(0x0084,0x0000); /* RAM Address Start ¨C Partial Display 2 */
wim	0:a8090b59eb05	818	wr_reg(0x0085,0x0000); /* RAM address End ¨C Partail Display2 */
wim	0:a8090b59eb05	819	wr_reg(0x0090,0x0013); /* Frame Cycle Control */
wim	0:a8090b59eb05	820	wr_reg(0x0092,0x0000); /* Panel Interface Control 2 */
wim	0:a8090b59eb05	821	wr_reg(0x0093,0x0003); /* Panel Interface control 3 */
wim	0:a8090b59eb05	822	wr_reg(0x0095,0x0110); /* Frame Cycle Control */
wim	0:a8090b59eb05	823	wr_reg(0x0007,0x0173);
wim	0:a8090b59eb05	824	break;
wim	0:a8090b59eb05	825	}
wim	0:a8090b59eb05	826
wim	0:a8090b59eb05	827	case LGDP4531_ID: {
wim	0:a8090b59eb05	828	/* Setup display */
wim	0:a8090b59eb05	829	wr_reg(0x00,0x0001);
wim	0:a8090b59eb05	830	wr_reg(0x10,0x0628);
wim	0:a8090b59eb05	831	wr_reg(0x12,0x0006);
wim	0:a8090b59eb05	832	wr_reg(0x13,0x0A32);
wim	0:a8090b59eb05	833	wr_reg(0x11,0x0040);
wim	0:a8090b59eb05	834	wr_reg(0x15,0x0050);
wim	0:a8090b59eb05	835	wr_reg(0x12,0x0016);
wim	0:a8090b59eb05	836	delay(50);
wim	0:a8090b59eb05	837	wr_reg(0x10,0x5660);
wim	0:a8090b59eb05	838	delay(50);
wim	0:a8090b59eb05	839	wr_reg(0x13,0x2A4E);
wim	0:a8090b59eb05	840	wr_reg(0x01,0x0100);
wim	0:a8090b59eb05	841	wr_reg(0x02,0x0300);
wim	0:a8090b59eb05	842	wr_reg(0x03,0x1030);
wim	0:a8090b59eb05	843	wr_reg(0x08,0x0202);
wim	0:a8090b59eb05	844	wr_reg(0x0A,0x0000);
wim	0:a8090b59eb05	845	wr_reg(0x30,0x0000);
wim	0:a8090b59eb05	846	wr_reg(0x31,0x0402);
wim	0:a8090b59eb05	847	wr_reg(0x32,0x0106);
wim	0:a8090b59eb05	848	wr_reg(0x33,0x0700);
wim	0:a8090b59eb05	849	wr_reg(0x34,0x0104);
wim	0:a8090b59eb05	850	wr_reg(0x35,0x0301);
wim	0:a8090b59eb05	851	wr_reg(0x36,0x0707);
wim	0:a8090b59eb05	852	wr_reg(0x37,0x0305);
wim	0:a8090b59eb05	853	wr_reg(0x38,0x0208);
wim	0:a8090b59eb05	854	wr_reg(0x39,0x0F0B);
wim	0:a8090b59eb05	855	delay(50);
wim	0:a8090b59eb05	856	wr_reg(0x41,0x0002);
wim	0:a8090b59eb05	857	wr_reg(0x60,0x2700);
wim	0:a8090b59eb05	858	wr_reg(0x61,0x0001);
wim	0:a8090b59eb05	859	wr_reg(0x90,0x0119);
wim	0:a8090b59eb05	860	wr_reg(0x92,0x010A);
wim	0:a8090b59eb05	861	wr_reg(0x93,0x0004);
wim	0:a8090b59eb05	862	wr_reg(0xA0,0x0100);
wim	0:a8090b59eb05	863	delay(50);
wim	0:a8090b59eb05	864	wr_reg(0x07,0x0133);
wim	0:a8090b59eb05	865	delay(50);
wim	0:a8090b59eb05	866	wr_reg(0xA0,0x0000);
wim	0:a8090b59eb05	867	break;
wim	0:a8090b59eb05	868	}
wim	0:a8090b59eb05	869
wim	0:a8090b59eb05	870	case LGDP4535_ID: {
wim	0:a8090b59eb05	871	wr_reg(0x15, 0x0030); /* Set the internal vcore voltage */
wim	0:a8090b59eb05	872	wr_reg(0x9A, 0x0010); /* Start internal OSC */
wim	0:a8090b59eb05	873	wr_reg(0x11, 0x0020); /* set SS and SM bit */
wim	0:a8090b59eb05	874	wr_reg(0x10, 0x3428); /* set 1 line inversion */
wim	0:a8090b59eb05	875	wr_reg(0x12, 0x0002); /* set GRAM write direction and BGR=1 */
wim	0:a8090b59eb05	876	wr_reg(0x13, 0x1038); /* Resize register */
wim	0:a8090b59eb05	877	delay(40);
wim	0:a8090b59eb05	878	wr_reg(0x12, 0x0012); /* set the back porch and front porch */
wim	0:a8090b59eb05	879	delay(40);
wim	0:a8090b59eb05	880	wr_reg(0x10, 0x3420); /* set non-display area refresh cycle ISC[3:0] */
wim	0:a8090b59eb05	881	wr_reg(0x13, 0x3045); /* FMARK function */
wim	0:a8090b59eb05	882	delay(70);
wim	0:a8090b59eb05	883	wr_reg(0x30, 0x0000); /* RGB interface setting */
wim	0:a8090b59eb05	884	wr_reg(0x31, 0x0402); /* Frame marker Position */
wim	0:a8090b59eb05	885	wr_reg(0x32, 0x0307); /* RGB interface polarity */
wim	0:a8090b59eb05	886	wr_reg(0x33, 0x0304); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
wim	0:a8090b59eb05	887	wr_reg(0x34, 0x0004); /* DC1[2:0], DC0[2:0], VC[2:0] */
wim	0:a8090b59eb05	888	wr_reg(0x35, 0x0401); /* VREG1OUT voltage */
wim	0:a8090b59eb05	889	wr_reg(0x36, 0x0707); /* VDV[4:0] for VCOM amplitude */
wim	0:a8090b59eb05	890	wr_reg(0x37, 0x0305); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
wim	0:a8090b59eb05	891	wr_reg(0x38, 0x0610); /* DC1[2:0], DC0[2:0], VC[2:0] */
wim	0:a8090b59eb05	892	wr_reg(0x39, 0x0610); /* VREG1OUT voltage */
wim	0:a8090b59eb05	893	wr_reg(0x01, 0x0100); /* VDV[4:0] for VCOM amplitude */
wim	0:a8090b59eb05	894	wr_reg(0x02, 0x0300); /* VCM[4:0] for VCOMH */
wim	0:a8090b59eb05	895	wr_reg(0x03, 0x1030); /* GRAM horizontal Address */
wim	0:a8090b59eb05	896	wr_reg(0x08, 0x0808); /* GRAM Vertical Address */
wim	0:a8090b59eb05	897	wr_reg(0x0A, 0x0008);
wim	0:a8090b59eb05	898	wr_reg(0x60, 0x2700); /* Gate Scan Line */
wim	0:a8090b59eb05	899	wr_reg(0x61, 0x0001); /* NDL,VLE, REV */
wim	0:a8090b59eb05	900	wr_reg(0x90, 0x013E);
wim	0:a8090b59eb05	901	wr_reg(0x92, 0x0100);
wim	0:a8090b59eb05	902	wr_reg(0x93, 0x0100);
wim	0:a8090b59eb05	903	wr_reg(0xA0, 0x3000);
wim	0:a8090b59eb05	904	wr_reg(0xA3, 0x0010);
wim	0:a8090b59eb05	905	wr_reg(0x07, 0x0001);
wim	0:a8090b59eb05	906	wr_reg(0x07, 0x0021);
wim	0:a8090b59eb05	907	wr_reg(0x07, 0x0023);
wim	0:a8090b59eb05	908	wr_reg(0x07, 0x0033);
wim	0:a8090b59eb05	909	wr_reg(0x07, 0x0133);
wim	0:a8090b59eb05	910	break;
wim	0:a8090b59eb05	911	}
wim	0:a8090b59eb05	912
wim	0:a8090b59eb05	913	case HX8347D_ID: {
wim	0:a8090b59eb05	914	/* Start Initial Sequence */
wim	0:a8090b59eb05	915	wr_reg(0xEA,0x00);
wim	0:a8090b59eb05	916	wr_reg(0xEB,0x20);
wim	0:a8090b59eb05	917	wr_reg(0xEC,0x0C);
wim	0:a8090b59eb05	918	wr_reg(0xED,0xC4);
wim	0:a8090b59eb05	919	wr_reg(0xE8,0x40);
wim	0:a8090b59eb05	920	wr_reg(0xE9,0x38);
wim	0:a8090b59eb05	921	wr_reg(0xF1,0x01);
wim	0:a8090b59eb05	922	wr_reg(0xF2,0x10);
wim	0:a8090b59eb05	923	wr_reg(0x27,0xA3);
wim	0:a8090b59eb05	924	/* GAMMA SETTING */
wim	0:a8090b59eb05	925	wr_reg(0x40,0x01);
wim	0:a8090b59eb05	926	wr_reg(0x41,0x00);
wim	0:a8090b59eb05	927	wr_reg(0x42,0x00);
wim	0:a8090b59eb05	928	wr_reg(0x43,0x10);
wim	0:a8090b59eb05	929	wr_reg(0x44,0x0E);
wim	0:a8090b59eb05	930	wr_reg(0x45,0x24);
wim	0:a8090b59eb05	931	wr_reg(0x46,0x04);
wim	0:a8090b59eb05	932	wr_reg(0x47,0x50);
wim	0:a8090b59eb05	933	wr_reg(0x48,0x02);
wim	0:a8090b59eb05	934	wr_reg(0x49,0x13);
wim	0:a8090b59eb05	935	wr_reg(0x4A,0x19);
wim	0:a8090b59eb05	936	wr_reg(0x4B,0x19);
wim	0:a8090b59eb05	937	wr_reg(0x4C,0x16);
wim	0:a8090b59eb05	938	wr_reg(0x50,0x1B);
wim	0:a8090b59eb05	939	wr_reg(0x51,0x31);
wim	0:a8090b59eb05	940	wr_reg(0x52,0x2F);
wim	0:a8090b59eb05	941	wr_reg(0x53,0x3F);
wim	0:a8090b59eb05	942	wr_reg(0x54,0x3F);
wim	0:a8090b59eb05	943	wr_reg(0x55,0x3E);
wim	0:a8090b59eb05	944	wr_reg(0x56,0x2F);
wim	0:a8090b59eb05	945	wr_reg(0x57,0x7B);
wim	0:a8090b59eb05	946	wr_reg(0x58,0x09);
wim	0:a8090b59eb05	947	wr_reg(0x59,0x06);
wim	0:a8090b59eb05	948	wr_reg(0x5A,0x06);
wim	0:a8090b59eb05	949	wr_reg(0x5B,0x0C);
wim	0:a8090b59eb05	950	wr_reg(0x5C,0x1D);
wim	0:a8090b59eb05	951	wr_reg(0x5D,0xCC);
wim	0:a8090b59eb05	952	/* Power Voltage Setting */
wim	0:a8090b59eb05	953	wr_reg(0x1B,0x18);
wim	0:a8090b59eb05	954	wr_reg(0x1A,0x01);
wim	0:a8090b59eb05	955	wr_reg(0x24,0x15);
wim	0:a8090b59eb05	956	wr_reg(0x25,0x50);
wim	0:a8090b59eb05	957	wr_reg(0x23,0x8B);
wim	0:a8090b59eb05	958	wr_reg(0x18,0x36);
wim	0:a8090b59eb05	959	wr_reg(0x19,0x01);
wim	0:a8090b59eb05	960	wr_reg(0x01,0x00);
wim	0:a8090b59eb05	961	wr_reg(0x1F,0x88);
wim	0:a8090b59eb05	962	delay(50);
wim	0:a8090b59eb05	963	wr_reg(0x1F,0x80);
wim	0:a8090b59eb05	964	delay(50);
wim	0:a8090b59eb05	965	wr_reg(0x1F,0x90);
wim	0:a8090b59eb05	966	delay(50);
wim	0:a8090b59eb05	967	wr_reg(0x1F,0xD0);
wim	0:a8090b59eb05	968	delay(50);
wim	0:a8090b59eb05	969	wr_reg(0x17,0x05);
wim	0:a8090b59eb05	970	wr_reg(0x36,0x00);
wim	0:a8090b59eb05	971	wr_reg(0x28,0x38);
wim	0:a8090b59eb05	972	delay(50);
wim	0:a8090b59eb05	973	wr_reg(0x28,0x3C);
wim	0:a8090b59eb05	974	break;
wim	0:a8090b59eb05	975	}
wim	0:a8090b59eb05	976
wim	0:a8090b59eb05	977	case ST7781_ID: {
wim	0:a8090b59eb05	978	/* Start Initial Sequence */
wim	0:a8090b59eb05	979	wr_reg(0x00FF,0x0001);
wim	0:a8090b59eb05	980	wr_reg(0x00F3,0x0008);
wim	0:a8090b59eb05	981	wr_reg(0x0001,0x0100);
wim	0:a8090b59eb05	982	wr_reg(0x0002,0x0700);
wim	0:a8090b59eb05	983	wr_reg(0x0003,0x1030);
wim	0:a8090b59eb05	984	wr_reg(0x0008,0x0302);
wim	0:a8090b59eb05	985	wr_reg(0x0008,0x0207);
wim	0:a8090b59eb05	986	wr_reg(0x0009,0x0000);
wim	0:a8090b59eb05	987	wr_reg(0x000A,0x0000);
wim	0:a8090b59eb05	988	wr_reg(0x0010,0x0000);
wim	0:a8090b59eb05	989	wr_reg(0x0011,0x0005);
wim	0:a8090b59eb05	990	wr_reg(0x0012,0x0000);
wim	0:a8090b59eb05	991	wr_reg(0x0013,0x0000);
wim	0:a8090b59eb05	992	delay(50);
wim	0:a8090b59eb05	993	wr_reg(0x0010,0x12B0);
wim	0:a8090b59eb05	994	delay(50);
wim	0:a8090b59eb05	995	wr_reg(0x0011,0x0007);
wim	0:a8090b59eb05	996	delay(50);
wim	0:a8090b59eb05	997	wr_reg(0x0012,0x008B);
wim	0:a8090b59eb05	998	delay(50);
wim	0:a8090b59eb05	999	wr_reg(0x0013,0x1700);
wim	0:a8090b59eb05	1000	delay(50);
wim	0:a8090b59eb05	1001	wr_reg(0x0029,0x0022);
wim	0:a8090b59eb05	1002	wr_reg(0x0030,0x0000);
wim	0:a8090b59eb05	1003	wr_reg(0x0031,0x0707);
wim	0:a8090b59eb05	1004	wr_reg(0x0032,0x0505);
wim	0:a8090b59eb05	1005	wr_reg(0x0035,0x0107);
wim	0:a8090b59eb05	1006	wr_reg(0x0036,0x0008);
wim	0:a8090b59eb05	1007	wr_reg(0x0037,0x0000);
wim	0:a8090b59eb05	1008	wr_reg(0x0038,0x0202);
wim	0:a8090b59eb05	1009	wr_reg(0x0039,0x0106);
wim	0:a8090b59eb05	1010	wr_reg(0x003C,0x0202);
wim	0:a8090b59eb05	1011	wr_reg(0x003D,0x0408);
wim	0:a8090b59eb05	1012	delay(50);
wim	0:a8090b59eb05	1013	wr_reg(0x0050,0x0000);
wim	0:a8090b59eb05	1014	wr_reg(0x0051,0x00EF);
wim	0:a8090b59eb05	1015	wr_reg(0x0052,0x0000);
wim	0:a8090b59eb05	1016	wr_reg(0x0053,0x013F);
wim	0:a8090b59eb05	1017	wr_reg(0x0060,0xA700);
wim	0:a8090b59eb05	1018	wr_reg(0x0061,0x0001);
wim	0:a8090b59eb05	1019	wr_reg(0x0090,0x0033);
wim	0:a8090b59eb05	1020	wr_reg(0x002B,0x000B);
wim	0:a8090b59eb05	1021	wr_reg(0x0007,0x0133);
wim	0:a8090b59eb05	1022	break;
wim	0:a8090b59eb05	1023	}
wim	0:a8090b59eb05	1024	#endif
wim	0:a8090b59eb05	1025
wim	0:a8090b59eb05	1026	default: {
wim	0:a8090b59eb05	1027	/* special ID */
wim	0:a8090b59eb05	1028	driverCode = rd_reg(0x67);
wim	0:a8090b59eb05	1029	if (driverCode == HX8347A_ID) {
wim	0:a8090b59eb05	1030	wr_reg(0x0042,0x0008);
wim	0:a8090b59eb05	1031	/* Gamma setting */
wim	0:a8090b59eb05	1032	wr_reg(0x0046,0x00B4);
wim	0:a8090b59eb05	1033	wr_reg(0x0047,0x0043);
wim	0:a8090b59eb05	1034	wr_reg(0x0048,0x0013);
wim	0:a8090b59eb05	1035	wr_reg(0x0049,0x0047);
wim	0:a8090b59eb05	1036	wr_reg(0x004A,0x0014);
wim	0:a8090b59eb05	1037	wr_reg(0x004B,0x0036);
wim	0:a8090b59eb05	1038	wr_reg(0x004C,0x0003);
wim	0:a8090b59eb05	1039	wr_reg(0x004D,0x0046);
wim	0:a8090b59eb05	1040	wr_reg(0x004E,0x0005);
wim	0:a8090b59eb05	1041	wr_reg(0x004F,0x0010);
wim	0:a8090b59eb05	1042	wr_reg(0x0050,0x0008);
wim	0:a8090b59eb05	1043	wr_reg(0x0051,0x000a);
wim	0:a8090b59eb05	1044	/* Window Setting */
wim	0:a8090b59eb05	1045	wr_reg(0x0002,0x0000);
wim	0:a8090b59eb05	1046	wr_reg(0x0003,0x0000);
wim	0:a8090b59eb05	1047	wr_reg(0x0004,0x0000);
wim	0:a8090b59eb05	1048	wr_reg(0x0005,0x00EF);
wim	0:a8090b59eb05	1049	wr_reg(0x0006,0x0000);
wim	0:a8090b59eb05	1050	wr_reg(0x0007,0x0000);
wim	0:a8090b59eb05	1051	wr_reg(0x0008,0x0001);
wim	0:a8090b59eb05	1052	wr_reg(0x0009,0x003F);
wim	0:a8090b59eb05	1053	delay(10);
wim	0:a8090b59eb05	1054	wr_reg(0x0001,0x0006);
wim	0:a8090b59eb05	1055	wr_reg(0x0016,0x00C8);
wim	0:a8090b59eb05	1056	wr_reg(0x0023,0x0095);
wim	0:a8090b59eb05	1057	wr_reg(0x0024,0x0095);
wim	0:a8090b59eb05	1058	wr_reg(0x0025,0x00FF);
wim	0:a8090b59eb05	1059	wr_reg(0x0027,0x0002);
wim	0:a8090b59eb05	1060	wr_reg(0x0028,0x0002);
wim	0:a8090b59eb05	1061	wr_reg(0x0029,0x0002);
wim	0:a8090b59eb05	1062	wr_reg(0x002A,0x0002);
wim	0:a8090b59eb05	1063	wr_reg(0x002C,0x0002);
wim	0:a8090b59eb05	1064	wr_reg(0x002D,0x0002);
wim	0:a8090b59eb05	1065	wr_reg(0x003A,0x0001);
wim	0:a8090b59eb05	1066	wr_reg(0x003B,0x0001);
wim	0:a8090b59eb05	1067	wr_reg(0x003C,0x00F0);
wim	0:a8090b59eb05	1068	wr_reg(0x003D,0x0000);
wim	0:a8090b59eb05	1069	delay(20);
wim	0:a8090b59eb05	1070	wr_reg(0x0035,0x0038);
wim	0:a8090b59eb05	1071	wr_reg(0x0036,0x0078);
wim	0:a8090b59eb05	1072	wr_reg(0x003E,0x0038);
wim	0:a8090b59eb05	1073	wr_reg(0x0040,0x000F);
wim	0:a8090b59eb05	1074	wr_reg(0x0041,0x00F0);
wim	0:a8090b59eb05	1075	wr_reg(0x0038,0x0000);
wim	0:a8090b59eb05	1076	/* Power Setting */
wim	0:a8090b59eb05	1077	wr_reg(0x0019,0x0049);
wim	0:a8090b59eb05	1078	wr_reg(0x0093,0x000A);
wim	0:a8090b59eb05	1079	delay(10);
wim	0:a8090b59eb05	1080	wr_reg(0x0020,0x0020);
wim	0:a8090b59eb05	1081	wr_reg(0x001D,0x0003);
wim	0:a8090b59eb05	1082	wr_reg(0x001E,0x0000);
wim	0:a8090b59eb05	1083	wr_reg(0x001F,0x0009);
wim	0:a8090b59eb05	1084	wr_reg(0x0044,0x0053);
wim	0:a8090b59eb05	1085	wr_reg(0x0045,0x0010);
wim	0:a8090b59eb05	1086	delay(10);
wim	0:a8090b59eb05	1087	wr_reg(0x001C,0x0004);
wim	0:a8090b59eb05	1088	delay(20);
wim	0:a8090b59eb05	1089	wr_reg(0x0043,0x0080);
wim	0:a8090b59eb05	1090	delay(5);
wim	0:a8090b59eb05	1091	wr_reg(0x001B,0x000a);
wim	0:a8090b59eb05	1092	delay(40);
wim	0:a8090b59eb05	1093	wr_reg(0x001B,0x0012);
wim	0:a8090b59eb05	1094	delay(40);
wim	0:a8090b59eb05	1095	/* Display On Setting */
wim	0:a8090b59eb05	1096	wr_reg(0x0090,0x007F);
wim	0:a8090b59eb05	1097	wr_reg(0x0026,0x0004);
wim	0:a8090b59eb05	1098	delay(40);
wim	0:a8090b59eb05	1099	wr_reg(0x0026,0x0024);
wim	0:a8090b59eb05	1100	wr_reg(0x0026,0x002C);
wim	0:a8090b59eb05	1101	delay(40);
wim	0:a8090b59eb05	1102	wr_reg(0x0070,0x0008);
wim	0:a8090b59eb05	1103	wr_reg(0x0026,0x003C);
wim	0:a8090b59eb05	1104	wr_reg(0x0057,0x0002);
wim	0:a8090b59eb05	1105	wr_reg(0x0055,0x0000);
wim	0:a8090b59eb05	1106	wr_reg(0x0057,0x0000);
wim	0:a8090b59eb05	1107	} // if
wim	0:a8090b59eb05	1108	break;
wim	0:a8090b59eb05	1109	} // default case
wim	0:a8090b59eb05	1110
wim	0:a8090b59eb05	1111	} // end switch
wim	0:a8090b59eb05	1112
wim	0:a8090b59eb05	1113
wim	0:a8090b59eb05	1114	}
wim	0:a8090b59eb05	1115
wim	0:a8090b59eb05	1116
wim	0:a8090b59eb05	1117
wim	0:a8090b59eb05	1118
wim	0:a8090b59eb05	1119
wim	0:a8090b59eb05	1120	/*******************************************************************************
wim	0:a8090b59eb05	1121	* Get LCD Controller ID *
wim	0:a8090b59eb05	1122	* Parameter: *
wim	0:a8090b59eb05	1123	* Return: short Controller ID *
wim	0:a8090b59eb05	1124	*******************************************************************************/
wim	0:a8090b59eb05	1125	unsigned short GLCD_DriverCode () {
wim	0:a8090b59eb05	1126
wim	0:a8090b59eb05	1127	return (driverCode);
wim	0:a8090b59eb05	1128	}
wim	0:a8090b59eb05	1129
wim	0:a8090b59eb05	1130
wim	0:a8090b59eb05	1131	/*******************************************************************************
wim	0:a8090b59eb05	1132	* Set draw window region to whole screen *
wim	0:a8090b59eb05	1133	* Parameter: *
wim	0:a8090b59eb05	1134	* Return: *
wim	0:a8090b59eb05	1135	*******************************************************************************/
wim	0:a8090b59eb05	1136
wim	0:a8090b59eb05	1137	void GLCD_WindowMax (void) {
wim	0:a8090b59eb05	1138
wim	0:a8090b59eb05	1139	if(driverCode==0x8989)
wim	0:a8090b59eb05	1140	{
wim	0:a8090b59eb05	1141	wr_reg(0x44, 0); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1142	wr_reg(0x44, 0 \|((HEIGHT-1)<<8)); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1143	wr_reg(0x45, 0); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1144	wr_reg(0x46, WIDTH-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1145	}
wim	0:a8090b59eb05	1146	else
wim	0:a8090b59eb05	1147	{
wim	0:a8090b59eb05	1148	wr_reg(0x50, 0); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1149	wr_reg(0x51, HEIGHT-1); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1150	wr_reg(0x52, 0); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1151	wr_reg(0x53, WIDTH-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1152	}
wim	0:a8090b59eb05	1153	}
wim	0:a8090b59eb05	1154
wim	0:a8090b59eb05	1155	/*******************************************************************************
wim	0:a8090b59eb05	1156	* Set draw window region *
wim	0:a8090b59eb05	1157	* Parameter: *
wim	0:a8090b59eb05	1158	* Return: *
wim	0:a8090b59eb05	1159	*******************************************************************************/
wim	0:a8090b59eb05	1160
wim	0:a8090b59eb05	1161	void GLCD_Window (int x1, int y1, int x2, int y2) {
wim	0:a8090b59eb05	1162
wim	0:a8090b59eb05	1163	if(driverCode==0x8989)
wim	0:a8090b59eb05	1164	{
wim	0:a8090b59eb05	1165	// wr_reg(0x44, x1); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1166	// wr_reg(0x44, 0 \| (x2<<8)); /* Horizontal GRAM End Address */
wim	0:a8090b59eb05	1167
wim	0:a8090b59eb05	1168	//Note x,y flipped
wim	0:a8090b59eb05	1169	wr_reg(0x44, ((y2 & 0xFF) <<8) \| (y1 & 0xFF)); /* Horizontal GRAM End Address \| Start Address */
wim	0:a8090b59eb05	1170	wr_reg(0x45, x1); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1171	wr_reg(0x46, x2); /* Vertical GRAM End Address */
wim	0:a8090b59eb05	1172
wim	0:a8090b59eb05	1173	wr_reg(0x4e, y1); // Init x,y to start of window
wim	0:a8090b59eb05	1174	wr_reg(0x4f, x1);
wim	0:a8090b59eb05	1175	}
wim	0:a8090b59eb05	1176	else
wim	0:a8090b59eb05	1177	{
wim	0:a8090b59eb05	1178	wr_reg(0x50, x1); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1179	wr_reg(0x51, x2); /* Horizontal GRAM End Address */
wim	0:a8090b59eb05	1180	wr_reg(0x52, y1); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1181	wr_reg(0x53, y2); /* Vertical GRAM End Address */
wim	0:a8090b59eb05	1182	}
wim	0:a8090b59eb05	1183	}
wim	0:a8090b59eb05	1184
wim	0:a8090b59eb05	1185	/*******************************************************************************
wim	0:a8090b59eb05	1186	* Draw a pixel in foreground color *
wim	0:a8090b59eb05	1187	* Parameter: x: horizontal position *
wim	0:a8090b59eb05	1188	* y: vertical position *
wim	0:a8090b59eb05	1189	* Return: *
wim	0:a8090b59eb05	1190	*******************************************************************************/
wim	0:a8090b59eb05	1191
wim	0:a8090b59eb05	1192	void GLCD_PutPixel (unsigned int x, unsigned int y) {
wim	0:a8090b59eb05	1193	// Set Cursor
wim	0:a8090b59eb05	1194	if(driverCode==0x8989)
wim	0:a8090b59eb05	1195	{
wim	0:a8090b59eb05	1196	wr_reg(0x4e, y);
wim	0:a8090b59eb05	1197	wr_reg(0x4f, WIDTH-1-x);
wim	0:a8090b59eb05	1198	}
wim	0:a8090b59eb05	1199	else
wim	0:a8090b59eb05	1200	{
wim	0:a8090b59eb05	1201	wr_reg(0x20, y);
wim	0:a8090b59eb05	1202	wr_reg(0x21, WIDTH-1-x);
wim	0:a8090b59eb05	1203	}
wim	0:a8090b59eb05	1204	LCD_CS(0)
wim	0:a8090b59eb05	1205	wr_cmd(0x22);
wim	0:a8090b59eb05	1206	wr_dat(TextColor);
wim	0:a8090b59eb05	1207	LCD_CS(1)
wim	0:a8090b59eb05	1208	}
wim	0:a8090b59eb05	1209
wim	0:a8090b59eb05	1210
wim	0:a8090b59eb05	1211	/*******************************************************************************
wim	0:a8090b59eb05	1212	* Set foreground color *
wim	0:a8090b59eb05	1213	* Parameter: color: foreground color *
wim	0:a8090b59eb05	1214	* Return: *
wim	0:a8090b59eb05	1215	*******************************************************************************/
wim	0:a8090b59eb05	1216
wim	0:a8090b59eb05	1217	void GLCD_SetTextColor (unsigned short color) {
wim	0:a8090b59eb05	1218
wim	0:a8090b59eb05	1219	TextColor = color;
wim	0:a8090b59eb05	1220	}
wim	0:a8090b59eb05	1221
wim	0:a8090b59eb05	1222
wim	0:a8090b59eb05	1223	/*******************************************************************************
wim	0:a8090b59eb05	1224	* Set background color *
wim	0:a8090b59eb05	1225	* Parameter: color: background color *
wim	0:a8090b59eb05	1226	* Return: *
wim	0:a8090b59eb05	1227	*******************************************************************************/
wim	0:a8090b59eb05	1228
wim	0:a8090b59eb05	1229	void GLCD_SetBackColor (unsigned short color) {
wim	0:a8090b59eb05	1230
wim	0:a8090b59eb05	1231	BackColor = color;
wim	0:a8090b59eb05	1232	}
wim	0:a8090b59eb05	1233
wim	0:a8090b59eb05	1234
wim	0:a8090b59eb05	1235	/*******************************************************************************
wim	0:a8090b59eb05	1236	* Clear display *
wim	0:a8090b59eb05	1237	* Parameter: color: display clearing color *
wim	0:a8090b59eb05	1238	* Return: *
wim	0:a8090b59eb05	1239	*******************************************************************************/
wim	0:a8090b59eb05	1240
wim	0:a8090b59eb05	1241	void GLCD_Clear (unsigned short color) {
wim	0:a8090b59eb05	1242	unsigned int i;
wim	0:a8090b59eb05	1243
wim	0:a8090b59eb05	1244	GLCD_WindowMax();
wim	0:a8090b59eb05	1245
wim	0:a8090b59eb05	1246	// Set Cursor
wim	0:a8090b59eb05	1247	if(driverCode==0x8989)
wim	0:a8090b59eb05	1248	{
wim	0:a8090b59eb05	1249	wr_reg(0x4e, 0);
wim	0:a8090b59eb05	1250	wr_reg(0x4f, 0);
wim	0:a8090b59eb05	1251	}
wim	0:a8090b59eb05	1252	else
wim	0:a8090b59eb05	1253	{
wim	0:a8090b59eb05	1254	wr_reg(0x20, 0);
wim	0:a8090b59eb05	1255	wr_reg(0x21, 0);
wim	0:a8090b59eb05	1256	}
wim	0:a8090b59eb05	1257	LCD_CS(0)
wim	0:a8090b59eb05	1258	wr_cmd(0x22);
wim	0:a8090b59eb05	1259	wr_dat_start();
wim	0:a8090b59eb05	1260	for(i = 0; i < (WIDTH*HEIGHT); i++)
wim	0:a8090b59eb05	1261	wr_dat_only(color);
wim	0:a8090b59eb05	1262	wr_dat_stop();
wim	0:a8090b59eb05	1263	}
wim	0:a8090b59eb05	1264
wim	0:a8090b59eb05	1265
wim	0:a8090b59eb05	1266	/*******************************************************************************
wim	0:a8090b59eb05	1267	* Draw character on given position *
wim	0:a8090b59eb05	1268	* Parameter: x: horizontal position *
wim	0:a8090b59eb05	1269	* y: vertical position *
wim	0:a8090b59eb05	1270	* c: pointer to character bitmap *
wim	0:a8090b59eb05	1271	* Return: *
wim	0:a8090b59eb05	1272	*******************************************************************************/
wim	0:a8090b59eb05	1273
wim	0:a8090b59eb05	1274	void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c) {
wim	0:a8090b59eb05	1275	int idx = 0, i, j;
wim	0:a8090b59eb05	1276
wim	1:ea0f7b1c5daf	1277	//wh x = WIDTH-x-CHAR_W;
wim	0:a8090b59eb05	1278
wim	0:a8090b59eb05	1279	if(driverCode==0x8989)
wim	0:a8090b59eb05	1280	{
wim	1:ea0f7b1c5daf	1281	//wh wr_reg(0x44, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1282	wr_reg(0x44, y \|((y+CHAR_H-1)<<8)); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1283	wr_reg(0x45, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1284	wr_reg(0x46, x+CHAR_W-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1285
wim	0:a8090b59eb05	1286	wr_reg(0x4e, y);
wim	0:a8090b59eb05	1287	wr_reg(0x4f, x);
wim	0:a8090b59eb05	1288	}
wim	0:a8090b59eb05	1289	else
wim	0:a8090b59eb05	1290	{
wim	0:a8090b59eb05	1291	wr_reg(0x50, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1292	wr_reg(0x51, y+CHAR_H-1); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1293	wr_reg(0x52, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1294	wr_reg(0x53, x+CHAR_W-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1295
wim	0:a8090b59eb05	1296	wr_reg(0x20, y);
wim	0:a8090b59eb05	1297	wr_reg(0x21, x);
wim	0:a8090b59eb05	1298	}
wim	0:a8090b59eb05	1299	LCD_CS(0)
wim	0:a8090b59eb05	1300	wr_cmd(0x22);
wim	0:a8090b59eb05	1301	wr_dat_start();
wim	0:a8090b59eb05	1302	for (j = 0; j < CHAR_H; j++) {
wim	1:ea0f7b1c5daf	1303	//wh for (i = CHAR_W-1; i >= 0; i--) {
wim	1:ea0f7b1c5daf	1304	for (i = 0; i < CHAR_W; i++) {
wim	0:a8090b59eb05	1305	if((c[idx] & (1 << i)) == 0x00) {
wim	0:a8090b59eb05	1306	wr_dat_only(BackColor);
wim	0:a8090b59eb05	1307	} else {
wim	0:a8090b59eb05	1308	wr_dat_only(TextColor);
wim	0:a8090b59eb05	1309	}
wim	0:a8090b59eb05	1310	}
wim	0:a8090b59eb05	1311	c++;
wim	0:a8090b59eb05	1312	}
wim	0:a8090b59eb05	1313	wr_dat_stop();
wim	0:a8090b59eb05	1314	}
wim	0:a8090b59eb05	1315
wim	0:a8090b59eb05	1316
wim	0:a8090b59eb05	1317	/*******************************************************************************
wim	0:a8090b59eb05	1318	* Display character on given line *
wim	0:a8090b59eb05	1319	* Parameter: ln: line number *
wim	0:a8090b59eb05	1320	* col: column number *
wim	0:a8090b59eb05	1321	* c: ascii character *
wim	0:a8090b59eb05	1322	* Return: *
wim	0:a8090b59eb05	1323	*******************************************************************************/
wim	0:a8090b59eb05	1324
wim	0:a8090b59eb05	1325	void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c) {
wim	0:a8090b59eb05	1326
wim	0:a8090b59eb05	1327	c -= 32;
wim	1:ea0f7b1c5daf	1328	// x = column, y = line
wim	0:a8090b59eb05	1329	GLCD_DrawChar(col * CHAR_W, ln * CHAR_H, (unsigned short )&Font_24x16[c CHAR_H]);
wim	1:ea0f7b1c5daf	1330
wim	0:a8090b59eb05	1331	}
wim	0:a8090b59eb05	1332
wim	0:a8090b59eb05	1333
wim	0:a8090b59eb05	1334	/*******************************************************************************
wim	0:a8090b59eb05	1335	* Disply string on given line *
wim	0:a8090b59eb05	1336	* Parameter: ln: line number *
wim	0:a8090b59eb05	1337	* col: column number *
wim	0:a8090b59eb05	1338	* s: pointer to string *
wim	0:a8090b59eb05	1339	* Return: *
wim	0:a8090b59eb05	1340	*******************************************************************************/
wim	0:a8090b59eb05	1341
wim	0:a8090b59eb05	1342	void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s) {
wim	0:a8090b59eb05	1343
wim	0:a8090b59eb05	1344	GLCD_WindowMax();
wim	0:a8090b59eb05	1345	while (*s) {
wim	0:a8090b59eb05	1346	GLCD_DisplayChar(ln, col++, *s++);
wim	0:a8090b59eb05	1347	}
wim	0:a8090b59eb05	1348	}
wim	0:a8090b59eb05	1349
wim	0:a8090b59eb05	1350
wim	0:a8090b59eb05	1351	/*******************************************************************************
wim	0:a8090b59eb05	1352	* Clear given line *
wim	0:a8090b59eb05	1353	* Parameter: ln: line number *
wim	0:a8090b59eb05	1354	* Return: *
wim	0:a8090b59eb05	1355	*******************************************************************************/
wim	0:a8090b59eb05	1356
wim	0:a8090b59eb05	1357	void GLCD_ClearLn (unsigned int ln) {
wim	0:a8090b59eb05	1358
wim	0:a8090b59eb05	1359	GLCD_WindowMax();
wim	0:a8090b59eb05	1360	GLCD_DisplayString(ln, 0, (unsigned char*) " ");
wim	0:a8090b59eb05	1361	}
wim	0:a8090b59eb05	1362
wim	0:a8090b59eb05	1363	//SSD1289
wim	0:a8090b59eb05	1364	//static void lcd_SetCursor(unsigned int x,unsigned int y)
wim	0:a8090b59eb05	1365	//{
wim	0:a8090b59eb05	1366	// write_reg(0x004e,x); /* 0-239 */
wim	0:a8090b59eb05	1367	// write_reg(0x004f,y); /* 0-319 */
wim	0:a8090b59eb05	1368	//}
wim	0:a8090b59eb05	1369
wim	0:a8090b59eb05	1370
wim	0:a8090b59eb05	1371	void GLCD_drawHLine(int x, int y, int l)
wim	0:a8090b59eb05	1372	{
wim	0:a8090b59eb05	1373	// char ch, cl;
wim	0:a8090b59eb05	1374
wim	0:a8090b59eb05	1375	// ch=((fcolorr&248)\|fcolorg>>5);
wim	0:a8090b59eb05	1376	// cl=((fcolorg&28)<<3\|fcolorb>>3);
wim	0:a8090b59eb05	1377
wim	0:a8090b59eb05	1378	// cbi(P_CS, B_CS);
wim	0:a8090b59eb05	1379
wim	0:a8090b59eb05	1380	GLCD_Window (x, y, x+l, y);
wim	0:a8090b59eb05	1381
wim	0:a8090b59eb05	1382	// for (int i=0; i<l+1; i++)
wim	0:a8090b59eb05	1383	// {
wim	0:a8090b59eb05	1384	// LCD_Write_DATA(ch, cl);
wim	0:a8090b59eb05	1385	// }
wim	0:a8090b59eb05	1386
wim	0:a8090b59eb05	1387	LCD_CS(0)
wim	0:a8090b59eb05	1388	wr_cmd(0x22);
wim	0:a8090b59eb05	1389
wim	0:a8090b59eb05	1390	wr_dat_start();
wim	0:a8090b59eb05	1391	for (int i=0; i<l; i++)
wim	0:a8090b59eb05	1392	wr_dat_only(TextColor);
wim	0:a8090b59eb05	1393	wr_dat_stop();
wim	0:a8090b59eb05	1394
wim	0:a8090b59eb05	1395	// sbi(P_CS, B_CS);
wim	0:a8090b59eb05	1396	// clrXY();
wim	0:a8090b59eb05	1397	GLCD_WindowMax();
wim	0:a8090b59eb05	1398	}
wim	0:a8090b59eb05	1399
wim	0:a8090b59eb05	1400	void GLCD_drawVLine(int x, int y, int l)
wim	0:a8090b59eb05	1401	{
wim	0:a8090b59eb05	1402	// char ch, cl;
wim	0:a8090b59eb05	1403
wim	0:a8090b59eb05	1404	// ch=((fcolorr&248)\|fcolorg>>5);
wim	0:a8090b59eb05	1405	// cl=((fcolorg&28)<<3\|fcolorb>>3);
wim	0:a8090b59eb05	1406
wim	0:a8090b59eb05	1407	// cbi(P_CS, B_CS);
wim	0:a8090b59eb05	1408	GLCD_Window(x, y, x, y+l);
wim	0:a8090b59eb05	1409	// for (int i=0; i<l; i++)
wim	0:a8090b59eb05	1410	// {
wim	0:a8090b59eb05	1411	// GLCD_wr_dat(ch, cl);
wim	0:a8090b59eb05	1412	// }
wim	0:a8090b59eb05	1413	LCD_CS(0)
wim	0:a8090b59eb05	1414	wr_cmd(0x22);
wim	0:a8090b59eb05	1415
wim	0:a8090b59eb05	1416	wr_dat_start();
wim	0:a8090b59eb05	1417	for (int i=0; i<l; i++)
wim	0:a8090b59eb05	1418	wr_dat_only(TextColor);
wim	0:a8090b59eb05	1419	wr_dat_stop();
wim	0:a8090b59eb05	1420
wim	0:a8090b59eb05	1421
wim	0:a8090b59eb05	1422	// sbi(P_CS, B_CS);
wim	0:a8090b59eb05	1423	// clrXY();
wim	0:a8090b59eb05	1424	GLCD_WindowMax();
wim	0:a8090b59eb05	1425	}
wim	0:a8090b59eb05	1426
wim	0:a8090b59eb05	1427
wim	0:a8090b59eb05	1428	void GLCD_drawRect(int x1, int y1, int x2, int y2)
wim	0:a8090b59eb05	1429	{
wim	0:a8090b59eb05	1430	int tmp;
wim	0:a8090b59eb05	1431
wim	0:a8090b59eb05	1432	if (x1>x2)
wim	0:a8090b59eb05	1433	{
wim	0:a8090b59eb05	1434	swap(int, x1, x2);
wim	0:a8090b59eb05	1435	}
wim	0:a8090b59eb05	1436	if (y1>y2)
wim	0:a8090b59eb05	1437	{
wim	0:a8090b59eb05	1438	swap(int, y1, y2);
wim	0:a8090b59eb05	1439	}
wim	0:a8090b59eb05	1440
wim	0:a8090b59eb05	1441	GLCD_drawHLine(x1, y1, x2-x1);
wim	0:a8090b59eb05	1442	GLCD_drawHLine(x1, y2, x2-x1);
wim	0:a8090b59eb05	1443	GLCD_drawVLine(x1, y1, y2-y1);
wim	0:a8090b59eb05	1444	GLCD_drawVLine(x2, y1, y2-y1);
wim	0:a8090b59eb05	1445	}
wim	0:a8090b59eb05	1446
wim	0:a8090b59eb05	1447
wim	0:a8090b59eb05	1448
wim	0:a8090b59eb05	1449
wim	0:a8090b59eb05	1450	/*******************************************************************************
wim	0:a8090b59eb05	1451	* Draw bargraph *
wim	0:a8090b59eb05	1452	* Parameter: x: horizontal position *
wim	0:a8090b59eb05	1453	* y: vertical position *
wim	0:a8090b59eb05	1454	* w: maximum width of bargraph (in pixels) *
wim	0:a8090b59eb05	1455	* val: value of active bargraph (in 1/1024) *
wim	0:a8090b59eb05	1456	* Return: *
wim	0:a8090b59eb05	1457	*******************************************************************************/
wim	0:a8090b59eb05	1458
wim	0:a8090b59eb05	1459	void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val) {
wim	0:a8090b59eb05	1460	int i,j;
wim	0:a8090b59eb05	1461
wim	0:a8090b59eb05	1462	x = WIDTH-x-w;
wim	0:a8090b59eb05	1463	if(driverCode==0x8989)
wim	0:a8090b59eb05	1464	{
wim	0:a8090b59eb05	1465	wr_reg(0x44, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1466	wr_reg(0x44, y \|((y+CHAR_H-1)<<8)); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1467	wr_reg(0x45, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1468	wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1469	}
wim	0:a8090b59eb05	1470	else
wim	0:a8090b59eb05	1471	{
wim	0:a8090b59eb05	1472	wr_reg(0x50, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1473	wr_reg(0x51, y+CHAR_H-1); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1474	wr_reg(0x52, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1475	wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1476	}
wim	0:a8090b59eb05	1477
wim	0:a8090b59eb05	1478	val = (val * w) >> 10; /* Scale value for 24x12 characters */
wim	0:a8090b59eb05	1479	if(driverCode==0x8989)
wim	0:a8090b59eb05	1480	{
wim	0:a8090b59eb05	1481	wr_reg(0x4e, y);
wim	0:a8090b59eb05	1482	wr_reg(0x4f, x);
wim	0:a8090b59eb05	1483	}
wim	0:a8090b59eb05	1484	else
wim	0:a8090b59eb05	1485	{
wim	0:a8090b59eb05	1486	wr_reg(0x20, y);
wim	0:a8090b59eb05	1487	wr_reg(0x21, x);
wim	0:a8090b59eb05	1488	}
wim	0:a8090b59eb05	1489	LCD_CS(0)
wim	0:a8090b59eb05	1490	wr_cmd(0x22);
wim	0:a8090b59eb05	1491	wr_dat_start();
wim	0:a8090b59eb05	1492	for (i = 0; i < h; i++) {
wim	0:a8090b59eb05	1493	for (j = w-1; j >= 0; j--) {
wim	0:a8090b59eb05	1494	if(j >= val) {
wim	0:a8090b59eb05	1495	wr_dat_only(BackColor);
wim	0:a8090b59eb05	1496	} else {
wim	0:a8090b59eb05	1497	wr_dat_only(TextColor);
wim	0:a8090b59eb05	1498	}
wim	0:a8090b59eb05	1499	}
wim	0:a8090b59eb05	1500	}
wim	0:a8090b59eb05	1501	wr_dat_stop();
wim	0:a8090b59eb05	1502	}
wim	0:a8090b59eb05	1503
wim	0:a8090b59eb05	1504
wim	0:a8090b59eb05	1505	/*******************************************************************************
wim	0:a8090b59eb05	1506	* Display graphical bitmap image at position x horizontally and y vertically *
wim	0:a8090b59eb05	1507	* (This function is optimized for 16 bits per pixel format, it has to be *
wim	0:a8090b59eb05	1508	* adapted for any other bits per pixel format) *
wim	0:a8090b59eb05	1509	* Parameter: x: horizontal position *
wim	0:a8090b59eb05	1510	* y: vertical position *
wim	0:a8090b59eb05	1511	* w: width of bitmap *
wim	0:a8090b59eb05	1512	* h: height of bitmap *
wim	0:a8090b59eb05	1513	* bitmap: address at which the bitmap data resides *
wim	0:a8090b59eb05	1514	* Return: *
wim	0:a8090b59eb05	1515	*******************************************************************************/
wim	0:a8090b59eb05	1516
wim	0:a8090b59eb05	1517	void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap) {
wim	0:a8090b59eb05	1518	unsigned int i, j;
wim	0:a8090b59eb05	1519	unsigned short bitmap_ptr = (unsigned short )bitmap;
wim	0:a8090b59eb05	1520
wim	0:a8090b59eb05	1521	x = WIDTH-x-w;
wim	0:a8090b59eb05	1522	if(driverCode==0x8989)
wim	0:a8090b59eb05	1523	{
wim	0:a8090b59eb05	1524	wr_reg(0x44, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1525	wr_reg(0x44, y \|((y+h-1)<<8)); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1526	wr_reg(0x45, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1527	wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1528	wr_reg(0x4e, y);
wim	0:a8090b59eb05	1529	wr_reg(0x4f, x);
wim	0:a8090b59eb05	1530	}
wim	0:a8090b59eb05	1531	else
wim	0:a8090b59eb05	1532	{
wim	0:a8090b59eb05	1533	wr_reg(0x50, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1534	wr_reg(0x51, y+h-1); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1535	wr_reg(0x52, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1536	wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1537	wr_reg(0x20, y);
wim	0:a8090b59eb05	1538	wr_reg(0x21, x);
wim	0:a8090b59eb05	1539	}
wim	0:a8090b59eb05	1540	LCD_CS(0)
wim	0:a8090b59eb05	1541	wr_cmd(0x22);
wim	0:a8090b59eb05	1542	wr_dat_start();
wim	0:a8090b59eb05	1543	for (j = 0; j < h; j++) {
wim	0:a8090b59eb05	1544	bitmap_ptr += w-1;
wim	0:a8090b59eb05	1545	for (i = 0; i < w; i++) {
wim	0:a8090b59eb05	1546	wr_dat_only(*bitmap_ptr--);
wim	0:a8090b59eb05	1547	}
wim	0:a8090b59eb05	1548	bitmap_ptr += w+1;
wim	0:a8090b59eb05	1549	}
wim	0:a8090b59eb05	1550	wr_dat_stop();
wim	0:a8090b59eb05	1551	}
wim	0:a8090b59eb05	1552
wim	0:a8090b59eb05	1553
wim	0:a8090b59eb05	1554	/*******************************************************************************
wim	0:a8090b59eb05	1555	* Display graphical bmp file image at position x horizontally and y vertically *
wim	0:a8090b59eb05	1556	* (This function is optimized for 16 bits per pixel format, it has to be *
wim	0:a8090b59eb05	1557	* adapted for any other bits per pixel format) *
wim	0:a8090b59eb05	1558	* Parameter: x: horizontal position *
wim	0:a8090b59eb05	1559	* y: vertical position *
wim	0:a8090b59eb05	1560	* w: width of bitmap *
wim	0:a8090b59eb05	1561	* h: height of bitmap *
wim	0:a8090b59eb05	1562	* bmp: address at which the bmp data resides *
wim	0:a8090b59eb05	1563	* Return: *
wim	0:a8090b59eb05	1564	*******************************************************************************/
wim	0:a8090b59eb05	1565
wim	0:a8090b59eb05	1566	void GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp) {
wim	0:a8090b59eb05	1567	unsigned int i, j;
wim	0:a8090b59eb05	1568	unsigned short bitmap_ptr = (unsigned short )bmp;
wim	0:a8090b59eb05	1569
wim	1:ea0f7b1c5daf	1570	//wh x = WIDTH-x-w;
wim	0:a8090b59eb05	1571
wim	0:a8090b59eb05	1572	if(driverCode==0x8989)
wim	0:a8090b59eb05	1573	{
wim	1:ea0f7b1c5daf	1574	//wh wr_reg(0x44, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1575	wr_reg(0x44, y \|((y+h-1)<<8)); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1576	wr_reg(0x45, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1577	wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1578	wr_reg(0x4e, y);
wim	0:a8090b59eb05	1579	wr_reg(0x4f, x);
wim	0:a8090b59eb05	1580	}
wim	0:a8090b59eb05	1581	else
wim	0:a8090b59eb05	1582	{
wim	0:a8090b59eb05	1583	wr_reg(0x50, y); /* Horizontal GRAM Start Address */
wim	0:a8090b59eb05	1584	wr_reg(0x51, y+h-1); /* Horizontal GRAM End Address (-1) */
wim	0:a8090b59eb05	1585	wr_reg(0x52, x); /* Vertical GRAM Start Address */
wim	0:a8090b59eb05	1586	wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
wim	0:a8090b59eb05	1587	wr_reg(0x20, y);
wim	0:a8090b59eb05	1588	wr_reg(0x21, x);
wim	0:a8090b59eb05	1589	}
wim	0:a8090b59eb05	1590	LCD_CS(0)
wim	0:a8090b59eb05	1591	wr_cmd(0x22);
wim	0:a8090b59eb05	1592	wr_dat_start();
wim	1:ea0f7b1c5daf	1593	// bitmap_ptr += (h*w)-1;
wim	1:ea0f7b1c5daf	1594	// for (j = 0; j < h; j++) {
wim	1:ea0f7b1c5daf	1595	// for (i = 0; i < w; i++) {
wim	1:ea0f7b1c5daf	1596	// wr_dat_only(*bitmap_ptr--);
wim	1:ea0f7b1c5daf	1597	// }
wim	1:ea0f7b1c5daf	1598	// }
wim	1:ea0f7b1c5daf	1599
wim	1:ea0f7b1c5daf	1600
wim	0:a8090b59eb05	1601	for (j = 0; j < h; j++) {
wim	0:a8090b59eb05	1602	for (i = 0; i < w; i++) {
wim	1:ea0f7b1c5daf	1603	wr_dat_only(*bitmap_ptr++);
wim	0:a8090b59eb05	1604	}
wim	0:a8090b59eb05	1605	}
wim	1:ea0f7b1c5daf	1606
wim	1:ea0f7b1c5daf	1607
wim	0:a8090b59eb05	1608	wr_dat_stop();
wim	0:a8090b59eb05	1609	}
wim	0:a8090b59eb05	1610
wim	0:a8090b59eb05	1611	/******************************************************************************/

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	03 Jun 2021
Imports:	4
Forks:	0
Commits:	6
Dependents:	0
Dependencies:	1
Followers:	1

GLCD_LPC1700.cpp@1:ea0f7b1c5daf, 2012-11-04 (annotated)

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