Brody Kellish / ltc2991_lib

lib for working with ltc2991s

Dependents:   ece495_firmware

Fork of ltc2991_test by Logan Rooper

LT_I2C.cpp@8:c0ae66611a12, 2017-01-19 (annotated)

Committer:
bdk9
Date:
Thu Jan 19 02:55:42 2017 +0000
Revision:
8:c0ae66611a12
Parent:
2:c9e727dcd00e 
Final Code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lrdawg99 0:1473318f27b6 1
lrdawg99 0:1473318f27b6 2 /*!
lrdawg99 0:1473318f27b6 3 LT_I2C: Routines to communicate with ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 4
lrdawg99 0:1473318f27b6 5 @verbatim
lrdawg99 0:1473318f27b6 6
lrdawg99 0:1473318f27b6 7 LT_I2C contains the low level routines to communicate with devices using the
lrdawg99 0:1473318f27b6 8 ATMega328's onboard hardware I2C port. Each routine checks the Two Wire Status
lrdawg99 0:1473318f27b6 9 Register (TWSR) at the end of the transaction and returns 0 if successful and 1
lrdawg99 0:1473318f27b6 10 if not successful.
lrdawg99 0:1473318f27b6 11
lrdawg99 0:1473318f27b6 12 I2C Frequency = (CPU Clock frequency)/(16+2(TWBR)*Prescaler)
lrdawg99 0:1473318f27b6 13
lrdawg99 0:1473318f27b6 14 TWBR-Two Wire Bit Rate Register
lrdawg99 0:1473318f27b6 15 TWCR=Two Wire Control Register (TWINT TWEA TWSTA TWSTO TWWC TWEN - TWIE)
lrdawg99 0:1473318f27b6 16 TWSR=Two Wire Status Register
lrdawg99 0:1473318f27b6 17
lrdawg99 0:1473318f27b6 18 Prescaler Values:
lrdawg99 0:1473318f27b6 19 TWSR1 TWSR0 Prescaler
lrdawg99 0:1473318f27b6 20 0 0 1
lrdawg99 0:1473318f27b6 21 0 1 4
lrdawg99 0:1473318f27b6 22 1 0 16
lrdawg99 0:1473318f27b6 23 1 1 64
lrdawg99 0:1473318f27b6 24
lrdawg99 0:1473318f27b6 25 Examples:
lrdawg99 0:1473318f27b6 26 CPU Frequency = 16Mhz on Arduino Uno
lrdawg99 0:1473318f27b6 27 I2C Frequency Prescaler TWSR1 TWSR0 TWBR
lrdawg99 0:1473318f27b6 28 1khz 64 1 1 125
lrdawg99 0:1473318f27b6 29 10khz 64 1 1 12
lrdawg99 0:1473318f27b6 30 50khz 16 1 0 10
lrdawg99 0:1473318f27b6 31 100khz 4 0 1 18
lrdawg99 0:1473318f27b6 32 400khz 1 0 0 12
lrdawg99 0:1473318f27b6 33
lrdawg99 0:1473318f27b6 34 @endverbatim
lrdawg99 0:1473318f27b6 35
lrdawg99 0:1473318f27b6 36 REVISION HISTORY
lrdawg99 0:1473318f27b6 37 $Revision: 5469 $
lrdawg99 0:1473318f27b6 38 $Date: 2016-07-22 17:01:32 -0700 (Fri, 22 Jul 2016) $
lrdawg99 0:1473318f27b6 39
lrdawg99 0:1473318f27b6 40 Copyright (c) 2013, Linear Technology Corp.(LTC)
lrdawg99 0:1473318f27b6 41 All rights reserved.
lrdawg99 0:1473318f27b6 42
lrdawg99 0:1473318f27b6 43 Redistribution and use in source and binary forms, with or without
lrdawg99 0:1473318f27b6 44 modification, are permitted provided that the following conditions are met:
lrdawg99 0:1473318f27b6 45
lrdawg99 0:1473318f27b6 46 1. Redistributions of source code must retain the above copyright notice, this
lrdawg99 0:1473318f27b6 47 list of conditions and the following disclaimer.
lrdawg99 0:1473318f27b6 48 2. Redistributions in binary form must reproduce the above copyright notice,
lrdawg99 0:1473318f27b6 49 this list of conditions and the following disclaimer in the documentation
lrdawg99 0:1473318f27b6 50 and/or other materials provided with the distribution.
lrdawg99 0:1473318f27b6 51
lrdawg99 0:1473318f27b6 52 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
lrdawg99 0:1473318f27b6 53 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
lrdawg99 0:1473318f27b6 54 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lrdawg99 0:1473318f27b6 55 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
lrdawg99 0:1473318f27b6 56 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
lrdawg99 0:1473318f27b6 57 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lrdawg99 0:1473318f27b6 58 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
lrdawg99 0:1473318f27b6 59 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
lrdawg99 0:1473318f27b6 60 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
lrdawg99 0:1473318f27b6 61 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lrdawg99 0:1473318f27b6 62
lrdawg99 0:1473318f27b6 63 The views and conclusions contained in the software and documentation are those
lrdawg99 0:1473318f27b6 64 of the authors and should not be interpreted as representing official policies,
lrdawg99 0:1473318f27b6 65 either expressed or implied, of Linear Technology Corp.
lrdawg99 0:1473318f27b6 66
lrdawg99 0:1473318f27b6 67 The Linear Technology Linduino is not affiliated with the official Arduino team.
lrdawg99 0:1473318f27b6 68 However, the Linduino is only possible because of the Arduino team's commitment
lrdawg99 0:1473318f27b6 69 to the open-source community. Please, visit http://www.arduino.cc and
lrdawg99 0:1473318f27b6 70 http://store.arduino.cc , and consider a purchase that will help fund their
lrdawg99 0:1473318f27b6 71 ongoing work.
lrdawg99 0:1473318f27b6 72 */
lrdawg99 0:1473318f27b6 73
lrdawg99 0:1473318f27b6 74 //! @defgroup LT_I2C LT_I2C: Routines to Communicate With ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 75
lrdawg99 0:1473318f27b6 76 /*! @file
lrdawg99 0:1473318f27b6 77 @ingroup LT_I2C
lrdawg99 0:1473318f27b6 78 Library for LT_I2C: Routines to Communicate With ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 79 */
lrdawg99 0:1473318f27b6 80
lrdawg99 0:1473318f27b6 81 //#include <Arduino.h>
lrdawg99 0:1473318f27b6 82 #include <stdint.h>
lrdawg99 0:1473318f27b6 83 //#include <util/delay.h>
lrdawg99 0:1473318f27b6 84 #include "Linduino.h"
lrdawg99 0:1473318f27b6 85 #include "LT_I2C.h"
lrdawg99 1:4e4194db7cd6 86 #include "mbed.h"
lrdawg99 0:1473318f27b6 87
lrdawg99 0:1473318f27b6 88 //! CPU master clock frequency
lrdawg99 0:1473318f27b6 89 #ifndef F_CPU
lrdawg99 0:1473318f27b6 90 #define F_CPU 16000000UL
lrdawg99 0:1473318f27b6 91 #endif
lrdawg99 0:1473318f27b6 92
lrdawg99 0:1473318f27b6 93
lrdawg99 2:c9e727dcd00e 94 LT_I2C::LT_I2C() {
lrdawg99 2:c9e727dcd00e 95 i2c = new I2C(I2C_SDA, I2C_SCL);
lrdawg99 2:c9e727dcd00e 96 i2c->frequency(400000); //maximum from datasheet for ltc2991
lrdawg99 2:c9e727dcd00e 97 }
lrdawg99 2:c9e727dcd00e 98
lrdawg99 2:c9e727dcd00e 99 LT_I2C::LT_I2C(PinName sda_, PinName scl_) {
lrdawg99 2:c9e727dcd00e 100 sda = sda_;
lrdawg99 2:c9e727dcd00e 101 scl = scl_;
lrdawg99 2:c9e727dcd00e 102 i2c = new I2C(sda_ , scl_);
lrdawg99 2:c9e727dcd00e 103 i2c->frequency(400000); //maximum from datasheet for ltc2991
lrdawg99 2:c9e727dcd00e 104 }
lrdawg99 0:1473318f27b6 105
lrdawg99 0:1473318f27b6 106 // Read a byte of data at register specified by "command", store in "value"
lrdawg99 2:c9e727dcd00e 107 int8_t LT_I2C::i2c_read_byte_data(uint8_t address, uint8_t command, uint8_t *value)
lrdawg99 0:1473318f27b6 108 {
lrdawg99 1:4e4194db7cd6 109 int8_t ret = 0;
lrdawg99 1:4e4194db7cd6 110
lrdawg99 1:4e4194db7cd6 111 char cmd1[1];
lrdawg99 1:4e4194db7cd6 112 cmd1[0] = command;
lrdawg99 1:4e4194db7cd6 113 char v[1];
lrdawg99 1:4e4194db7cd6 114 v[0] = 0;
lrdawg99 1:4e4194db7cd6 115
lrdawg99 2:c9e727dcd00e 116 ret |= i2c->write((address<<1) | I2C_WRITE_BIT, cmd1, 1, true);
lrdawg99 2:c9e727dcd00e 117 ret |= i2c->read((address<<1) | I2C_READ_BIT, v, 1, false);
lrdawg99 1:4e4194db7cd6 118
lrdawg99 1:4e4194db7cd6 119 *value = v[0];
lrdawg99 1:4e4194db7cd6 120
lrdawg99 1:4e4194db7cd6 121 if (ret == 0) {
lrdawg99 1:4e4194db7cd6 122 return 0; //success
lrdawg99 1:4e4194db7cd6 123 }
lrdawg99 1:4e4194db7cd6 124 return(1);
lrdawg99 0:1473318f27b6 125 }
lrdawg99 0:1473318f27b6 126
lrdawg99 0:1473318f27b6 127 // Write a byte of data to register specified by "command"
lrdawg99 2:c9e727dcd00e 128 int8_t LT_I2C::i2c_write_byte_data(uint8_t address, uint8_t command, uint8_t value)
lrdawg99 0:1473318f27b6 129 {
lrdawg99 1:4e4194db7cd6 130 int8_t ret = 0;
lrdawg99 1:4e4194db7cd6 131 char cmd[2];
lrdawg99 1:4e4194db7cd6 132 cmd[0] = command;
lrdawg99 1:4e4194db7cd6 133 cmd[1] = value;
lrdawg99 2:c9e727dcd00e 134 ret |= i2c->write((address<<1) | I2C_WRITE_BIT, cmd, 2, false);
lrdawg99 1:4e4194db7cd6 135
lrdawg99 1:4e4194db7cd6 136 if (ret == 0) {
lrdawg99 1:4e4194db7cd6 137 return 0; //success
lrdawg99 1:4e4194db7cd6 138 }
lrdawg99 1:4e4194db7cd6 139 return(1);
lrdawg99 0:1473318f27b6 140 }
lrdawg99 0:1473318f27b6 141
lrdawg99 2:c9e727dcd00e 142 int8_t LT_I2C::i2c_read_word_data(uint8_t address, uint8_t command, uint16_t *value)
lrdawg99 0:1473318f27b6 143 {
lrdawg99 1:4e4194db7cd6 144 int8_t ret = 0;
lrdawg99 1:4e4194db7cd6 145
lrdawg99 1:4e4194db7cd6 146
lrdawg99 1:4e4194db7cd6 147 union {
lrdawg99 1:4e4194db7cd6 148 char b[2];
lrdawg99 1:4e4194db7cd6 149 uint16_t w;
lrdawg99 1:4e4194db7cd6 150 } data;
lrdawg99 1:4e4194db7cd6 151
lrdawg99 1:4e4194db7cd6 152 char writedata[2];
lrdawg99 1:4e4194db7cd6 153 writedata[0] = command; //msb
lrdawg99 1:4e4194db7cd6 154 writedata[1] = command+1; //lsb
lrdawg99 1:4e4194db7cd6 155
lrdawg99 2:c9e727dcd00e 156 ret |= i2c->write((address << 1) | I2C_WRITE_BIT, &writedata[0], 1, true);
lrdawg99 2:c9e727dcd00e 157 ret |= i2c->read((address << 1) | I2C_READ_BIT, &data.b[1], 1, false);
lrdawg99 2:c9e727dcd00e 158 ret |= i2c->write((address << 1) | I2C_WRITE_BIT, &writedata[1], 1, true);
lrdawg99 2:c9e727dcd00e 159 ret |= i2c->read((address << 1) | I2C_READ_BIT, &data.b[0], 1, false);
lrdawg99 1:4e4194db7cd6 160
lrdawg99 1:4e4194db7cd6 161
lrdawg99 1:4e4194db7cd6 162 *value = data.w;
lrdawg99 1:4e4194db7cd6 163
lrdawg99 1:4e4194db7cd6 164 if (ret == 0) {
lrdawg99 1:4e4194db7cd6 165 return 0;
lrdawg99 1:4e4194db7cd6 166 }
lrdawg99 1:4e4194db7cd6 167 return(1);
lrdawg99 0:1473318f27b6 168 }
lrdawg99 0:1473318f27b6 169
lrdawg99 0:1473318f27b6 170 // Write a 16-bit word of data to register specified by "command"
lrdawg99 2:c9e727dcd00e 171 int8_t LT_I2C::i2c_write_word_data(uint8_t address, uint8_t command, uint16_t value)
lrdawg99 0:1473318f27b6 172 {
lrdawg99 1:4e4194db7cd6 173 int8_t ret = 0;
lrdawg99 1:4e4194db7cd6 174
lrdawg99 1:4e4194db7cd6 175 union
lrdawg99 1:4e4194db7cd6 176 {
lrdawg99 1:4e4194db7cd6 177 uint8_t b[2];
lrdawg99 1:4e4194db7cd6 178 uint16_t w;
lrdawg99 1:4e4194db7cd6 179 } data;
lrdawg99 1:4e4194db7cd6 180 data.w = value;
lrdawg99 1:4e4194db7cd6 181
lrdawg99 1:4e4194db7cd6 182 char cmd[3];
lrdawg99 1:4e4194db7cd6 183 cmd[0] = command;
lrdawg99 1:4e4194db7cd6 184 cmd[1] = data.b[1];
lrdawg99 1:4e4194db7cd6 185 cmd[2] = data.b[0];
lrdawg99 0:1473318f27b6 186
lrdawg99 2:c9e727dcd00e 187 ret |= i2c->write((address<<1) | I2C_WRITE_BIT, cmd, 3, false);
lrdawg99 0:1473318f27b6 188
lrdawg99 1:4e4194db7cd6 189 if (ret == 0) {
lrdawg99 1:4e4194db7cd6 190 return 0;
lrdawg99 1:4e4194db7cd6 191 }
lrdawg99 1:4e4194db7cd6 192 return(1);
lrdawg99 1:4e4194db7cd6 193 }