brian claus / LIS3MDL

Copied from STs implementation.

Dependents:   teensyIMU

lis3mdl_platform.h@1:898554a35638, 2016-10-06 (annotated)

Committer:
bclaus
Date:
Thu Oct 06 23:28:08 2016 +0000
Revision:
1:898554a35638
Parent:
0:32f3441153b5 
functional;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bclaus 0:32f3441153b5 1 /**
bclaus 0:32f3441153b5 2 ******************************************************************************
bclaus 0:32f3441153b5 3 * @file lis3mdl.h
bclaus 0:32f3441153b5 4 * @author MEMS Application Team
bclaus 0:32f3441153b5 5 * @version V1.0.0
bclaus 0:32f3441153b5 6 * @date 30-July-2014
bclaus 0:32f3441153b5 7 * @brief This file contains definitions for the lis3mdl.c
bclaus 0:32f3441153b5 8 * firmware driver.
bclaus 0:32f3441153b5 9 ******************************************************************************
bclaus 0:32f3441153b5 10 * @attention
bclaus 0:32f3441153b5 11 *
bclaus 0:32f3441153b5 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bclaus 0:32f3441153b5 13 *
bclaus 0:32f3441153b5 14 * Redistribution and use in source and binary forms, with or without modification,
bclaus 0:32f3441153b5 15 * are permitted provided that the following conditions are met:
bclaus 0:32f3441153b5 16 * 1. Redistributions of source code must retain the above copyright notice,
bclaus 0:32f3441153b5 17 * this list of conditions and the following disclaimer.
bclaus 0:32f3441153b5 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bclaus 0:32f3441153b5 19 * this list of conditions and the following disclaimer in the documentation
bclaus 0:32f3441153b5 20 * and/or other materials provided with the distribution.
bclaus 0:32f3441153b5 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bclaus 0:32f3441153b5 22 * may be used to endorse or promote products derived from this software
bclaus 0:32f3441153b5 23 * without specific prior written permission.
bclaus 0:32f3441153b5 24 *
bclaus 0:32f3441153b5 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bclaus 0:32f3441153b5 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bclaus 0:32f3441153b5 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bclaus 0:32f3441153b5 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bclaus 0:32f3441153b5 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bclaus 0:32f3441153b5 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bclaus 0:32f3441153b5 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bclaus 0:32f3441153b5 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bclaus 0:32f3441153b5 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bclaus 0:32f3441153b5 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bclaus 0:32f3441153b5 35 *
bclaus 0:32f3441153b5 36 ******************************************************************************
bclaus 0:32f3441153b5 37 */
bclaus 0:32f3441153b5 38
bclaus 0:32f3441153b5 39 /* Define to prevent recursive inclusion -------------------------------------*/
bclaus 0:32f3441153b5 40 #ifndef __LIS3MDL_PLATFORM_H
bclaus 0:32f3441153b5 41 #define __LIS3MDL_PLATFORM_H
bclaus 0:32f3441153b5 42
bclaus 0:32f3441153b5 43
bclaus 0:32f3441153b5 44 /** @addtogroup LIS3MDL
bclaus 0:32f3441153b5 45 * @{
bclaus 0:32f3441153b5 46 */
bclaus 0:32f3441153b5 47
bclaus 0:32f3441153b5 48 /** @defgroup LIS3MDL_Exported_Constants
bclaus 0:32f3441153b5 49 * @{
bclaus 0:32f3441153b5 50 */
bclaus 0:32f3441153b5 51
bclaus 0:32f3441153b5 52
bclaus 0:32f3441153b5 53
bclaus 0:32f3441153b5 54 /******************************************************************************/
bclaus 0:32f3441153b5 55 /***************** START MAGNETIC SENSOR REGISTER MAPPING ********************/
bclaus 0:32f3441153b5 56 /******************************************************************************/
bclaus 0:32f3441153b5 57
bclaus 0:32f3441153b5 58 /**
bclaus 0:32f3441153b5 59 * @brief Device identifier register.
bclaus 0:32f3441153b5 60 * \code
bclaus 0:32f3441153b5 61 * Read
bclaus 0:32f3441153b5 62 * Default value:
bclaus 0:32f3441153b5 63 * 7:0 This read-only register contains the device identifier
bclaus 0:32f3441153b5 64 * \endcode
bclaus 0:32f3441153b5 65 */
bclaus 0:32f3441153b5 66 #define LIS3MDL_M_WHO_AM_I_ADDR 0x0F
bclaus 0:32f3441153b5 67
bclaus 0:32f3441153b5 68
bclaus 0:32f3441153b5 69 /**
bclaus 0:32f3441153b5 70 * @brief Magnetic sensor Control Register 1
bclaus 0:32f3441153b5 71 * \code
bclaus 0:32f3441153b5 72 * Read/write
bclaus 0:32f3441153b5 73 * Default value: 0x10
bclaus 0:32f3441153b5 74 * [7] TEMP_COMP: Temperature compensation enable
bclaus 0:32f3441153b5 75 * [6:5] OM1-0: X and Y axes operative mode selection
bclaus 0:32f3441153b5 76 * [4:2] DO2-0: Output data rate selection
bclaus 1:898554a35638 77 * [1] FAST ODR
bclaus 0:32f3441153b5 78 * [0] ST: Self-test enable
bclaus 0:32f3441153b5 79 * \endcode
bclaus 0:32f3441153b5 80 */
bclaus 0:32f3441153b5 81 #define LIS3MDL_M_CTRL_REG1_M 0x20
bclaus 0:32f3441153b5 82
bclaus 0:32f3441153b5 83
bclaus 0:32f3441153b5 84 /**
bclaus 0:32f3441153b5 85 * @brief Magnetic sensor Control Register 2
bclaus 0:32f3441153b5 86 * \code
bclaus 0:32f3441153b5 87 * Read/write
bclaus 0:32f3441153b5 88 * Default value: 0x00
bclaus 0:32f3441153b5 89 * [7] These bits must be set to �0� for the correct operation of the device
bclaus 0:32f3441153b5 90 * [6:5] FS1-0: Full-scale configuration
bclaus 0:32f3441153b5 91 * [4] These bits must be set to �0� for the correct operation of the device
bclaus 0:32f3441153b5 92 * [3] REBOOT: Reboot memory content
bclaus 0:32f3441153b5 93 * [2] SOFT_RST: Configuration registers and user register reset function
bclaus 0:32f3441153b5 94 * [1:0] These bits must be set to �0� for the correct operation of the device
bclaus 0:32f3441153b5 95 * \endcode
bclaus 0:32f3441153b5 96 */
bclaus 0:32f3441153b5 97 #define LIS3MDL_M_CTRL_REG2_M 0x21
bclaus 0:32f3441153b5 98
bclaus 0:32f3441153b5 99
bclaus 0:32f3441153b5 100 /**
bclaus 0:32f3441153b5 101 * @brief Magnetic sensor Control Register 3
bclaus 0:32f3441153b5 102 * \code
bclaus 0:32f3441153b5 103 * Read/write
bclaus 0:32f3441153b5 104 * Default value: 0x03
bclaus 0:32f3441153b5 105 * [7] I2C_DISABLE: Disable I2C interface
bclaus 0:32f3441153b5 106 * [6] These bits must be set to �0� for the correct operation of the device
bclaus 0:32f3441153b5 107 * [5] LP: Low-power mode configuration
bclaus 0:32f3441153b5 108 * [4:3] These bits must be set to �0� for the correct operation of the device
bclaus 0:32f3441153b5 109 * [2] SIM: SPI Serial Interface mode selection
bclaus 0:32f3441153b5 110 * [1:0] MD1-0: Operating mode selection
bclaus 0:32f3441153b5 111 * \endcode
bclaus 0:32f3441153b5 112 */
bclaus 0:32f3441153b5 113 #define LIS3MDL_M_CTRL_REG3_M 0x22
bclaus 1:898554a35638 114 #define LIS3MDL_M_CTRL_REG4_M 0x23
bclaus 0:32f3441153b5 115
bclaus 0:32f3441153b5 116
bclaus 0:32f3441153b5 117 /**
bclaus 0:32f3441153b5 118 * @brief Magnetic sensor data (LSB)
bclaus 0:32f3441153b5 119 * \code
bclaus 0:32f3441153b5 120 * Read
bclaus 0:32f3441153b5 121 * \endcode
bclaus 0:32f3441153b5 122 */
bclaus 0:32f3441153b5 123 #define LIS3MDL_M_OUT_X_L_M 0x28
bclaus 0:32f3441153b5 124
bclaus 0:32f3441153b5 125
bclaus 0:32f3441153b5 126 /**
bclaus 0:32f3441153b5 127 * @brief Magnetic sensor data (MSB)
bclaus 0:32f3441153b5 128 * \code
bclaus 0:32f3441153b5 129 * Read
bclaus 0:32f3441153b5 130 * \endcode
bclaus 0:32f3441153b5 131 */
bclaus 0:32f3441153b5 132 #define LIS3MDL_M_OUT_X_H_M 0x29
bclaus 0:32f3441153b5 133
bclaus 0:32f3441153b5 134
bclaus 0:32f3441153b5 135 /**
bclaus 0:32f3441153b5 136 * @brief Magnetic sensor data (LSB)
bclaus 0:32f3441153b5 137 * \code
bclaus 0:32f3441153b5 138 * Read
bclaus 0:32f3441153b5 139 * \endcode
bclaus 0:32f3441153b5 140 */
bclaus 0:32f3441153b5 141 #define LIS3MDL_M_OUT_Y_L_M 0x2A
bclaus 0:32f3441153b5 142
bclaus 0:32f3441153b5 143
bclaus 0:32f3441153b5 144 /**
bclaus 0:32f3441153b5 145 * @brief Magnetic sensor data (MSB)
bclaus 0:32f3441153b5 146 * \code
bclaus 0:32f3441153b5 147 * Read
bclaus 0:32f3441153b5 148 * \endcode
bclaus 0:32f3441153b5 149 */
bclaus 0:32f3441153b5 150 #define LIS3MDL_M_OUT_Y_H_M 0x2B
bclaus 0:32f3441153b5 151
bclaus 0:32f3441153b5 152
bclaus 0:32f3441153b5 153 /**
bclaus 0:32f3441153b5 154 * @brief Magnetic sensor data (LSB)
bclaus 0:32f3441153b5 155 * \code
bclaus 0:32f3441153b5 156 * Read
bclaus 0:32f3441153b5 157 * \endcode
bclaus 0:32f3441153b5 158 */
bclaus 0:32f3441153b5 159 #define LIS3MDL_M_OUT_Z_L_M 0x2C
bclaus 0:32f3441153b5 160
bclaus 0:32f3441153b5 161
bclaus 0:32f3441153b5 162 /**
bclaus 0:32f3441153b5 163 * @brief Magnetic sensor data (MSB)
bclaus 0:32f3441153b5 164 * \code
bclaus 0:32f3441153b5 165 * Read
bclaus 0:32f3441153b5 166 * \endcode
bclaus 0:32f3441153b5 167 */
bclaus 0:32f3441153b5 168 #define LIS3MDL_M_OUT_Z_H_M 0x2D
bclaus 0:32f3441153b5 169
bclaus 0:32f3441153b5 170
bclaus 0:32f3441153b5 171 /**
bclaus 0:32f3441153b5 172 * @brief Magnetic sensor Interrupt config register
bclaus 0:32f3441153b5 173 * \code
bclaus 0:32f3441153b5 174 * Read/write
bclaus 0:32f3441153b5 175 * Default value: 0x00
bclaus 0:32f3441153b5 176 * [7] XIEN: Enable interrupt generation on X axis
bclaus 0:32f3441153b5 177 * [6] YIEN: Enable interrupt generation on Y axis
bclaus 0:32f3441153b5 178 * [5] ZIEN: Enable interrupt generation on Z axis
bclaus 0:32f3441153b5 179 * [4:3] Must be 0
bclaus 0:32f3441153b5 180 * [2] IEA: Interrupt active configuration on INT
bclaus 0:32f3441153b5 181 * [1] LIR: Latch interrupt request
bclaus 0:32f3441153b5 182 * [0] IEN: Interrupt enable on INT pin
bclaus 0:32f3441153b5 183 * \endcode
bclaus 0:32f3441153b5 184 */
bclaus 0:32f3441153b5 185 #define LIS3MDL_M_INT_CFG 0x30
bclaus 0:32f3441153b5 186
bclaus 0:32f3441153b5 187
bclaus 0:32f3441153b5 188 /**
bclaus 0:32f3441153b5 189 * @brief Magnetic sensor Interrupt source register
bclaus 0:32f3441153b5 190 * \code
bclaus 0:32f3441153b5 191 * Read/write
bclaus 0:32f3441153b5 192 * Default value: 0x00
bclaus 0:32f3441153b5 193 * [7] PTH_X: Value on X-axis exceeds the threshold on the positive side
bclaus 0:32f3441153b5 194 * [6] PTH_Y: Value on Y-axis exceeds the threshold on the positive side
bclaus 0:32f3441153b5 195 * [5] PTH_Z: Value on Z-axis exceeds the threshold on the positive side
bclaus 0:32f3441153b5 196 * [4] NTH_X: Value on X-axis exceeds the threshold on the negative side
bclaus 0:32f3441153b5 197 * [3] NTH_Y: Value on Y-axis exceeds the threshold on the negative side
bclaus 0:32f3441153b5 198 * [2] NTH_Z: Value on Z-axis exceeds the threshold on the negative side
bclaus 0:32f3441153b5 199 * [1] MROI: Internal measurement range overflow on magnetic value
bclaus 0:32f3441153b5 200 * [0] INT: This bit signals when interrupt event occours
bclaus 0:32f3441153b5 201 * \endcode
bclaus 0:32f3441153b5 202 */
bclaus 0:32f3441153b5 203 #define LIS3MDL_M_INT_SRC 0x31
bclaus 0:32f3441153b5 204
bclaus 0:32f3441153b5 205
bclaus 0:32f3441153b5 206 /**
bclaus 0:32f3441153b5 207 * @brief Magnetic sensor Interrupt threshold register low
bclaus 0:32f3441153b5 208 * \code
bclaus 0:32f3441153b5 209 * Read/write
bclaus 0:32f3441153b5 210 * Default value: 0x00
bclaus 0:32f3441153b5 211 * [7:0] THS7-0: Least 8 significant bits of interrupt threshold
bclaus 0:32f3441153b5 212 * \endcode
bclaus 0:32f3441153b5 213 */
bclaus 0:32f3441153b5 214 #define LIS3MDL_M_INT_THS_L_M 0x32
bclaus 0:32f3441153b5 215
bclaus 0:32f3441153b5 216
bclaus 0:32f3441153b5 217 /**
bclaus 0:32f3441153b5 218 * @brief Magnetic sensor Interrupt threshold register high
bclaus 0:32f3441153b5 219 * \code
bclaus 0:32f3441153b5 220 * Read/write
bclaus 0:32f3441153b5 221 * Default value: 0x00
bclaus 0:32f3441153b5 222 * [7] Must be 0
bclaus 0:32f3441153b5 223 * [6:0] THS14-8: Most 7 significant bits of interrupt threshold
bclaus 0:32f3441153b5 224 * \endcode
bclaus 0:32f3441153b5 225 */
bclaus 0:32f3441153b5 226 #define LIS3MDL_M_INT_THS_H_M 0x33
bclaus 0:32f3441153b5 227
bclaus 0:32f3441153b5 228 /******************************************************************************/
bclaus 0:32f3441153b5 229 /******************* END MAGNETIC SENSOR REGISTER MAPPING ********************/
bclaus 0:32f3441153b5 230 /******************************************************************************/
bclaus 0:32f3441153b5 231
bclaus 0:32f3441153b5 232
bclaus 0:32f3441153b5 233
bclaus 0:32f3441153b5 234 /**
bclaus 0:32f3441153b5 235 * @brief Device Address
bclaus 0:32f3441153b5 236 */
bclaus 0:32f3441153b5 237
bclaus 0:32f3441153b5 238 #define LIS3MDL_M_MEMS_ADDRESS 0x3C // SAD[1] = 1
bclaus 0:32f3441153b5 239
bclaus 0:32f3441153b5 240 /**
bclaus 0:32f3441153b5 241 * @brief Device Identifier. Default value of the WHO_AM_I register.
bclaus 0:32f3441153b5 242 */
bclaus 0:32f3441153b5 243 #define I_AM_LIS3MDL_M ((uint8_t)0x3D)
bclaus 0:32f3441153b5 244
bclaus 0:32f3441153b5 245
bclaus 0:32f3441153b5 246 /*********************************** MAGNETIC SENSOR REGISTERS VALUE ****************************************/
bclaus 0:32f3441153b5 247
bclaus 0:32f3441153b5 248 /** @defgroup LIS3MDL_M Temperature compensation enable selection CTRL_REG1_M
bclaus 0:32f3441153b5 249 * @{
bclaus 0:32f3441153b5 250 */
bclaus 0:32f3441153b5 251 #define LIS3MDL_M_TEMP_COMP_DISABLE ((uint8_t)0x00) /*!< Temperature compensation: disable */
bclaus 0:32f3441153b5 252 #define LIS3MDL_M_TEMP_COMP_ENABLE ((uint8_t)0x80) /*!< Temperature compensation: enable */
bclaus 0:32f3441153b5 253
bclaus 0:32f3441153b5 254 #define LIS3MDL_M_TEMP_COMP_MASK ((uint8_t)0x80)
bclaus 0:32f3441153b5 255
bclaus 0:32f3441153b5 256
bclaus 0:32f3441153b5 257 /** @defgroup LIS3MDL_M X and Y axes operative mode selection CTRL_REG1_M
bclaus 0:32f3441153b5 258 * @{
bclaus 0:32f3441153b5 259 */
bclaus 0:32f3441153b5 260 #define LIS3MDL_M_OM_LP ((uint8_t)0x00) /*!< X and Y axes operative mode: Low-power mode */
bclaus 0:32f3441153b5 261 #define LIS3MDL_M_OM_MP ((uint8_t)0x20) /*!< X and Y axes operative mode: Medium-performance mode */
bclaus 0:32f3441153b5 262 #define LIS3MDL_M_OM_HP ((uint8_t)0x40) /*!< X and Y axes operative mode: High-performance mode */
bclaus 0:32f3441153b5 263 #define LIS3MDL_M_OM_UHP ((uint8_t)0x60) /*!< X and Y axes operative mode: Ultra-high performance mode */
bclaus 0:32f3441153b5 264
bclaus 0:32f3441153b5 265 #define LIS3MDL_M_OM_MASK ((uint8_t)0x60)
bclaus 0:32f3441153b5 266
bclaus 0:32f3441153b5 267
bclaus 0:32f3441153b5 268 /** @defgroup LIS3MDL_M Output data rate selection CTRL_REG1_M
bclaus 0:32f3441153b5 269 * @{
bclaus 0:32f3441153b5 270 */
bclaus 0:32f3441153b5 271 #define LIS3MDL_M_DO_0_625 ((uint8_t)0x00) /*!< Output data rate selection: 0.625 */
bclaus 0:32f3441153b5 272 #define LIS3MDL_M_DO_1_25 ((uint8_t)0x04) /*!< Output data rate selection: 1.25 */
bclaus 0:32f3441153b5 273 #define LIS3MDL_M_DO_2_5 ((uint8_t)0x08) /*!< Output data rate selection: 2.5 */
bclaus 0:32f3441153b5 274 #define LIS3MDL_M_DO_5 ((uint8_t)0x0C) /*!< Output data rate selection: 5 */
bclaus 0:32f3441153b5 275 #define LIS3MDL_M_DO_10 ((uint8_t)0x10) /*!< Output data rate selection: 10 */
bclaus 0:32f3441153b5 276 #define LIS3MDL_M_DO_20 ((uint8_t)0x14) /*!< Output data rate selection: 20 */
bclaus 0:32f3441153b5 277 #define LIS3MDL_M_DO_40 ((uint8_t)0x18) /*!< Output data rate selection: 40 */
bclaus 0:32f3441153b5 278 #define LIS3MDL_M_DO_80 ((uint8_t)0x1C) /*!< Output data rate selection: 80 */
bclaus 0:32f3441153b5 279
bclaus 0:32f3441153b5 280 #define LIS3MDL_M_DO_MASK ((uint8_t)0x1C)
bclaus 0:32f3441153b5 281
bclaus 0:32f3441153b5 282
bclaus 0:32f3441153b5 283 /** @defgroup LIS3MDL_M Self-test enable selection CTRL_REG1_M
bclaus 0:32f3441153b5 284 * @{
bclaus 0:32f3441153b5 285 */
bclaus 0:32f3441153b5 286 #define LIS3MDL_M_ST_DISABLE ((uint8_t)0x00) /*!< Self-test: disable */
bclaus 0:32f3441153b5 287 #define LIS3MDL_M_ST_ENABLE ((uint8_t)0x01) /*!< Self-test: enable */
bclaus 0:32f3441153b5 288
bclaus 0:32f3441153b5 289 #define LIS3MDL_M_ST_MASK ((uint8_t)0x01)
bclaus 0:32f3441153b5 290
bclaus 0:32f3441153b5 291
bclaus 0:32f3441153b5 292 /** @defgroup LIS3MDL_M Full scale selection CTRL_REG2_M
bclaus 0:32f3441153b5 293 * @{
bclaus 0:32f3441153b5 294 */
bclaus 0:32f3441153b5 295 #define LIS3MDL_M_FS_4 ((uint8_t)0x00) /*!< Full scale: +-4 guass */
bclaus 0:32f3441153b5 296 #define LIS3MDL_M_FS_8 ((uint8_t)0x20) /*!< Full scale: +-8 gauss */
bclaus 0:32f3441153b5 297 #define LIS3MDL_M_FS_12 ((uint8_t)0x40) /*!< Full scale: +-12 gauss */
bclaus 0:32f3441153b5 298 #define LIS3MDL_M_FS_16 ((uint8_t)0x60) /*!< Full scale: +-16 gauss */
bclaus 0:32f3441153b5 299
bclaus 0:32f3441153b5 300 #define LIS3MDL_M_FS_MASK ((uint8_t)0x60)
bclaus 0:32f3441153b5 301
bclaus 0:32f3441153b5 302
bclaus 0:32f3441153b5 303 /** @defgroup LIS3MDL_M Reboot memory selection CTRL_REG2_M
bclaus 0:32f3441153b5 304 * @{
bclaus 0:32f3441153b5 305 */
bclaus 0:32f3441153b5 306 #define LIS3MDL_M_REBOOT_NORMAL ((uint8_t)0x00) /*!< Reboot mode: normal mode */
bclaus 0:32f3441153b5 307 #define LIS3MDL_M_REBOOT_MEM_CONTENT ((uint8_t)0x08) /*!< Reboot mode: reboot memory content */
bclaus 0:32f3441153b5 308
bclaus 0:32f3441153b5 309 #define LIS3MDL_M_REBOOT_MASK ((uint8_t)0x08)
bclaus 0:32f3441153b5 310
bclaus 0:32f3441153b5 311
bclaus 0:32f3441153b5 312 /** @defgroup LIS3MDL_M Configuration registers and user register reset CTRL_REG2_M
bclaus 0:32f3441153b5 313 * @{
bclaus 0:32f3441153b5 314 */
bclaus 0:32f3441153b5 315 #define LIS3MDL_M_SOFT_RST_DEFAULT ((uint8_t)0x00) /*!< Reset function: default value */
bclaus 0:32f3441153b5 316 #define LIS3MDL_M_SOFT_RST_RESET ((uint8_t)0x04) /*!< Reset function: reset operation */
bclaus 0:32f3441153b5 317
bclaus 0:32f3441153b5 318 #define LIS3MDL_M_SOFT_RST_MASK ((uint8_t)0x04)
bclaus 0:32f3441153b5 319
bclaus 0:32f3441153b5 320
bclaus 0:32f3441153b5 321 /** @defgroup LIS3MDL_M Disable I2C interface selection CTRL_REG3_M
bclaus 0:32f3441153b5 322 * @{
bclaus 0:32f3441153b5 323 */
bclaus 0:32f3441153b5 324 #define LIS3MDL_M_I2C_ENABLE ((uint8_t)0x00) /*!< I2C interface: enable */
bclaus 0:32f3441153b5 325 #define LIS3MDL_M_I2C_DISABLE ((uint8_t)0x80) /*!< I2C interface: disable */
bclaus 0:32f3441153b5 326
bclaus 0:32f3441153b5 327 #define LIS3MDL_M_I2C_MASK ((uint8_t)0x80)
bclaus 0:32f3441153b5 328
bclaus 0:32f3441153b5 329
bclaus 0:32f3441153b5 330 /** @defgroup LIS3MDL_M Low-power mode selection CTRL_REG3_M
bclaus 0:32f3441153b5 331 * @{
bclaus 0:32f3441153b5 332 */
bclaus 0:32f3441153b5 333 #define LIS3MDL_M_LP_ENABLE ((uint8_t)0x00) /*!< Low-power mode: magnetic data rate is configured by
bclaus 0:32f3441153b5 334 the DO bits in the CTRL_REG1_M */
bclaus 0:32f3441153b5 335 #define LIS3MDL_M_LP_DISABLE ((uint8_t)0x20) /*!< Low-power mode: the DO bits is set to 0.625 Hz and the system performs,
bclaus 0:32f3441153b5 336 for each channel, the minimum number of averages */
bclaus 0:32f3441153b5 337
bclaus 0:32f3441153b5 338 #define LIS3MDL_M_LP_MASK ((uint8_t)0x20)
bclaus 0:32f3441153b5 339
bclaus 0:32f3441153b5 340
bclaus 0:32f3441153b5 341 /** @defgroup LIS3MDL_M SPI Serial Interface mode selection CTRL_REG3_M
bclaus 0:32f3441153b5 342 * @{
bclaus 0:32f3441153b5 343 */
bclaus 0:32f3441153b5 344 #define LIS3MDL_M_SPI_R_ENABLE ((uint8_t)0x00) /*!< SPI Serial Interface mode: only write operations enabled */
bclaus 0:32f3441153b5 345 #define LIS3MDL_M_SPI_R_DISABLE ((uint8_t)0x40) /*!< SPI Serial Interface mode: read and write operations enable */
bclaus 0:32f3441153b5 346
bclaus 0:32f3441153b5 347 #define LIS3MDL_M_SPI_R_MASK ((uint8_t)0x40)
bclaus 0:32f3441153b5 348
bclaus 0:32f3441153b5 349
bclaus 0:32f3441153b5 350 /** @defgroup LIS3MDL_M Operating mode selection CTRL_REG3_M
bclaus 0:32f3441153b5 351 * @{
bclaus 0:32f3441153b5 352 */
bclaus 0:32f3441153b5 353 #define LIS3MDL_M_MD_CONTINUOUS ((uint8_t)0x00) /*!< Operating mode: Continuous-conversion mode */
bclaus 0:32f3441153b5 354 #define LIS3MDL_M_MD_SINGLE ((uint8_t)0x01) /*!< Operating mode: Single-conversion mode has to be used with sampling frequency from 0.625 Hz to 80 Hz. */
bclaus 0:32f3441153b5 355 #define LIS3MDL_M_MD_PD ((uint8_t)0x02) /*!< Operating mode: Power-down mode */
bclaus 0:32f3441153b5 356
bclaus 0:32f3441153b5 357 #define LIS3MDL_M_MD_MASK ((uint8_t)0x03)
bclaus 0:32f3441153b5 358
bclaus 0:32f3441153b5 359
bclaus 0:32f3441153b5 360
bclaus 0:32f3441153b5 361
bclaus 0:32f3441153b5 362 #endif /* __LIS3MDL_H */
bclaus 0:32f3441153b5 363
bclaus 0:32f3441153b5 364 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bclaus 0:32f3441153b5 365