feng wang / mbed-STM32F103C8T6

CHECK

Dependents:   Bob_Curtain_Sample_0506

SysClockConf.cpp@3:a92af4b1ffe1, 2016-07-05 (annotated)

Committer:
hudakz
Date:
Tue Jul 05 18:51:36 2016 +0000
Revision:
3:a92af4b1ffe1
Parent:
2:534793444c60
Child:
4:306609fe9dc8
Updated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 2:534793444c60 1 #include "SysClockConf.h"
hudakz 2:534793444c60 2 #include "mbed.h"
hudakz 2:534793444c60 3
hudakz 2:534793444c60 4 bool HSE_SystemClock_Config(int freq) {
hudakz 2:534793444c60 5 RCC_OscInitTypeDef RCC_OscInitStruct;
hudakz 2:534793444c60 6
hudakz 2:534793444c60 7 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
hudakz 2:534793444c60 8 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
hudakz 2:534793444c60 9 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
hudakz 2:534793444c60 10 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
hudakz 2:534793444c60 11 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
hudakz 2:534793444c60 12 switch(freq) {
hudakz 2:534793444c60 13 case 36:
hudakz 2:534793444c60 14 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
hudakz 2:534793444c60 15 break;
hudakz 2:534793444c60 16 case 48:
hudakz 2:534793444c60 17 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
hudakz 2:534793444c60 18 break;
hudakz 2:534793444c60 19 default:
hudakz 2:534793444c60 20 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
hudakz 2:534793444c60 21 }
hudakz 2:534793444c60 22
hudakz 2:534793444c60 23 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
hudakz 2:534793444c60 24 return false;
hudakz 2:534793444c60 25 }
hudakz 2:534793444c60 26
hudakz 2:534793444c60 27 RCC_ClkInitTypeDef RCC_ClkInitStruct;
hudakz 2:534793444c60 28
hudakz 2:534793444c60 29 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
hudakz 2:534793444c60 30 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
hudakz 2:534793444c60 31 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
hudakz 2:534793444c60 32 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
hudakz 2:534793444c60 33 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
hudakz 2:534793444c60 34 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
hudakz 2:534793444c60 35 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
hudakz 2:534793444c60 36 return false;
hudakz 2:534793444c60 37 }
hudakz 2:534793444c60 38
hudakz 2:534793444c60 39 RCC_PeriphCLKInitTypeDef PeriphClkInit;
hudakz 2:534793444c60 40
hudakz 2:534793444c60 41 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
hudakz 2:534793444c60 42 switch(freq) {
hudakz 2:534793444c60 43 case 36:
hudakz 2:534793444c60 44 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
hudakz 2:534793444c60 45 break;
hudakz 2:534793444c60 46 case 48:
hudakz 2:534793444c60 47 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
hudakz 2:534793444c60 48 break;
hudakz 2:534793444c60 49 default:
hudakz 2:534793444c60 50 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
hudakz 2:534793444c60 51 }
hudakz 2:534793444c60 52 PeriphClkInit.UsbClockSelection = RCC_USBPLLCLK_DIV1;
hudakz 2:534793444c60 53 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
hudakz 2:534793444c60 54 return false;
hudakz 2:534793444c60 55 }
hudakz 2:534793444c60 56 return true;
hudakz 2:534793444c60 57 }
hudakz 2:534793444c60 58
hudakz 3:a92af4b1ffe1 59 bool confSysClock(int freq) {
hudakz 2:534793444c60 60 HAL_RCC_DeInit();
hudakz 2:534793444c60 61 if (!HSE_SystemClock_Config(freq)) {
hudakz 2:534793444c60 62 return false;
hudakz 2:534793444c60 63 }
hudakz 2:534793444c60 64 SystemCoreClockUpdate();
hudakz 2:534793444c60 65 return true;
hudakz 2:534793444c60 66 }
hudakz 2:534793444c60 67
hudakz 2:534793444c60 68
hudakz 2:534793444c60 69