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Fork of DSP_200kHz by
Diff: DMA_sampling/adc.cpp
- Revision:
- 55:2526b3317bc8
- Parent:
- 54:1697dc574b96
- Child:
- 74:ebc9f09fda11
diff -r 1697dc574b96 -r 2526b3317bc8 DMA_sampling/adc.cpp --- a/DMA_sampling/adc.cpp Tue Feb 16 18:33:44 2016 +0000 +++ b/DMA_sampling/adc.cpp Wed Feb 17 20:26:26 2016 +0000 @@ -31,8 +31,8 @@ SIM_SCGC3 |= SIM_SCGC3_ADC1_MASK; // Set ADC hardware trigger to PDB0 - //SIM_SOPT7 = SIM_SOPT7_ADC0TRGSEL(0); // Select triggering by PDB and select pre-trigger A - //SIM_SOPT7 = SIM_SOPT7_ADC1TRGSEL(0); // Select triggering by PDB and select pre-trigger A + SIM_SOPT7 = SIM_SOPT7_ADC0TRGSEL(0); // Select triggering by PDB and select pre-trigger A + SIM_SOPT7 = SIM_SOPT7_ADC1TRGSEL(0); // Select triggering by PDB and select pre-trigger A // turn on the clock to the PDB // SIM->SCGC6 |= SIM_SCGC6_PDB_MASK; @@ -127,11 +127,11 @@ ADC1_SC2 = 0x04; // ADACT = 0, ADTRG = 0 (HW trigger), ACFE = 0, ACFGT = 0, ACREN = 0, DMAEN = 1, REFSEL = 00 (DMAEN needs to be asserted) - ADC0_SC3 = 0x08; // CAL = 0, CALF = 0, res[5:4], ADCO = 1 (continuous conversion), AVGE = 0, AVGS = 00 - ADC1_SC3 = 0x08; // CAL = 0, CALF = 0, res[5:4], ADCO = 1 (continuous conversion), AVGE = 0, AVGS = 00 +// ADC0_SC3 = 0x08; // CAL = 0, CALF = 0, res[5:4], ADCO = 1 (continuous conversion), AVGE = 0, AVGS = 00 +// ADC1_SC3 = 0x08; // CAL = 0, CALF = 0, res[5:4], ADCO = 1 (continuous conversion), AVGE = 0, AVGS = 00 -// ADC0_SC3 = 0x00; // CAL = 0, CALF = 0, res[5:4], ADCO = 0 (continuous conversion), AVGE = 0, AVGS = 00 -// ADC1_SC3 = 0x00; // CAL = 0, CALF = 0, res[5:4], ADCO = 0 (continuous conversion), AVGE = 0, AVGS = 00 + ADC0_SC3 = 0x00; // CAL = 0, CALF = 0, res[5:4], ADCO = 0 (continuous conversion), AVGE = 0, AVGS = 00 + ADC1_SC3 = 0x00; // CAL = 0, CALF = 0, res[5:4], ADCO = 0 (continuous conversion), AVGE = 0, AVGS = 00 @@ -161,6 +161,11 @@ while( (ADC1_SC1A&ADC_SC1_COCO_MASK)) {} debug.printf("ADC1_RA:%i\r\n", ADC1_RA); */ + + // Now set up for use in the rest of the program - HARDWARE trigger + ADC0_SC2 = 0x44; // ADACT = 0, ADTRG = 1 (HW trigger), ACFE = 0, ACFGT = 0, ACREN = 0, DMAEN = 1, REFSEL = 00 (DMAEN needs to be asserted) + ADC1_SC2 = 0x44; // ADACT = 0, ADTRG = 1 (HW trigger), ACFE = 0, ACFGT = 0, ACREN = 0, DMAEN = 1, REFSEL = 00 (DMAEN needs to be asserted) + // adebug.printf("Calbiration complete. Hardware continuous conversion running.\r\n"); // The ADCs are now just continuously converting and generating DMA signals after each conversion