Mohamed Azad
bcn code modification for new short bcn format
Fork of
BEACON_CODE
by 
pradeep shekhar
BCN.h@24:ca96cddf25d0, 2015-11-02 (annotated)
- Committer:
- shekhar
- Date:
- Mon Nov 02 14:46:12 2015 +0000
- Revision:
- 24:ca96cddf25d0
- Parent:
- 23:a864d57f10c4
- Child:
- 25:90cdfbadea91
made changes to integrate with BAE
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| shekhar | 12:4113ef89cd78 | 1 | #include "mbed.h" |
| shekhar | 12:4113ef89cd78 | 2 | |
| shekhar | 12:4113ef89cd78 | 3 | //STATES |
| shekhar | 12:4113ef89cd78 | 4 | #define BCN_RF_SILENCE 0 |
| shekhar | 12:4113ef89cd78 | 5 | #define BCN_TX_DISABLED 1 |
| shekhar | 12:4113ef89cd78 | 6 | #define BCN_TX_STANDBY 2 |
| shekhar | 12:4113ef89cd78 | 7 | #define BCN_TX_FAILURE 3 |
| shekhar | 12:4113ef89cd78 | 8 | #define BCN_TX_SUCCESS 4 |
| shekhar | 12:4113ef89cd78 | 9 | |
| shekhar | 12:4113ef89cd78 | 10 | //Size of tx data |
| shekhar | 12:4113ef89cd78 | 11 | #define SHORT_TX_DATA 60 //in bytes |
| shekhar | 12:4113ef89cd78 | 12 | #define LONG_TX_DATA 75 //in bytes |
| shekhar | 12:4113ef89cd78 | 13 | |
| shekhar | 15:8826cc77ada8 | 14 | //#define RF_SILENCE_TIME 35*60 |
| shekhar | 24:ca96cddf25d0 | 15 | #define RF_SILENCE_TIME 10 //changed for testing |
| shekhar | 12:4113ef89cd78 | 16 | |
| shekhar | 12:4113ef89cd78 | 17 | //FUNCTION PROTOTYPING |
| shekhar | 15:8826cc77ada8 | 18 | void FCTN_BCN_INIT(); |
| shekhar | 15:8826cc77ada8 | 19 | void FCTN_BCN_FEN(); |
| shekhar | 15:8826cc77ada8 | 20 | void FCTN_BCN_TX_MAIN(); |
| shekhar | 13:de2bb3b0b0d2 | 21 | void Set_BCN_TX_STATUS(uint8_t); |
| shekhar | 14:a7dbfbc462f1 | 22 | uint8_t check_Temperature(); |
| shekhar | 12:4113ef89cd78 | 23 | void SHORT_BCN_TX(); |
| shekhar | 12:4113ef89cd78 | 24 | void LONG_BCN_TX(); |
| shekhar | 12:4113ef89cd78 | 25 | void Init_BEACON_HW(); |
| shekhar | 13:de2bb3b0b0d2 | 26 | void writereg(uint8_t,uint8_t); |
| shekhar | 13:de2bb3b0b0d2 | 27 | uint8_t readreg(uint8_t); |
| shekhar | 12:4113ef89cd78 | 28 | void clearTxBuf(); |
| shekhar | 23:a864d57f10c4 | 29 | uint8_t setFrequency(double); |
| shekhar | 12:4113ef89cd78 | 30 | bool Check_ACK_RECEIVED(); |
| shekhar | 20:89b6bb0859a1 | 31 | void reset_rfm(); |
| shekhar | 12:4113ef89cd78 | 32 | |
| shekhar | 12:4113ef89cd78 | 33 | #define RF22_MAX_MESSAGE_LEN 255 |
| shekhar | 12:4113ef89cd78 | 34 | |
| shekhar | 12:4113ef89cd78 | 35 | //These values we set for FIFO thresholds |
| shekhar | 12:4113ef89cd78 | 36 | #define RF22_TXFFAEM_THRESHOLD 40 |
| shekhar | 12:4113ef89cd78 | 37 | |
| shekhar | 12:4113ef89cd78 | 38 | //Registers |
| shekhar | 12:4113ef89cd78 | 39 | #define RF22_REG_00_DEVICE_TYPE 0x00 |
| shekhar | 12:4113ef89cd78 | 40 | #define RF22_REG_02_DEVICE_STATUS 0x02 |
| shekhar | 12:4113ef89cd78 | 41 | #define RF22_REG_03_INTERRUPT_STATUS1 0x03 |
| shekhar | 12:4113ef89cd78 | 42 | #define RF22_REG_04_INTERRUPT_STATUS2 0x04 |
| shekhar | 12:4113ef89cd78 | 43 | #define RF22_REG_07_OPERATING_MODE1 0x07 |
| shekhar | 12:4113ef89cd78 | 44 | #define RF22_REG_08_OPERATING_MODE2 0x08 |
| shekhar | 12:4113ef89cd78 | 45 | #define RF22_REG_09_OSCILLATOR_LOAD_CAPACITANCE 0x09 |
| shekhar | 12:4113ef89cd78 | 46 | #define RF22_REG_0B_GPIO_CONFIGURATION0 0x0b |
| shekhar | 12:4113ef89cd78 | 47 | #define RF22_REG_0C_GPIO_CONFIGURATION1 0x0c |
| shekhar | 12:4113ef89cd78 | 48 | #define RF22_REG_0D_GPIO_CONFIGURATION2 0x0d |
| shekhar | 12:4113ef89cd78 | 49 | #define RF22_REG_0F_ADC_CONFIGURATION 0x0f |
| shekhar | 12:4113ef89cd78 | 50 | #define RF22_REG_11_ADC_Value 0x11 |
| shekhar | 12:4113ef89cd78 | 51 | #define RF22_REG_12_Temperature_Sensor_Calibration 0x12 |
| shekhar | 12:4113ef89cd78 | 52 | #define RF22_REG_1C_IF_FILTER_BANDWIDTH 0x1c |
| shekhar | 12:4113ef89cd78 | 53 | #define RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE 0x1f |
| shekhar | 12:4113ef89cd78 | 54 | #define RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE 0x20 |
| shekhar | 12:4113ef89cd78 | 55 | #define RF22_REG_21_CLOCK_RECOVERY_OFFSET2 0x21 |
| shekhar | 12:4113ef89cd78 | 56 | #define RF22_REG_22_CLOCK_RECOVERY_OFFSET1 0x22 |
| shekhar | 12:4113ef89cd78 | 57 | #define RF22_REG_23_CLOCK_RECOVERY_OFFSET0 0x23 |
| shekhar | 12:4113ef89cd78 | 58 | #define RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1 0x24 |
| shekhar | 12:4113ef89cd78 | 59 | #define RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0 0x25 |
| shekhar | 12:4113ef89cd78 | 60 | #define RF22_REG_26_RSSI 0x26 |
| shekhar | 12:4113ef89cd78 | 61 | #define RF22_REG_27_RSSI_THRESHOLD 0x27 |
| shekhar | 12:4113ef89cd78 | 62 | #define RF22_REG_28_ANTENNA_DIVERSITY1 0x28 |
| shekhar | 12:4113ef89cd78 | 63 | #define RF22_REG_29_ANTENNA_DIVERSITY2 0x29 |
| shekhar | 12:4113ef89cd78 | 64 | #define RF22_REG_2A_AFC_LIMITER 0x2a |
| shekhar | 12:4113ef89cd78 | 65 | #define RF22_REG_2B_AFC_CORRECTION_READ 0x2b |
| shekhar | 12:4113ef89cd78 | 66 | #define RF22_REG_2C_OOK_COUNTER_VALUE_1 0x2c |
| shekhar | 12:4113ef89cd78 | 67 | #define RF22_REG_2D_OOK_COUNTER_VALUE_2 0x2d |
| shekhar | 12:4113ef89cd78 | 68 | #define RF22_REG_2E_SLICER_PEAK_HOLD 0x2e |
| shekhar | 12:4113ef89cd78 | 69 | #define RF22_REG_30_DATA_ACCESS_CONTROL 0x30 |
| shekhar | 12:4113ef89cd78 | 70 | #define RF22_REG_31_EZMAC_STATUS 0x31 |
| shekhar | 12:4113ef89cd78 | 71 | #define RF22_REG_32_HEADER_CONTROL1 0x32 |
| shekhar | 12:4113ef89cd78 | 72 | #define RF22_REG_33_HEADER_CONTROL2 0x33 |
| shekhar | 12:4113ef89cd78 | 73 | #define RF22_REG_34_PREAMBLE_LENGTH 0x34 |
| shekhar | 12:4113ef89cd78 | 74 | #define RF22_REG_35_PREAMBLE_DETECTION_CONTROL1 0x35 |
| shekhar | 12:4113ef89cd78 | 75 | #define RF22_REG_36_SYNC_WORD3 0x36 |
| shekhar | 12:4113ef89cd78 | 76 | #define RF22_REG_37_SYNC_WORD2 0x37 |
| shekhar | 12:4113ef89cd78 | 77 | #define RF22_REG_38_SYNC_WORD1 0x38 |
| shekhar | 12:4113ef89cd78 | 78 | #define RF22_REG_39_SYNC_WORD0 0x39 |
| shekhar | 12:4113ef89cd78 | 79 | #define RF22_REG_3A_TRANSMIT_HEADER3 0x3a |
| shekhar | 12:4113ef89cd78 | 80 | #define RF22_REG_3B_TRANSMIT_HEADER2 0x3b |
| shekhar | 12:4113ef89cd78 | 81 | #define RF22_REG_3C_TRANSMIT_HEADER1 0x3c |
| shekhar | 12:4113ef89cd78 | 82 | #define RF22_REG_3D_TRANSMIT_HEADER0 0x3d |
| shekhar | 12:4113ef89cd78 | 83 | #define RF22_REG_3E_PACKET_LENGTH 0x3e |
| shekhar | 12:4113ef89cd78 | 84 | #define RF22_REG_3F_CHECK_HEADER3 0x3f |
| shekhar | 12:4113ef89cd78 | 85 | #define RF22_REG_40_CHECK_HEADER2 0x40 |
| shekhar | 12:4113ef89cd78 | 86 | #define RF22_REG_41_CHECK_HEADER1 0x41 |
| shekhar | 12:4113ef89cd78 | 87 | #define RF22_REG_42_CHECK_HEADER0 0x42 |
| shekhar | 12:4113ef89cd78 | 88 | #define RF22_REG_43_HEADER_ENABLE3 0x43 |
| shekhar | 12:4113ef89cd78 | 89 | #define RF22_REG_44_HEADER_ENABLE2 0x44 |
| shekhar | 12:4113ef89cd78 | 90 | #define RF22_REG_45_HEADER_ENABLE1 0x45 |
| shekhar | 12:4113ef89cd78 | 91 | #define RF22_REG_46_HEADER_ENABLE0 0x46 |
| shekhar | 12:4113ef89cd78 | 92 | #define RF22_REG_47_RECEIVED_HEADER3 0x47 |
| shekhar | 12:4113ef89cd78 | 93 | #define RF22_REG_48_RECEIVED_HEADER2 0x48 |
| shekhar | 12:4113ef89cd78 | 94 | #define RF22_REG_49_RECEIVED_HEADER1 0x49 |
| shekhar | 12:4113ef89cd78 | 95 | #define RF22_REG_4A_RECEIVED_HEADER0 0x4a |
| shekhar | 12:4113ef89cd78 | 96 | #define RF22_REG_4B_RECEIVED_PACKET_LENGTH 0x4b |
| shekhar | 12:4113ef89cd78 | 97 | #define RF22_REG_58 0x58 |
| shekhar | 12:4113ef89cd78 | 98 | #define RF22_REG_60_CHANNEL_FILTER_COEFFICIENT_ADDRESS 0x60 |
| shekhar | 12:4113ef89cd78 | 99 | #define RF22_REG_61_CHANNEL_FILTER_COEFFICIENT_VALUE 0x61 |
| shekhar | 12:4113ef89cd78 | 100 | #define RF22_REG_62_CRYSTAL_OSCILLATOR_POR_CONTROL 0x62 |
| shekhar | 12:4113ef89cd78 | 101 | #define RF22_REG_63_RC_OSCILLATOR_COARSE_CALIBRATION 0x63 |
| shekhar | 12:4113ef89cd78 | 102 | #define RF22_REG_64_RC_OSCILLATOR_FINE_CALIBRATION 0x64 |
| shekhar | 12:4113ef89cd78 | 103 | #define RF22_REG_65_LDO_CONTROL_OVERRIDE 0x65 |
| shekhar | 12:4113ef89cd78 | 104 | #define RF22_REG_66_LDO_LEVEL_SETTINGS 0x66 |
| shekhar | 12:4113ef89cd78 | 105 | #define RF22_REG_67_DELTA_SIGMA_ADC_TUNING1 0x67 |
| shekhar | 12:4113ef89cd78 | 106 | #define RF22_REG_68_DELTA_SIGMA_ADC_TUNING2 0x68 |
| shekhar | 12:4113ef89cd78 | 107 | #define RF22_REG_69_AGC_OVERRIDE1 0x69 |
| shekhar | 12:4113ef89cd78 | 108 | #define RF22_REG_6A_AGC_OVERRIDE2 0x6a |
| shekhar | 12:4113ef89cd78 | 109 | #define RF22_REG_6B_GFSK_FIR_FILTER_COEFFICIENT_ADDRESS 0x6b |
| shekhar | 12:4113ef89cd78 | 110 | #define RF22_REG_6C_GFSK_FIR_FILTER_COEFFICIENT_VALUE 0x6c |
| shekhar | 12:4113ef89cd78 | 111 | #define RF22_REG_6D_TX_POWER 0x6d |
| shekhar | 12:4113ef89cd78 | 112 | #define RF22_REG_6E_TX_DATA_RATE 0x6e |
| shekhar | 12:4113ef89cd78 | 113 | #define RF22_REG_6F_TX_DATA_RATE 0x6f |
| shekhar | 12:4113ef89cd78 | 114 | #define RF22_REG_70_MODULATION_CONTROL1 0x70 |
| shekhar | 12:4113ef89cd78 | 115 | #define RF22_REG_71_MODULATION_CONTROL2 0x71 |
| shekhar | 12:4113ef89cd78 | 116 | #define RF22_REG_72_FREQUENCY_DEVIATION 0x72 |
| shekhar | 12:4113ef89cd78 | 117 | #define RF22_REG_73_FREQUENCY_OFFSET1 0x73 |
| shekhar | 12:4113ef89cd78 | 118 | #define RF22_REG_74_FREQUENCY_OFFSET2 0x74 |
| shekhar | 12:4113ef89cd78 | 119 | #define RF22_REG_75_FREQUENCY_BAND_SELECT 0x75 |
| shekhar | 12:4113ef89cd78 | 120 | #define RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1 0x76 |
| shekhar | 12:4113ef89cd78 | 121 | #define RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0 0x77 |
| shekhar | 12:4113ef89cd78 | 122 | #define RF22_REG_79_FREQUENCY_HOPPING_CHANNEL_SELECT 0x79 |
| shekhar | 12:4113ef89cd78 | 123 | #define RF22_REG_7A_FREQUENCY_HOPPING_STEP_SIZE 0x7a |
| shekhar | 12:4113ef89cd78 | 124 | #define RF22_REG_7C_TX_FIFO_CONTROL1 0x7c |
| shekhar | 12:4113ef89cd78 | 125 | #define RF22_REG_7D_TX_FIFO_CONTROL2 0x7d |
| shekhar | 12:4113ef89cd78 | 126 | #define RF22_REG_7E_RX_FIFO_CONTROL 0x7e |
| shekhar | 12:4113ef89cd78 | 127 | #define RF22_REG_7F_FIFO_ACCESS 0x7f |