Austins SD card logger

Dependencies:   mbed SDFileSystem

Committer:
austinbrown124
Date:
Sat Apr 04 19:11:30 2020 +0000
Revision:
5:3d96e302795f
Parent:
4:4bd2b85412c3
3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 0:bdbd3d6fc5d5 1 #include "mbed.h"
mbed_official 0:bdbd3d6fc5d5 2 #include "SDFileSystem.h"
austinbrown124 2:7bb016846566 3 #include "string.h"
austinbrown124 4:4bd2b85412c3 4
austinbrown124 4:4bd2b85412c3 5
austinbrown124 4:4bd2b85412c3 6
austinbrown124 4:4bd2b85412c3 7 /*
austinbrown124 4:4bd2b85412c3 8
austinbrown124 4:4bd2b85412c3 9 F401 Data Logger
austinbrown124 4:4bd2b85412c3 10 Many problems were encountered. It seems that the data logger just needs the 32.7678whe KhZ crystal to run both
austinbrown124 4:4bd2b85412c3 11 the SD card and the RTC.
austinbrown124 4:4bd2b85412c3 12
austinbrown124 4:4bd2b85412c3 13
austinbrown124 4:4bd2b85412c3 14
austinbrown124 4:4bd2b85412c3 15 Had to split testing code into 2 and real code into 2B. This is because the serials are effectively hardcoded, RIP.
austinbrown124 4:4bd2b85412c3 16 USART6 must be changed to USART2
austinbrown124 4:4bd2b85412c3 17
austinbrown124 4:4bd2b85412c3 18
austinbrown124 4:4bd2b85412c3 19 UNTESTED. But I belive this should work!!
austinbrown124 4:4bd2b85412c3 20
austinbrown124 4:4bd2b85412c3 21 */
mbed_official 0:bdbd3d6fc5d5 22
austinbrown124 2:7bb016846566 23 /*SD card*/
austinbrown124 2:7bb016846566 24 #define DI PB_5
austinbrown124 2:7bb016846566 25 #define DO PB_4
austinbrown124 2:7bb016846566 26 #define SCK PB_3
austinbrown124 2:7bb016846566 27 #define CS PB_6
austinbrown124 2:7bb016846566 28
austinbrown124 2:7bb016846566 29
austinbrown124 2:7bb016846566 30 char fname[255];
austinbrown124 2:7bb016846566 31 char current_time[64];
austinbrown124 2:7bb016846566 32
austinbrown124 2:7bb016846566 33
austinbrown124 2:7bb016846566 34 /*Serial buffer*/
austinbrown124 4:4bd2b85412c3 35 #define PAGE_SIZE 4096
austinbrown124 4:4bd2b85412c3 36 #define CHUNK_SIZE (2*PAGE_SIZE) //double size copy
austinbrown124 4:4bd2b85412c3 37 #define BUF_SIZE (2*CHUNK_SIZE) //total buffer len
austinbrown124 2:7bb016846566 38
austinbrown124 2:7bb016846566 39 //RTC
austinbrown124 4:4bd2b85412c3 40 #define SET_TIME false //true
austinbrown124 2:7bb016846566 41
austinbrown124 2:7bb016846566 42 int start = 0, end = 0;
austinbrown124 2:7bb016846566 43 unsigned char buf[BUF_SIZE];
austinbrown124 4:4bd2b85412c3 44 unsigned char last_char = '0';
austinbrown124 4:4bd2b85412c3 45 bool main_log_break = false;
austinbrown124 4:4bd2b85412c3 46
austinbrown124 4:4bd2b85412c3 47
austinbrown124 4:4bd2b85412c3 48
austinbrown124 2:7bb016846566 49
austinbrown124 2:7bb016846566 50
austinbrown124 2:7bb016846566 51
austinbrown124 4:4bd2b85412c3 52 /*UART*/
austinbrown124 4:4bd2b85412c3 53 //#define BAUD_RATE 256000
austinbrown124 4:4bd2b85412c3 54 #define BAUD_RATE 2000000
austinbrown124 4:4bd2b85412c3 55
austinbrown124 4:4bd2b85412c3 56 Serial serial4(PA_2, PA_3); //for actual data logger 7 board
austinbrown124 4:4bd2b85412c3 57 Serial pc(PA_9, PA_10);
austinbrown124 4:4bd2b85412c3 58
austinbrown124 4:4bd2b85412c3 59 //Serial pc(PA_2, PA_3); //For testing on nucleo-64 boards
austinbrown124 4:4bd2b85412c3 60 //Serial serial4(PA_11, PC_7);
austinbrown124 4:4bd2b85412c3 61
austinbrown124 4:4bd2b85412c3 62
austinbrown124 4:4bd2b85412c3 63 /*Test pins*/
austinbrown124 4:4bd2b85412c3 64 DigitalOut led(PA_7);
austinbrown124 4:4bd2b85412c3 65 DigitalOut rx_HT(PC_2);
austinbrown124 4:4bd2b85412c3 66 DigitalOut rx_TC(PC_3);
austinbrown124 4:4bd2b85412c3 67
austinbrown124 4:4bd2b85412c3 68 //int flag=0, flag2=0;
austinbrown124 4:4bd2b85412c3 69 //bool half_transfer = false;
austinbrown124 4:4bd2b85412c3 70 //bool full_transfer = false;
austinbrown124 4:4bd2b85412c3 71
austinbrown124 4:4bd2b85412c3 72
austinbrown124 4:4bd2b85412c3 73
austinbrown124 4:4bd2b85412c3 74
austinbrown124 4:4bd2b85412c3 75 extern "C" void DMA1_Stream5_IRQHandler(void)
austinbrown124 4:4bd2b85412c3 76 {
austinbrown124 4:4bd2b85412c3 77 /* half transfer interrupt */
austinbrown124 4:4bd2b85412c3 78 if (DMA1->HISR & DMA_HISR_HTIF5 ) //if half transfer on DMA1 stream 5
austinbrown124 4:4bd2b85412c3 79 {
austinbrown124 4:4bd2b85412c3 80 DMA1->HIFCR = DMA_HIFCR_CHTIF5; // acknowledge interrupt
austinbrown124 4:4bd2b85412c3 81 rx_HT = 1;
austinbrown124 4:4bd2b85412c3 82 fwrite(buf, 1, CHUNK_SIZE, fp);
austinbrown124 4:4bd2b85412c3 83 rx_HT = 0;
austinbrown124 4:4bd2b85412c3 84 }
austinbrown124 4:4bd2b85412c3 85 /* transmission complete interrupt */
austinbrown124 4:4bd2b85412c3 86 if (DMA1->HISR & DMA_HISR_TCIF5 ) //if transfer complete on DMA1 stream 5
austinbrown124 4:4bd2b85412c3 87 {
austinbrown124 4:4bd2b85412c3 88 DMA1->HIFCR = DMA_HIFCR_CTCIF5; // acknowledge interrupt
austinbrown124 4:4bd2b85412c3 89 rx_TC = 1;
austinbrown124 4:4bd2b85412c3 90 fwrite(buf + CHUNK_SIZE, 1, CHUNK_SIZE, fp);
austinbrown124 4:4bd2b85412c3 91 rx_TC = 0;
austinbrown124 2:7bb016846566 92 }
austinbrown124 2:7bb016846566 93 }
mbed_official 0:bdbd3d6fc5d5 94
austinbrown124 4:4bd2b85412c3 95
mbed_official 0:bdbd3d6fc5d5 96 int main() {
austinbrown124 2:7bb016846566 97 pc.baud(256000);
austinbrown124 4:4bd2b85412c3 98 RCC->CR |= RCC_CR_HSEON; //turn on the HSE crystal!
austinbrown124 4:4bd2b85412c3 99 led = 1;
austinbrown124 4:4bd2b85412c3 100
austinbrown124 2:7bb016846566 101 /*init SD card, wait for card insertion*/
austinbrown124 4:4bd2b85412c3 102 pc.printf("\n\rconfiging SD card ");
austinbrown124 2:7bb016846566 103 SDFileSystem sd(DI, DO, SCK, CS, "sd");
austinbrown124 4:4bd2b85412c3 104 pc.printf("\n\rtrying status ");
austinbrown124 2:7bb016846566 105 while (sd.disk_status()) {
austinbrown124 2:7bb016846566 106 sd.disk_initialize();
austinbrown124 2:7bb016846566 107 wait(0.5);
austinbrown124 4:4bd2b85412c3 108 led = !led;
austinbrown124 2:7bb016846566 109 }
austinbrown124 3:8d4c12a3b5d4 110 pc.printf("disk initialized \r");
austinbrown124 2:7bb016846566 111
austinbrown124 4:4bd2b85412c3 112 if (SET_TIME) {set_time(1557126150);}
austinbrown124 4:4bd2b85412c3 113 led = !led;
austinbrown124 4:4bd2b85412c3 114 time_t seconds = time(NULL);
austinbrown124 2:7bb016846566 115 pc.printf("Time as seconds since January 1, 1970 = %d\n\r", seconds);
austinbrown124 2:7bb016846566 116
austinbrown124 2:7bb016846566 117 strcpy(fname, "/sd/log_");
mbed_official 0:bdbd3d6fc5d5 118
austinbrown124 2:7bb016846566 119 sprintf(current_time, "%u", seconds );
austinbrown124 2:7bb016846566 120 strcat(fname, current_time);
austinbrown124 4:4bd2b85412c3 121 strcat(fname, ".bin");
austinbrown124 2:7bb016846566 122 pc.printf("Logging to %s\n", fname);
austinbrown124 4:4bd2b85412c3 123 led = !led;
austinbrown124 2:7bb016846566 124 FILE *fp = fopen(fname, "wb");
austinbrown124 4:4bd2b85412c3 125 pc.printf("file opened \r");
austinbrown124 4:4bd2b85412c3 126 led = 0;
austinbrown124 2:7bb016846566 127
austinbrown124 2:7bb016846566 128
austinbrown124 2:7bb016846566 129 /*init serial*/
austinbrown124 2:7bb016846566 130 serial4.baud(BAUD_RATE);
austinbrown124 4:4bd2b85412c3 131
austinbrown124 4:4bd2b85412c3 132 //FOR NUCLEO-64 boards: USART6, DMA2, Stream2, channel 5?
austinbrown124 4:4bd2b85412c3 133 //for actual data logger: USART2, DMA1, Stream5, Channel 4
austinbrown124 4:4bd2b85412c3 134
austinbrown124 2:7bb016846566 135
austinbrown124 4:4bd2b85412c3 136 RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN;
austinbrown124 4:4bd2b85412c3 137
austinbrown124 4:4bd2b85412c3 138 USART2->CR3 |= USART_CR3_DMAR; // enable DMA serial recieve
austinbrown124 4:4bd2b85412c3 139 DMA1_Stream5->PAR = (uint32_t)&USART2->DR; // transfer data from UART DR
austinbrown124 4:4bd2b85412c3 140 DMA1_Stream5->M0AR = (uint32_t)buf; // transfer data to rx buffer
austinbrown124 4:4bd2b85412c3 141 DMA1_Stream5->CR |= (4<<25); // select channel 5 on stream 5
austinbrown124 4:4bd2b85412c3 142 DMA1_Stream5->NDTR = BUF_SIZE; // tranfer full buffer of datas
austinbrown124 4:4bd2b85412c3 143 DMA1_Stream5->CR |= DMA_SxCR_MINC;
austinbrown124 4:4bd2b85412c3 144 NVIC_EnableIRQ(DMA1_Stream5_IRQn); //enable interrupts?
austinbrown124 4:4bd2b85412c3 145 DMA1_Stream5->CR |= DMA_SxCR_TCIE; //enable transfer complete interrupt
austinbrown124 4:4bd2b85412c3 146 DMA1_Stream5->CR |= DMA_SxCR_HTIE; //enable half tranfer interrupt
austinbrown124 4:4bd2b85412c3 147 DMA1_Stream5->CR |= DMA_SxCR_CIRC; //enable circular mode
austinbrown124 4:4bd2b85412c3 148 DMA1_Stream5->CR |= DMA_SxCR_EN; //enable DMA
austinbrown124 4:4bd2b85412c3 149 pc.printf("DMA Enabled\r\n");
austinbrown124 4:4bd2b85412c3 150
austinbrown124 4:4bd2b85412c3 151 if(serial4.readable()) { } //necessary to make things work
austinbrown124 4:4bd2b85412c3 152
austinbrown124 4:4bd2b85412c3 153
austinbrown124 2:7bb016846566 154 for (;;) {
austinbrown124 4:4bd2b85412c3 155
austinbrown124 4:4bd2b85412c3 156
austinbrown124 4:4bd2b85412c3 157
austinbrown124 4:4bd2b85412c3 158 }
austinbrown124 2:7bb016846566 159 }
mbed_official 0:bdbd3d6fc5d5 160
austinbrown124 4:4bd2b85412c3 161
austinbrown124 2:7bb016846566 162