aurelio carella / Mbed OS mbed-os-example-ble-GattServer_ECG

20200716 read Status Register each second

Dependencies:   SDFileSystem mbed-os-example-ble-GattServer max32630fthr

HSP/Devices/S25FS256/S25FS512.cpp@21:51e162c130a9, 2020-07-16 (annotated)

Committer:
aureliocarella
Date:
Thu Jul 16 14:59:04 2020 +0000
Revision:
21:51e162c130a9
20200716

Who changed what in which revision?

UserRevisionLine numberNew contents of line
aureliocarella 21:51e162c130a9 1 /*******************************************************************************
aureliocarella 21:51e162c130a9 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
aureliocarella 21:51e162c130a9 3 *
aureliocarella 21:51e162c130a9 4 * Permission is hereby granted, free of charge, to any person obtaining a
aureliocarella 21:51e162c130a9 5 * copy of this software and associated documentation files (the "Software"),
aureliocarella 21:51e162c130a9 6 * to deal in the Software without restriction, including without limitation
aureliocarella 21:51e162c130a9 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
aureliocarella 21:51e162c130a9 8 * and/or sell copies of the Software, and to permit persons to whom the
aureliocarella 21:51e162c130a9 9 * Software is furnished to do so, subject to the following conditions:
aureliocarella 21:51e162c130a9 10 *
aureliocarella 21:51e162c130a9 11 * The above copyright notice and this permission notice shall be included
aureliocarella 21:51e162c130a9 12 * in all copies or substantial portions of the Software.
aureliocarella 21:51e162c130a9 13 *
aureliocarella 21:51e162c130a9 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
aureliocarella 21:51e162c130a9 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
aureliocarella 21:51e162c130a9 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
aureliocarella 21:51e162c130a9 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
aureliocarella 21:51e162c130a9 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
aureliocarella 21:51e162c130a9 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
aureliocarella 21:51e162c130a9 20 * OTHER DEALINGS IN THE SOFTWARE.
aureliocarella 21:51e162c130a9 21 *
aureliocarella 21:51e162c130a9 22 * Except as contained in this notice, the name of Maxim Integrated
aureliocarella 21:51e162c130a9 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
aureliocarella 21:51e162c130a9 24 * Products, Inc. Branding Policy.
aureliocarella 21:51e162c130a9 25 *
aureliocarella 21:51e162c130a9 26 * The mere transfer of this software does not imply any licenses
aureliocarella 21:51e162c130a9 27 * of trade secrets, proprietary technology, copyrights, patents,
aureliocarella 21:51e162c130a9 28 * trademarks, maskwork rights, or any other form of intellectual
aureliocarella 21:51e162c130a9 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
aureliocarella 21:51e162c130a9 30 * ownership rights.
aureliocarella 21:51e162c130a9 31 *******************************************************************************
aureliocarella 21:51e162c130a9 32 */
aureliocarella 21:51e162c130a9 33
aureliocarella 21:51e162c130a9 34 //
aureliocarella 21:51e162c130a9 35 // Flash Non-Volatile Memory
aureliocarella 21:51e162c130a9 36 // U27 S25FS512
aureliocarella 21:51e162c130a9 37 // Nimitz SPIM1
aureliocarella 21:51e162c130a9 38 //
aureliocarella 21:51e162c130a9 39
aureliocarella 21:51e162c130a9 40 #include "mbed.h"
aureliocarella 21:51e162c130a9 41 #include "S25FS512.h"
aureliocarella 21:51e162c130a9 42 #include "QuadSpiInterface.h"
aureliocarella 21:51e162c130a9 43
aureliocarella 21:51e162c130a9 44 #define IOMUX_IO_ENABLE 1
aureliocarella 21:51e162c130a9 45
aureliocarella 21:51e162c130a9 46 #define S25FS512_SPI_PORT 1
aureliocarella 21:51e162c130a9 47 #define S25FS512_CS_PIN 0
aureliocarella 21:51e162c130a9 48 #define S25FS512_CS_POLARITY 0
aureliocarella 21:51e162c130a9 49 #define S25FS512_CS_ACTIVITY_DELAY 0
aureliocarella 21:51e162c130a9 50 #define S25FS512_CS_INACTIVITY_DELAY 0
aureliocarella 21:51e162c130a9 51 #define S25FS512_CLK_HI 4
aureliocarella 21:51e162c130a9 52 #define S25FS512_CLK_LOW 4
aureliocarella 21:51e162c130a9 53 #define S25FS512_ALT_CLK 0
aureliocarella 21:51e162c130a9 54 #define S25FS512_CLK_POLARITY 0
aureliocarella 21:51e162c130a9 55 #define S25FS512_CLK_PHASE 0
aureliocarella 21:51e162c130a9 56 #define S25FS512_WRITE 1
aureliocarella 21:51e162c130a9 57 #define S25FS512_READ 0
aureliocarella 21:51e162c130a9 58
aureliocarella 21:51e162c130a9 59 #define INT_PORT_B 3
aureliocarella 21:51e162c130a9 60 #define INT_PIN_B 6
aureliocarella 21:51e162c130a9 61
aureliocarella 21:51e162c130a9 62 uint8_t flashBuffer[257 + 10];
aureliocarella 21:51e162c130a9 63
aureliocarella 21:51e162c130a9 64 //******************************************************************************
aureliocarella 21:51e162c130a9 65 S25FS512::S25FS512(QuadSpiInterface *_quadSpiInterface) {
aureliocarella 21:51e162c130a9 66 this->quadSpiInterface = _quadSpiInterface;
aureliocarella 21:51e162c130a9 67 }
aureliocarella 21:51e162c130a9 68
aureliocarella 21:51e162c130a9 69 //******************************************************************************
aureliocarella 21:51e162c130a9 70 S25FS512::~S25FS512(void) {
aureliocarella 21:51e162c130a9 71 }
aureliocarella 21:51e162c130a9 72
aureliocarella 21:51e162c130a9 73 //******************************************************************************
aureliocarella 21:51e162c130a9 74 int S25FS512::init(void) {
aureliocarella 21:51e162c130a9 75 setQuadMode();
aureliocarella 21:51e162c130a9 76 return 0;
aureliocarella 21:51e162c130a9 77 }
aureliocarella 21:51e162c130a9 78
aureliocarella 21:51e162c130a9 79 //******************************************************************************
aureliocarella 21:51e162c130a9 80 int S25FS512::wren4Wire(void) {
aureliocarella 21:51e162c130a9 81 uint8_t cmdArray[8];
aureliocarella 21:51e162c130a9 82 // Send WREN
aureliocarella 21:51e162c130a9 83 cmdArray[0] = 0x06;
aureliocarella 21:51e162c130a9 84 wait_1mS();
aureliocarella 21:51e162c130a9 85 return reg_write_read_multiple_4Wire(cmdArray, 1, flashBuffer, 1);
aureliocarella 21:51e162c130a9 86 }
aureliocarella 21:51e162c130a9 87
aureliocarella 21:51e162c130a9 88 //******************************************************************************
aureliocarella 21:51e162c130a9 89 uint8_t S25FS512::wren(void) {
aureliocarella 21:51e162c130a9 90 uint8_t cmdArray[8];
aureliocarella 21:51e162c130a9 91 // Send WREN
aureliocarella 21:51e162c130a9 92 cmdArray[0] = 0x06;
aureliocarella 21:51e162c130a9 93 wait_1mS();
aureliocarella 21:51e162c130a9 94 return reg_write_read_multiple_quad(cmdArray, 1, flashBuffer, 0);
aureliocarella 21:51e162c130a9 95 }
aureliocarella 21:51e162c130a9 96
aureliocarella 21:51e162c130a9 97 //******************************************************************************
aureliocarella 21:51e162c130a9 98 int8_t S25FS512::reg_write_read_multiple_quad_last(uint8_t *bufferOut,
aureliocarella 21:51e162c130a9 99 uint8_t numberOut,
aureliocarella 21:51e162c130a9 100 uint8_t *bufferIn,
aureliocarella 21:51e162c130a9 101 uint8_t numberIn,
aureliocarella 21:51e162c130a9 102 uint8_t last) {
aureliocarella 21:51e162c130a9 103 int32_t success = 0;
aureliocarella 21:51e162c130a9 104
aureliocarella 21:51e162c130a9 105 success = quadSpiInterface->SPI_Transmit(
aureliocarella 21:51e162c130a9 106 bufferOut, numberOut,
aureliocarella 21:51e162c130a9 107 bufferIn, numberIn, (int)last);
aureliocarella 21:51e162c130a9 108
aureliocarella 21:51e162c130a9 109 if (success != 0) return -1;
aureliocarella 21:51e162c130a9 110 return 0;
aureliocarella 21:51e162c130a9 111 }
aureliocarella 21:51e162c130a9 112
aureliocarella 21:51e162c130a9 113 //******************************************************************************
aureliocarella 21:51e162c130a9 114 int8_t S25FS512::reg_write_read_multiple_4Wire(uint8_t *bufferOut,
aureliocarella 21:51e162c130a9 115 uint8_t numberOut,
aureliocarella 21:51e162c130a9 116 uint8_t *bufferIn,
aureliocarella 21:51e162c130a9 117 uint8_t numberIn) {
aureliocarella 21:51e162c130a9 118 int32_t success = 0;
aureliocarella 21:51e162c130a9 119 success = quadSpiInterface->SPI_Transmit4Wire(bufferOut, numberOut, bufferIn,
aureliocarella 21:51e162c130a9 120 numberIn, (int)1);
aureliocarella 21:51e162c130a9 121
aureliocarella 21:51e162c130a9 122 if (success != 0) return -1;
aureliocarella 21:51e162c130a9 123 return 0;
aureliocarella 21:51e162c130a9 124 }
aureliocarella 21:51e162c130a9 125
aureliocarella 21:51e162c130a9 126 //******************************************************************************
aureliocarella 21:51e162c130a9 127 int8_t S25FS512::reg_write_read_multiple_quad(uint8_t *bufferOut,
aureliocarella 21:51e162c130a9 128 uint8_t numberOut,
aureliocarella 21:51e162c130a9 129 uint8_t *bufferIn,
aureliocarella 21:51e162c130a9 130 uint8_t numberIn) {
aureliocarella 21:51e162c130a9 131 int8_t ret;
aureliocarella 21:51e162c130a9 132 ret = reg_write_read_multiple_quad_last(bufferOut, numberOut, bufferIn,
aureliocarella 21:51e162c130a9 133 numberIn, 1);
aureliocarella 21:51e162c130a9 134 return ret;
aureliocarella 21:51e162c130a9 135 }
aureliocarella 21:51e162c130a9 136
aureliocarella 21:51e162c130a9 137 //******************************************************************************
aureliocarella 21:51e162c130a9 138 void S25FS512::readID(uint8_t *id) {
aureliocarella 21:51e162c130a9 139 uint8_t cmd = 0x9F;
aureliocarella 21:51e162c130a9 140 reg_write_read_multiple_quad(&cmd, 1, id, 4);
aureliocarella 21:51e162c130a9 141 }
aureliocarella 21:51e162c130a9 142
aureliocarella 21:51e162c130a9 143 //******************************************************************************
aureliocarella 21:51e162c130a9 144 int8_t S25FS512::writeAnyRegister(uint32_t address, uint8_t data) {
aureliocarella 21:51e162c130a9 145 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 146 cmdArray[0] = 0x71;
aureliocarella 21:51e162c130a9 147 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 148 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 149 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 150 cmdArray[4] = data;
aureliocarella 21:51e162c130a9 151 return reg_write_read_multiple_quad(cmdArray, 5, flashBuffer, 0);
aureliocarella 21:51e162c130a9 152 }
aureliocarella 21:51e162c130a9 153
aureliocarella 21:51e162c130a9 154 int8_t S25FS512::writeAnyRegister4Wire(uint32_t address, uint8_t data) {
aureliocarella 21:51e162c130a9 155 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 156 cmdArray[0] = 0x71;
aureliocarella 21:51e162c130a9 157 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 158 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 159 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 160 cmdArray[4] = data;
aureliocarella 21:51e162c130a9 161 return reg_write_read_multiple_4Wire(cmdArray, 5, flashBuffer, 5);
aureliocarella 21:51e162c130a9 162 }
aureliocarella 21:51e162c130a9 163
aureliocarella 21:51e162c130a9 164 //******************************************************************************
aureliocarella 21:51e162c130a9 165 int8_t S25FS512::writeRegisters(void) {
aureliocarella 21:51e162c130a9 166 uint8_t cmdArray[3];
aureliocarella 21:51e162c130a9 167 wait_1mS();
aureliocarella 21:51e162c130a9 168 cmdArray[0] = 0x01;
aureliocarella 21:51e162c130a9 169 cmdArray[1] = 0x00;
aureliocarella 21:51e162c130a9 170 cmdArray[2] = 0x02; // set Quad to 1
aureliocarella 21:51e162c130a9 171 reg_write_read_multiple_quad(cmdArray, 3, flashBuffer, 0);
aureliocarella 21:51e162c130a9 172 return 0;
aureliocarella 21:51e162c130a9 173 }
aureliocarella 21:51e162c130a9 174
aureliocarella 21:51e162c130a9 175 //******************************************************************************
aureliocarella 21:51e162c130a9 176 int8_t S25FS512::readAnyRegister(uint32_t address, uint8_t *data,
aureliocarella 21:51e162c130a9 177 uint32_t length) {
aureliocarella 21:51e162c130a9 178 uint8_t cmdArray[4];
aureliocarella 21:51e162c130a9 179 cmdArray[0] = 0x65;
aureliocarella 21:51e162c130a9 180 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 181 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 182 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 183 return reg_write_read_multiple_quad(cmdArray, 4, data, length);
aureliocarella 21:51e162c130a9 184 }
aureliocarella 21:51e162c130a9 185
aureliocarella 21:51e162c130a9 186 //******************************************************************************
aureliocarella 21:51e162c130a9 187 int8_t S25FS512::bulkErase(void) {
aureliocarella 21:51e162c130a9 188 uint8_t cmdArray[1];
aureliocarella 21:51e162c130a9 189 cmdArray[0] = 0x60;
aureliocarella 21:51e162c130a9 190 return reg_write_read_multiple_quad(cmdArray, 1, flashBuffer, 0);
aureliocarella 21:51e162c130a9 191 }
aureliocarella 21:51e162c130a9 192
aureliocarella 21:51e162c130a9 193 //******************************************************************************
aureliocarella 21:51e162c130a9 194 int8_t S25FS512::pageProgram(uint32_t address, uint8_t *buffer) {
aureliocarella 21:51e162c130a9 195 uint32_t i;
aureliocarella 21:51e162c130a9 196 uint8_t cmdArray[5 + 256];
aureliocarella 21:51e162c130a9 197 uint8_t *ptr;
aureliocarella 21:51e162c130a9 198
aureliocarella 21:51e162c130a9 199 // for (i = 0; i < 256; i++) {
aureliocarella 21:51e162c130a9 200 // dataArray[i] = i;
aureliocarella 21:51e162c130a9 201 //}
aureliocarella 21:51e162c130a9 202 cmdArray[0] = 0x02; // 0x71;
aureliocarella 21:51e162c130a9 203 // cmdArray[1] = (address >> 24) & 0xFF;
aureliocarella 21:51e162c130a9 204 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 205 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 206 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 207 for (i = 0; i < 256; i++) {
aureliocarella 21:51e162c130a9 208 cmdArray[4 + i] = buffer[i];
aureliocarella 21:51e162c130a9 209 }
aureliocarella 21:51e162c130a9 210 // reg_write_read_multiple_quad(cmdArray,256 + 4,flashBuffer,256 + 4);
aureliocarella 21:51e162c130a9 211
aureliocarella 21:51e162c130a9 212 ptr = cmdArray;
aureliocarella 21:51e162c130a9 213 reg_write_read_multiple_quad_last(ptr, 4 + 64, flashBuffer, 0, 0);
aureliocarella 21:51e162c130a9 214 wait_1mS();
aureliocarella 21:51e162c130a9 215 ptr += (4 + 64);
aureliocarella 21:51e162c130a9 216 reg_write_read_multiple_quad_last(ptr, 64, flashBuffer, 0, 0);
aureliocarella 21:51e162c130a9 217 wait_1mS();
aureliocarella 21:51e162c130a9 218 ptr += 64;
aureliocarella 21:51e162c130a9 219 reg_write_read_multiple_quad_last(ptr, 64, flashBuffer, 0, 0);
aureliocarella 21:51e162c130a9 220 wait_1mS();
aureliocarella 21:51e162c130a9 221 ptr += 64;
aureliocarella 21:51e162c130a9 222 reg_write_read_multiple_quad_last(ptr, 64, flashBuffer, 0, 1);
aureliocarella 21:51e162c130a9 223 wait_1mS();
aureliocarella 21:51e162c130a9 224 return 0;
aureliocarella 21:51e162c130a9 225 }
aureliocarella 21:51e162c130a9 226
aureliocarella 21:51e162c130a9 227 //******************************************************************************
aureliocarella 21:51e162c130a9 228 int8_t S25FS512::quadIoRead_Pages(uint32_t address, uint8_t *buffer,
aureliocarella 21:51e162c130a9 229 uint32_t numberOfPages) {
aureliocarella 21:51e162c130a9 230 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 231 uint8_t *ptr;
aureliocarella 21:51e162c130a9 232 uint8_t last;
aureliocarella 21:51e162c130a9 233 uint32_t i;
aureliocarella 21:51e162c130a9 234
aureliocarella 21:51e162c130a9 235 cmdArray[0] = 0xEB;
aureliocarella 21:51e162c130a9 236 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 237 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 238 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 239 ptr = buffer;
aureliocarella 21:51e162c130a9 240 last = 0;
aureliocarella 21:51e162c130a9 241 // only send the command
aureliocarella 21:51e162c130a9 242 reg_write_read_multiple_quad_last(cmdArray, 4, ptr, 0, 0);
aureliocarella 21:51e162c130a9 243 wait_1mS();
aureliocarella 21:51e162c130a9 244 reg_write_read_multiple_quad_last(cmdArray, 0, ptr, 5, 0);
aureliocarella 21:51e162c130a9 245 wait_1mS();
aureliocarella 21:51e162c130a9 246 for (i = 0; i < numberOfPages; i++) {
aureliocarella 21:51e162c130a9 247 reg_write_read_multiple_quad_last(cmdArray, 0, ptr, 64, 0);
aureliocarella 21:51e162c130a9 248 wait_1mS();
aureliocarella 21:51e162c130a9 249 ptr += 64;
aureliocarella 21:51e162c130a9 250 reg_write_read_multiple_quad_last(cmdArray, 0, ptr, 64, 0);
aureliocarella 21:51e162c130a9 251 wait_1mS();
aureliocarella 21:51e162c130a9 252 ptr += 64;
aureliocarella 21:51e162c130a9 253 reg_write_read_multiple_quad_last(cmdArray, 0, ptr, 64, 0);
aureliocarella 21:51e162c130a9 254 wait_1mS();
aureliocarella 21:51e162c130a9 255 ptr += 64;
aureliocarella 21:51e162c130a9 256 // check if this is the last page
aureliocarella 21:51e162c130a9 257 if ((i + 1) == numberOfPages) {
aureliocarella 21:51e162c130a9 258 last = 1;
aureliocarella 21:51e162c130a9 259 }
aureliocarella 21:51e162c130a9 260 reg_write_read_multiple_quad_last(cmdArray, 0, ptr, 64, last);
aureliocarella 21:51e162c130a9 261 wait_1mS();
aureliocarella 21:51e162c130a9 262 ptr += 64;
aureliocarella 21:51e162c130a9 263 }
aureliocarella 21:51e162c130a9 264 return 0;
aureliocarella 21:51e162c130a9 265 }
aureliocarella 21:51e162c130a9 266
aureliocarella 21:51e162c130a9 267 //******************************************************************************
aureliocarella 21:51e162c130a9 268 int8_t S25FS512::checkBusy(void) {
aureliocarella 21:51e162c130a9 269 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 270 cmdArray[0] = 0x05;
aureliocarella 21:51e162c130a9 271 reg_write_read_multiple_quad(cmdArray, 1, flashBuffer, 2);
aureliocarella 21:51e162c130a9 272 return flashBuffer[1] & 0x1;
aureliocarella 21:51e162c130a9 273 }
aureliocarella 21:51e162c130a9 274
aureliocarella 21:51e162c130a9 275 //******************************************************************************
aureliocarella 21:51e162c130a9 276 void S25FS512::waitTillNotBusy(void) {
aureliocarella 21:51e162c130a9 277 while (checkBusy() == 1) {
aureliocarella 21:51e162c130a9 278 }
aureliocarella 21:51e162c130a9 279 }
aureliocarella 21:51e162c130a9 280
aureliocarella 21:51e162c130a9 281 //******************************************************************************
aureliocarella 21:51e162c130a9 282 int8_t S25FS512::sectorErase(uint32_t address) {
aureliocarella 21:51e162c130a9 283 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 284 cmdArray[0] = 0xD8;
aureliocarella 21:51e162c130a9 285 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 286 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 287 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 288 return reg_write_read_multiple_quad(cmdArray, 4, flashBuffer, 0);
aureliocarella 21:51e162c130a9 289 }
aureliocarella 21:51e162c130a9 290
aureliocarella 21:51e162c130a9 291 //******************************************************************************
aureliocarella 21:51e162c130a9 292 int8_t S25FS512::parameterSectorErase(uint32_t address) {
aureliocarella 21:51e162c130a9 293 uint8_t cmdArray[5];
aureliocarella 21:51e162c130a9 294 cmdArray[0] = 0x20;
aureliocarella 21:51e162c130a9 295 cmdArray[1] = (address >> 16) & 0xFF;
aureliocarella 21:51e162c130a9 296 cmdArray[2] = (address >> 8) & 0xFF;
aureliocarella 21:51e162c130a9 297 cmdArray[3] = (address >> 0) & 0xFF;
aureliocarella 21:51e162c130a9 298 reg_write_read_multiple_quad(cmdArray, 4, flashBuffer, 0);
aureliocarella 21:51e162c130a9 299 return 0;
aureliocarella 21:51e162c130a9 300 }
aureliocarella 21:51e162c130a9 301
aureliocarella 21:51e162c130a9 302 #define ONE_MS (32768 / 500)
aureliocarella 21:51e162c130a9 303 #define ONEHUNDRED_US (32768 / 1000)
aureliocarella 21:51e162c130a9 304 #define TEM_MS (32768 / 50)
aureliocarella 21:51e162c130a9 305
aureliocarella 21:51e162c130a9 306 //******************************************************************************
aureliocarella 21:51e162c130a9 307 void S25FS512::wait_1mS(void) {
aureliocarella 21:51e162c130a9 308 wait_ms(1);
aureliocarella 21:51e162c130a9 309 }
aureliocarella 21:51e162c130a9 310
aureliocarella 21:51e162c130a9 311 //******************************************************************************
aureliocarella 21:51e162c130a9 312 void S25FS512::wait_100uS(void) {
aureliocarella 21:51e162c130a9 313 wait_us(100);
aureliocarella 21:51e162c130a9 314 }
aureliocarella 21:51e162c130a9 315
aureliocarella 21:51e162c130a9 316 //******************************************************************************
aureliocarella 21:51e162c130a9 317 void S25FS512::wait_10mS(void) {
aureliocarella 21:51e162c130a9 318 wait_ms(10);
aureliocarella 21:51e162c130a9 319 }
aureliocarella 21:51e162c130a9 320
aureliocarella 21:51e162c130a9 321 //******************************************************************************
aureliocarella 21:51e162c130a9 322 int8_t S25FS512::readIdentification(uint8_t *dataArray, uint8_t length) {
aureliocarella 21:51e162c130a9 323 // 4QIOR = 0x9F
aureliocarella 21:51e162c130a9 324 uint8_t cmdArray[1];
aureliocarella 21:51e162c130a9 325 cmdArray[0] = 0x9F; // read ID command
aureliocarella 21:51e162c130a9 326 return reg_write_read_multiple_quad(cmdArray, 1, dataArray, length);
aureliocarella 21:51e162c130a9 327 }
aureliocarella 21:51e162c130a9 328
aureliocarella 21:51e162c130a9 329 //******************************************************************************
aureliocarella 21:51e162c130a9 330 uint8_t S25FS512::reset(void) {
aureliocarella 21:51e162c130a9 331 uint8_t cmdArray[8];
aureliocarella 21:51e162c130a9 332 wait_1mS();
aureliocarella 21:51e162c130a9 333 cmdArray[0] = 0x66;
aureliocarella 21:51e162c130a9 334 reg_write_read_multiple_quad(cmdArray, 1, flashBuffer, 0);
aureliocarella 21:51e162c130a9 335 wait_1mS();
aureliocarella 21:51e162c130a9 336 cmdArray[0] = 0x99;
aureliocarella 21:51e162c130a9 337 reg_write_read_multiple_quad(cmdArray, 1, flashBuffer, 0);
aureliocarella 21:51e162c130a9 338 return 0;
aureliocarella 21:51e162c130a9 339 }
aureliocarella 21:51e162c130a9 340
aureliocarella 21:51e162c130a9 341 //******************************************************************************
aureliocarella 21:51e162c130a9 342 uint8_t S25FS512::enableHWReset(void) {
aureliocarella 21:51e162c130a9 343 uint8_t data[8];
aureliocarella 21:51e162c130a9 344 wait_1mS();
aureliocarella 21:51e162c130a9 345 // CR2V Configuration Register-2 Volatile
aureliocarella 21:51e162c130a9 346 // bit 5
aureliocarella 21:51e162c130a9 347 readAnyRegister(0x00800003, data, 8);
aureliocarella 21:51e162c130a9 348 writeAnyRegister(0x00800003, 0x64);
aureliocarella 21:51e162c130a9 349 return 0;
aureliocarella 21:51e162c130a9 350 }
aureliocarella 21:51e162c130a9 351
aureliocarella 21:51e162c130a9 352 //******************************************************************************
aureliocarella 21:51e162c130a9 353 uint8_t S25FS512::detect(void) {
aureliocarella 21:51e162c130a9 354 uint8_t array[8];
aureliocarella 21:51e162c130a9 355 uint8_t array2[8];
aureliocarella 21:51e162c130a9 356
aureliocarella 21:51e162c130a9 357 // Send WREN
aureliocarella 21:51e162c130a9 358 wren();
aureliocarella 21:51e162c130a9 359 // Send WREN
aureliocarella 21:51e162c130a9 360 wren();
aureliocarella 21:51e162c130a9 361 // delay
aureliocarella 21:51e162c130a9 362 wait_1mS();
aureliocarella 21:51e162c130a9 363 // Send WREN
aureliocarella 21:51e162c130a9 364 wren();
aureliocarella 21:51e162c130a9 365 // delay
aureliocarella 21:51e162c130a9 366 wait_1mS();
aureliocarella 21:51e162c130a9 367
aureliocarella 21:51e162c130a9 368 // Send write any register cmd
aureliocarella 21:51e162c130a9 369 writeAnyRegister(0x0003, 0x48);
aureliocarella 21:51e162c130a9 370 // delay
aureliocarella 21:51e162c130a9 371 wait_1mS();
aureliocarella 21:51e162c130a9 372 array[0] = 0x9F; // read ID command
aureliocarella 21:51e162c130a9 373 reg_write_read_multiple_quad(array, 1, array2, 7);
aureliocarella 21:51e162c130a9 374 return 0;
aureliocarella 21:51e162c130a9 375 }
aureliocarella 21:51e162c130a9 376
aureliocarella 21:51e162c130a9 377 //******************************************************************************
aureliocarella 21:51e162c130a9 378 int S25FS512::setQuadMode(void) {
aureliocarella 21:51e162c130a9 379 wait_1mS();
aureliocarella 21:51e162c130a9 380 wren4Wire();
aureliocarella 21:51e162c130a9 381 wait_1mS();
aureliocarella 21:51e162c130a9 382 writeAnyRegister4Wire(0x800002, 0x02); // set Quad = 1
aureliocarella 21:51e162c130a9 383 wait_1mS();
aureliocarella 21:51e162c130a9 384 wren4Wire();
aureliocarella 21:51e162c130a9 385 wait_1mS();
aureliocarella 21:51e162c130a9 386 writeAnyRegister4Wire(0x800003, 0x48); // set 8 latency, set QPI 4-4-4
aureliocarella 21:51e162c130a9 387 }
aureliocarella 21:51e162c130a9 388
aureliocarella 21:51e162c130a9 389 //******************************************************************************
aureliocarella 21:51e162c130a9 390 uint32_t S25FS512::isPageEmpty(uint8_t *ptr) {
aureliocarella 21:51e162c130a9 391 int i;
aureliocarella 21:51e162c130a9 392 for (i = 0; i < 256; i++) {
aureliocarella 21:51e162c130a9 393 if (ptr[i] != 0xFF)
aureliocarella 21:51e162c130a9 394 return 0;
aureliocarella 21:51e162c130a9 395 }
aureliocarella 21:51e162c130a9 396 return 1;
aureliocarella 21:51e162c130a9 397 }
aureliocarella 21:51e162c130a9 398
aureliocarella 21:51e162c130a9 399 //******************************************************************************
aureliocarella 21:51e162c130a9 400 int8_t S25FS512::parameterSectorErase_Helper(uint32_t address) {
aureliocarella 21:51e162c130a9 401 waitTillNotBusy();
aureliocarella 21:51e162c130a9 402 wait_100uS();
aureliocarella 21:51e162c130a9 403 wren();
aureliocarella 21:51e162c130a9 404 wait_100uS();
aureliocarella 21:51e162c130a9 405 parameterSectorErase(address);
aureliocarella 21:51e162c130a9 406 wait_100uS();
aureliocarella 21:51e162c130a9 407 waitTillNotBusy();
aureliocarella 21:51e162c130a9 408 wait_100uS();
aureliocarella 21:51e162c130a9 409 return 0;
aureliocarella 21:51e162c130a9 410 }
aureliocarella 21:51e162c130a9 411
aureliocarella 21:51e162c130a9 412 //******************************************************************************
aureliocarella 21:51e162c130a9 413 int8_t S25FS512::sectorErase_Helper(uint32_t address) {
aureliocarella 21:51e162c130a9 414 waitTillNotBusy();
aureliocarella 21:51e162c130a9 415 wait_100uS();
aureliocarella 21:51e162c130a9 416 wren();
aureliocarella 21:51e162c130a9 417 wait_100uS();
aureliocarella 21:51e162c130a9 418 if (address < 0x8000) {
aureliocarella 21:51e162c130a9 419 parameterSectorErase(address);
aureliocarella 21:51e162c130a9 420 } else {
aureliocarella 21:51e162c130a9 421 sectorErase(address);
aureliocarella 21:51e162c130a9 422 }
aureliocarella 21:51e162c130a9 423 wait_100uS();
aureliocarella 21:51e162c130a9 424 waitTillNotBusy();
aureliocarella 21:51e162c130a9 425 wait_100uS();
aureliocarella 21:51e162c130a9 426 return 0;
aureliocarella 21:51e162c130a9 427 }
aureliocarella 21:51e162c130a9 428
aureliocarella 21:51e162c130a9 429 //******************************************************************************
aureliocarella 21:51e162c130a9 430 int8_t S25FS512::bulkErase_Helper(void) {
aureliocarella 21:51e162c130a9 431 waitTillNotBusy();
aureliocarella 21:51e162c130a9 432 wait_100uS();
aureliocarella 21:51e162c130a9 433 wren();
aureliocarella 21:51e162c130a9 434 wait_100uS();
aureliocarella 21:51e162c130a9 435 bulkErase();
aureliocarella 21:51e162c130a9 436 wait_100uS();
aureliocarella 21:51e162c130a9 437 waitTillNotBusy();
aureliocarella 21:51e162c130a9 438 wait_100uS();
aureliocarella 21:51e162c130a9 439 return 0;
aureliocarella 21:51e162c130a9 440 }
aureliocarella 21:51e162c130a9 441
aureliocarella 21:51e162c130a9 442 //******************************************************************************
aureliocarella 21:51e162c130a9 443 // write a page worth of data (256 bytes) from buffer, offset defined where in
aureliocarella 21:51e162c130a9 444 // the buffer to begin write
aureliocarella 21:51e162c130a9 445 int8_t S25FS512::writePage_Helper(uint32_t pageNumber, uint8_t *buffer,
aureliocarella 21:51e162c130a9 446 uint32_t offset) {
aureliocarella 21:51e162c130a9 447 uint8_t *ptr;
aureliocarella 21:51e162c130a9 448 waitTillNotBusy();
aureliocarella 21:51e162c130a9 449 wait_1mS();
aureliocarella 21:51e162c130a9 450 wren();
aureliocarella 21:51e162c130a9 451 ptr = &buffer[offset];
aureliocarella 21:51e162c130a9 452 wait_1mS();
aureliocarella 21:51e162c130a9 453 pageProgram(pageNumber << 8, ptr);
aureliocarella 21:51e162c130a9 454 wait_1mS();
aureliocarella 21:51e162c130a9 455 return 0;
aureliocarella 21:51e162c130a9 456 }
aureliocarella 21:51e162c130a9 457
aureliocarella 21:51e162c130a9 458 //******************************************************************************
aureliocarella 21:51e162c130a9 459 // read pages from flash into buffer, offset defined where in the buffer use
aureliocarella 21:51e162c130a9 460 int8_t S25FS512::readPages_Helper(uint32_t startPageNumber,
aureliocarella 21:51e162c130a9 461 uint32_t endPageNumber, uint8_t *buffer,
aureliocarella 21:51e162c130a9 462 uint32_t offset) {
aureliocarella 21:51e162c130a9 463 uint8_t *ptr;
aureliocarella 21:51e162c130a9 464 uint32_t page;
aureliocarella 21:51e162c130a9 465 ptr = &buffer[offset];
aureliocarella 21:51e162c130a9 466 for (page = startPageNumber; page <= endPageNumber; page++) {
aureliocarella 21:51e162c130a9 467 wait_100uS();
aureliocarella 21:51e162c130a9 468 quadIoRead_Pages((uint32_t)(page << 8), (uint8_t *)ptr, 1);
aureliocarella 21:51e162c130a9 469 ptr += 0x100;
aureliocarella 21:51e162c130a9 470 }
aureliocarella 21:51e162c130a9 471 return 0;
aureliocarella 21:51e162c130a9 472 }
aureliocarella 21:51e162c130a9 473