Alejandro Ungria Hirte / GA-Test

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Dependencies:   mbed-dev

decadriver/deca_params_init.c@0:3333b6066adf, 2017-12-06 (annotated)

Committer:
aungriah
Date:
Wed Dec 06 21:42:54 2017 +0000
Revision:
0:3333b6066adf
asfaf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
aungriah 0:3333b6066adf 1 /*! ----------------------------------------------------------------------------
aungriah 0:3333b6066adf 2 * @file deca_params_init.c
aungriah 0:3333b6066adf 3 * @brief DW1000 configuration parameters
aungriah 0:3333b6066adf 4 *
aungriah 0:3333b6066adf 5 * @attention
aungriah 0:3333b6066adf 6 *
aungriah 0:3333b6066adf 7 * Copyright 2013 (c) Decawave Ltd, Dublin, Ireland.
aungriah 0:3333b6066adf 8 *
aungriah 0:3333b6066adf 9 * All rights reserved.
aungriah 0:3333b6066adf 10 *
aungriah 0:3333b6066adf 11 *
aungriah 0:3333b6066adf 12 * -------------------------------------------------------------------------------------------------------------------
aungriah 0:3333b6066adf 13 **/
aungriah 0:3333b6066adf 14 #include <stdio.h>
aungriah 0:3333b6066adf 15 #include <stdlib.h>
aungriah 0:3333b6066adf 16
aungriah 0:3333b6066adf 17 #include "deca_regs.h"
aungriah 0:3333b6066adf 18 #include "deca_device_api.h"
aungriah 0:3333b6066adf 19 #include "deca_param_types.h"
aungriah 0:3333b6066adf 20
aungriah 0:3333b6066adf 21
aungriah 0:3333b6066adf 22 //-----------------------------------------
aungriah 0:3333b6066adf 23 // map the channel number to the index in the configuration arrays below
aungriah 0:3333b6066adf 24 // 0th element is chan 1, 1st is chan 2, 2nd is chan 3, 3rd is chan 4, 4th is chan 5, 5th is chan 7
aungriah 0:3333b6066adf 25 const uint8 chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
aungriah 0:3333b6066adf 26
aungriah 0:3333b6066adf 27 //-----------------------------------------
aungriah 0:3333b6066adf 28 const uint32 tx_config[NUM_CH] =
aungriah 0:3333b6066adf 29 {
aungriah 0:3333b6066adf 30 RF_TXCTRL_CH1,
aungriah 0:3333b6066adf 31 RF_TXCTRL_CH2,
aungriah 0:3333b6066adf 32 RF_TXCTRL_CH3,
aungriah 0:3333b6066adf 33 RF_TXCTRL_CH4,
aungriah 0:3333b6066adf 34 RF_TXCTRL_CH5,
aungriah 0:3333b6066adf 35 RF_TXCTRL_CH7,
aungriah 0:3333b6066adf 36 };
aungriah 0:3333b6066adf 37
aungriah 0:3333b6066adf 38 //Frequency Synthesiser - PLL configuration
aungriah 0:3333b6066adf 39 const uint32 fs_pll_cfg[NUM_CH] =
aungriah 0:3333b6066adf 40 {
aungriah 0:3333b6066adf 41 FS_PLLCFG_CH1,
aungriah 0:3333b6066adf 42 FS_PLLCFG_CH2,
aungriah 0:3333b6066adf 43 FS_PLLCFG_CH3,
aungriah 0:3333b6066adf 44 FS_PLLCFG_CH4,
aungriah 0:3333b6066adf 45 FS_PLLCFG_CH5,
aungriah 0:3333b6066adf 46 FS_PLLCFG_CH7
aungriah 0:3333b6066adf 47 };
aungriah 0:3333b6066adf 48
aungriah 0:3333b6066adf 49 //Frequency Synthesiser - PLL tuning
aungriah 0:3333b6066adf 50 const uint8 fs_pll_tune[NUM_CH] =
aungriah 0:3333b6066adf 51 {
aungriah 0:3333b6066adf 52 FS_PLLTUNE_CH1,
aungriah 0:3333b6066adf 53 FS_PLLTUNE_CH2,
aungriah 0:3333b6066adf 54 FS_PLLTUNE_CH3,
aungriah 0:3333b6066adf 55 FS_PLLTUNE_CH4,
aungriah 0:3333b6066adf 56 FS_PLLTUNE_CH5,
aungriah 0:3333b6066adf 57 FS_PLLTUNE_CH7
aungriah 0:3333b6066adf 58 };
aungriah 0:3333b6066adf 59
aungriah 0:3333b6066adf 60 //bandwidth configuration
aungriah 0:3333b6066adf 61 const uint8 rx_config[NUM_BW] =
aungriah 0:3333b6066adf 62 {
aungriah 0:3333b6066adf 63 RF_RXCTRLH_NBW,
aungriah 0:3333b6066adf 64 RF_RXCTRLH_WBW
aungriah 0:3333b6066adf 65 };
aungriah 0:3333b6066adf 66
aungriah 0:3333b6066adf 67
aungriah 0:3333b6066adf 68 const agc_cfg_struct agc_config =
aungriah 0:3333b6066adf 69 {
aungriah 0:3333b6066adf 70 AGC_TUNE2_VAL,
aungriah 0:3333b6066adf 71 { AGC_TUNE1_16M , AGC_TUNE1_64M } //adc target
aungriah 0:3333b6066adf 72 };
aungriah 0:3333b6066adf 73
aungriah 0:3333b6066adf 74 //DW non-standard SFD length for 110k, 850k and 6.81M
aungriah 0:3333b6066adf 75 const uint8 dwnsSFDlen[NUM_BR] =
aungriah 0:3333b6066adf 76 {
aungriah 0:3333b6066adf 77 DW_NS_SFD_LEN_110K,
aungriah 0:3333b6066adf 78 DW_NS_SFD_LEN_850K,
aungriah 0:3333b6066adf 79 DW_NS_SFD_LEN_6M8
aungriah 0:3333b6066adf 80 };
aungriah 0:3333b6066adf 81
aungriah 0:3333b6066adf 82 // SFD Threshold
aungriah 0:3333b6066adf 83 const uint16 sftsh[NUM_BR][NUM_SFD] =
aungriah 0:3333b6066adf 84 {
aungriah 0:3333b6066adf 85 {
aungriah 0:3333b6066adf 86 DRX_TUNE0b_110K_STD,
aungriah 0:3333b6066adf 87 DRX_TUNE0b_110K_NSTD
aungriah 0:3333b6066adf 88 },
aungriah 0:3333b6066adf 89 {
aungriah 0:3333b6066adf 90 DRX_TUNE0b_850K_STD,
aungriah 0:3333b6066adf 91 DRX_TUNE0b_850K_NSTD
aungriah 0:3333b6066adf 92 },
aungriah 0:3333b6066adf 93 {
aungriah 0:3333b6066adf 94 DRX_TUNE0b_6M8_STD,
aungriah 0:3333b6066adf 95 DRX_TUNE0b_6M8_NSTD
aungriah 0:3333b6066adf 96 }
aungriah 0:3333b6066adf 97 };
aungriah 0:3333b6066adf 98
aungriah 0:3333b6066adf 99 const uint16 dtune1[NUM_PRF] =
aungriah 0:3333b6066adf 100 {
aungriah 0:3333b6066adf 101 DRX_TUNE1a_PRF16,
aungriah 0:3333b6066adf 102 DRX_TUNE1a_PRF64
aungriah 0:3333b6066adf 103 };
aungriah 0:3333b6066adf 104
aungriah 0:3333b6066adf 105 const uint32 digital_bb_config[NUM_PRF][NUM_PACS] =
aungriah 0:3333b6066adf 106 {
aungriah 0:3333b6066adf 107 {
aungriah 0:3333b6066adf 108 DRX_TUNE2_PRF16_PAC8,
aungriah 0:3333b6066adf 109 DRX_TUNE2_PRF16_PAC16,
aungriah 0:3333b6066adf 110 DRX_TUNE2_PRF16_PAC32,
aungriah 0:3333b6066adf 111 DRX_TUNE2_PRF16_PAC64
aungriah 0:3333b6066adf 112 },
aungriah 0:3333b6066adf 113 {
aungriah 0:3333b6066adf 114 DRX_TUNE2_PRF64_PAC8,
aungriah 0:3333b6066adf 115 DRX_TUNE2_PRF64_PAC16,
aungriah 0:3333b6066adf 116 DRX_TUNE2_PRF64_PAC32,
aungriah 0:3333b6066adf 117 DRX_TUNE2_PRF64_PAC64
aungriah 0:3333b6066adf 118 }
aungriah 0:3333b6066adf 119 };
aungriah 0:3333b6066adf 120
aungriah 0:3333b6066adf 121 const uint16 lde_replicaCoeff[PCODES] =
aungriah 0:3333b6066adf 122 {
aungriah 0:3333b6066adf 123 0, // No preamble code 0
aungriah 0:3333b6066adf 124 LDE_REPC_PCODE_1,
aungriah 0:3333b6066adf 125 LDE_REPC_PCODE_2,
aungriah 0:3333b6066adf 126 LDE_REPC_PCODE_3,
aungriah 0:3333b6066adf 127 LDE_REPC_PCODE_4,
aungriah 0:3333b6066adf 128 LDE_REPC_PCODE_5,
aungriah 0:3333b6066adf 129 LDE_REPC_PCODE_6,
aungriah 0:3333b6066adf 130 LDE_REPC_PCODE_7,
aungriah 0:3333b6066adf 131 LDE_REPC_PCODE_8,
aungriah 0:3333b6066adf 132 LDE_REPC_PCODE_9,
aungriah 0:3333b6066adf 133 LDE_REPC_PCODE_10,
aungriah 0:3333b6066adf 134 LDE_REPC_PCODE_11,
aungriah 0:3333b6066adf 135 LDE_REPC_PCODE_12,
aungriah 0:3333b6066adf 136 LDE_REPC_PCODE_13,
aungriah 0:3333b6066adf 137 LDE_REPC_PCODE_14,
aungriah 0:3333b6066adf 138 LDE_REPC_PCODE_15,
aungriah 0:3333b6066adf 139 LDE_REPC_PCODE_16,
aungriah 0:3333b6066adf 140 LDE_REPC_PCODE_17,
aungriah 0:3333b6066adf 141 LDE_REPC_PCODE_18,
aungriah 0:3333b6066adf 142 LDE_REPC_PCODE_19,
aungriah 0:3333b6066adf 143 LDE_REPC_PCODE_20,
aungriah 0:3333b6066adf 144 LDE_REPC_PCODE_21,
aungriah 0:3333b6066adf 145 LDE_REPC_PCODE_22,
aungriah 0:3333b6066adf 146 LDE_REPC_PCODE_23,
aungriah 0:3333b6066adf 147 LDE_REPC_PCODE_24
aungriah 0:3333b6066adf 148 };
aungriah 0:3333b6066adf 149