Mirror with some correction
Dependencies: mbed FastIO FastPWM USBDevice
SimpleDMA/SimpleDMA_KL25.h@45:c42166b2878c, 2016-02-15 (annotated)
- Committer:
- mjr
- Date:
- Mon Feb 15 20:30:32 2016 +0000
- Revision:
- 45:c42166b2878c
- Child:
- 47:df7a88cd249c
More work in progress on CCD speedups;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mjr | 45:c42166b2878c | 1 | #if defined TARGET_KL25Z |
mjr | 45:c42166b2878c | 2 | |
mjr | 45:c42166b2878c | 3 | #define DMA_CHANNELS 4 |
mjr | 45:c42166b2878c | 4 | #define DMA_IRQS 4 |
mjr | 45:c42166b2878c | 5 | |
mjr | 45:c42166b2878c | 6 | enum SimpleDMA_Trigger { |
mjr | 45:c42166b2878c | 7 | Trigger_ALWAYS = 60, |
mjr | 45:c42166b2878c | 8 | Trigger_UART0_RX = 2, |
mjr | 45:c42166b2878c | 9 | Trigger_UART0_TX, |
mjr | 45:c42166b2878c | 10 | Trigger_UART1_RX, |
mjr | 45:c42166b2878c | 11 | Trigger_UART1_TX, |
mjr | 45:c42166b2878c | 12 | Trigger_UART2_RX, |
mjr | 45:c42166b2878c | 13 | Trigger_UART2_TX, |
mjr | 45:c42166b2878c | 14 | Trigger_SPI0_RX = 16, |
mjr | 45:c42166b2878c | 15 | Trigger_SPI0_TX, |
mjr | 45:c42166b2878c | 16 | Trigger_SPI1_RX, |
mjr | 45:c42166b2878c | 17 | Trigger_SPI1_TX, |
mjr | 45:c42166b2878c | 18 | Trigger_I2C0 = 22, |
mjr | 45:c42166b2878c | 19 | Trigger_I2C1, |
mjr | 45:c42166b2878c | 20 | Trigger_TPM0_C0, |
mjr | 45:c42166b2878c | 21 | Trigger_TPM0_C1, |
mjr | 45:c42166b2878c | 22 | Trigger_TPM0_C2, |
mjr | 45:c42166b2878c | 23 | Trigger_TPM0_C3, |
mjr | 45:c42166b2878c | 24 | Trigger_TPM0_C4, |
mjr | 45:c42166b2878c | 25 | Trigger_TPM0_C5, |
mjr | 45:c42166b2878c | 26 | Trigger_TPM1_C0 = 32, |
mjr | 45:c42166b2878c | 27 | Trigger_TPM1_C1, |
mjr | 45:c42166b2878c | 28 | Trigger_TPM2_C0, |
mjr | 45:c42166b2878c | 29 | Trigger_TPM2_C1, |
mjr | 45:c42166b2878c | 30 | Trigger_ADC0 = 40, |
mjr | 45:c42166b2878c | 31 | Trigger_CMP0 = 42, |
mjr | 45:c42166b2878c | 32 | Trigger_DAC0 = 45, |
mjr | 45:c42166b2878c | 33 | Trigger_PORTA = 49, |
mjr | 45:c42166b2878c | 34 | Trigger_PORTD = 52, |
mjr | 45:c42166b2878c | 35 | Trigger_TPM0 = 54, |
mjr | 45:c42166b2878c | 36 | Trigger_TPM1, |
mjr | 45:c42166b2878c | 37 | Trigger_TPM2, |
mjr | 45:c42166b2878c | 38 | Trigger_TSI, |
mjr | 45:c42166b2878c | 39 | Trigger_ALWAYS0 = 60, |
mjr | 45:c42166b2878c | 40 | Trigger_ALWAYS1, |
mjr | 45:c42166b2878c | 41 | Trigger_ALWAYS2, |
mjr | 45:c42166b2878c | 42 | Trigger_ALWAYS3, |
mjr | 45:c42166b2878c | 43 | }; |
mjr | 45:c42166b2878c | 44 | |
mjr | 45:c42166b2878c | 45 | #endif |