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Dependencies:   F7_Ethernet WebSocketClient mbed mcp3008

Fork of Nucleo_F746ZG_Ethernet by Dieter Graef

mbed-rtos/rtx/TARGET_CORTEX_A/TOOLCHAIN_ARM/HAL_CA9.c@0:f9b6112278fe, 2016-06-18 (annotated)

Committer:
DieterGraef
Date:
Sat Jun 18 10:49:12 2016 +0000
Revision:
0:f9b6112278fe
Ethernet for the NUCLEO STM32F746 Board Testprogram uses DHCP and NTP to set the clock

Who changed what in which revision?

UserRevisionLine numberNew contents of line
DieterGraef 0:f9b6112278fe 1 /*----------------------------------------------------------------------------
DieterGraef 0:f9b6112278fe 2 * RL-ARM - RTX
DieterGraef 0:f9b6112278fe 3 *----------------------------------------------------------------------------
DieterGraef 0:f9b6112278fe 4 * Name: HAL_CA9.c
DieterGraef 0:f9b6112278fe 5 * Purpose: Hardware Abstraction Layer for Cortex-A9
DieterGraef 0:f9b6112278fe 6 * Rev.: 8 April 2015
DieterGraef 0:f9b6112278fe 7 *----------------------------------------------------------------------------
DieterGraef 0:f9b6112278fe 8 *
DieterGraef 0:f9b6112278fe 9 * Copyright (c) 2012 - 2015 ARM Limited
DieterGraef 0:f9b6112278fe 10 * All rights reserved.
DieterGraef 0:f9b6112278fe 11 * Redistribution and use in source and binary forms, with or without
DieterGraef 0:f9b6112278fe 12 * modification, are permitted provided that the following conditions are met:
DieterGraef 0:f9b6112278fe 13 * - Redistributions of source code must retain the above copyright
DieterGraef 0:f9b6112278fe 14 * notice, this list of conditions and the following disclaimer.
DieterGraef 0:f9b6112278fe 15 * - Redistributions in binary form must reproduce the above copyright
DieterGraef 0:f9b6112278fe 16 * notice, this list of conditions and the following disclaimer in the
DieterGraef 0:f9b6112278fe 17 * documentation and/or other materials provided with the distribution.
DieterGraef 0:f9b6112278fe 18 * - Neither the name of ARM nor the names of its contributors may be used
DieterGraef 0:f9b6112278fe 19 * to endorse or promote products derived from this software without
DieterGraef 0:f9b6112278fe 20 * specific prior written permission.
DieterGraef 0:f9b6112278fe 21 *
DieterGraef 0:f9b6112278fe 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
DieterGraef 0:f9b6112278fe 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
DieterGraef 0:f9b6112278fe 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
DieterGraef 0:f9b6112278fe 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
DieterGraef 0:f9b6112278fe 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
DieterGraef 0:f9b6112278fe 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
DieterGraef 0:f9b6112278fe 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
DieterGraef 0:f9b6112278fe 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
DieterGraef 0:f9b6112278fe 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
DieterGraef 0:f9b6112278fe 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
DieterGraef 0:f9b6112278fe 32 * POSSIBILITY OF SUCH DAMAGE.
DieterGraef 0:f9b6112278fe 33 *---------------------------------------------------------------------------*/
DieterGraef 0:f9b6112278fe 34
DieterGraef 0:f9b6112278fe 35 #include "rt_TypeDef.h"
DieterGraef 0:f9b6112278fe 36 #include "RTX_Config.h"
DieterGraef 0:f9b6112278fe 37 #include "rt_System.h"
DieterGraef 0:f9b6112278fe 38 #include "rt_Task.h"
DieterGraef 0:f9b6112278fe 39 #include "rt_List.h"
DieterGraef 0:f9b6112278fe 40 #include "rt_MemBox.h"
DieterGraef 0:f9b6112278fe 41 #include "rt_HAL_CA.h"
DieterGraef 0:f9b6112278fe 42
DieterGraef 0:f9b6112278fe 43
DieterGraef 0:f9b6112278fe 44 /*----------------------------------------------------------------------------
DieterGraef 0:f9b6112278fe 45 * Functions
DieterGraef 0:f9b6112278fe 46 *---------------------------------------------------------------------------*/
DieterGraef 0:f9b6112278fe 47
DieterGraef 0:f9b6112278fe 48 //For A-class, set USR/SYS stack
DieterGraef 0:f9b6112278fe 49 __asm void rt_set_PSP (U32 stack) {
DieterGraef 0:f9b6112278fe 50 ARM
DieterGraef 0:f9b6112278fe 51
DieterGraef 0:f9b6112278fe 52 MRS R1, CPSR
DieterGraef 0:f9b6112278fe 53 CPS #MODE_SYS ;no effect in USR mode
DieterGraef 0:f9b6112278fe 54 ISB
DieterGraef 0:f9b6112278fe 55 MOV SP, R0
DieterGraef 0:f9b6112278fe 56 MSR CPSR_c, R1 ;no effect in USR mode
DieterGraef 0:f9b6112278fe 57 ISB
DieterGraef 0:f9b6112278fe 58 BX LR
DieterGraef 0:f9b6112278fe 59
DieterGraef 0:f9b6112278fe 60 }
DieterGraef 0:f9b6112278fe 61
DieterGraef 0:f9b6112278fe 62 //For A-class, get USR/SYS stack
DieterGraef 0:f9b6112278fe 63 __asm U32 rt_get_PSP (void) {
DieterGraef 0:f9b6112278fe 64 ARM
DieterGraef 0:f9b6112278fe 65
DieterGraef 0:f9b6112278fe 66 MRS R1, CPSR
DieterGraef 0:f9b6112278fe 67 CPS #MODE_SYS ;no effect in USR mode
DieterGraef 0:f9b6112278fe 68 ISB
DieterGraef 0:f9b6112278fe 69 MOV R0, SP
DieterGraef 0:f9b6112278fe 70 MSR CPSR_c, R1 ;no effect in USR mode
DieterGraef 0:f9b6112278fe 71 ISB
DieterGraef 0:f9b6112278fe 72 BX LR
DieterGraef 0:f9b6112278fe 73 }
DieterGraef 0:f9b6112278fe 74
DieterGraef 0:f9b6112278fe 75 /*--------------------------- _alloc_box ------------------------------------*/
DieterGraef 0:f9b6112278fe 76 __asm void *_alloc_box (void *box_mem) {
DieterGraef 0:f9b6112278fe 77 /* Function wrapper for Unprivileged/Privileged mode. */
DieterGraef 0:f9b6112278fe 78 ARM
DieterGraef 0:f9b6112278fe 79
DieterGraef 0:f9b6112278fe 80 LDR R12,=__cpp(rt_alloc_box)
DieterGraef 0:f9b6112278fe 81 MRS R2, CPSR
DieterGraef 0:f9b6112278fe 82 LSLS R2, #28
DieterGraef 0:f9b6112278fe 83 BXNE R12
DieterGraef 0:f9b6112278fe 84 SVC 0
DieterGraef 0:f9b6112278fe 85 BX LR
DieterGraef 0:f9b6112278fe 86 }
DieterGraef 0:f9b6112278fe 87
DieterGraef 0:f9b6112278fe 88
DieterGraef 0:f9b6112278fe 89 /*--------------------------- _free_box -------------------------------------*/
DieterGraef 0:f9b6112278fe 90 __asm int _free_box (void *box_mem, void *box) {
DieterGraef 0:f9b6112278fe 91 /* Function wrapper for Unprivileged/Privileged mode. */
DieterGraef 0:f9b6112278fe 92 ARM
DieterGraef 0:f9b6112278fe 93
DieterGraef 0:f9b6112278fe 94 LDR R12,=__cpp(rt_free_box)
DieterGraef 0:f9b6112278fe 95 MRS R2, CPSR
DieterGraef 0:f9b6112278fe 96 LSLS R2, #28
DieterGraef 0:f9b6112278fe 97 BXNE R12
DieterGraef 0:f9b6112278fe 98 SVC 0
DieterGraef 0:f9b6112278fe 99 BX LR
DieterGraef 0:f9b6112278fe 100
DieterGraef 0:f9b6112278fe 101 }
DieterGraef 0:f9b6112278fe 102
DieterGraef 0:f9b6112278fe 103 /*-------------------------- SVC_Handler -----------------------------------*/
DieterGraef 0:f9b6112278fe 104
DieterGraef 0:f9b6112278fe 105 #pragma push
DieterGraef 0:f9b6112278fe 106 #pragma arm
DieterGraef 0:f9b6112278fe 107 __asm void SVC_Handler (void) {
DieterGraef 0:f9b6112278fe 108 PRESERVE8
DieterGraef 0:f9b6112278fe 109 ARM
DieterGraef 0:f9b6112278fe 110
DieterGraef 0:f9b6112278fe 111 IMPORT rt_tsk_lock
DieterGraef 0:f9b6112278fe 112 IMPORT rt_tsk_unlock
DieterGraef 0:f9b6112278fe 113 IMPORT SVC_Count
DieterGraef 0:f9b6112278fe 114 IMPORT SVC_Table
DieterGraef 0:f9b6112278fe 115 IMPORT rt_stk_check
DieterGraef 0:f9b6112278fe 116 IMPORT FPUEnable
DieterGraef 0:f9b6112278fe 117 IMPORT scheduler_suspended ; flag set by rt_suspend, cleared by rt_resume, read by SVC_Handler
DieterGraef 0:f9b6112278fe 118
DieterGraef 0:f9b6112278fe 119 Mode_SVC EQU 0x13
DieterGraef 0:f9b6112278fe 120
DieterGraef 0:f9b6112278fe 121 SRSFD SP!, #Mode_SVC ; Push LR_SVC and SPRS_SVC onto SVC mode stack
DieterGraef 0:f9b6112278fe 122 PUSH {R4} ; Push R4 so we can use it as a temp
DieterGraef 0:f9b6112278fe 123
DieterGraef 0:f9b6112278fe 124 MRS R4,SPSR ; Get SPSR
DieterGraef 0:f9b6112278fe 125 TST R4,#CPSR_T_BIT ; Check Thumb Bit
DieterGraef 0:f9b6112278fe 126 LDRNEH R4,[LR,#-2] ; Thumb: Load Halfword
DieterGraef 0:f9b6112278fe 127 BICNE R4,R4,#0xFF00 ; Extract SVC Number
DieterGraef 0:f9b6112278fe 128 LDREQ R4,[LR,#-4] ; ARM: Load Word
DieterGraef 0:f9b6112278fe 129 BICEQ R4,R4,#0xFF000000 ; Extract SVC Number
DieterGraef 0:f9b6112278fe 130
DieterGraef 0:f9b6112278fe 131 /* Lock out systick and re-enable interrupts */
DieterGraef 0:f9b6112278fe 132 PUSH {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 133
DieterGraef 0:f9b6112278fe 134 AND R12, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 135 SUB SP, SP, R12 ; Adjust stack
DieterGraef 0:f9b6112278fe 136 PUSH {R12, LR} ; Store stack adjustment and dummy LR to SVC stack
DieterGraef 0:f9b6112278fe 137
DieterGraef 0:f9b6112278fe 138 BLX rt_tsk_lock
DieterGraef 0:f9b6112278fe 139 CPSIE i
DieterGraef 0:f9b6112278fe 140
DieterGraef 0:f9b6112278fe 141 POP {R12, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 142 ADD SP, SP, R12 ; Unadjust stack
DieterGraef 0:f9b6112278fe 143
DieterGraef 0:f9b6112278fe 144 POP {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 145
DieterGraef 0:f9b6112278fe 146 CMP R4,#0
DieterGraef 0:f9b6112278fe 147 BNE SVC_User
DieterGraef 0:f9b6112278fe 148
DieterGraef 0:f9b6112278fe 149 MRS R4,SPSR
DieterGraef 0:f9b6112278fe 150 PUSH {R4} ; Push R4 so we can use it as a temp
DieterGraef 0:f9b6112278fe 151 AND R4, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 152 SUB SP, SP, R4 ; Adjust stack
DieterGraef 0:f9b6112278fe 153 PUSH {R4, LR} ; Store stack adjustment and dummy LR
DieterGraef 0:f9b6112278fe 154 BLX R12
DieterGraef 0:f9b6112278fe 155 POP {R4, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 156 ADD SP, SP, R4 ; Unadjust stack
DieterGraef 0:f9b6112278fe 157 POP {R4} ; Restore R4
DieterGraef 0:f9b6112278fe 158 MSR SPSR_CXSF,R4
DieterGraef 0:f9b6112278fe 159
DieterGraef 0:f9b6112278fe 160 /* Here we will be in SVC mode (even if coming in from PendSV_Handler or OS_Tick_Handler) */
DieterGraef 0:f9b6112278fe 161 Sys_Switch
DieterGraef 0:f9b6112278fe 162 LDR LR,=__cpp(&os_tsk)
DieterGraef 0:f9b6112278fe 163 LDM LR,{R4,LR} ; os_tsk.run, os_tsk.new_tsk
DieterGraef 0:f9b6112278fe 164 CMP R4,LR
DieterGraef 0:f9b6112278fe 165 BNE switching
DieterGraef 0:f9b6112278fe 166
DieterGraef 0:f9b6112278fe 167 PUSH {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 168
DieterGraef 0:f9b6112278fe 169 AND R12, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 170 SUB SP, SP, R12 ; Adjust stack
DieterGraef 0:f9b6112278fe 171 PUSH {R12, LR} ; Store stack adjustment and dummy LR to SVC stack
DieterGraef 0:f9b6112278fe 172
DieterGraef 0:f9b6112278fe 173 CPSID i
DieterGraef 0:f9b6112278fe 174 ; Do not unlock scheduler if it has just been suspended by rt_suspend()
DieterGraef 0:f9b6112278fe 175 LDR R1,=scheduler_suspended
DieterGraef 0:f9b6112278fe 176 LDRB R0, [R1]
DieterGraef 0:f9b6112278fe 177 CMP R0, #1
DieterGraef 0:f9b6112278fe 178 BEQ dont_unlock
DieterGraef 0:f9b6112278fe 179 BLX rt_tsk_unlock
DieterGraef 0:f9b6112278fe 180 dont_unlock
DieterGraef 0:f9b6112278fe 181
DieterGraef 0:f9b6112278fe 182 POP {R12, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 183 ADD SP, SP, R12 ; Unadjust stack
DieterGraef 0:f9b6112278fe 184
DieterGraef 0:f9b6112278fe 185 POP {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 186 POP {R4}
DieterGraef 0:f9b6112278fe 187 RFEFD SP! ; Return from exception, no task switch
DieterGraef 0:f9b6112278fe 188
DieterGraef 0:f9b6112278fe 189 switching
DieterGraef 0:f9b6112278fe 190 CLREX
DieterGraef 0:f9b6112278fe 191 CMP R4,#0
DieterGraef 0:f9b6112278fe 192 ADDEQ SP,SP,#12 ; Original R4, LR & SPSR do not need to be popped when we are paging in a different task
DieterGraef 0:f9b6112278fe 193 BEQ SVC_Next ; Runtask deleted?
DieterGraef 0:f9b6112278fe 194
DieterGraef 0:f9b6112278fe 195
DieterGraef 0:f9b6112278fe 196 PUSH {R8-R11} //R4 and LR already stacked
DieterGraef 0:f9b6112278fe 197 MOV R10,R4 ; Preserve os_tsk.run
DieterGraef 0:f9b6112278fe 198 MOV R11,LR ; Preserve os_tsk.new_tsk
DieterGraef 0:f9b6112278fe 199
DieterGraef 0:f9b6112278fe 200 ADD R8,SP,#16 ; Unstack R4,LR
DieterGraef 0:f9b6112278fe 201 LDMIA R8,{R4,LR}
DieterGraef 0:f9b6112278fe 202
DieterGraef 0:f9b6112278fe 203 SUB SP,SP,#4 ; Make space on the stack for the next instn
DieterGraef 0:f9b6112278fe 204 STMIA SP,{SP}^ ; Put User SP onto stack
DieterGraef 0:f9b6112278fe 205 POP {R8} ; Pop User SP into R8
DieterGraef 0:f9b6112278fe 206
DieterGraef 0:f9b6112278fe 207 MRS R9,SPSR
DieterGraef 0:f9b6112278fe 208 STMDB R8!,{R9} ; User CPSR
DieterGraef 0:f9b6112278fe 209 STMDB R8!,{LR} ; User PC
DieterGraef 0:f9b6112278fe 210 STMDB R8,{LR}^ ; User LR
DieterGraef 0:f9b6112278fe 211 SUB R8,R8,#4 ; No writeback for store of User LR
DieterGraef 0:f9b6112278fe 212 STMDB R8!,{R0-R3,R12} ; User R0-R3,R12
DieterGraef 0:f9b6112278fe 213 MOV R3,R10 ; os_tsk.run
DieterGraef 0:f9b6112278fe 214 MOV LR,R11 ; os_tsk.new_tsk
DieterGraef 0:f9b6112278fe 215 POP {R9-R12}
DieterGraef 0:f9b6112278fe 216 ADD SP,SP,#12 ; Fix up SP for unstack of R4, LR & SPSR
DieterGraef 0:f9b6112278fe 217 STMDB R8!,{R4-R7,R9-R12} ; User R4-R11
DieterGraef 0:f9b6112278fe 218
DieterGraef 0:f9b6112278fe 219 //If applicable, stack VFP/NEON state
DieterGraef 0:f9b6112278fe 220 MRC p15,0,R1,c1,c0,2 ; VFP/NEON access enabled? (CPACR)
DieterGraef 0:f9b6112278fe 221 AND R2,R1,#0x00F00000
DieterGraef 0:f9b6112278fe 222 CMP R2,#0x00F00000
DieterGraef 0:f9b6112278fe 223 BNE no_outgoing_vfp
DieterGraef 0:f9b6112278fe 224 VMRS R2,FPSCR
DieterGraef 0:f9b6112278fe 225 STMDB R8!,{R2,R4} ; Push FPSCR, maintain 8-byte alignment
DieterGraef 0:f9b6112278fe 226 VSTMDB R8!,{D0-D15}
DieterGraef 0:f9b6112278fe 227 VSTMDB R8!,{D16-D31}
DieterGraef 0:f9b6112278fe 228 LDRB R2,[R3,#TCB_STACKF] ; Record in TCB that NEON/D32 state is stacked
DieterGraef 0:f9b6112278fe 229 ORR R2,#4
DieterGraef 0:f9b6112278fe 230 STRB R2,[R3,#TCB_STACKF]
DieterGraef 0:f9b6112278fe 231
DieterGraef 0:f9b6112278fe 232 no_outgoing_vfp
DieterGraef 0:f9b6112278fe 233 STR R8,[R3,#TCB_TSTACK]
DieterGraef 0:f9b6112278fe 234 MOV R4,LR
DieterGraef 0:f9b6112278fe 235
DieterGraef 0:f9b6112278fe 236 PUSH {R4} ; Push R4 so we can use it as a temp
DieterGraef 0:f9b6112278fe 237 AND R4, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 238 SUB SP, SP, R4 ; Adjust stack
DieterGraef 0:f9b6112278fe 239 PUSH {R4, LR} ; Store stack adjustment and dummy LR to SVC stack
DieterGraef 0:f9b6112278fe 240
DieterGraef 0:f9b6112278fe 241 BLX rt_stk_check
DieterGraef 0:f9b6112278fe 242
DieterGraef 0:f9b6112278fe 243 POP {R4, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 244 ADD SP, SP, R4 ; Unadjust stack
DieterGraef 0:f9b6112278fe 245 POP {R4} ; Restore R4
DieterGraef 0:f9b6112278fe 246
DieterGraef 0:f9b6112278fe 247 MOV LR,R4
DieterGraef 0:f9b6112278fe 248
DieterGraef 0:f9b6112278fe 249 SVC_Next //R4 == os_tsk.run, LR == os_tsk.new_tsk, R0-R3, R5-R12 corruptible
DieterGraef 0:f9b6112278fe 250 LDR R1,=__cpp(&os_tsk) ; os_tsk.run = os_tsk.new_tsk
DieterGraef 0:f9b6112278fe 251 STR LR,[R1]
DieterGraef 0:f9b6112278fe 252 LDRB R1,[LR,#TCB_TID] ; os_tsk.run->task_id
DieterGraef 0:f9b6112278fe 253 LSL R1,#8 ; Store PROCID
DieterGraef 0:f9b6112278fe 254 MCR p15,0,R1,c13,c0,1 ; Write CONTEXTIDR
DieterGraef 0:f9b6112278fe 255
DieterGraef 0:f9b6112278fe 256 LDR R0,[LR,#TCB_TSTACK] ; os_tsk.run->tsk_stack
DieterGraef 0:f9b6112278fe 257
DieterGraef 0:f9b6112278fe 258 //Does incoming task have VFP/NEON state in stack?
DieterGraef 0:f9b6112278fe 259 LDRB R3,[LR,#TCB_STACKF]
DieterGraef 0:f9b6112278fe 260 ANDS R3, R3, #0x6
DieterGraef 0:f9b6112278fe 261 MRC p15,0,R1,c1,c0,2 ; Read CPACR
DieterGraef 0:f9b6112278fe 262 ANDEQ R1,R1,#0xFF0FFFFF ; Disable VFP/NEON access if incoming task does not have stacked VFP/NEON state
DieterGraef 0:f9b6112278fe 263 ORRNE R1,R1,#0x00F00000 ; Enable VFP/NEON access if incoming task does have stacked VFP/NEON state
DieterGraef 0:f9b6112278fe 264 MCR p15,0,R1,c1,c0,2 ; Write CPACR
DieterGraef 0:f9b6112278fe 265 BEQ no_incoming_vfp
DieterGraef 0:f9b6112278fe 266 ISB ; We only need the sync if we enabled, otherwise we will context switch before next VFP/NEON instruction anyway
DieterGraef 0:f9b6112278fe 267 VLDMIA R0!,{D16-D31}
DieterGraef 0:f9b6112278fe 268 VLDMIA R0!,{D0-D15}
DieterGraef 0:f9b6112278fe 269 LDR R2,[R0]
DieterGraef 0:f9b6112278fe 270 VMSR FPSCR,R2
DieterGraef 0:f9b6112278fe 271 ADD R0,R0,#8
DieterGraef 0:f9b6112278fe 272
DieterGraef 0:f9b6112278fe 273 no_incoming_vfp
DieterGraef 0:f9b6112278fe 274 LDR R1,[R0,#60] ; Restore User CPSR
DieterGraef 0:f9b6112278fe 275 MSR SPSR_CXSF,R1
DieterGraef 0:f9b6112278fe 276 LDMIA R0!,{R4-R11} ; Restore User R4-R11
DieterGraef 0:f9b6112278fe 277 ADD R0,R0,#4 ; Restore User R1-R3,R12
DieterGraef 0:f9b6112278fe 278 LDMIA R0!,{R1-R3,R12}
DieterGraef 0:f9b6112278fe 279 LDMIA R0,{LR}^ ; Restore User LR
DieterGraef 0:f9b6112278fe 280 ADD R0,R0,#4 ; No writeback for load to user LR
DieterGraef 0:f9b6112278fe 281 LDMIA R0!,{LR} ; Restore User PC
DieterGraef 0:f9b6112278fe 282 ADD R0,R0,#4 ; Correct User SP for unstacked user CPSR
DieterGraef 0:f9b6112278fe 283
DieterGraef 0:f9b6112278fe 284 PUSH {R0} ; Push R0 onto stack
DieterGraef 0:f9b6112278fe 285 LDMIA SP,{SP}^ ; Get R0 off stack into User SP
DieterGraef 0:f9b6112278fe 286 ADD SP,SP,#4 ; Put SP back
DieterGraef 0:f9b6112278fe 287
DieterGraef 0:f9b6112278fe 288 LDR R0,[R0,#-32] ; Restore R0
DieterGraef 0:f9b6112278fe 289
DieterGraef 0:f9b6112278fe 290 PUSH {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 291
DieterGraef 0:f9b6112278fe 292 AND R12, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 293 SUB SP, SP, R12 ; Adjust stack
DieterGraef 0:f9b6112278fe 294 PUSH {R12, LR} ; Store stack adjustment and dummy LR to SVC stack
DieterGraef 0:f9b6112278fe 295
DieterGraef 0:f9b6112278fe 296 CPSID i
DieterGraef 0:f9b6112278fe 297 BLX rt_tsk_unlock
DieterGraef 0:f9b6112278fe 298
DieterGraef 0:f9b6112278fe 299 POP {R12, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 300 ADD SP, SP, R12 ; Unadjust stack
DieterGraef 0:f9b6112278fe 301
DieterGraef 0:f9b6112278fe 302 POP {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 303
DieterGraef 0:f9b6112278fe 304 MOVS PC,LR ; Return from exception
DieterGraef 0:f9b6112278fe 305
DieterGraef 0:f9b6112278fe 306
DieterGraef 0:f9b6112278fe 307 /*------------------- User SVC -------------------------------*/
DieterGraef 0:f9b6112278fe 308
DieterGraef 0:f9b6112278fe 309 SVC_User
DieterGraef 0:f9b6112278fe 310 LDR R12,=SVC_Count
DieterGraef 0:f9b6112278fe 311 LDR R12,[R12]
DieterGraef 0:f9b6112278fe 312 CMP R4,R12 ; Check for overflow
DieterGraef 0:f9b6112278fe 313 BHI SVC_Done
DieterGraef 0:f9b6112278fe 314
DieterGraef 0:f9b6112278fe 315 LDR R12,=SVC_Table-4
DieterGraef 0:f9b6112278fe 316 LDR R12,[R12,R4,LSL #2] ; Load SVC Function Address
DieterGraef 0:f9b6112278fe 317 MRS R4,SPSR ; Save SPSR
DieterGraef 0:f9b6112278fe 318 PUSH {R4} ; Push R4 so we can use it as a temp
DieterGraef 0:f9b6112278fe 319 AND R4, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 320 SUB SP, SP, R4 ; Adjust stack
DieterGraef 0:f9b6112278fe 321 PUSH {R4, LR} ; Store stack adjustment and dummy LR
DieterGraef 0:f9b6112278fe 322 BLX R12 ; Call SVC Function
DieterGraef 0:f9b6112278fe 323 POP {R4, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 324 ADD SP, SP, R4 ; Unadjust stack
DieterGraef 0:f9b6112278fe 325 POP {R4} ; Restore R4
DieterGraef 0:f9b6112278fe 326 MSR SPSR_CXSF,R4 ; Restore SPSR
DieterGraef 0:f9b6112278fe 327
DieterGraef 0:f9b6112278fe 328 SVC_Done
DieterGraef 0:f9b6112278fe 329 PUSH {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 330
DieterGraef 0:f9b6112278fe 331 PUSH {R4} ; Push R4 so we can use it as a temp
DieterGraef 0:f9b6112278fe 332 AND R4, SP, #4 ; Ensure stack is 8-byte aligned
DieterGraef 0:f9b6112278fe 333 SUB SP, SP, R4 ; Adjust stack
DieterGraef 0:f9b6112278fe 334 PUSH {R4, LR} ; Store stack adjustment and dummy LR
DieterGraef 0:f9b6112278fe 335
DieterGraef 0:f9b6112278fe 336 CPSID i
DieterGraef 0:f9b6112278fe 337 BLX rt_tsk_unlock
DieterGraef 0:f9b6112278fe 338
DieterGraef 0:f9b6112278fe 339 POP {R4, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 340 ADD SP, SP, R4 ; Unadjust stack
DieterGraef 0:f9b6112278fe 341 POP {R4} ; Restore R4
DieterGraef 0:f9b6112278fe 342
DieterGraef 0:f9b6112278fe 343 POP {R0-R3,R12,LR}
DieterGraef 0:f9b6112278fe 344 POP {R4}
DieterGraef 0:f9b6112278fe 345 RFEFD SP! ; Return from exception
DieterGraef 0:f9b6112278fe 346 }
DieterGraef 0:f9b6112278fe 347 #pragma pop
DieterGraef 0:f9b6112278fe 348
DieterGraef 0:f9b6112278fe 349 #pragma push
DieterGraef 0:f9b6112278fe 350 #pragma arm
DieterGraef 0:f9b6112278fe 351 __asm void PendSV_Handler (U32 IRQn) {
DieterGraef 0:f9b6112278fe 352 ARM
DieterGraef 0:f9b6112278fe 353
DieterGraef 0:f9b6112278fe 354 IMPORT rt_tsk_lock
DieterGraef 0:f9b6112278fe 355 IMPORT IRQNestLevel ; Flag indicates whether inside an ISR, and the depth of nesting. 0 = not in ISR.
DieterGraef 0:f9b6112278fe 356 IMPORT seen_id0_active ; Flag used to workaround GIC 390 errata 733075 - set in startup_Renesas_RZ_A1.s
DieterGraef 0:f9b6112278fe 357
DieterGraef 0:f9b6112278fe 358 ADD SP,SP,#8 //fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
DieterGraef 0:f9b6112278fe 359
DieterGraef 0:f9b6112278fe 360 //Disable systick interrupts, then write EOIR. We want interrupts disabled before we enter the context switcher.
DieterGraef 0:f9b6112278fe 361 PUSH {R0, R1}
DieterGraef 0:f9b6112278fe 362 BLX rt_tsk_lock
DieterGraef 0:f9b6112278fe 363 POP {R0, R1}
DieterGraef 0:f9b6112278fe 364 LDR R1, =__cpp(&GICInterface_BASE)
DieterGraef 0:f9b6112278fe 365 LDR R1, [R1, #0]
DieterGraef 0:f9b6112278fe 366 STR R0, [R1, #0x10]
DieterGraef 0:f9b6112278fe 367
DieterGraef 0:f9b6112278fe 368 ; If it was interrupt ID0, clear the seen flag, otherwise return as normal
DieterGraef 0:f9b6112278fe 369 CMP R0, #0
DieterGraef 0:f9b6112278fe 370 LDREQ R1, =seen_id0_active
DieterGraef 0:f9b6112278fe 371 STRBEQ R0, [R1] ; Clear the seen flag, using R0 (which is 0), to save loading another register
DieterGraef 0:f9b6112278fe 372
DieterGraef 0:f9b6112278fe 373 LDR R0, =IRQNestLevel ; Get address of nesting counter
DieterGraef 0:f9b6112278fe 374 LDR R1, [R0]
DieterGraef 0:f9b6112278fe 375 SUB R1, R1, #1 ; Decrement nesting counter
DieterGraef 0:f9b6112278fe 376 STR R1, [R0]
DieterGraef 0:f9b6112278fe 377
DieterGraef 0:f9b6112278fe 378 BLX __cpp(rt_pop_req)
DieterGraef 0:f9b6112278fe 379
DieterGraef 0:f9b6112278fe 380 POP {R1, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 381 ADD SP, SP, R1 ; Unadjust stack
DieterGraef 0:f9b6112278fe 382
DieterGraef 0:f9b6112278fe 383 LDR R0,[SP,#24]
DieterGraef 0:f9b6112278fe 384 MSR SPSR_CXSF,R0
DieterGraef 0:f9b6112278fe 385 POP {R0-R3,R12} ; Leave SPSR & LR on the stack
DieterGraef 0:f9b6112278fe 386 PUSH {R4}
DieterGraef 0:f9b6112278fe 387 B Sys_Switch
DieterGraef 0:f9b6112278fe 388 }
DieterGraef 0:f9b6112278fe 389 #pragma pop
DieterGraef 0:f9b6112278fe 390
DieterGraef 0:f9b6112278fe 391
DieterGraef 0:f9b6112278fe 392 #pragma push
DieterGraef 0:f9b6112278fe 393 #pragma arm
DieterGraef 0:f9b6112278fe 394 __asm void OS_Tick_Handler (U32 IRQn) {
DieterGraef 0:f9b6112278fe 395 ARM
DieterGraef 0:f9b6112278fe 396
DieterGraef 0:f9b6112278fe 397 IMPORT rt_tsk_lock
DieterGraef 0:f9b6112278fe 398 IMPORT IRQNestLevel ; Flag indicates whether inside an ISR, and the depth of nesting. 0 = not in ISR.
DieterGraef 0:f9b6112278fe 399 IMPORT seen_id0_active ; Flag used to workaround GIC 390 errata 733075 - set in startup_Renesas_RZ_A1.s
DieterGraef 0:f9b6112278fe 400
DieterGraef 0:f9b6112278fe 401 ADD SP,SP,#8 //fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
DieterGraef 0:f9b6112278fe 402
DieterGraef 0:f9b6112278fe 403 PUSH {R0, R1}
DieterGraef 0:f9b6112278fe 404 BLX rt_tsk_lock
DieterGraef 0:f9b6112278fe 405 POP {R0, R1}
DieterGraef 0:f9b6112278fe 406 LDR R1, =__cpp(&GICInterface_BASE)
DieterGraef 0:f9b6112278fe 407 LDR R1, [R1, #0]
DieterGraef 0:f9b6112278fe 408 STR R0, [R1, #0x10]
DieterGraef 0:f9b6112278fe 409
DieterGraef 0:f9b6112278fe 410 ; If it was interrupt ID0, clear the seen flag, otherwise return as normal
DieterGraef 0:f9b6112278fe 411 CMP R0, #0
DieterGraef 0:f9b6112278fe 412 LDREQ R1, =seen_id0_active
DieterGraef 0:f9b6112278fe 413 STRBEQ R0, [R1] ; Clear the seen flag, using R0 (which is 0), to save loading another register
DieterGraef 0:f9b6112278fe 414
DieterGraef 0:f9b6112278fe 415 LDR R0, =IRQNestLevel ; Get address of nesting counter
DieterGraef 0:f9b6112278fe 416 LDR R1, [R0]
DieterGraef 0:f9b6112278fe 417 SUB R1, R1, #1 ; Decrement nesting counter
DieterGraef 0:f9b6112278fe 418 STR R1, [R0]
DieterGraef 0:f9b6112278fe 419
DieterGraef 0:f9b6112278fe 420 BLX __cpp(os_tick_irqack)
DieterGraef 0:f9b6112278fe 421 BLX __cpp(rt_systick)
DieterGraef 0:f9b6112278fe 422
DieterGraef 0:f9b6112278fe 423 POP {R1, LR} ; Get stack adjustment & discard dummy LR
DieterGraef 0:f9b6112278fe 424 ADD SP, SP, R1 ; Unadjust stack
DieterGraef 0:f9b6112278fe 425
DieterGraef 0:f9b6112278fe 426 LDR R0,[SP,#24]
DieterGraef 0:f9b6112278fe 427 MSR SPSR_CXSF,R0
DieterGraef 0:f9b6112278fe 428 POP {R0-R3,R12} ; Leave SPSR & LR on the stack
DieterGraef 0:f9b6112278fe 429 PUSH {R4}
DieterGraef 0:f9b6112278fe 430 B Sys_Switch
DieterGraef 0:f9b6112278fe 431 }
DieterGraef 0:f9b6112278fe 432 #pragma pop
DieterGraef 0:f9b6112278fe 433
DieterGraef 0:f9b6112278fe 434
DieterGraef 0:f9b6112278fe 435 /*----------------------------------------------------------------------------
DieterGraef 0:f9b6112278fe 436 * end of file
DieterGraef 0:f9b6112278fe 437 *---------------------------------------------------------------------------*/