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Dependencies:   F7_Ethernet WebSocketClient mbed mcp3008

Fork of Nucleo_F746ZG_Ethernet by Dieter Graef

F7_Ethernet/lwip-eth/arch/TARGET_STM/stm32f7_emac.c@0:f9b6112278fe, 2016-06-18 (annotated)

Committer:
DieterGraef
Date:
Sat Jun 18 10:49:12 2016 +0000
Revision:
0:f9b6112278fe
Ethernet for the NUCLEO STM32F746 Board Testprogram uses DHCP and NTP to set the clock

Who changed what in which revision?

UserRevisionLine numberNew contents of line
DieterGraef 0:f9b6112278fe 1
DieterGraef 0:f9b6112278fe 2 #include "stm32f7xx_hal.h"
DieterGraef 0:f9b6112278fe 3 #include "lwipopts.h"
DieterGraef 0:f9b6112278fe 4 #include "lwip/opt.h"
DieterGraef 0:f9b6112278fe 5 #include "wait_api.h"
DieterGraef 0:f9b6112278fe 6 //#include "lwip/timers.h"
DieterGraef 0:f9b6112278fe 7 #include "netif/etharp.h"
DieterGraef 0:f9b6112278fe 8 #include "lwip/tcpip.h"
DieterGraef 0:f9b6112278fe 9 #include <string.h>
DieterGraef 0:f9b6112278fe 10 #include "cmsis_os.h"
DieterGraef 0:f9b6112278fe 11 #include "mbed_interface.h"
DieterGraef 0:f9b6112278fe 12
DieterGraef 0:f9b6112278fe 13
DieterGraef 0:f9b6112278fe 14 /** @defgroup lwipstm32f7xx_emac_DRIVER stm32f7 EMAC driver for LWIP
DieterGraef 0:f9b6112278fe 15 * @ingroup lwip_emac
DieterGraef 0:f9b6112278fe 16 *
DieterGraef 0:f9b6112278fe 17 * @{
DieterGraef 0:f9b6112278fe 18 */
DieterGraef 0:f9b6112278fe 19
DieterGraef 0:f9b6112278fe 20 #define RECV_TASK_PRI (osPriorityHigh)
DieterGraef 0:f9b6112278fe 21 #define PHY_TASK_PRI (osPriorityLow)
DieterGraef 0:f9b6112278fe 22 #define PHY_TASK_WAIT (200)
DieterGraef 0:f9b6112278fe 23
DieterGraef 0:f9b6112278fe 24 //#define EMAC_RECIVE_WAIT
DieterGraef 0:f9b6112278fe 25 #define EMAC_R_WAIT 200
DieterGraef 0:f9b6112278fe 26 //#define EMAC_TRANSMIT_WAIT
DieterGraef 0:f9b6112278fe 27 #define EMAC_T_WAIT 200
DieterGraef 0:f9b6112278fe 28
DieterGraef 0:f9b6112278fe 29 #define MAC_ADDR_0 MBED_MAC_ADDR_0
DieterGraef 0:f9b6112278fe 30 #define MAC_ADDR_1 MBED_MAC_ADDR_1
DieterGraef 0:f9b6112278fe 31 #define MAC_ADDR_2 MBED_MAC_ADDR_2
DieterGraef 0:f9b6112278fe 32 #define MAC_ADDR_3 MBED_MAC_ADDR_3
DieterGraef 0:f9b6112278fe 33 #define MAC_ADDR_4 MBED_MAC_ADDR_4
DieterGraef 0:f9b6112278fe 34 #define MAC_ADDR_5 MBED_MAC_ADDR_5
DieterGraef 0:f9b6112278fe 35
DieterGraef 0:f9b6112278fe 36 /* LAN8742A PHY Address*/
DieterGraef 0:f9b6112278fe 37 #define LAN8742A_PHY_ADDRESS 0x00U
DieterGraef 0:f9b6112278fe 38
DieterGraef 0:f9b6112278fe 39
DieterGraef 0:f9b6112278fe 40 __ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx MA Descriptor */
DieterGraef 0:f9b6112278fe 41
DieterGraef 0:f9b6112278fe 42
DieterGraef 0:f9b6112278fe 43 __ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
DieterGraef 0:f9b6112278fe 44
DieterGraef 0:f9b6112278fe 45
DieterGraef 0:f9b6112278fe 46 __ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
DieterGraef 0:f9b6112278fe 47
DieterGraef 0:f9b6112278fe 48
DieterGraef 0:f9b6112278fe 49 __ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
DieterGraef 0:f9b6112278fe 50
DieterGraef 0:f9b6112278fe 51
DieterGraef 0:f9b6112278fe 52 ETH_HandleTypeDef heth;
DieterGraef 0:f9b6112278fe 53 uint32_t phy_status = 0;
DieterGraef 0:f9b6112278fe 54 uint32_t systickval;
DieterGraef 0:f9b6112278fe 55 uint32_t sysflag=0;
DieterGraef 0:f9b6112278fe 56 static sys_sem_t rx_ready_sem; /* receive ready semaphore */
DieterGraef 0:f9b6112278fe 57 static sys_mutex_t tx_lock_mutex;
DieterGraef 0:f9b6112278fe 58
DieterGraef 0:f9b6112278fe 59 /* function */
DieterGraef 0:f9b6112278fe 60 static void stm32f7_rx_task(void *arg);
DieterGraef 0:f9b6112278fe 61 static void stm32f7_phy_task(void *arg);
DieterGraef 0:f9b6112278fe 62 static err_t stm32f7_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr);
DieterGraef 0:f9b6112278fe 63 static err_t stm32f7_low_level_output(struct netif *netif, struct pbuf *p);
DieterGraef 0:f9b6112278fe 64
DieterGraef 0:f9b6112278fe 65 /**
DieterGraef 0:f9b6112278fe 66 * Override HAL Eth Init function
DieterGraef 0:f9b6112278fe 67 */
DieterGraef 0:f9b6112278fe 68 void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
DieterGraef 0:f9b6112278fe 69 {
DieterGraef 0:f9b6112278fe 70 GPIO_InitTypeDef GPIO_InitStructure;
DieterGraef 0:f9b6112278fe 71 if (heth->Instance == ETH) {
DieterGraef 0:f9b6112278fe 72
DieterGraef 0:f9b6112278fe 73
DieterGraef 0:f9b6112278fe 74 /* Enable GPIOs clocks */
DieterGraef 0:f9b6112278fe 75 __HAL_RCC_GPIOA_CLK_ENABLE();
DieterGraef 0:f9b6112278fe 76 __HAL_RCC_GPIOB_CLK_ENABLE();
DieterGraef 0:f9b6112278fe 77 __HAL_RCC_GPIOC_CLK_ENABLE();
DieterGraef 0:f9b6112278fe 78 __HAL_RCC_GPIOG_CLK_ENABLE();
DieterGraef 0:f9b6112278fe 79
DieterGraef 0:f9b6112278fe 80 /* Ethernet pins configuration ************************************************/
DieterGraef 0:f9b6112278fe 81 /*
DieterGraef 0:f9b6112278fe 82 RMII_REF_CLK ----------------------> PA1
DieterGraef 0:f9b6112278fe 83 RMII_MDIO -------------------------> PA2
DieterGraef 0:f9b6112278fe 84 RMII_MDC --------------------------> PC1
DieterGraef 0:f9b6112278fe 85 RMII_MII_CRS_DV -------------------> PA7
DieterGraef 0:f9b6112278fe 86 RMII_MII_RXD0 ---------------------> PC4
DieterGraef 0:f9b6112278fe 87 RMII_MII_RXD1 ---------------------> PC5
DieterGraef 0:f9b6112278fe 88 RMII_MII_RXER ---------------------> PG2
DieterGraef 0:f9b6112278fe 89 RMII_MII_TX_EN --------------------> PG11
DieterGraef 0:f9b6112278fe 90 RMII_MII_TXD0 ---------------------> PG13
DieterGraef 0:f9b6112278fe 91 RMII_MII_TXD1 ---------------------> PB13
DieterGraef 0:f9b6112278fe 92 */
DieterGraef 0:f9b6112278fe 93
DieterGraef 0:f9b6112278fe 94 /* Configure PA1, PA2 and PA7 */
DieterGraef 0:f9b6112278fe 95 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
DieterGraef 0:f9b6112278fe 96 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
DieterGraef 0:f9b6112278fe 97 GPIO_InitStructure.Pull = GPIO_NOPULL;
DieterGraef 0:f9b6112278fe 98 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
DieterGraef 0:f9b6112278fe 99 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
DieterGraef 0:f9b6112278fe 100 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
DieterGraef 0:f9b6112278fe 101
DieterGraef 0:f9b6112278fe 102 /* Configure PB13 */
DieterGraef 0:f9b6112278fe 103 GPIO_InitStructure.Pin = GPIO_PIN_13;
DieterGraef 0:f9b6112278fe 104 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
DieterGraef 0:f9b6112278fe 105
DieterGraef 0:f9b6112278fe 106 /* Configure PC1, PC4 and PC5 */
DieterGraef 0:f9b6112278fe 107 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
DieterGraef 0:f9b6112278fe 108 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
DieterGraef 0:f9b6112278fe 109
DieterGraef 0:f9b6112278fe 110 /* Configure PG2, PG11, PG13 and PG14 */
DieterGraef 0:f9b6112278fe 111 GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
DieterGraef 0:f9b6112278fe 112 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
DieterGraef 0:f9b6112278fe 113
DieterGraef 0:f9b6112278fe 114 /* Enable the Ethernet global Interrupt */
DieterGraef 0:f9b6112278fe 115 HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
DieterGraef 0:f9b6112278fe 116 HAL_NVIC_EnableIRQ(ETH_IRQn);
DieterGraef 0:f9b6112278fe 117
DieterGraef 0:f9b6112278fe 118 /* Enable ETHERNET clock */
DieterGraef 0:f9b6112278fe 119 __HAL_RCC_ETH_CLK_ENABLE();
DieterGraef 0:f9b6112278fe 120
DieterGraef 0:f9b6112278fe 121 }
DieterGraef 0:f9b6112278fe 122
DieterGraef 0:f9b6112278fe 123 }
DieterGraef 0:f9b6112278fe 124
DieterGraef 0:f9b6112278fe 125 /**
DieterGraef 0:f9b6112278fe 126 * Override HAL Eth DeInit function
DieterGraef 0:f9b6112278fe 127 */
DieterGraef 0:f9b6112278fe 128 void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
DieterGraef 0:f9b6112278fe 129 {
DieterGraef 0:f9b6112278fe 130 if (heth->Instance == ETH) {
DieterGraef 0:f9b6112278fe 131
DieterGraef 0:f9b6112278fe 132 /* Ethernet pins configuration ************************************************/
DieterGraef 0:f9b6112278fe 133 /*
DieterGraef 0:f9b6112278fe 134 RMII_REF_CLK ----------------------> PA1
DieterGraef 0:f9b6112278fe 135 RMII_MDIO -------------------------> PA2
DieterGraef 0:f9b6112278fe 136 RMII_MDC --------------------------> PC1
DieterGraef 0:f9b6112278fe 137 RMII_MII_CRS_DV -------------------> PA7
DieterGraef 0:f9b6112278fe 138 RMII_MII_RXD0 ---------------------> PC4
DieterGraef 0:f9b6112278fe 139 RMII_MII_RXD1 ---------------------> PC5
DieterGraef 0:f9b6112278fe 140 RMII_MII_RXER ---------------------> PG2
DieterGraef 0:f9b6112278fe 141 RMII_MII_TX_EN --------------------> PG11
DieterGraef 0:f9b6112278fe 142 RMII_MII_TXD0 ---------------------> PG13
DieterGraef 0:f9b6112278fe 143 RMII_MII_TXD1 ---------------------> PB13
DieterGraef 0:f9b6112278fe 144 */
DieterGraef 0:f9b6112278fe 145 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
DieterGraef 0:f9b6112278fe 146
DieterGraef 0:f9b6112278fe 147 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
DieterGraef 0:f9b6112278fe 148
DieterGraef 0:f9b6112278fe 149 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
DieterGraef 0:f9b6112278fe 150
DieterGraef 0:f9b6112278fe 151 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
DieterGraef 0:f9b6112278fe 152
DieterGraef 0:f9b6112278fe 153 /* Peripheral interrupt Deinit*/
DieterGraef 0:f9b6112278fe 154 HAL_NVIC_DisableIRQ(ETH_IRQn);
DieterGraef 0:f9b6112278fe 155 }
DieterGraef 0:f9b6112278fe 156 }
DieterGraef 0:f9b6112278fe 157
DieterGraef 0:f9b6112278fe 158 /**
DieterGraef 0:f9b6112278fe 159 * Ethernet Rx Transfer completed callback
DieterGraef 0:f9b6112278fe 160 *
DieterGraef 0:f9b6112278fe 161 * @param heth: ETH handle
DieterGraef 0:f9b6112278fe 162 * @retval None
DieterGraef 0:f9b6112278fe 163 */
DieterGraef 0:f9b6112278fe 164 void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
DieterGraef 0:f9b6112278fe 165 {
DieterGraef 0:f9b6112278fe 166 sys_sem_signal(&rx_ready_sem);
DieterGraef 0:f9b6112278fe 167 }
DieterGraef 0:f9b6112278fe 168
DieterGraef 0:f9b6112278fe 169
DieterGraef 0:f9b6112278fe 170 /**
DieterGraef 0:f9b6112278fe 171 * Ethernet IRQ Handler
DieterGraef 0:f9b6112278fe 172 *
DieterGraef 0:f9b6112278fe 173 * @param None
DieterGraef 0:f9b6112278fe 174 * @retval None
DieterGraef 0:f9b6112278fe 175 */
DieterGraef 0:f9b6112278fe 176 void ETH_IRQHandler(void)
DieterGraef 0:f9b6112278fe 177 {
DieterGraef 0:f9b6112278fe 178 HAL_ETH_IRQHandler(&heth);
DieterGraef 0:f9b6112278fe 179 }
DieterGraef 0:f9b6112278fe 180
DieterGraef 0:f9b6112278fe 181
DieterGraef 0:f9b6112278fe 182
DieterGraef 0:f9b6112278fe 183 /**
DieterGraef 0:f9b6112278fe 184 * In this function, the hardware should be initialized.
DieterGraef 0:f9b6112278fe 185 * Called from eth_arch_enetif_init().
DieterGraef 0:f9b6112278fe 186 *
DieterGraef 0:f9b6112278fe 187 * @param netif the already initialized lwip network interface structure
DieterGraef 0:f9b6112278fe 188 * for this ethernetif
DieterGraef 0:f9b6112278fe 189 */
DieterGraef 0:f9b6112278fe 190 static void stm32f7_low_level_init(struct netif *netif)
DieterGraef 0:f9b6112278fe 191 {
DieterGraef 0:f9b6112278fe 192 uint8_t macaddress[6]= { MAC_ADDR_0, MAC_ADDR_1, MAC_ADDR_2, MAC_ADDR_3, MAC_ADDR_4, MAC_ADDR_5 };
DieterGraef 0:f9b6112278fe 193
DieterGraef 0:f9b6112278fe 194 HAL_StatusTypeDef hal_eth_init_status;
DieterGraef 0:f9b6112278fe 195
DieterGraef 0:f9b6112278fe 196 /* Init ETH */
DieterGraef 0:f9b6112278fe 197
DieterGraef 0:f9b6112278fe 198 heth.Instance = ETH;
DieterGraef 0:f9b6112278fe 199 heth.Init.MACAddr = &macaddress[0];
DieterGraef 0:f9b6112278fe 200 heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
DieterGraef 0:f9b6112278fe 201 heth.Init.Speed = ETH_SPEED_100M;
DieterGraef 0:f9b6112278fe 202 heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
DieterGraef 0:f9b6112278fe 203 heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
DieterGraef 0:f9b6112278fe 204 heth.Init.RxMode = ETH_RXINTERRUPT_MODE;
DieterGraef 0:f9b6112278fe 205 heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
DieterGraef 0:f9b6112278fe 206 heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
DieterGraef 0:f9b6112278fe 207 hal_eth_init_status = HAL_ETH_Init(&heth);
DieterGraef 0:f9b6112278fe 208
DieterGraef 0:f9b6112278fe 209 //Configure the receive filter
DieterGraef 0:f9b6112278fe 210 heth.Instance->MACFFR = ETH_MACFFR_HPF | ETH_MACFFR_HM;
DieterGraef 0:f9b6112278fe 211 //Disable flow control
DieterGraef 0:f9b6112278fe 212 heth.Instance->MACFCR = 0;
DieterGraef 0:f9b6112278fe 213 //Enable store and forward mode
DieterGraef 0:f9b6112278fe 214 heth.Instance->DMAOMR = ETH_DMAOMR_RSF | ETH_DMAOMR_TSF;
DieterGraef 0:f9b6112278fe 215 if (hal_eth_init_status == HAL_OK) {
DieterGraef 0:f9b6112278fe 216 /* Set netif link flag */
DieterGraef 0:f9b6112278fe 217 netif->flags |= NETIF_FLAG_LINK_UP;
DieterGraef 0:f9b6112278fe 218 }
DieterGraef 0:f9b6112278fe 219
DieterGraef 0:f9b6112278fe 220 SCB_DisableDCache();
DieterGraef 0:f9b6112278fe 221
DieterGraef 0:f9b6112278fe 222
DieterGraef 0:f9b6112278fe 223 /* Initialize Tx Descriptors list: Chain Mode */
DieterGraef 0:f9b6112278fe 224 HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
DieterGraef 0:f9b6112278fe 225
DieterGraef 0:f9b6112278fe 226 /* Initialize Rx Descriptors list: Chain Mode */
DieterGraef 0:f9b6112278fe 227 HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
DieterGraef 0:f9b6112278fe 228
DieterGraef 0:f9b6112278fe 229 /* set MAC hardware address length */
DieterGraef 0:f9b6112278fe 230 netif->hwaddr_len = ETHARP_HWADDR_LEN;
DieterGraef 0:f9b6112278fe 231
DieterGraef 0:f9b6112278fe 232 /* set MAC hardware address */
DieterGraef 0:f9b6112278fe 233 netif->hwaddr[0] = heth.Init.MACAddr[0];
DieterGraef 0:f9b6112278fe 234 netif->hwaddr[1] = heth.Init.MACAddr[1];
DieterGraef 0:f9b6112278fe 235 netif->hwaddr[2] = heth.Init.MACAddr[2];
DieterGraef 0:f9b6112278fe 236 netif->hwaddr[3] = heth.Init.MACAddr[3];
DieterGraef 0:f9b6112278fe 237 netif->hwaddr[4] = heth.Init.MACAddr[4];
DieterGraef 0:f9b6112278fe 238 netif->hwaddr[5] = heth.Init.MACAddr[5];
DieterGraef 0:f9b6112278fe 239
DieterGraef 0:f9b6112278fe 240 /* maximum transfer unit */
DieterGraef 0:f9b6112278fe 241 netif->mtu = 1500;
DieterGraef 0:f9b6112278fe 242
DieterGraef 0:f9b6112278fe 243 /* device capabilities */
DieterGraef 0:f9b6112278fe 244 /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
DieterGraef 0:f9b6112278fe 245 netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
DieterGraef 0:f9b6112278fe 246
DieterGraef 0:f9b6112278fe 247 /* Enable MAC and DMA transmission and reception */
DieterGraef 0:f9b6112278fe 248 HAL_ETH_Start(&heth);
DieterGraef 0:f9b6112278fe 249
DieterGraef 0:f9b6112278fe 250 }
DieterGraef 0:f9b6112278fe 251
DieterGraef 0:f9b6112278fe 252 /**
DieterGraef 0:f9b6112278fe 253 * This function should do the actual transmission of the packet. The packet is
DieterGraef 0:f9b6112278fe 254 * contained in the pbuf that is passed to the function. This pbuf
DieterGraef 0:f9b6112278fe 255 * might be chained.
DieterGraef 0:f9b6112278fe 256 *
DieterGraef 0:f9b6112278fe 257 * @param netif the lwip network interface structure for this ethernetif
DieterGraef 0:f9b6112278fe 258 * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
DieterGraef 0:f9b6112278fe 259 * @return ERR_OK if the packet could be sent
DieterGraef 0:f9b6112278fe 260 * an err_t value if the packet couldn't be sent
DieterGraef 0:f9b6112278fe 261 *
DieterGraef 0:f9b6112278fe 262 * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
DieterGraef 0:f9b6112278fe 263 * strange results. You might consider waiting for space in the DMA queue
DieterGraef 0:f9b6112278fe 264 * to become availale since the stack doesn't retry to send a packet
DieterGraef 0:f9b6112278fe 265 * dropped because of memory failure (except for the TCP timers).
DieterGraef 0:f9b6112278fe 266 */
DieterGraef 0:f9b6112278fe 267
DieterGraef 0:f9b6112278fe 268 static err_t stm32f7_low_level_output(struct netif *netif, struct pbuf *p)
DieterGraef 0:f9b6112278fe 269 {
DieterGraef 0:f9b6112278fe 270 err_t errval;
DieterGraef 0:f9b6112278fe 271 struct pbuf *q;
DieterGraef 0:f9b6112278fe 272 uint8_t *buffer = (uint8_t*)(heth.TxDesc->Buffer1Addr);
DieterGraef 0:f9b6112278fe 273 __IO ETH_DMADescTypeDef *DmaTxDesc;
DieterGraef 0:f9b6112278fe 274 uint32_t framelength = 0;
DieterGraef 0:f9b6112278fe 275 uint32_t bufferoffset = 0;
DieterGraef 0:f9b6112278fe 276 uint32_t byteslefttocopy = 0;
DieterGraef 0:f9b6112278fe 277 uint32_t payloadoffset = 0;
DieterGraef 0:f9b6112278fe 278 DmaTxDesc = heth.TxDesc;
DieterGraef 0:f9b6112278fe 279 bufferoffset = 0;
DieterGraef 0:f9b6112278fe 280
DieterGraef 0:f9b6112278fe 281
DieterGraef 0:f9b6112278fe 282 sys_mutex_lock(&tx_lock_mutex);
DieterGraef 0:f9b6112278fe 283
DieterGraef 0:f9b6112278fe 284 /* copy frame from pbufs to driver buffers */
DieterGraef 0:f9b6112278fe 285 for (q = p; q != NULL; q = q->next) {
DieterGraef 0:f9b6112278fe 286 /* Is this buffer available? If not, goto error */
DieterGraef 0:f9b6112278fe 287 if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
DieterGraef 0:f9b6112278fe 288 errval = ERR_USE;
DieterGraef 0:f9b6112278fe 289 goto error;
DieterGraef 0:f9b6112278fe 290 }
DieterGraef 0:f9b6112278fe 291
DieterGraef 0:f9b6112278fe 292 /* Get bytes in current lwIP buffer */
DieterGraef 0:f9b6112278fe 293 byteslefttocopy = q->len;
DieterGraef 0:f9b6112278fe 294 payloadoffset = 0;
DieterGraef 0:f9b6112278fe 295
DieterGraef 0:f9b6112278fe 296 /* Check if the length of data to copy is bigger than Tx buffer size*/
DieterGraef 0:f9b6112278fe 297 while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) {
DieterGraef 0:f9b6112278fe 298 /* Copy data to Tx buffer*/
DieterGraef 0:f9b6112278fe 299 memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
DieterGraef 0:f9b6112278fe 300
DieterGraef 0:f9b6112278fe 301 /* Point to next descriptor */
DieterGraef 0:f9b6112278fe 302 DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr);
DieterGraef 0:f9b6112278fe 303
DieterGraef 0:f9b6112278fe 304 /* Check if the buffer is available */
DieterGraef 0:f9b6112278fe 305 if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
DieterGraef 0:f9b6112278fe 306 errval = ERR_USE;
DieterGraef 0:f9b6112278fe 307 goto error;
DieterGraef 0:f9b6112278fe 308 }
DieterGraef 0:f9b6112278fe 309
DieterGraef 0:f9b6112278fe 310 buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr);
DieterGraef 0:f9b6112278fe 311
DieterGraef 0:f9b6112278fe 312 byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
DieterGraef 0:f9b6112278fe 313 payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
DieterGraef 0:f9b6112278fe 314 framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
DieterGraef 0:f9b6112278fe 315 bufferoffset = 0;
DieterGraef 0:f9b6112278fe 316 }
DieterGraef 0:f9b6112278fe 317
DieterGraef 0:f9b6112278fe 318 /* Copy the remaining bytes */
DieterGraef 0:f9b6112278fe 319 memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy);
DieterGraef 0:f9b6112278fe 320 bufferoffset = bufferoffset + byteslefttocopy;
DieterGraef 0:f9b6112278fe 321 framelength = framelength + byteslefttocopy;
DieterGraef 0:f9b6112278fe 322 }
DieterGraef 0:f9b6112278fe 323
DieterGraef 0:f9b6112278fe 324 /* Prepare transmit descriptors to give to DMA */
DieterGraef 0:f9b6112278fe 325 HAL_ETH_TransmitFrame(&heth, framelength);
DieterGraef 0:f9b6112278fe 326 LWIP_DEBUGF(NETIF_DEBUG,("(SYS_Tick=0x%x)STM_low_level_output: %d bytes \r\n",HAL_GetTick() ,framelength));
DieterGraef 0:f9b6112278fe 327 errval = ERR_OK;
DieterGraef 0:f9b6112278fe 328
DieterGraef 0:f9b6112278fe 329 error:
DieterGraef 0:f9b6112278fe 330
DieterGraef 0:f9b6112278fe 331 /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
DieterGraef 0:f9b6112278fe 332 if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) {
DieterGraef 0:f9b6112278fe 333 /* Clear TUS ETHERNET DMA flag */
DieterGraef 0:f9b6112278fe 334 heth.Instance->DMASR = ETH_DMASR_TUS;
DieterGraef 0:f9b6112278fe 335
DieterGraef 0:f9b6112278fe 336 /* Resume DMA transmission*/
DieterGraef 0:f9b6112278fe 337 heth.Instance->DMATPDR = 0;
DieterGraef 0:f9b6112278fe 338 }
DieterGraef 0:f9b6112278fe 339
DieterGraef 0:f9b6112278fe 340 sys_mutex_unlock(&tx_lock_mutex);
DieterGraef 0:f9b6112278fe 341 #ifdef EMAC_TRANSMIT_WAIT
DieterGraef 0:f9b6112278fe 342 wait_us(EMAC_T_WAIT);
DieterGraef 0:f9b6112278fe 343 #endif
DieterGraef 0:f9b6112278fe 344 return errval;
DieterGraef 0:f9b6112278fe 345 }
DieterGraef 0:f9b6112278fe 346
DieterGraef 0:f9b6112278fe 347
DieterGraef 0:f9b6112278fe 348 /**
DieterGraef 0:f9b6112278fe 349 * Should allocate a pbuf and transfer the bytes of the incoming
DieterGraef 0:f9b6112278fe 350 * packet from the interface into the pbuf.
DieterGraef 0:f9b6112278fe 351 *
DieterGraef 0:f9b6112278fe 352 * @param netif the lwip network interface structure for this ethernetif
DieterGraef 0:f9b6112278fe 353 * @return a pbuf filled with the received packet (including MAC header)
DieterGraef 0:f9b6112278fe 354 * NULL on memory error
DieterGraef 0:f9b6112278fe 355 */
DieterGraef 0:f9b6112278fe 356 static struct pbuf * stm32f7_low_level_input(struct netif *netif)
DieterGraef 0:f9b6112278fe 357 {
DieterGraef 0:f9b6112278fe 358 struct pbuf *p = NULL;
DieterGraef 0:f9b6112278fe 359 struct pbuf *q = NULL;
DieterGraef 0:f9b6112278fe 360 uint16_t len = 0;
DieterGraef 0:f9b6112278fe 361 uint8_t *buffer;
DieterGraef 0:f9b6112278fe 362 __IO ETH_DMADescTypeDef *dmarxdesc;
DieterGraef 0:f9b6112278fe 363 uint32_t bufferoffset = 0;
DieterGraef 0:f9b6112278fe 364 uint32_t payloadoffset = 0;
DieterGraef 0:f9b6112278fe 365 uint32_t byteslefttocopy = 0;
DieterGraef 0:f9b6112278fe 366 uint32_t i = 0;
DieterGraef 0:f9b6112278fe 367
DieterGraef 0:f9b6112278fe 368 /* get received frame */
DieterGraef 0:f9b6112278fe 369 if (HAL_ETH_GetReceivedFrame_IT(&heth) != HAL_OK)
DieterGraef 0:f9b6112278fe 370 return NULL;
DieterGraef 0:f9b6112278fe 371
DieterGraef 0:f9b6112278fe 372 /* Obtain the size of the packet and put it into the "len" variable. */
DieterGraef 0:f9b6112278fe 373 len = heth.RxFrameInfos.length;
DieterGraef 0:f9b6112278fe 374 buffer = (uint8_t*)heth.RxFrameInfos.buffer;
DieterGraef 0:f9b6112278fe 375
DieterGraef 0:f9b6112278fe 376 if (len > 0) {
DieterGraef 0:f9b6112278fe 377 /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
DieterGraef 0:f9b6112278fe 378 p = pbuf_alloc(PBUF_RAW, len, PBUF_RAM);
DieterGraef 0:f9b6112278fe 379
DieterGraef 0:f9b6112278fe 380 }
DieterGraef 0:f9b6112278fe 381
DieterGraef 0:f9b6112278fe 382 if (p != NULL) {
DieterGraef 0:f9b6112278fe 383 dmarxdesc = heth.RxFrameInfos.FSRxDesc;
DieterGraef 0:f9b6112278fe 384 bufferoffset = 0;
DieterGraef 0:f9b6112278fe 385 for (q = p; q != NULL; q = q->next) {
DieterGraef 0:f9b6112278fe 386 byteslefttocopy = q->len;
DieterGraef 0:f9b6112278fe 387 payloadoffset = 0;
DieterGraef 0:f9b6112278fe 388
DieterGraef 0:f9b6112278fe 389 /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
DieterGraef 0:f9b6112278fe 390 while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) {
DieterGraef 0:f9b6112278fe 391 /* Copy data to pbuf */
DieterGraef 0:f9b6112278fe 392 memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
DieterGraef 0:f9b6112278fe 393 /* Point to next descriptor */
DieterGraef 0:f9b6112278fe 394 dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
DieterGraef 0:f9b6112278fe 395 buffer = (uint8_t*)(dmarxdesc->Buffer1Addr);
DieterGraef 0:f9b6112278fe 396
DieterGraef 0:f9b6112278fe 397 byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
DieterGraef 0:f9b6112278fe 398 payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
DieterGraef 0:f9b6112278fe 399 bufferoffset = 0;
DieterGraef 0:f9b6112278fe 400 }
DieterGraef 0:f9b6112278fe 401 /* Copy remaining data in pbuf */
DieterGraef 0:f9b6112278fe 402 memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
DieterGraef 0:f9b6112278fe 403 bufferoffset = bufferoffset + byteslefttocopy;
DieterGraef 0:f9b6112278fe 404 }
DieterGraef 0:f9b6112278fe 405 /* Release descriptors to DMA */
DieterGraef 0:f9b6112278fe 406 /* Point to first descriptor */
DieterGraef 0:f9b6112278fe 407 dmarxdesc = heth.RxFrameInfos.FSRxDesc;
DieterGraef 0:f9b6112278fe 408 /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
DieterGraef 0:f9b6112278fe 409 for (i = 0; i < heth.RxFrameInfos.SegCount; i++) {
DieterGraef 0:f9b6112278fe 410 dmarxdesc->Status |= ETH_DMARXDESC_OWN;
DieterGraef 0:f9b6112278fe 411 dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
DieterGraef 0:f9b6112278fe 412 }
DieterGraef 0:f9b6112278fe 413
DieterGraef 0:f9b6112278fe 414 /* Clear Segment_Count */
DieterGraef 0:f9b6112278fe 415 heth.RxFrameInfos.SegCount = 0;
DieterGraef 0:f9b6112278fe 416 LWIP_DEBUGF(NETIF_DEBUG,("(SYS_Tick=0x%x)STM_low_level_input: Packet received: %p, len %d \r\n",HAL_GetTick(),p, p->len));
DieterGraef 0:f9b6112278fe 417 }
DieterGraef 0:f9b6112278fe 418 else
DieterGraef 0:f9b6112278fe 419 {
DieterGraef 0:f9b6112278fe 420 LWIP_DEBUGF(NETIF_DEBUG,("STM_low_level_input: Packet dropped \r\n"));
DieterGraef 0:f9b6112278fe 421 }
DieterGraef 0:f9b6112278fe 422
DieterGraef 0:f9b6112278fe 423 /* When Rx Buffer unavailable flag is set: clear it and resume reception */
DieterGraef 0:f9b6112278fe 424 if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
DieterGraef 0:f9b6112278fe 425 /* Clear RBUS ETHERNET DMA flag */
DieterGraef 0:f9b6112278fe 426 heth.Instance->DMASR = ETH_DMASR_RBUS;
DieterGraef 0:f9b6112278fe 427 /* Resume DMA reception */
DieterGraef 0:f9b6112278fe 428 heth.Instance->DMARPDR = 0;
DieterGraef 0:f9b6112278fe 429 }
DieterGraef 0:f9b6112278fe 430 #ifdef EMAC_RECIVE_WAIT
DieterGraef 0:f9b6112278fe 431 wait_us(EMAC_R_WAIT);
DieterGraef 0:f9b6112278fe 432 #endif
DieterGraef 0:f9b6112278fe 433 return p;
DieterGraef 0:f9b6112278fe 434 }
DieterGraef 0:f9b6112278fe 435
DieterGraef 0:f9b6112278fe 436 /**
DieterGraef 0:f9b6112278fe 437 * This task receives input data
DieterGraef 0:f9b6112278fe 438 *
DieterGraef 0:f9b6112278fe 439 * \param[in] netif the lwip network interface structure
DieterGraef 0:f9b6112278fe 440 */
DieterGraef 0:f9b6112278fe 441 static void stm32f7_rx_task(void *arg)
DieterGraef 0:f9b6112278fe 442 {
DieterGraef 0:f9b6112278fe 443 struct netif *netif = (struct netif*)arg;
DieterGraef 0:f9b6112278fe 444 struct pbuf *p;
DieterGraef 0:f9b6112278fe 445 struct eth_hdr *ethhdr;
DieterGraef 0:f9b6112278fe 446 while (1) {
DieterGraef 0:f9b6112278fe 447 sys_arch_sem_wait(&rx_ready_sem, 0);
DieterGraef 0:f9b6112278fe 448 #ifdef LOCK_RX_THREAD
DieterGraef 0:f9b6112278fe 449 sys_mutex_lock(&tx_lock_mutex);
DieterGraef 0:f9b6112278fe 450 #endif
DieterGraef 0:f9b6112278fe 451 sysflag=0x0000;
DieterGraef 0:f9b6112278fe 452 p = stm32f7_low_level_input(netif);
DieterGraef 0:f9b6112278fe 453 if (p != NULL) {
DieterGraef 0:f9b6112278fe 454 ethhdr = p->payload;
DieterGraef 0:f9b6112278fe 455 switch (htons(ethhdr->type))
DieterGraef 0:f9b6112278fe 456 {
DieterGraef 0:f9b6112278fe 457 /* IP or ARP packet? */
DieterGraef 0:f9b6112278fe 458 case ETHTYPE_IP:
DieterGraef 0:f9b6112278fe 459 case ETHTYPE_ARP:
DieterGraef 0:f9b6112278fe 460 if (netif->input(p, netif) != ERR_OK) {
DieterGraef 0:f9b6112278fe 461 LWIP_DEBUGF(NETIF_DEBUG, ("STM_enetif_input: IP input error\n"));
DieterGraef 0:f9b6112278fe 462 pbuf_free(p);
DieterGraef 0:f9b6112278fe 463 p = NULL;
DieterGraef 0:f9b6112278fe 464 }
DieterGraef 0:f9b6112278fe 465 break;
DieterGraef 0:f9b6112278fe 466 default:
DieterGraef 0:f9b6112278fe 467 LWIP_DEBUGF(NETIF_DEBUG, ("STM_enetif_input: Payload not IP or ARP %d \r\n", p->payload));
DieterGraef 0:f9b6112278fe 468 pbuf_free(p);
DieterGraef 0:f9b6112278fe 469 p = NULL;
DieterGraef 0:f9b6112278fe 470 break;
DieterGraef 0:f9b6112278fe 471 }
DieterGraef 0:f9b6112278fe 472
DieterGraef 0:f9b6112278fe 473 }
DieterGraef 0:f9b6112278fe 474 #ifdef LOCK_RX_THREAD
DieterGraef 0:f9b6112278fe 475 sys_mutex_unlock(&tx_lock_mutex);
DieterGraef 0:f9b6112278fe 476 #endif
DieterGraef 0:f9b6112278fe 477 }
DieterGraef 0:f9b6112278fe 478 }
DieterGraef 0:f9b6112278fe 479
DieterGraef 0:f9b6112278fe 480 /**
DieterGraef 0:f9b6112278fe 481 * This task checks phy link status and updates net status
DieterGraef 0:f9b6112278fe 482 *
DieterGraef 0:f9b6112278fe 483 * \param[in] netif the lwip network interface structure
DieterGraef 0:f9b6112278fe 484 */
DieterGraef 0:f9b6112278fe 485 static void stm32f7_phy_task(void *arg)
DieterGraef 0:f9b6112278fe 486 {
DieterGraef 0:f9b6112278fe 487 struct netif *netif = (struct netif*)arg;
DieterGraef 0:f9b6112278fe 488
DieterGraef 0:f9b6112278fe 489
DieterGraef 0:f9b6112278fe 490 while (1) {
DieterGraef 0:f9b6112278fe 491 uint32_t status;
DieterGraef 0:f9b6112278fe 492 if (HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &status) == HAL_OK)
DieterGraef 0:f9b6112278fe 493 {
DieterGraef 0:f9b6112278fe 494 if (phy_status != status)
DieterGraef 0:f9b6112278fe 495 {
DieterGraef 0:f9b6112278fe 496 if (status & PHY_LINKED_STATUS )
DieterGraef 0:f9b6112278fe 497 {
DieterGraef 0:f9b6112278fe 498 tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
DieterGraef 0:f9b6112278fe 499 }
DieterGraef 0:f9b6112278fe 500 else
DieterGraef 0:f9b6112278fe 501 {
DieterGraef 0:f9b6112278fe 502 tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
DieterGraef 0:f9b6112278fe 503 }
DieterGraef 0:f9b6112278fe 504 }
DieterGraef 0:f9b6112278fe 505 }
DieterGraef 0:f9b6112278fe 506 phy_status = status;
DieterGraef 0:f9b6112278fe 507 }
DieterGraef 0:f9b6112278fe 508
DieterGraef 0:f9b6112278fe 509 osDelay(PHY_TASK_WAIT);
DieterGraef 0:f9b6112278fe 510
DieterGraef 0:f9b6112278fe 511 }
DieterGraef 0:f9b6112278fe 512
DieterGraef 0:f9b6112278fe 513 /**
DieterGraef 0:f9b6112278fe 514 * This function is the ethernet packet send function. It calls
DieterGraef 0:f9b6112278fe 515 * etharp_output after checking link status.
DieterGraef 0:f9b6112278fe 516 *
DieterGraef 0:f9b6112278fe 517 * \param[in] netif the lwip network interface structure for this lpc_enetif
DieterGraef 0:f9b6112278fe 518 * \param[in] q Pointer to pbug to send
DieterGraef 0:f9b6112278fe 519 * \param[in] ipaddr IP address
DieterGraef 0:f9b6112278fe 520 * \return ERR_OK or error code
DieterGraef 0:f9b6112278fe 521 */
DieterGraef 0:f9b6112278fe 522 static err_t stm32f7_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)
DieterGraef 0:f9b6112278fe 523 {
DieterGraef 0:f9b6112278fe 524 /* Only send packet is link is up */
DieterGraef 0:f9b6112278fe 525 if (netif->flags & NETIF_FLAG_LINK_UP) {
DieterGraef 0:f9b6112278fe 526 return etharp_output(netif, q, ipaddr);
DieterGraef 0:f9b6112278fe 527 }
DieterGraef 0:f9b6112278fe 528
DieterGraef 0:f9b6112278fe 529 return ERR_CONN;
DieterGraef 0:f9b6112278fe 530 }
DieterGraef 0:f9b6112278fe 531
DieterGraef 0:f9b6112278fe 532 /**
DieterGraef 0:f9b6112278fe 533 * Should be called at the beginning of the program to set up the
DieterGraef 0:f9b6112278fe 534 * network interface.
DieterGraef 0:f9b6112278fe 535 *
DieterGraef 0:f9b6112278fe 536 * This function should be passed as a parameter to netif_add().
DieterGraef 0:f9b6112278fe 537 *
DieterGraef 0:f9b6112278fe 538 * @param[in] netif the lwip network interface structure for this lpc_enetif
DieterGraef 0:f9b6112278fe 539 * @return ERR_OK if the loopif is initialized
DieterGraef 0:f9b6112278fe 540 * ERR_MEM if private data couldn't be allocated
DieterGraef 0:f9b6112278fe 541 * any other err_t on error
DieterGraef 0:f9b6112278fe 542 */
DieterGraef 0:f9b6112278fe 543 err_t eth_arch_enetif_init(struct netif *netif)
DieterGraef 0:f9b6112278fe 544 {
DieterGraef 0:f9b6112278fe 545 /* set MAC hardware address */
DieterGraef 0:f9b6112278fe 546 netif->hwaddr_len = ETHARP_HWADDR_LEN;
DieterGraef 0:f9b6112278fe 547
DieterGraef 0:f9b6112278fe 548
DieterGraef 0:f9b6112278fe 549 /* set netif MAC hardware address */
DieterGraef 0:f9b6112278fe 550 netif->hwaddr[0] = MAC_ADDR_0;
DieterGraef 0:f9b6112278fe 551 netif->hwaddr[1] = MAC_ADDR_1;
DieterGraef 0:f9b6112278fe 552 netif->hwaddr[2] = MAC_ADDR_2;
DieterGraef 0:f9b6112278fe 553 netif->hwaddr[3] = MAC_ADDR_3;
DieterGraef 0:f9b6112278fe 554 netif->hwaddr[4] = MAC_ADDR_4;
DieterGraef 0:f9b6112278fe 555 netif->hwaddr[5] = MAC_ADDR_5;
DieterGraef 0:f9b6112278fe 556
DieterGraef 0:f9b6112278fe 557 /* maximum transfer unit */
DieterGraef 0:f9b6112278fe 558 netif->mtu = 1500;
DieterGraef 0:f9b6112278fe 559
DieterGraef 0:f9b6112278fe 560 /* device capabilities */
DieterGraef 0:f9b6112278fe 561 //netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
DieterGraef 0:f9b6112278fe 562
DieterGraef 0:f9b6112278fe 563 netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
DieterGraef 0:f9b6112278fe 564
DieterGraef 0:f9b6112278fe 565 #if LWIP_NETIF_HOSTNAME
DieterGraef 0:f9b6112278fe 566 /* Initialize interface hostname */
DieterGraef 0:f9b6112278fe 567 netif->hostname = NETIF_HOSTNAME;
DieterGraef 0:f9b6112278fe 568 #endif /* LWIP_NETIF_HOSTNAME */
DieterGraef 0:f9b6112278fe 569
DieterGraef 0:f9b6112278fe 570 netif->name[0] = 'e';
DieterGraef 0:f9b6112278fe 571 netif->name[1] = 'n';
DieterGraef 0:f9b6112278fe 572
DieterGraef 0:f9b6112278fe 573 netif->output = stm32f7_etharp_output;
DieterGraef 0:f9b6112278fe 574 netif->linkoutput = stm32f7_low_level_output;
DieterGraef 0:f9b6112278fe 575
DieterGraef 0:f9b6112278fe 576 /* semaphore */
DieterGraef 0:f9b6112278fe 577 sys_sem_new(&rx_ready_sem, 0);
DieterGraef 0:f9b6112278fe 578
DieterGraef 0:f9b6112278fe 579 sys_mutex_new(&tx_lock_mutex);
DieterGraef 0:f9b6112278fe 580
DieterGraef 0:f9b6112278fe 581 /* task */
DieterGraef 0:f9b6112278fe 582 sys_thread_new("recv_task", stm32f7_rx_task, netif, EMAC_RECIVE_THREAD_STACKSIZE, RECV_TASK_PRI);
DieterGraef 0:f9b6112278fe 583 sys_thread_new("phy_task", stm32f7_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
DieterGraef 0:f9b6112278fe 584
DieterGraef 0:f9b6112278fe 585 /* initialize the hardware */
DieterGraef 0:f9b6112278fe 586 stm32f7_low_level_init(netif);
DieterGraef 0:f9b6112278fe 587 netif_set_link_down(netif);
DieterGraef 0:f9b6112278fe 588 HAL_Delay(100);
DieterGraef 0:f9b6112278fe 589 phy_status=0;
DieterGraef 0:f9b6112278fe 590 return ERR_OK;
DieterGraef 0:f9b6112278fe 591 }
DieterGraef 0:f9b6112278fe 592
DieterGraef 0:f9b6112278fe 593 void eth_arch_enable_interrupts(void)
DieterGraef 0:f9b6112278fe 594 {
DieterGraef 0:f9b6112278fe 595 /* Enable the Ethernet global Interrupt */
DieterGraef 0:f9b6112278fe 596 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
DieterGraef 0:f9b6112278fe 597 HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
DieterGraef 0:f9b6112278fe 598 HAL_NVIC_EnableIRQ(ETH_IRQn);
DieterGraef 0:f9b6112278fe 599 }
DieterGraef 0:f9b6112278fe 600
DieterGraef 0:f9b6112278fe 601 void eth_arch_disable_interrupts(void)
DieterGraef 0:f9b6112278fe 602 {
DieterGraef 0:f9b6112278fe 603 NVIC_DisableIRQ(ETH_IRQn);
DieterGraef 0:f9b6112278fe 604 }
DieterGraef 0:f9b6112278fe 605
DieterGraef 0:f9b6112278fe 606 /**
DieterGraef 0:f9b6112278fe 607 * @}
DieterGraef 0:f9b6112278fe 608 */
DieterGraef 0:f9b6112278fe 609
DieterGraef 0:f9b6112278fe 610 /* --------------------------------- End Of File ------------------------------ */