Tamura Mizuki / STM32F746_FFT

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Dependencies:   BSP_DISCO_F746NG SDFileSystem_Warning_Fixed

mbed_src_STM32F7/api/SPI.h@3:6f7e05dd8d15, 2020-03-06 (annotated)

Committer:
aria19970520
Date:
Fri Mar 06 06:52:14 2020 +0000
Revision:
3:6f7e05dd8d15
Parent:
0:3e46577dc273 
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MikamiUitOpen 0:3e46577dc273 1 /* mbed Microcontroller Library
MikamiUitOpen 0:3e46577dc273 2 * Copyright (c) 2006-2015 ARM Limited
MikamiUitOpen 0:3e46577dc273 3 *
MikamiUitOpen 0:3e46577dc273 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 0:3e46577dc273 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 0:3e46577dc273 6 * You may obtain a copy of the License at
MikamiUitOpen 0:3e46577dc273 7 *
MikamiUitOpen 0:3e46577dc273 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 0:3e46577dc273 9 *
MikamiUitOpen 0:3e46577dc273 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 0:3e46577dc273 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 0:3e46577dc273 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 0:3e46577dc273 13 * See the License for the specific language governing permissions and
MikamiUitOpen 0:3e46577dc273 14 * limitations under the License.
MikamiUitOpen 0:3e46577dc273 15 */
MikamiUitOpen 0:3e46577dc273 16 #ifndef MBED_SPI_H
MikamiUitOpen 0:3e46577dc273 17 #define MBED_SPI_H
MikamiUitOpen 0:3e46577dc273 18
MikamiUitOpen 0:3e46577dc273 19 #include "platform.h"
MikamiUitOpen 0:3e46577dc273 20
MikamiUitOpen 0:3e46577dc273 21 #if DEVICE_SPI
MikamiUitOpen 0:3e46577dc273 22
MikamiUitOpen 0:3e46577dc273 23 #include "spi_api.h"
MikamiUitOpen 0:3e46577dc273 24
MikamiUitOpen 0:3e46577dc273 25 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:3e46577dc273 26 #include "CThunk.h"
MikamiUitOpen 0:3e46577dc273 27 #include "dma_api.h"
MikamiUitOpen 0:3e46577dc273 28 #include "CircularBuffer.h"
MikamiUitOpen 0:3e46577dc273 29 #include "FunctionPointer.h"
MikamiUitOpen 0:3e46577dc273 30 #include "Transaction.h"
MikamiUitOpen 0:3e46577dc273 31 #endif
MikamiUitOpen 0:3e46577dc273 32
MikamiUitOpen 0:3e46577dc273 33 namespace mbed {
MikamiUitOpen 0:3e46577dc273 34
MikamiUitOpen 0:3e46577dc273 35 /** A SPI Master, used for communicating with SPI slave devices
MikamiUitOpen 0:3e46577dc273 36 *
MikamiUitOpen 0:3e46577dc273 37 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
MikamiUitOpen 0:3e46577dc273 38 *
MikamiUitOpen 0:3e46577dc273 39 * Most SPI devices will also require Chip Select and Reset signals. These
MikamiUitOpen 0:3e46577dc273 40 * can be controlled using <DigitalOut> pins
MikamiUitOpen 0:3e46577dc273 41 *
MikamiUitOpen 0:3e46577dc273 42 * Example:
MikamiUitOpen 0:3e46577dc273 43 * @code
MikamiUitOpen 0:3e46577dc273 44 * // Send a byte to a SPI slave, and record the response
MikamiUitOpen 0:3e46577dc273 45 *
MikamiUitOpen 0:3e46577dc273 46 * #include "mbed.h"
MikamiUitOpen 0:3e46577dc273 47 *
MikamiUitOpen 0:3e46577dc273 48 * // hardware ssel (where applicable)
MikamiUitOpen 0:3e46577dc273 49 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
MikamiUitOpen 0:3e46577dc273 50 *
MikamiUitOpen 0:3e46577dc273 51 * // software ssel
MikamiUitOpen 0:3e46577dc273 52 * SPI device(p5, p6, p7); // mosi, miso, sclk
MikamiUitOpen 0:3e46577dc273 53 * DigitalOut cs(p8); // ssel
MikamiUitOpen 0:3e46577dc273 54 *
MikamiUitOpen 0:3e46577dc273 55 * int main() {
MikamiUitOpen 0:3e46577dc273 56 * // hardware ssel (where applicable)
MikamiUitOpen 0:3e46577dc273 57 * //int response = device.write(0xFF);
MikamiUitOpen 0:3e46577dc273 58 *
MikamiUitOpen 0:3e46577dc273 59 * // software ssel
MikamiUitOpen 0:3e46577dc273 60 * cs = 0;
MikamiUitOpen 0:3e46577dc273 61 * int response = device.write(0xFF);
MikamiUitOpen 0:3e46577dc273 62 * cs = 1;
MikamiUitOpen 0:3e46577dc273 63 * }
MikamiUitOpen 0:3e46577dc273 64 * @endcode
MikamiUitOpen 0:3e46577dc273 65 */
MikamiUitOpen 0:3e46577dc273 66 class SPI {
MikamiUitOpen 0:3e46577dc273 67
MikamiUitOpen 0:3e46577dc273 68 public:
MikamiUitOpen 0:3e46577dc273 69
MikamiUitOpen 0:3e46577dc273 70 /** Create a SPI master connected to the specified pins
MikamiUitOpen 0:3e46577dc273 71 *
MikamiUitOpen 0:3e46577dc273 72 * mosi or miso can be specfied as NC if not used
MikamiUitOpen 0:3e46577dc273 73 *
MikamiUitOpen 0:3e46577dc273 74 * @param mosi SPI Master Out, Slave In pin
MikamiUitOpen 0:3e46577dc273 75 * @param miso SPI Master In, Slave Out pin
MikamiUitOpen 0:3e46577dc273 76 * @param sclk SPI Clock pin
MikamiUitOpen 0:3e46577dc273 77 * @param ssel SPI chip select pin
MikamiUitOpen 0:3e46577dc273 78 */
MikamiUitOpen 0:3e46577dc273 79 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
MikamiUitOpen 0:3e46577dc273 80
MikamiUitOpen 0:3e46577dc273 81 /** Configure the data transmission format
MikamiUitOpen 0:3e46577dc273 82 *
MikamiUitOpen 0:3e46577dc273 83 * @param bits Number of bits per SPI frame (4 - 16)
MikamiUitOpen 0:3e46577dc273 84 * @param mode Clock polarity and phase mode (0 - 3)
MikamiUitOpen 0:3e46577dc273 85 *
MikamiUitOpen 0:3e46577dc273 86 * @code
MikamiUitOpen 0:3e46577dc273 87 * mode | POL PHA
MikamiUitOpen 0:3e46577dc273 88 * -----+--------
MikamiUitOpen 0:3e46577dc273 89 * 0 | 0 0
MikamiUitOpen 0:3e46577dc273 90 * 1 | 0 1
MikamiUitOpen 0:3e46577dc273 91 * 2 | 1 0
MikamiUitOpen 0:3e46577dc273 92 * 3 | 1 1
MikamiUitOpen 0:3e46577dc273 93 * @endcode
MikamiUitOpen 0:3e46577dc273 94 */
MikamiUitOpen 0:3e46577dc273 95 void format(int bits, int mode = 0);
MikamiUitOpen 0:3e46577dc273 96
MikamiUitOpen 0:3e46577dc273 97 /** Set the spi bus clock frequency
MikamiUitOpen 0:3e46577dc273 98 *
MikamiUitOpen 0:3e46577dc273 99 * @param hz SCLK frequency in hz (default = 1MHz)
MikamiUitOpen 0:3e46577dc273 100 */
MikamiUitOpen 0:3e46577dc273 101 void frequency(int hz = 1000000);
MikamiUitOpen 0:3e46577dc273 102
MikamiUitOpen 0:3e46577dc273 103 /** Write to the SPI Slave and return the response
MikamiUitOpen 0:3e46577dc273 104 *
MikamiUitOpen 0:3e46577dc273 105 * @param value Data to be sent to the SPI slave
MikamiUitOpen 0:3e46577dc273 106 *
MikamiUitOpen 0:3e46577dc273 107 * @returns
MikamiUitOpen 0:3e46577dc273 108 * Response from the SPI slave
MikamiUitOpen 0:3e46577dc273 109 */
MikamiUitOpen 0:3e46577dc273 110 virtual int write(int value);
MikamiUitOpen 0:3e46577dc273 111
MikamiUitOpen 0:3e46577dc273 112 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:3e46577dc273 113
MikamiUitOpen 0:3e46577dc273 114 /** Start non-blocking SPI transfer using 8bit buffers.
MikamiUitOpen 0:3e46577dc273 115 *
MikamiUitOpen 0:3e46577dc273 116 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 117 * the default SPI value is sent
MikamiUitOpen 0:3e46577dc273 118 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 0:3e46577dc273 119 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 120 * received data are ignored
MikamiUitOpen 0:3e46577dc273 121 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 0:3e46577dc273 122 * @param callback The event callback function
MikamiUitOpen 0:3e46577dc273 123 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
MikamiUitOpen 0:3e46577dc273 124 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
MikamiUitOpen 0:3e46577dc273 125 */
MikamiUitOpen 0:3e46577dc273 126 template<typename Type>
MikamiUitOpen 0:3e46577dc273 127 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
MikamiUitOpen 0:3e46577dc273 128 if (spi_active(&_spi)) {
MikamiUitOpen 0:3e46577dc273 129 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
MikamiUitOpen 0:3e46577dc273 130 }
MikamiUitOpen 0:3e46577dc273 131 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
MikamiUitOpen 0:3e46577dc273 132 return 0;
MikamiUitOpen 0:3e46577dc273 133 }
MikamiUitOpen 0:3e46577dc273 134
MikamiUitOpen 0:3e46577dc273 135 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
MikamiUitOpen 0:3e46577dc273 136 */
MikamiUitOpen 0:3e46577dc273 137 void abort_transfer();
MikamiUitOpen 0:3e46577dc273 138
MikamiUitOpen 0:3e46577dc273 139 /** Clear the transaction buffer
MikamiUitOpen 0:3e46577dc273 140 */
MikamiUitOpen 0:3e46577dc273 141 void clear_transfer_buffer();
MikamiUitOpen 0:3e46577dc273 142
MikamiUitOpen 0:3e46577dc273 143 /** Clear the transaction buffer and abort on-going transfer.
MikamiUitOpen 0:3e46577dc273 144 */
MikamiUitOpen 0:3e46577dc273 145 void abort_all_transfers();
MikamiUitOpen 0:3e46577dc273 146
MikamiUitOpen 0:3e46577dc273 147 /** Configure DMA usage suggestion for non-blocking transfers
MikamiUitOpen 0:3e46577dc273 148 *
MikamiUitOpen 0:3e46577dc273 149 * @param usage The usage DMA hint for peripheral
MikamiUitOpen 0:3e46577dc273 150 * @return Zero if the usage was set, -1 if a transaction is on-going
MikamiUitOpen 0:3e46577dc273 151 */
MikamiUitOpen 0:3e46577dc273 152 int set_dma_usage(DMAUsage usage);
MikamiUitOpen 0:3e46577dc273 153
MikamiUitOpen 0:3e46577dc273 154 protected:
MikamiUitOpen 0:3e46577dc273 155 /** SPI IRQ handler
MikamiUitOpen 0:3e46577dc273 156 *
MikamiUitOpen 0:3e46577dc273 157 */
MikamiUitOpen 0:3e46577dc273 158 void irq_handler_asynch(void);
MikamiUitOpen 0:3e46577dc273 159
MikamiUitOpen 0:3e46577dc273 160 /** Common transfer method
MikamiUitOpen 0:3e46577dc273 161 *
MikamiUitOpen 0:3e46577dc273 162 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 163 * the default SPI value is sent
MikamiUitOpen 0:3e46577dc273 164 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 0:3e46577dc273 165 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 166 * received data are ignored
MikamiUitOpen 0:3e46577dc273 167 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 0:3e46577dc273 168 * @param bit_width The buffers element width
MikamiUitOpen 0:3e46577dc273 169 * @param callback The event callback function
MikamiUitOpen 0:3e46577dc273 170 * @param event The logical OR of events to modify
MikamiUitOpen 0:3e46577dc273 171 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
MikamiUitOpen 0:3e46577dc273 172 */
MikamiUitOpen 0:3e46577dc273 173 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 0:3e46577dc273 174
MikamiUitOpen 0:3e46577dc273 175 /**
MikamiUitOpen 0:3e46577dc273 176 *
MikamiUitOpen 0:3e46577dc273 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 178 * the default SPI value is sent
MikamiUitOpen 0:3e46577dc273 179 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 0:3e46577dc273 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 181 * received data are ignored
MikamiUitOpen 0:3e46577dc273 182 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 0:3e46577dc273 183 * @param bit_width The buffers element width
MikamiUitOpen 0:3e46577dc273 184 * @param callback The event callback function
MikamiUitOpen 0:3e46577dc273 185 * @param event The logical OR of events to modify
MikamiUitOpen 0:3e46577dc273 186 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
MikamiUitOpen 0:3e46577dc273 187 */
MikamiUitOpen 0:3e46577dc273 188 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 0:3e46577dc273 189
MikamiUitOpen 0:3e46577dc273 190 /** Configures a callback, spi peripheral and initiate a new transfer
MikamiUitOpen 0:3e46577dc273 191 *
MikamiUitOpen 0:3e46577dc273 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 193 * the default SPI value is sent
MikamiUitOpen 0:3e46577dc273 194 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 0:3e46577dc273 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 0:3e46577dc273 196 * received data are ignored
MikamiUitOpen 0:3e46577dc273 197 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 0:3e46577dc273 198 * @param bit_width The buffers element width
MikamiUitOpen 0:3e46577dc273 199 * @param callback The event callback function
MikamiUitOpen 0:3e46577dc273 200 * @param event The logical OR of events to modify
MikamiUitOpen 0:3e46577dc273 201 */
MikamiUitOpen 0:3e46577dc273 202 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 0:3e46577dc273 203
MikamiUitOpen 0:3e46577dc273 204 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:3e46577dc273 205
MikamiUitOpen 0:3e46577dc273 206 /** Start a new transaction
MikamiUitOpen 0:3e46577dc273 207 *
MikamiUitOpen 0:3e46577dc273 208 * @param data Transaction data
MikamiUitOpen 0:3e46577dc273 209 */
MikamiUitOpen 0:3e46577dc273 210 void start_transaction(transaction_t *data);
MikamiUitOpen 0:3e46577dc273 211
MikamiUitOpen 0:3e46577dc273 212 /** Dequeue a transaction
MikamiUitOpen 0:3e46577dc273 213 *
MikamiUitOpen 0:3e46577dc273 214 */
MikamiUitOpen 0:3e46577dc273 215 void dequeue_transaction();
MikamiUitOpen 0:3e46577dc273 216 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
MikamiUitOpen 0:3e46577dc273 217 #endif
MikamiUitOpen 0:3e46577dc273 218
MikamiUitOpen 0:3e46577dc273 219 #endif
MikamiUitOpen 0:3e46577dc273 220
MikamiUitOpen 0:3e46577dc273 221 public:
MikamiUitOpen 0:3e46577dc273 222 virtual ~SPI() {
MikamiUitOpen 0:3e46577dc273 223 }
MikamiUitOpen 0:3e46577dc273 224
MikamiUitOpen 0:3e46577dc273 225 protected:
MikamiUitOpen 0:3e46577dc273 226 spi_t _spi;
MikamiUitOpen 0:3e46577dc273 227
MikamiUitOpen 0:3e46577dc273 228 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:3e46577dc273 229 CThunk<SPI> _irq;
MikamiUitOpen 0:3e46577dc273 230 event_callback_t _callback;
MikamiUitOpen 0:3e46577dc273 231 DMAUsage _usage;
MikamiUitOpen 0:3e46577dc273 232 #endif
MikamiUitOpen 0:3e46577dc273 233
MikamiUitOpen 0:3e46577dc273 234 void aquire(void);
MikamiUitOpen 0:3e46577dc273 235 static SPI *_owner;
MikamiUitOpen 0:3e46577dc273 236 int _bits;
MikamiUitOpen 0:3e46577dc273 237 int _mode;
MikamiUitOpen 0:3e46577dc273 238 int _hz;
MikamiUitOpen 0:3e46577dc273 239 };
MikamiUitOpen 0:3e46577dc273 240
MikamiUitOpen 0:3e46577dc273 241 } // namespace mbed
MikamiUitOpen 0:3e46577dc273 242
MikamiUitOpen 0:3e46577dc273 243 #endif
MikamiUitOpen 0:3e46577dc273 244
MikamiUitOpen 0:3e46577dc273 245 #endif