mbed.h library with any bug fixes AV finds.
Dependents: micromouse4_encoder_testing PID_Test Lab1_Test WorkingPID ... more
targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c@1:ebce2ad32f95, 2015-11-02 (annotated)
- Committer:
- aravindsv
- Date:
- Mon Nov 02 03:07:12 2015 +0000
- Revision:
- 1:ebce2ad32f95
- Parent:
- 0:ba7650f404af
Changed the RCC timeout value to 500 ms, so total code startup time before program starts running is ~1s. Hopefully no side-effects from lower startup timeouts
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
aravindsv | 0:ba7650f404af | 1 | /* mbed Microcontroller Library |
aravindsv | 0:ba7650f404af | 2 | ******************************************************************************* |
aravindsv | 0:ba7650f404af | 3 | * Copyright (c) 2014, STMicroelectronics |
aravindsv | 0:ba7650f404af | 4 | * All rights reserved. |
aravindsv | 0:ba7650f404af | 5 | * |
aravindsv | 0:ba7650f404af | 6 | * Redistribution and use in source and binary forms, with or without |
aravindsv | 0:ba7650f404af | 7 | * modification, are permitted provided that the following conditions are met: |
aravindsv | 0:ba7650f404af | 8 | * |
aravindsv | 0:ba7650f404af | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
aravindsv | 0:ba7650f404af | 10 | * this list of conditions and the following disclaimer. |
aravindsv | 0:ba7650f404af | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
aravindsv | 0:ba7650f404af | 12 | * this list of conditions and the following disclaimer in the documentation |
aravindsv | 0:ba7650f404af | 13 | * and/or other materials provided with the distribution. |
aravindsv | 0:ba7650f404af | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
aravindsv | 0:ba7650f404af | 15 | * may be used to endorse or promote products derived from this software |
aravindsv | 0:ba7650f404af | 16 | * without specific prior written permission. |
aravindsv | 0:ba7650f404af | 17 | * |
aravindsv | 0:ba7650f404af | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
aravindsv | 0:ba7650f404af | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
aravindsv | 0:ba7650f404af | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
aravindsv | 0:ba7650f404af | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
aravindsv | 0:ba7650f404af | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
aravindsv | 0:ba7650f404af | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
aravindsv | 0:ba7650f404af | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
aravindsv | 0:ba7650f404af | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
aravindsv | 0:ba7650f404af | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
aravindsv | 0:ba7650f404af | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
aravindsv | 0:ba7650f404af | 28 | ******************************************************************************* |
aravindsv | 0:ba7650f404af | 29 | */ |
aravindsv | 0:ba7650f404af | 30 | #include "sleep_api.h" |
aravindsv | 0:ba7650f404af | 31 | |
aravindsv | 0:ba7650f404af | 32 | #if DEVICE_SLEEP |
aravindsv | 0:ba7650f404af | 33 | |
aravindsv | 0:ba7650f404af | 34 | #include "cmsis.h" |
aravindsv | 0:ba7650f404af | 35 | |
aravindsv | 0:ba7650f404af | 36 | static TIM_HandleTypeDef TimMasterHandle; |
aravindsv | 0:ba7650f404af | 37 | |
aravindsv | 0:ba7650f404af | 38 | void sleep(void) |
aravindsv | 0:ba7650f404af | 39 | { |
aravindsv | 0:ba7650f404af | 40 | // Disable HAL tick interrupt |
aravindsv | 0:ba7650f404af | 41 | TimMasterHandle.Instance = TIM5; |
aravindsv | 0:ba7650f404af | 42 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
aravindsv | 0:ba7650f404af | 43 | |
aravindsv | 0:ba7650f404af | 44 | // Request to enter SLEEP mode |
aravindsv | 0:ba7650f404af | 45 | HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); |
aravindsv | 0:ba7650f404af | 46 | |
aravindsv | 0:ba7650f404af | 47 | // Enable HAL tick interrupt |
aravindsv | 0:ba7650f404af | 48 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
aravindsv | 0:ba7650f404af | 49 | } |
aravindsv | 0:ba7650f404af | 50 | |
aravindsv | 0:ba7650f404af | 51 | void deepsleep(void) |
aravindsv | 0:ba7650f404af | 52 | { |
aravindsv | 0:ba7650f404af | 53 | #if defined(TARGET_MOTE_L152RC) |
aravindsv | 0:ba7650f404af | 54 | int8_t STOPEntry = PWR_STOPENTRY_WFI; |
aravindsv | 0:ba7650f404af | 55 | #endif |
aravindsv | 0:ba7650f404af | 56 | |
aravindsv | 0:ba7650f404af | 57 | // Disable HAL tick interrupt |
aravindsv | 0:ba7650f404af | 58 | TimMasterHandle.Instance = TIM5; |
aravindsv | 0:ba7650f404af | 59 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
aravindsv | 0:ba7650f404af | 60 | |
aravindsv | 0:ba7650f404af | 61 | #if defined(TARGET_MOTE_L152RC) |
aravindsv | 0:ba7650f404af | 62 | /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ |
aravindsv | 0:ba7650f404af | 63 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), PWR_LOWPOWERREGULATOR_ON); |
aravindsv | 0:ba7650f404af | 64 | |
aravindsv | 0:ba7650f404af | 65 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
aravindsv | 0:ba7650f404af | 66 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
aravindsv | 0:ba7650f404af | 67 | |
aravindsv | 0:ba7650f404af | 68 | /* Select Stop mode entry --------------------------------------------------*/ |
aravindsv | 0:ba7650f404af | 69 | if(STOPEntry == PWR_STOPENTRY_WFI) |
aravindsv | 0:ba7650f404af | 70 | { |
aravindsv | 0:ba7650f404af | 71 | /* Request Wait For Interrupt */ |
aravindsv | 0:ba7650f404af | 72 | __WFI(); |
aravindsv | 0:ba7650f404af | 73 | } |
aravindsv | 0:ba7650f404af | 74 | else |
aravindsv | 0:ba7650f404af | 75 | { |
aravindsv | 0:ba7650f404af | 76 | /* Request Wait For Event */ |
aravindsv | 0:ba7650f404af | 77 | __SEV(); |
aravindsv | 0:ba7650f404af | 78 | __WFE(); |
aravindsv | 0:ba7650f404af | 79 | __WFE(); |
aravindsv | 0:ba7650f404af | 80 | } |
aravindsv | 0:ba7650f404af | 81 | __NOP(); |
aravindsv | 0:ba7650f404af | 82 | __NOP(); |
aravindsv | 0:ba7650f404af | 83 | __NOP(); |
aravindsv | 0:ba7650f404af | 84 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
aravindsv | 0:ba7650f404af | 85 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
aravindsv | 0:ba7650f404af | 86 | #else |
aravindsv | 0:ba7650f404af | 87 | // Request to enter STOP mode with regulator in low power mode |
aravindsv | 0:ba7650f404af | 88 | HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); |
aravindsv | 0:ba7650f404af | 89 | #endif |
aravindsv | 0:ba7650f404af | 90 | |
aravindsv | 0:ba7650f404af | 91 | // After wake-up from STOP reconfigure the PLL |
aravindsv | 0:ba7650f404af | 92 | SetSysClock(); |
aravindsv | 0:ba7650f404af | 93 | |
aravindsv | 0:ba7650f404af | 94 | // Enable HAL tick interrupt |
aravindsv | 0:ba7650f404af | 95 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
aravindsv | 0:ba7650f404af | 96 | } |
aravindsv | 0:ba7650f404af | 97 | |
aravindsv | 0:ba7650f404af | 98 | #endif |