mbed.h library with any bug fixes AV finds.
Dependents: micromouse4_encoder_testing PID_Test Lab1_Test WorkingPID ... more
targets/hal/TARGET_NXP/TARGET_LPC81X/sleep.c@1:ebce2ad32f95, 2015-11-02 (annotated)
- Committer:
- aravindsv
- Date:
- Mon Nov 02 03:07:12 2015 +0000
- Revision:
- 1:ebce2ad32f95
- Parent:
- 0:ba7650f404af
Changed the RCC timeout value to 500 ms, so total code startup time before program starts running is ~1s. Hopefully no side-effects from lower startup timeouts
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
aravindsv | 0:ba7650f404af | 1 | /* mbed Microcontroller Library |
aravindsv | 0:ba7650f404af | 2 | * Copyright (c) 2006-2013 ARM Limited |
aravindsv | 0:ba7650f404af | 3 | * |
aravindsv | 0:ba7650f404af | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
aravindsv | 0:ba7650f404af | 5 | * you may not use this file except in compliance with the License. |
aravindsv | 0:ba7650f404af | 6 | * You may obtain a copy of the License at |
aravindsv | 0:ba7650f404af | 7 | * |
aravindsv | 0:ba7650f404af | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
aravindsv | 0:ba7650f404af | 9 | * |
aravindsv | 0:ba7650f404af | 10 | * Unless required by applicable law or agreed to in writing, software |
aravindsv | 0:ba7650f404af | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
aravindsv | 0:ba7650f404af | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
aravindsv | 0:ba7650f404af | 13 | * See the License for the specific language governing permissions and |
aravindsv | 0:ba7650f404af | 14 | * limitations under the License. |
aravindsv | 0:ba7650f404af | 15 | */ |
aravindsv | 0:ba7650f404af | 16 | #include "sleep_api.h" |
aravindsv | 0:ba7650f404af | 17 | #include "cmsis.h" |
aravindsv | 0:ba7650f404af | 18 | |
aravindsv | 0:ba7650f404af | 19 | |
aravindsv | 0:ba7650f404af | 20 | //#define DEEPSLEEP |
aravindsv | 0:ba7650f404af | 21 | #define POWERDOWN |
aravindsv | 0:ba7650f404af | 22 | |
aravindsv | 0:ba7650f404af | 23 | void sleep(void) { |
aravindsv | 0:ba7650f404af | 24 | //Normal sleep mode for PCON: |
aravindsv | 0:ba7650f404af | 25 | LPC_PMU->PCON &= ~0x03; |
aravindsv | 0:ba7650f404af | 26 | |
aravindsv | 0:ba7650f404af | 27 | //Normal sleep mode for ARM core: |
aravindsv | 0:ba7650f404af | 28 | SCB->SCR = 0; |
aravindsv | 0:ba7650f404af | 29 | |
aravindsv | 0:ba7650f404af | 30 | //And go to sleep |
aravindsv | 0:ba7650f404af | 31 | __WFI(); |
aravindsv | 0:ba7650f404af | 32 | } |
aravindsv | 0:ba7650f404af | 33 | |
aravindsv | 0:ba7650f404af | 34 | |
aravindsv | 0:ba7650f404af | 35 | |
aravindsv | 0:ba7650f404af | 36 | //Deepsleep/powerdown modes assume the device is configured to use its internal RC oscillator directly |
aravindsv | 0:ba7650f404af | 37 | |
aravindsv | 0:ba7650f404af | 38 | #ifdef DEEPSLEEP |
aravindsv | 0:ba7650f404af | 39 | void deepsleep(void) { |
aravindsv | 0:ba7650f404af | 40 | //Deep sleep in PCON |
aravindsv | 0:ba7650f404af | 41 | LPC_PMU->PCON &= ~0x03; |
aravindsv | 0:ba7650f404af | 42 | LPC_PMU->PCON |= 0x01; |
aravindsv | 0:ba7650f404af | 43 | |
aravindsv | 0:ba7650f404af | 44 | //If brownout detection and WDT are enabled, keep them enabled during sleep |
aravindsv | 0:ba7650f404af | 45 | LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG; |
aravindsv | 0:ba7650f404af | 46 | |
aravindsv | 0:ba7650f404af | 47 | //After wakeup same stuff as currently enabled: |
aravindsv | 0:ba7650f404af | 48 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
aravindsv | 0:ba7650f404af | 49 | |
aravindsv | 0:ba7650f404af | 50 | //All interrupts may wake up: |
aravindsv | 0:ba7650f404af | 51 | LPC_SYSCON->STARTERP0 = 0xFF; |
aravindsv | 0:ba7650f404af | 52 | LPC_SYSCON->STARTERP1 = 0xFFFF; |
aravindsv | 0:ba7650f404af | 53 | |
aravindsv | 0:ba7650f404af | 54 | //Deep sleep for ARM core: |
aravindsv | 0:ba7650f404af | 55 | SCB->SCR = 1<<2; |
aravindsv | 0:ba7650f404af | 56 | |
aravindsv | 0:ba7650f404af | 57 | __WFI(); |
aravindsv | 0:ba7650f404af | 58 | } |
aravindsv | 0:ba7650f404af | 59 | #endif |
aravindsv | 0:ba7650f404af | 60 | |
aravindsv | 0:ba7650f404af | 61 | #ifdef POWERDOWN |
aravindsv | 0:ba7650f404af | 62 | void deepsleep(void) { |
aravindsv | 0:ba7650f404af | 63 | //Powerdown in PCON |
aravindsv | 0:ba7650f404af | 64 | LPC_PMU->PCON &= ~0x03; |
aravindsv | 0:ba7650f404af | 65 | LPC_PMU->PCON |= 0x02; |
aravindsv | 0:ba7650f404af | 66 | |
aravindsv | 0:ba7650f404af | 67 | //If brownout detection and WDT are enabled, keep them enabled during sleep |
aravindsv | 0:ba7650f404af | 68 | LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG; |
aravindsv | 0:ba7650f404af | 69 | |
aravindsv | 0:ba7650f404af | 70 | //After wakeup same stuff as currently enabled: |
aravindsv | 0:ba7650f404af | 71 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
aravindsv | 0:ba7650f404af | 72 | |
aravindsv | 0:ba7650f404af | 73 | //All interrupts may wake up: |
aravindsv | 0:ba7650f404af | 74 | LPC_SYSCON->STARTERP0 = 0xFF; |
aravindsv | 0:ba7650f404af | 75 | LPC_SYSCON->STARTERP1 = 0xFFFF; |
aravindsv | 0:ba7650f404af | 76 | |
aravindsv | 0:ba7650f404af | 77 | //Deep sleep for ARM core: |
aravindsv | 0:ba7650f404af | 78 | SCB->SCR = 1<<2; |
aravindsv | 0:ba7650f404af | 79 | |
aravindsv | 0:ba7650f404af | 80 | __WFI(); |
aravindsv | 0:ba7650f404af | 81 | } |
aravindsv | 0:ba7650f404af | 82 | #endif |