Aravind Vadali / mbed-src-AV

mbed.h library with any bug fixes AV finds.

Dependents:   micromouse4_encoder_testing PID_Test Lab1_Test WorkingPID ... more

hal/spi_api.h@0:ba7650f404af, 2015-11-02 (annotated)

Committer:
aravindsv
Date:
Mon Nov 02 02:26:59 2015 +0000
Revision:
0:ba7650f404af
Reduced HSE_STARTUP_TIMEOUT to 500 ms, fixed some compiler warnings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
aravindsv 0:ba7650f404af 1 /* mbed Microcontroller Library
aravindsv 0:ba7650f404af 2 * Copyright (c) 2006-2013 ARM Limited
aravindsv 0:ba7650f404af 3 *
aravindsv 0:ba7650f404af 4 * Licensed under the Apache License, Version 2.0 (the "License");
aravindsv 0:ba7650f404af 5 * you may not use this file except in compliance with the License.
aravindsv 0:ba7650f404af 6 * You may obtain a copy of the License at
aravindsv 0:ba7650f404af 7 *
aravindsv 0:ba7650f404af 8 * http://www.apache.org/licenses/LICENSE-2.0
aravindsv 0:ba7650f404af 9 *
aravindsv 0:ba7650f404af 10 * Unless required by applicable law or agreed to in writing, software
aravindsv 0:ba7650f404af 11 * distributed under the License is distributed on an "AS IS" BASIS,
aravindsv 0:ba7650f404af 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
aravindsv 0:ba7650f404af 13 * See the License for the specific language governing permissions and
aravindsv 0:ba7650f404af 14 * limitations under the License.
aravindsv 0:ba7650f404af 15 */
aravindsv 0:ba7650f404af 16 #ifndef MBED_SPI_API_H
aravindsv 0:ba7650f404af 17 #define MBED_SPI_API_H
aravindsv 0:ba7650f404af 18
aravindsv 0:ba7650f404af 19 #include "device.h"
aravindsv 0:ba7650f404af 20 #include "dma_api.h"
aravindsv 0:ba7650f404af 21 #include "buffer.h"
aravindsv 0:ba7650f404af 22
aravindsv 0:ba7650f404af 23 #if DEVICE_SPI
aravindsv 0:ba7650f404af 24
aravindsv 0:ba7650f404af 25 #define SPI_EVENT_ERROR (1 << 1)
aravindsv 0:ba7650f404af 26 #define SPI_EVENT_COMPLETE (1 << 2)
aravindsv 0:ba7650f404af 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
aravindsv 0:ba7650f404af 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
aravindsv 0:ba7650f404af 29
aravindsv 0:ba7650f404af 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
aravindsv 0:ba7650f404af 31
aravindsv 0:ba7650f404af 32 #define SPI_FILL_WORD (0xFFFF)
aravindsv 0:ba7650f404af 33
aravindsv 0:ba7650f404af 34 #if DEVICE_SPI_ASYNCH
aravindsv 0:ba7650f404af 35 /** Asynch spi hal structure
aravindsv 0:ba7650f404af 36 */
aravindsv 0:ba7650f404af 37 typedef struct {
aravindsv 0:ba7650f404af 38 struct spi_s spi; /**< Target specific spi structure */
aravindsv 0:ba7650f404af 39 struct buffer_s tx_buff; /**< Tx buffer */
aravindsv 0:ba7650f404af 40 struct buffer_s rx_buff; /**< Rx buffer */
aravindsv 0:ba7650f404af 41 } spi_t;
aravindsv 0:ba7650f404af 42
aravindsv 0:ba7650f404af 43 #else
aravindsv 0:ba7650f404af 44 /** Non-asynch spi hal structure
aravindsv 0:ba7650f404af 45 */
aravindsv 0:ba7650f404af 46 typedef struct spi_s spi_t;
aravindsv 0:ba7650f404af 47
aravindsv 0:ba7650f404af 48 #endif
aravindsv 0:ba7650f404af 49
aravindsv 0:ba7650f404af 50 #ifdef __cplusplus
aravindsv 0:ba7650f404af 51 extern "C" {
aravindsv 0:ba7650f404af 52 #endif
aravindsv 0:ba7650f404af 53
aravindsv 0:ba7650f404af 54 /**
aravindsv 0:ba7650f404af 55 * \defgroup GeneralSPI SPI Configuration Functions
aravindsv 0:ba7650f404af 56 * @{
aravindsv 0:ba7650f404af 57 */
aravindsv 0:ba7650f404af 58
aravindsv 0:ba7650f404af 59 /** Initialize the SPI peripheral
aravindsv 0:ba7650f404af 60 *
aravindsv 0:ba7650f404af 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
aravindsv 0:ba7650f404af 62 * @param[out] obj The SPI object to initialize
aravindsv 0:ba7650f404af 63 * @param[in] mosi The pin to use for MOSI
aravindsv 0:ba7650f404af 64 * @param[in] miso The pin to use for MISO
aravindsv 0:ba7650f404af 65 * @param[in] sclk The pin to use for SCLK
aravindsv 0:ba7650f404af 66 * @param[in] ssel The pin to use for SSEL
aravindsv 0:ba7650f404af 67 */
aravindsv 0:ba7650f404af 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
aravindsv 0:ba7650f404af 69
aravindsv 0:ba7650f404af 70 /** Release a SPI object
aravindsv 0:ba7650f404af 71 *
aravindsv 0:ba7650f404af 72 * TODO: spi_free is currently unimplemented
aravindsv 0:ba7650f404af 73 * This will require reference counting at the C++ level to be safe
aravindsv 0:ba7650f404af 74 *
aravindsv 0:ba7650f404af 75 * Return the pins owned by the SPI object to their reset state
aravindsv 0:ba7650f404af 76 * Disable the SPI peripheral
aravindsv 0:ba7650f404af 77 * Disable the SPI clock
aravindsv 0:ba7650f404af 78 * @param[in] obj The SPI object to deinitialize
aravindsv 0:ba7650f404af 79 */
aravindsv 0:ba7650f404af 80 void spi_free(spi_t *obj);
aravindsv 0:ba7650f404af 81
aravindsv 0:ba7650f404af 82 /** Configure the SPI format
aravindsv 0:ba7650f404af 83 *
aravindsv 0:ba7650f404af 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
aravindsv 0:ba7650f404af 85 * @param[in,out] obj The SPI object to configure
aravindsv 0:ba7650f404af 86 * @param[in] bits The number of bits per frame
aravindsv 0:ba7650f404af 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
aravindsv 0:ba7650f404af 88 * @param[in] slave Zero for master mode or non-zero for slave mode
aravindsv 0:ba7650f404af 89 */
aravindsv 0:ba7650f404af 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
aravindsv 0:ba7650f404af 91
aravindsv 0:ba7650f404af 92 /** Set the SPI baud rate
aravindsv 0:ba7650f404af 93 *
aravindsv 0:ba7650f404af 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
aravindsv 0:ba7650f404af 95 * Configures the SPI peripheral's baud rate
aravindsv 0:ba7650f404af 96 * @param[in,out] obj The SPI object to configure
aravindsv 0:ba7650f404af 97 * @param[in] hz The baud rate in Hz
aravindsv 0:ba7650f404af 98 */
aravindsv 0:ba7650f404af 99 void spi_frequency(spi_t *obj, int hz);
aravindsv 0:ba7650f404af 100
aravindsv 0:ba7650f404af 101 /**@}*/
aravindsv 0:ba7650f404af 102 /**
aravindsv 0:ba7650f404af 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
aravindsv 0:ba7650f404af 104 * @{
aravindsv 0:ba7650f404af 105 */
aravindsv 0:ba7650f404af 106
aravindsv 0:ba7650f404af 107 /** Write a byte out in master mode and receive a value
aravindsv 0:ba7650f404af 108 *
aravindsv 0:ba7650f404af 109 * @param[in] obj The SPI peripheral to use for sending
aravindsv 0:ba7650f404af 110 * @param[in] value The value to send
aravindsv 0:ba7650f404af 111 * @return Returns the value received during send
aravindsv 0:ba7650f404af 112 */
aravindsv 0:ba7650f404af 113 int spi_master_write(spi_t *obj, int value);
aravindsv 0:ba7650f404af 114
aravindsv 0:ba7650f404af 115 /** Check if a value is available to read
aravindsv 0:ba7650f404af 116 *
aravindsv 0:ba7650f404af 117 * @param[in] obj The SPI peripheral to check
aravindsv 0:ba7650f404af 118 * @return non-zero if a value is available
aravindsv 0:ba7650f404af 119 */
aravindsv 0:ba7650f404af 120 int spi_slave_receive(spi_t *obj);
aravindsv 0:ba7650f404af 121
aravindsv 0:ba7650f404af 122 /** Get a received value out of the SPI receive buffer in slave mode
aravindsv 0:ba7650f404af 123 *
aravindsv 0:ba7650f404af 124 * Blocks until a value is available
aravindsv 0:ba7650f404af 125 * @param[in] obj The SPI peripheral to read
aravindsv 0:ba7650f404af 126 * @return The value received
aravindsv 0:ba7650f404af 127 */
aravindsv 0:ba7650f404af 128 int spi_slave_read(spi_t *obj);
aravindsv 0:ba7650f404af 129
aravindsv 0:ba7650f404af 130 /** Write a value to the SPI peripheral in slave mode
aravindsv 0:ba7650f404af 131 *
aravindsv 0:ba7650f404af 132 * Blocks until the SPI peripheral can be written to
aravindsv 0:ba7650f404af 133 * @param[in] obj The SPI peripheral to write
aravindsv 0:ba7650f404af 134 * @param[in] value The value to write
aravindsv 0:ba7650f404af 135 */
aravindsv 0:ba7650f404af 136 void spi_slave_write(spi_t *obj, int value);
aravindsv 0:ba7650f404af 137
aravindsv 0:ba7650f404af 138 /** Checks if the specified SPI peripheral is in use
aravindsv 0:ba7650f404af 139 *
aravindsv 0:ba7650f404af 140 * @param[in] obj The SPI peripheral to check
aravindsv 0:ba7650f404af 141 * @return non-zero if the peripheral is currently transmitting
aravindsv 0:ba7650f404af 142 */
aravindsv 0:ba7650f404af 143 int spi_busy(spi_t *obj);
aravindsv 0:ba7650f404af 144
aravindsv 0:ba7650f404af 145 /** Get the module number
aravindsv 0:ba7650f404af 146 *
aravindsv 0:ba7650f404af 147 * @param[in] obj The SPI peripheral to check
aravindsv 0:ba7650f404af 148 * @return The module number
aravindsv 0:ba7650f404af 149 */
aravindsv 0:ba7650f404af 150 uint8_t spi_get_module(spi_t *obj);
aravindsv 0:ba7650f404af 151
aravindsv 0:ba7650f404af 152 /**@}*/
aravindsv 0:ba7650f404af 153
aravindsv 0:ba7650f404af 154 #if DEVICE_SPI_ASYNCH
aravindsv 0:ba7650f404af 155 /**
aravindsv 0:ba7650f404af 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
aravindsv 0:ba7650f404af 157 * @{
aravindsv 0:ba7650f404af 158 */
aravindsv 0:ba7650f404af 159
aravindsv 0:ba7650f404af 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
aravindsv 0:ba7650f404af 161 *
aravindsv 0:ba7650f404af 162 * @param[in] obj The SPI object which holds the transfer information
aravindsv 0:ba7650f404af 163 * @param[in] tx The buffer to send
aravindsv 0:ba7650f404af 164 * @param[in] tx_length The number of words to transmit
aravindsv 0:ba7650f404af 165 * @param[in] rx The buffer to receive
aravindsv 0:ba7650f404af 166 * @param[in] rx_length The number of words to receive
aravindsv 0:ba7650f404af 167 * @param[in] bit_width The bit width of buffer words
aravindsv 0:ba7650f404af 168 * @param[in] event The logical OR of events to be registered
aravindsv 0:ba7650f404af 169 * @param[in] handler SPI interrupt handler
aravindsv 0:ba7650f404af 170 * @param[in] hint A suggestion for how to use DMA with this transfer
aravindsv 0:ba7650f404af 171 */
aravindsv 0:ba7650f404af 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
aravindsv 0:ba7650f404af 173
aravindsv 0:ba7650f404af 174 /** The asynchronous IRQ handler
aravindsv 0:ba7650f404af 175 *
aravindsv 0:ba7650f404af 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
aravindsv 0:ba7650f404af 177 * conditions, such as buffer overflows or transfer complete.
aravindsv 0:ba7650f404af 178 * @param[in] obj The SPI object which holds the transfer information
aravindsv 0:ba7650f404af 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
aravindsv 0:ba7650f404af 180 */
aravindsv 0:ba7650f404af 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
aravindsv 0:ba7650f404af 182
aravindsv 0:ba7650f404af 183 /** Attempts to determine if the SPI peripheral is already in use.
aravindsv 0:ba7650f404af 184 *
aravindsv 0:ba7650f404af 185 * If a temporary DMA channel has been allocated, peripheral is in use.
aravindsv 0:ba7650f404af 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
aravindsv 0:ba7650f404af 187 * channel were allocated.
aravindsv 0:ba7650f404af 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
aravindsv 0:ba7650f404af 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
aravindsv 0:ba7650f404af 190 * there are any bytes in the FIFOs.
aravindsv 0:ba7650f404af 191 * @param[in] obj The SPI object to check for activity
aravindsv 0:ba7650f404af 192 * @return non-zero if the SPI port is active or zero if it is not.
aravindsv 0:ba7650f404af 193 */
aravindsv 0:ba7650f404af 194 uint8_t spi_active(spi_t *obj);
aravindsv 0:ba7650f404af 195
aravindsv 0:ba7650f404af 196 /** Abort an SPI transfer
aravindsv 0:ba7650f404af 197 *
aravindsv 0:ba7650f404af 198 * @param obj The SPI peripheral to stop
aravindsv 0:ba7650f404af 199 */
aravindsv 0:ba7650f404af 200 void spi_abort_asynch(spi_t *obj);
aravindsv 0:ba7650f404af 201
aravindsv 0:ba7650f404af 202
aravindsv 0:ba7650f404af 203 #endif
aravindsv 0:ba7650f404af 204
aravindsv 0:ba7650f404af 205 /**@}*/
aravindsv 0:ba7650f404af 206
aravindsv 0:ba7650f404af 207 #ifdef __cplusplus
aravindsv 0:ba7650f404af 208 }
aravindsv 0:ba7650f404af 209 #endif // __cplusplus
aravindsv 0:ba7650f404af 210
aravindsv 0:ba7650f404af 211 #endif // SPI_DEVICE
aravindsv 0:ba7650f404af 212
aravindsv 0:ba7650f404af 213 #endif // MBED_SPI_API_H