This fork captures the mbed lib v125 for ease of integration into older projects.
Fork of mbed-dev by
targets/cmsis/TARGET_NXP/TARGET_LPC2460/cmsis_nvic.c@187:92cbb9eec47b, 2018-07-20 (annotated)
- Committer:
- apluscw
- Date:
- Fri Jul 20 21:24:42 2018 +0000
- Revision:
- 187:92cbb9eec47b
Mbed library with source code from mbed lib v125. Posted to ease integration with some older projects.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
apluscw | 187:92cbb9eec47b | 1 | /* mbed Microcontroller Library |
apluscw | 187:92cbb9eec47b | 2 | * CMSIS-style functionality to support dynamic vectors |
apluscw | 187:92cbb9eec47b | 3 | ******************************************************************************* |
apluscw | 187:92cbb9eec47b | 4 | * Copyright (c) 2011-2015 ARM Limited. All rights reserved. |
apluscw | 187:92cbb9eec47b | 5 | * All rights reserved. |
apluscw | 187:92cbb9eec47b | 6 | * |
apluscw | 187:92cbb9eec47b | 7 | * Redistribution and use in source and binary forms, with or without |
apluscw | 187:92cbb9eec47b | 8 | * modification, are permitted provided that the following conditions are met: |
apluscw | 187:92cbb9eec47b | 9 | * |
apluscw | 187:92cbb9eec47b | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
apluscw | 187:92cbb9eec47b | 11 | * this list of conditions and the following disclaimer. |
apluscw | 187:92cbb9eec47b | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
apluscw | 187:92cbb9eec47b | 13 | * this list of conditions and the following disclaimer in the documentation |
apluscw | 187:92cbb9eec47b | 14 | * and/or other materials provided with the distribution. |
apluscw | 187:92cbb9eec47b | 15 | * 3. Neither the name of ARM Limited nor the names of its contributors |
apluscw | 187:92cbb9eec47b | 16 | * may be used to endorse or promote products derived from this software |
apluscw | 187:92cbb9eec47b | 17 | * without specific prior written permission. |
apluscw | 187:92cbb9eec47b | 18 | * |
apluscw | 187:92cbb9eec47b | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
apluscw | 187:92cbb9eec47b | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
apluscw | 187:92cbb9eec47b | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
apluscw | 187:92cbb9eec47b | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
apluscw | 187:92cbb9eec47b | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
apluscw | 187:92cbb9eec47b | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
apluscw | 187:92cbb9eec47b | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
apluscw | 187:92cbb9eec47b | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
apluscw | 187:92cbb9eec47b | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
apluscw | 187:92cbb9eec47b | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
apluscw | 187:92cbb9eec47b | 29 | ******************************************************************************* |
apluscw | 187:92cbb9eec47b | 30 | */ |
apluscw | 187:92cbb9eec47b | 31 | #include "cmsis_nvic.h" |
apluscw | 187:92cbb9eec47b | 32 | |
apluscw | 187:92cbb9eec47b | 33 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
apluscw | 187:92cbb9eec47b | 34 | LPC_VIC->VectAddr[(int)IRQn] = vector; |
apluscw | 187:92cbb9eec47b | 35 | } |
apluscw | 187:92cbb9eec47b | 36 | |
apluscw | 187:92cbb9eec47b | 37 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
apluscw | 187:92cbb9eec47b | 38 | return LPC_VIC->VectAddr[(int)IRQn]; |
apluscw | 187:92cbb9eec47b | 39 | } |
apluscw | 187:92cbb9eec47b | 40 |