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/**
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* MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
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* Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
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* Created by Miguel Balboa (circuitito.com), Jan, 2012.
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* Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
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* Ported to mbed by Martin Olejar, Dec, 2013
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*
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* Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
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* Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
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*
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* There are three hardware components involved:
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* 1) The micro controller: An Arduino
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* 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
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* 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
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*
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* The microcontroller and card reader uses SPI for communication.
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* The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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*
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* The card reader and the tags communicate using a 13.56MHz electromagnetic field.
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* The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
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* A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
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* Details are found in chapter 6, Type A: Initialization and anticollision.
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*
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* If only the PICC UID is wanted, the above documents has all the needed information.
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* To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
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* The MIFARE Classic chips and protocol is described in the datasheets:
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* 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
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* 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
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* Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
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* The MIFARE Ultralight chip and protocol is described in the datasheets:
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* Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
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* Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
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*
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* MIFARE Classic 1K (MF1S503x):
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* Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
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* The blocks are numbered 0-63.
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* Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
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* Bytes 0-5: Key A
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* Bytes 6-8: Access Bits
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40
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* Bytes 9: User data
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* Bytes 10-15: Key B (or user data)
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* Block 0 is read only manufacturer data.
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* To access a block, an authentication using a key from the block's sector must be performed first.
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* Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
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* All keys are set to FFFFFFFFFFFFh at chip delivery.
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* Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
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* To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
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* MIFARE Classic 4K (MF1S703x):
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* Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
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* The blocks are numbered 0-255.
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* The last block in each sector is the Sector Trailer like above.
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* MIFARE Classic Mini (MF1 IC S20):
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* Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
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* The blocks are numbered 0-19.
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* The last block in each sector is the Sector Trailer like above.
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*
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* MIFARE Ultralight (MF0ICU1):
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* Has 16 pages of 4 bytes = 64 bytes.
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* Pages 0 + 1 is used for the 7-byte UID.
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* Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
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* Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
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* Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
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63
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* MIFARE Ultralight C (MF0ICU2):
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64
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* Has 48 pages of 4 bytes = 64 bytes.
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* Pages 0 + 1 is used for the 7-byte UID.
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* Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
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* Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
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* Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
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* Page 40 Lock bytes
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* Page 41 16 bit one way counter
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* Pages 42-43 Authentication configuration
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* Pages 44-47 Authentication key
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*/
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#ifndef MFRC522_h
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#define MFRC522_h
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#include "mbed.h"
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/**
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* MFRC522 example
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*
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* @code
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* #include "mbed.h"
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* #include "MFRC522.h"
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*
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* //KL25Z Pins for MFRC522 SPI interface
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* #define SPI_MOSI PTC6
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* #define SPI_MISO PTC7
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* #define SPI_SCLK PTC5
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* #define SPI_CS PTC4
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* // KL25Z Pin for MFRC522 reset
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* #define MF_RESET PTC3
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* // KL25Z Pins for Debug UART port
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* #define UART_RX PTA1
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* #define UART_TX PTA2
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*
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* DigitalOut LedRed (LED_RED);
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* DigitalOut LedGreen (LED_GREEN);
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*
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* Serial DebugUART(UART_TX, UART_RX);
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* MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET);
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*
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* int main(void) {
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* // Set debug UART speed
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* DebugUART.baud(115200);
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*
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* // Init. RC522 Chip
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* RfChip.PCD_Init();
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*
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* while (true) {
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* LedRed = 1;
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* LedGreen = 1;
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*
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* // Look for new cards
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115
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* if ( ! RfChip.PICC_IsNewCardPresent())
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* {
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* wait_ms(500);
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* continue;
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119
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* }
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120
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*
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* LedRed = 0;
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122
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*
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123
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* // Select one of the cards
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124
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* if ( ! RfChip.PICC_ReadCardSerial())
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125
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* {
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* wait_ms(500);
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127
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* continue;
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128
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* }
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| Amyrctdp |
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129
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*
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130
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* LedRed = 1;
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131
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* LedGreen = 0;
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132
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*
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133
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* // Print Card UID
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134
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* printf("Card UID: ");
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135
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* for (uint8_t i = 0; i < RfChip.uid.size; i++)
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136
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* {
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137
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* printf(" %X02", RfChip.uid.uidByte[i]);
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138
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* }
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139
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* printf("\n\r");
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140
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*
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141
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* // Print Card type
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142
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* uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak);
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143
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* printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType));
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144
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* wait_ms(1000);
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145
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* }
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146
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* }
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147
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* @endcode
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148
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*/
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149
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150
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class MFRC522 {
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151
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public:
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152
|
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153
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/**
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154
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* MFRC522 registers (described in chapter 9 of the datasheet).
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155
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* When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
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156
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*/
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157
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enum PCD_Register {
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158
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// Page 0: Command and status
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159
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// 0x00 // reserved for future use
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160
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CommandReg = 0x01 << 1, // starts and stops command execution
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161
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ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
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162
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DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
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| Amyrctdp |
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163
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ComIrqReg = 0x04 << 1, // interrupt request bits
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164
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DivIrqReg = 0x05 << 1, // interrupt request bits
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165
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ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
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166
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Status1Reg = 0x07 << 1, // communication status bits
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| Amyrctdp |
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167
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Status2Reg = 0x08 << 1, // receiver and transmitter status bits
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168
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FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
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169
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FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
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170
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WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
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171
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ControlReg = 0x0C << 1, // miscellaneous control registers
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172
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BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
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173
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CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
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174
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// 0x0F // reserved for future use
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175
|
|
| Amyrctdp |
0:c735c66e37d3
|
176
|
// Page 1:Command
|
| Amyrctdp |
0:c735c66e37d3
|
177
|
// 0x10 // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
178
|
ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
|
| Amyrctdp |
0:c735c66e37d3
|
179
|
TxModeReg = 0x12 << 1, // defines transmission data rate and framing
|
| Amyrctdp |
0:c735c66e37d3
|
180
|
RxModeReg = 0x13 << 1, // defines reception data rate and framing
|
| Amyrctdp |
0:c735c66e37d3
|
181
|
TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
|
| Amyrctdp |
0:c735c66e37d3
|
182
|
TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
|
| Amyrctdp |
0:c735c66e37d3
|
183
|
TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
|
| Amyrctdp |
0:c735c66e37d3
|
184
|
RxSelReg = 0x17 << 1, // selects internal receiver settings
|
| Amyrctdp |
0:c735c66e37d3
|
185
|
RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
|
| Amyrctdp |
0:c735c66e37d3
|
186
|
DemodReg = 0x19 << 1, // defines demodulator settings
|
| Amyrctdp |
0:c735c66e37d3
|
187
|
// 0x1A // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
188
|
// 0x1B // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
189
|
MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
|
| Amyrctdp |
0:c735c66e37d3
|
190
|
MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
|
| Amyrctdp |
0:c735c66e37d3
|
191
|
// 0x1E // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
192
|
SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
|
| Amyrctdp |
0:c735c66e37d3
|
193
|
|
| Amyrctdp |
0:c735c66e37d3
|
194
|
// Page 2: Configuration
|
| Amyrctdp |
0:c735c66e37d3
|
195
|
// 0x20 // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
196
|
CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
|
| Amyrctdp |
0:c735c66e37d3
|
197
|
CRCResultRegL = 0x22 << 1,
|
| Amyrctdp |
0:c735c66e37d3
|
198
|
// 0x23 // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
199
|
ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
|
| Amyrctdp |
0:c735c66e37d3
|
200
|
// 0x25 // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
201
|
RFCfgReg = 0x26 << 1, // configures the receiver gain
|
| Amyrctdp |
0:c735c66e37d3
|
202
|
GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
|
| Amyrctdp |
0:c735c66e37d3
|
203
|
CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
|
| Amyrctdp |
0:c735c66e37d3
|
204
|
ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
|
| Amyrctdp |
0:c735c66e37d3
|
205
|
TModeReg = 0x2A << 1, // defines settings for the internal timer
|
| Amyrctdp |
0:c735c66e37d3
|
206
|
TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
|
| Amyrctdp |
0:c735c66e37d3
|
207
|
TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
|
| Amyrctdp |
0:c735c66e37d3
|
208
|
TReloadRegL = 0x2D << 1,
|
| Amyrctdp |
0:c735c66e37d3
|
209
|
TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
|
| Amyrctdp |
0:c735c66e37d3
|
210
|
TCntValueRegL = 0x2F << 1,
|
| Amyrctdp |
0:c735c66e37d3
|
211
|
|
| Amyrctdp |
0:c735c66e37d3
|
212
|
// Page 3:Test Registers
|
| Amyrctdp |
0:c735c66e37d3
|
213
|
// 0x30 // reserved for future use
|
| Amyrctdp |
0:c735c66e37d3
|
214
|
TestSel1Reg = 0x31 << 1, // general test signal configuration
|
| Amyrctdp |
0:c735c66e37d3
|
215
|
TestSel2Reg = 0x32 << 1, // general test signal configuration
|
| Amyrctdp |
0:c735c66e37d3
|
216
|
TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
|
| Amyrctdp |
0:c735c66e37d3
|
217
|
TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
|
| Amyrctdp |
0:c735c66e37d3
|
218
|
TestBusReg = 0x35 << 1, // shows the status of the internal test bus
|
| Amyrctdp |
0:c735c66e37d3
|
219
|
AutoTestReg = 0x36 << 1, // controls the digital self test
|
| Amyrctdp |
0:c735c66e37d3
|
220
|
VersionReg = 0x37 << 1, // shows the software version
|
| Amyrctdp |
0:c735c66e37d3
|
221
|
AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
|
| Amyrctdp |
0:c735c66e37d3
|
222
|
TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
|
| Amyrctdp |
0:c735c66e37d3
|
223
|
TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
|
| Amyrctdp |
0:c735c66e37d3
|
224
|
TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
|
| Amyrctdp |
0:c735c66e37d3
|
225
|
// 0x3C // reserved for production tests
|
| Amyrctdp |
0:c735c66e37d3
|
226
|
// 0x3D // reserved for production tests
|
| Amyrctdp |
0:c735c66e37d3
|
227
|
// 0x3E // reserved for production tests
|
| Amyrctdp |
0:c735c66e37d3
|
228
|
// 0x3F // reserved for production tests
|
| Amyrctdp |
0:c735c66e37d3
|
229
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
230
|
|
| Amyrctdp |
0:c735c66e37d3
|
231
|
// MFRC522 commands Described in chapter 10 of the datasheet.
|
| Amyrctdp |
0:c735c66e37d3
|
232
|
enum PCD_Command {
|
| Amyrctdp |
0:c735c66e37d3
|
233
|
PCD_Idle = 0x00, // no action, cancels current command execution
|
| Amyrctdp |
0:c735c66e37d3
|
234
|
PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
|
| Amyrctdp |
0:c735c66e37d3
|
235
|
PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
|
| Amyrctdp |
0:c735c66e37d3
|
236
|
PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
|
| Amyrctdp |
0:c735c66e37d3
|
237
|
PCD_Transmit = 0x04, // transmits data from the FIFO buffer
|
| Amyrctdp |
0:c735c66e37d3
|
238
|
PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
|
| Amyrctdp |
0:c735c66e37d3
|
239
|
PCD_Receive = 0x08, // activates the receiver circuits
|
| Amyrctdp |
0:c735c66e37d3
|
240
|
PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
|
| Amyrctdp |
0:c735c66e37d3
|
241
|
PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
|
| Amyrctdp |
0:c735c66e37d3
|
242
|
PCD_SoftReset = 0x0F // resets the MFRC522
|
| Amyrctdp |
0:c735c66e37d3
|
243
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
244
|
|
| Amyrctdp |
0:c735c66e37d3
|
245
|
// Commands sent to the PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
246
|
enum PICC_Command {
|
| Amyrctdp |
0:c735c66e37d3
|
247
|
// The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
|
| Amyrctdp |
0:c735c66e37d3
|
248
|
PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
|
| Amyrctdp |
0:c735c66e37d3
|
249
|
PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
|
| Amyrctdp |
0:c735c66e37d3
|
250
|
PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
|
| Amyrctdp |
0:c735c66e37d3
|
251
|
PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
|
| Amyrctdp |
0:c735c66e37d3
|
252
|
PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
|
| Amyrctdp |
0:c735c66e37d3
|
253
|
PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
|
| Amyrctdp |
0:c735c66e37d3
|
254
|
PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
|
| Amyrctdp |
0:c735c66e37d3
|
255
|
|
| Amyrctdp |
0:c735c66e37d3
|
256
|
// The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
|
| Amyrctdp |
0:c735c66e37d3
|
257
|
// Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
|
| Amyrctdp |
0:c735c66e37d3
|
258
|
// The read/write commands can also be used for MIFARE Ultralight.
|
| Amyrctdp |
0:c735c66e37d3
|
259
|
PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
|
| Amyrctdp |
0:c735c66e37d3
|
260
|
PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
|
| Amyrctdp |
0:c735c66e37d3
|
261
|
PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
|
| Amyrctdp |
0:c735c66e37d3
|
262
|
PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
|
| Amyrctdp |
0:c735c66e37d3
|
263
|
PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
|
| Amyrctdp |
0:c735c66e37d3
|
264
|
PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
|
| Amyrctdp |
0:c735c66e37d3
|
265
|
PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
|
| Amyrctdp |
0:c735c66e37d3
|
266
|
PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
|
| Amyrctdp |
0:c735c66e37d3
|
267
|
|
| Amyrctdp |
0:c735c66e37d3
|
268
|
// The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
|
| Amyrctdp |
0:c735c66e37d3
|
269
|
// The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
|
| Amyrctdp |
0:c735c66e37d3
|
270
|
PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
271
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
272
|
|
| Amyrctdp |
0:c735c66e37d3
|
273
|
// MIFARE constants that does not fit anywhere else
|
| Amyrctdp |
0:c735c66e37d3
|
274
|
enum MIFARE_Misc {
|
| Amyrctdp |
0:c735c66e37d3
|
275
|
MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
|
| Amyrctdp |
0:c735c66e37d3
|
276
|
MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
|
| Amyrctdp |
0:c735c66e37d3
|
277
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
278
|
|
| Amyrctdp |
0:c735c66e37d3
|
279
|
// PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
|
| Amyrctdp |
0:c735c66e37d3
|
280
|
enum PICC_Type {
|
| Amyrctdp |
0:c735c66e37d3
|
281
|
PICC_TYPE_UNKNOWN = 0,
|
| Amyrctdp |
0:c735c66e37d3
|
282
|
PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
|
| Amyrctdp |
0:c735c66e37d3
|
283
|
PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
|
| Amyrctdp |
0:c735c66e37d3
|
284
|
PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
|
| Amyrctdp |
0:c735c66e37d3
|
285
|
PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
|
| Amyrctdp |
0:c735c66e37d3
|
286
|
PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
|
| Amyrctdp |
0:c735c66e37d3
|
287
|
PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
|
| Amyrctdp |
0:c735c66e37d3
|
288
|
PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
|
| Amyrctdp |
0:c735c66e37d3
|
289
|
PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
|
| Amyrctdp |
0:c735c66e37d3
|
290
|
PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
|
| Amyrctdp |
0:c735c66e37d3
|
291
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
292
|
|
| Amyrctdp |
0:c735c66e37d3
|
293
|
// Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
|
| Amyrctdp |
0:c735c66e37d3
|
294
|
enum StatusCode {
|
| Amyrctdp |
0:c735c66e37d3
|
295
|
STATUS_OK = 1, // Success
|
| Amyrctdp |
0:c735c66e37d3
|
296
|
STATUS_ERROR = 2, // Error in communication
|
| Amyrctdp |
0:c735c66e37d3
|
297
|
STATUS_COLLISION = 3, // Collision detected
|
| Amyrctdp |
0:c735c66e37d3
|
298
|
STATUS_TIMEOUT = 4, // Timeout in communication.
|
| Amyrctdp |
0:c735c66e37d3
|
299
|
STATUS_NO_ROOM = 5, // A buffer is not big enough.
|
| Amyrctdp |
0:c735c66e37d3
|
300
|
STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
|
| Amyrctdp |
0:c735c66e37d3
|
301
|
STATUS_INVALID = 7, // Invalid argument.
|
| Amyrctdp |
0:c735c66e37d3
|
302
|
STATUS_CRC_WRONG = 8, // The CRC_A does not match
|
| Amyrctdp |
0:c735c66e37d3
|
303
|
STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
|
| Amyrctdp |
0:c735c66e37d3
|
304
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
305
|
|
| Amyrctdp |
0:c735c66e37d3
|
306
|
// A struct used for passing the UID of a PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
307
|
typedef struct {
|
| Amyrctdp |
0:c735c66e37d3
|
308
|
uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
|
| Amyrctdp |
0:c735c66e37d3
|
309
|
uint8_t uidByte[10];
|
| Amyrctdp |
0:c735c66e37d3
|
310
|
uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
|
| Amyrctdp |
0:c735c66e37d3
|
311
|
} Uid;
|
| Amyrctdp |
0:c735c66e37d3
|
312
|
|
| Amyrctdp |
0:c735c66e37d3
|
313
|
// A struct used for passing a MIFARE Crypto1 key
|
| Amyrctdp |
0:c735c66e37d3
|
314
|
typedef struct {
|
| Amyrctdp |
0:c735c66e37d3
|
315
|
uint8_t keyByte[MF_KEY_SIZE];
|
| Amyrctdp |
0:c735c66e37d3
|
316
|
} MIFARE_Key;
|
| Amyrctdp |
0:c735c66e37d3
|
317
|
|
| Amyrctdp |
0:c735c66e37d3
|
318
|
// Member variables
|
| Amyrctdp |
0:c735c66e37d3
|
319
|
Uid uid; // Used by PICC_ReadCardSerial().
|
| Amyrctdp |
0:c735c66e37d3
|
320
|
|
| Amyrctdp |
0:c735c66e37d3
|
321
|
// Size of the MFRC522 FIFO
|
| Amyrctdp |
0:c735c66e37d3
|
322
|
static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
|
| Amyrctdp |
0:c735c66e37d3
|
323
|
|
| Amyrctdp |
0:c735c66e37d3
|
324
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
325
|
* MFRC522 constructor
|
| Amyrctdp |
0:c735c66e37d3
|
326
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
327
|
* @param mosi SPI MOSI pin
|
| Amyrctdp |
0:c735c66e37d3
|
328
|
* @param miso SPI MISO pin
|
| Amyrctdp |
0:c735c66e37d3
|
329
|
* @param sclk SPI SCLK pin
|
| Amyrctdp |
0:c735c66e37d3
|
330
|
* @param cs SPI CS pin
|
| Amyrctdp |
0:c735c66e37d3
|
331
|
* @param reset Reset pin
|
| Amyrctdp |
0:c735c66e37d3
|
332
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
333
|
MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
|
| Amyrctdp |
0:c735c66e37d3
|
334
|
|
| Amyrctdp |
0:c735c66e37d3
|
335
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
336
|
* MFRC522 destructor
|
| Amyrctdp |
0:c735c66e37d3
|
337
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
338
|
~MFRC522();
|
| Amyrctdp |
0:c735c66e37d3
|
339
|
|
| Amyrctdp |
0:c735c66e37d3
|
340
|
|
| Amyrctdp |
0:c735c66e37d3
|
341
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
342
|
//! @name Functions for manipulating the MFRC522
|
| Amyrctdp |
0:c735c66e37d3
|
343
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
344
|
//@{
|
| Amyrctdp |
0:c735c66e37d3
|
345
|
|
| Amyrctdp |
0:c735c66e37d3
|
346
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
347
|
* Initializes the MFRC522 chip.
|
| Amyrctdp |
0:c735c66e37d3
|
348
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
349
|
void PCD_Init (void);
|
| Amyrctdp |
0:c735c66e37d3
|
350
|
|
| Amyrctdp |
0:c735c66e37d3
|
351
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
352
|
* Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
|
| Amyrctdp |
0:c735c66e37d3
|
353
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
354
|
void PCD_Reset (void);
|
| Amyrctdp |
0:c735c66e37d3
|
355
|
|
| Amyrctdp |
0:c735c66e37d3
|
356
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
357
|
* Turns the antenna on by enabling pins TX1 and TX2.
|
| Amyrctdp |
0:c735c66e37d3
|
358
|
* After a reset these pins disabled.
|
| Amyrctdp |
0:c735c66e37d3
|
359
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
360
|
void PCD_AntennaOn (void);
|
| Amyrctdp |
0:c735c66e37d3
|
361
|
|
| Amyrctdp |
0:c735c66e37d3
|
362
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
363
|
* Writes a byte to the specified register in the MFRC522 chip.
|
| Amyrctdp |
0:c735c66e37d3
|
364
|
* The interface is described in the datasheet section 8.1.2.
|
| Amyrctdp |
0:c735c66e37d3
|
365
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
366
|
* @param reg The register to write to. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
367
|
* @param value The value to write.
|
| Amyrctdp |
0:c735c66e37d3
|
368
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
369
|
void PCD_WriteRegister (uint8_t reg, uint8_t value);
|
| Amyrctdp |
0:c735c66e37d3
|
370
|
|
| Amyrctdp |
0:c735c66e37d3
|
371
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
372
|
* Writes a number of bytes to the specified register in the MFRC522 chip.
|
| Amyrctdp |
0:c735c66e37d3
|
373
|
* The interface is described in the datasheet section 8.1.2.
|
| Amyrctdp |
0:c735c66e37d3
|
374
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
375
|
* @param reg The register to write to. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
376
|
* @param count The number of bytes to write to the register
|
| Amyrctdp |
0:c735c66e37d3
|
377
|
* @param values The values to write. Byte array.
|
| Amyrctdp |
0:c735c66e37d3
|
378
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
379
|
void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
|
| Amyrctdp |
0:c735c66e37d3
|
380
|
|
| Amyrctdp |
0:c735c66e37d3
|
381
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
382
|
* Reads a byte from the specified register in the MFRC522 chip.
|
| Amyrctdp |
0:c735c66e37d3
|
383
|
* The interface is described in the datasheet section 8.1.2.
|
| Amyrctdp |
0:c735c66e37d3
|
384
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
385
|
* @param reg The register to read from. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
386
|
* @returns Register value
|
| Amyrctdp |
0:c735c66e37d3
|
387
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
388
|
uint8_t PCD_ReadRegister (uint8_t reg);
|
| Amyrctdp |
0:c735c66e37d3
|
389
|
|
| Amyrctdp |
0:c735c66e37d3
|
390
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
391
|
* Reads a number of bytes from the specified register in the MFRC522 chip.
|
| Amyrctdp |
0:c735c66e37d3
|
392
|
* The interface is described in the datasheet section 8.1.2.
|
| Amyrctdp |
0:c735c66e37d3
|
393
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
394
|
* @param reg The register to read from. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
395
|
* @param count The number of bytes to read.
|
| Amyrctdp |
0:c735c66e37d3
|
396
|
* @param values Byte array to store the values in.
|
| Amyrctdp |
0:c735c66e37d3
|
397
|
* @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
|
| Amyrctdp |
0:c735c66e37d3
|
398
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
399
|
void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
|
| Amyrctdp |
0:c735c66e37d3
|
400
|
|
| Amyrctdp |
0:c735c66e37d3
|
401
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
402
|
* Sets the bits given in mask in register reg.
|
| Amyrctdp |
0:c735c66e37d3
|
403
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
404
|
* @param reg The register to update. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
405
|
* @param mask The bits to set.
|
| Amyrctdp |
0:c735c66e37d3
|
406
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
407
|
void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
|
| Amyrctdp |
0:c735c66e37d3
|
408
|
|
| Amyrctdp |
0:c735c66e37d3
|
409
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
410
|
* Clears the bits given in mask from register reg.
|
| Amyrctdp |
0:c735c66e37d3
|
411
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
412
|
* @param reg The register to update. One of the PCD_Register enums.
|
| Amyrctdp |
0:c735c66e37d3
|
413
|
* @param mask The bits to clear.
|
| Amyrctdp |
0:c735c66e37d3
|
414
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
415
|
void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
|
| Amyrctdp |
0:c735c66e37d3
|
416
|
|
| Amyrctdp |
0:c735c66e37d3
|
417
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
418
|
* Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
|
| Amyrctdp |
0:c735c66e37d3
|
419
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
420
|
* @param data Pointer to the data to transfer to the FIFO for CRC calculation.
|
| Amyrctdp |
0:c735c66e37d3
|
421
|
* @param length The number of bytes to transfer.
|
| Amyrctdp |
0:c735c66e37d3
|
422
|
* @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
|
| Amyrctdp |
0:c735c66e37d3
|
423
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
424
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
425
|
uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
|
| Amyrctdp |
0:c735c66e37d3
|
426
|
|
| Amyrctdp |
0:c735c66e37d3
|
427
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
428
|
* Executes the Transceive command.
|
| Amyrctdp |
0:c735c66e37d3
|
429
|
* CRC validation can only be done if backData and backLen are specified.
|
| Amyrctdp |
0:c735c66e37d3
|
430
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
431
|
* @param sendData Pointer to the data to transfer to the FIFO.
|
| Amyrctdp |
0:c735c66e37d3
|
432
|
* @param sendLen Number of bytes to transfer to the FIFO.
|
| Amyrctdp |
0:c735c66e37d3
|
433
|
* @param backData NULL or pointer to buffer if data should be read back after executing the command.
|
| Amyrctdp |
0:c735c66e37d3
|
434
|
* @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
|
| Amyrctdp |
0:c735c66e37d3
|
435
|
* @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
|
| Amyrctdp |
0:c735c66e37d3
|
436
|
* @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
|
| Amyrctdp |
0:c735c66e37d3
|
437
|
* @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
|
| Amyrctdp |
0:c735c66e37d3
|
438
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
439
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
440
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
441
|
uint8_t PCD_TransceiveData (uint8_t *sendData,
|
| Amyrctdp |
0:c735c66e37d3
|
442
|
uint8_t sendLen,
|
| Amyrctdp |
0:c735c66e37d3
|
443
|
uint8_t *backData,
|
| Amyrctdp |
0:c735c66e37d3
|
444
|
uint8_t *backLen,
|
| Amyrctdp |
0:c735c66e37d3
|
445
|
uint8_t *validBits = NULL,
|
| Amyrctdp |
0:c735c66e37d3
|
446
|
uint8_t rxAlign = 0,
|
| Amyrctdp |
0:c735c66e37d3
|
447
|
bool checkCRC = false);
|
| Amyrctdp |
0:c735c66e37d3
|
448
|
|
| Amyrctdp |
0:c735c66e37d3
|
449
|
|
| Amyrctdp |
0:c735c66e37d3
|
450
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
451
|
* Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
|
| Amyrctdp |
0:c735c66e37d3
|
452
|
* CRC validation can only be done if backData and backLen are specified.
|
| Amyrctdp |
0:c735c66e37d3
|
453
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
454
|
* @param command The command to execute. One of the PCD_Command enums.
|
| Amyrctdp |
0:c735c66e37d3
|
455
|
* @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
|
| Amyrctdp |
0:c735c66e37d3
|
456
|
* @param sendData Pointer to the data to transfer to the FIFO.
|
| Amyrctdp |
0:c735c66e37d3
|
457
|
* @param sendLen Number of bytes to transfer to the FIFO.
|
| Amyrctdp |
0:c735c66e37d3
|
458
|
* @param backData NULL or pointer to buffer if data should be read back after executing the command.
|
| Amyrctdp |
0:c735c66e37d3
|
459
|
* @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
|
| Amyrctdp |
0:c735c66e37d3
|
460
|
* @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
|
| Amyrctdp |
0:c735c66e37d3
|
461
|
* @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
|
| Amyrctdp |
0:c735c66e37d3
|
462
|
* @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
|
| Amyrctdp |
0:c735c66e37d3
|
463
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
464
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
465
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
466
|
uint8_t PCD_CommunicateWithPICC(uint8_t command,
|
| Amyrctdp |
0:c735c66e37d3
|
467
|
uint8_t waitIRq,
|
| Amyrctdp |
0:c735c66e37d3
|
468
|
uint8_t *sendData,
|
| Amyrctdp |
0:c735c66e37d3
|
469
|
uint8_t sendLen,
|
| Amyrctdp |
0:c735c66e37d3
|
470
|
uint8_t *backData = NULL,
|
| Amyrctdp |
0:c735c66e37d3
|
471
|
uint8_t *backLen = NULL,
|
| Amyrctdp |
0:c735c66e37d3
|
472
|
uint8_t *validBits = NULL,
|
| Amyrctdp |
0:c735c66e37d3
|
473
|
uint8_t rxAlign = 0,
|
| Amyrctdp |
0:c735c66e37d3
|
474
|
bool checkCRC = false);
|
| Amyrctdp |
0:c735c66e37d3
|
475
|
|
| Amyrctdp |
0:c735c66e37d3
|
476
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
477
|
* Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
|
| Amyrctdp |
0:c735c66e37d3
|
478
|
* Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
|
| Amyrctdp |
0:c735c66e37d3
|
479
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
480
|
* @param bufferATQA The buffer to store the ATQA (Answer to request) in
|
| Amyrctdp |
0:c735c66e37d3
|
481
|
* @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
|
| Amyrctdp |
0:c735c66e37d3
|
482
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
483
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
484
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
485
|
uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
486
|
|
| Amyrctdp |
0:c735c66e37d3
|
487
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
488
|
* Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
|
| Amyrctdp |
0:c735c66e37d3
|
489
|
* Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
|
| Amyrctdp |
0:c735c66e37d3
|
490
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
491
|
* @param bufferATQA The buffer to store the ATQA (Answer to request) in
|
| Amyrctdp |
0:c735c66e37d3
|
492
|
* @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
|
| Amyrctdp |
0:c735c66e37d3
|
493
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
494
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
495
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
496
|
uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
497
|
|
| Amyrctdp |
0:c735c66e37d3
|
498
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
499
|
* Transmits REQA or WUPA commands.
|
| Amyrctdp |
0:c735c66e37d3
|
500
|
* Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
|
| Amyrctdp |
0:c735c66e37d3
|
501
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
502
|
* @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
|
| Amyrctdp |
0:c735c66e37d3
|
503
|
* @param bufferATQA The buffer to store the ATQA (Answer to request) in
|
| Amyrctdp |
0:c735c66e37d3
|
504
|
* @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
|
| Amyrctdp |
0:c735c66e37d3
|
505
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
506
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
507
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
508
|
uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
509
|
|
| Amyrctdp |
0:c735c66e37d3
|
510
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
511
|
* Transmits SELECT/ANTICOLLISION commands to select a single PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
512
|
* Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
|
| Amyrctdp |
0:c735c66e37d3
|
513
|
* On success:
|
| Amyrctdp |
0:c735c66e37d3
|
514
|
* - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
|
| Amyrctdp |
0:c735c66e37d3
|
515
|
* - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
|
| Amyrctdp |
0:c735c66e37d3
|
516
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
517
|
* A PICC UID consists of 4, 7 or 10 bytes.
|
| Amyrctdp |
0:c735c66e37d3
|
518
|
* Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
|
| Amyrctdp |
0:c735c66e37d3
|
519
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
520
|
* UID size Number of UID bytes Cascade levels Example of PICC
|
| Amyrctdp |
0:c735c66e37d3
|
521
|
* ======== =================== ============== ===============
|
| Amyrctdp |
0:c735c66e37d3
|
522
|
* single 4 1 MIFARE Classic
|
| Amyrctdp |
0:c735c66e37d3
|
523
|
* double 7 2 MIFARE Ultralight
|
| Amyrctdp |
0:c735c66e37d3
|
524
|
* triple 10 3 Not currently in use?
|
| Amyrctdp |
0:c735c66e37d3
|
525
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
526
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
527
|
* @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
|
| Amyrctdp |
0:c735c66e37d3
|
528
|
* @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
|
| Amyrctdp |
0:c735c66e37d3
|
529
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
530
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
531
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
532
|
uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
|
| Amyrctdp |
0:c735c66e37d3
|
533
|
|
| Amyrctdp |
0:c735c66e37d3
|
534
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
535
|
* Instructs a PICC in state ACTIVE(*) to go to state HALT.
|
| Amyrctdp |
0:c735c66e37d3
|
536
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
537
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
538
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
539
|
uint8_t PICC_HaltA (void);
|
| Amyrctdp |
0:c735c66e37d3
|
540
|
|
| Amyrctdp |
0:c735c66e37d3
|
541
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
542
|
//@}
|
| Amyrctdp |
0:c735c66e37d3
|
543
|
|
| Amyrctdp |
0:c735c66e37d3
|
544
|
|
| Amyrctdp |
0:c735c66e37d3
|
545
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
546
|
//! @name Functions for communicating with MIFARE PICCs
|
| Amyrctdp |
0:c735c66e37d3
|
547
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
548
|
//@{
|
| Amyrctdp |
0:c735c66e37d3
|
549
|
|
| Amyrctdp |
0:c735c66e37d3
|
550
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
551
|
* Executes the MFRC522 MFAuthent command.
|
| Amyrctdp |
0:c735c66e37d3
|
552
|
* This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
|
| Amyrctdp |
0:c735c66e37d3
|
553
|
* The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
|
| Amyrctdp |
0:c735c66e37d3
|
554
|
* For use with MIFARE Classic PICCs.
|
| Amyrctdp |
0:c735c66e37d3
|
555
|
* The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
556
|
* Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
|
| Amyrctdp |
0:c735c66e37d3
|
557
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
558
|
* All keys are set to FFFFFFFFFFFFh at chip delivery.
|
| Amyrctdp |
0:c735c66e37d3
|
559
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
560
|
* @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
|
| Amyrctdp |
0:c735c66e37d3
|
561
|
* @param blockAddr The block number. See numbering in the comments in the .h file.
|
| Amyrctdp |
0:c735c66e37d3
|
562
|
* @param key Pointer to the Crypteo1 key to use (6 bytes)
|
| Amyrctdp |
0:c735c66e37d3
|
563
|
* @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
|
| Amyrctdp |
0:c735c66e37d3
|
564
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
565
|
* @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
|
| Amyrctdp |
0:c735c66e37d3
|
566
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
567
|
uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
|
| Amyrctdp |
0:c735c66e37d3
|
568
|
|
| Amyrctdp |
0:c735c66e37d3
|
569
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
570
|
* Used to exit the PCD from its authenticated state.
|
| Amyrctdp |
0:c735c66e37d3
|
571
|
* Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
|
| Amyrctdp |
0:c735c66e37d3
|
572
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
573
|
void PCD_StopCrypto1 (void);
|
| Amyrctdp |
0:c735c66e37d3
|
574
|
|
| Amyrctdp |
0:c735c66e37d3
|
575
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
576
|
* Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
577
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
578
|
* For MIFARE Classic the sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
579
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
580
|
* For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
|
| Amyrctdp |
0:c735c66e37d3
|
581
|
* The MF0ICU1 returns a NAK for higher addresses.
|
| Amyrctdp |
0:c735c66e37d3
|
582
|
* The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
|
| Amyrctdp |
0:c735c66e37d3
|
583
|
* For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
|
| Amyrctdp |
0:c735c66e37d3
|
584
|
* A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
|
| Amyrctdp |
0:c735c66e37d3
|
585
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
586
|
* The buffer must be at least 18 bytes because a CRC_A is also returned.
|
| Amyrctdp |
0:c735c66e37d3
|
587
|
* Checks the CRC_A before returning STATUS_OK.
|
| Amyrctdp |
0:c735c66e37d3
|
588
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
589
|
* @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
|
| Amyrctdp |
0:c735c66e37d3
|
590
|
* @param buffer The buffer to store the data in
|
| Amyrctdp |
0:c735c66e37d3
|
591
|
* @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
|
| Amyrctdp |
0:c735c66e37d3
|
592
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
593
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
594
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
595
|
uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
596
|
|
| Amyrctdp |
0:c735c66e37d3
|
597
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
598
|
* Writes 16 bytes to the active PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
599
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
600
|
* For MIFARE Classic the sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
601
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
602
|
* For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
|
| Amyrctdp |
0:c735c66e37d3
|
603
|
* Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
|
| Amyrctdp |
0:c735c66e37d3
|
604
|
* are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
|
| Amyrctdp |
0:c735c66e37d3
|
605
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
606
|
* @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
|
| Amyrctdp |
0:c735c66e37d3
|
607
|
* @param buffer The 16 bytes to write to the PICC
|
| Amyrctdp |
0:c735c66e37d3
|
608
|
* @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
|
| Amyrctdp |
0:c735c66e37d3
|
609
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
610
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
611
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
612
|
uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
613
|
|
| Amyrctdp |
0:c735c66e37d3
|
614
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
615
|
* Writes a 4 byte page to the active MIFARE Ultralight PICC.
|
| Amyrctdp |
0:c735c66e37d3
|
616
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
617
|
* @param page The page (2-15) to write to.
|
| Amyrctdp |
0:c735c66e37d3
|
618
|
* @param buffer The 4 bytes to write to the PICC
|
| Amyrctdp |
0:c735c66e37d3
|
619
|
* @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
|
| Amyrctdp |
0:c735c66e37d3
|
620
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
621
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
622
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
623
|
uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
|
| Amyrctdp |
0:c735c66e37d3
|
624
|
|
| Amyrctdp |
0:c735c66e37d3
|
625
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
626
|
* MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
|
| Amyrctdp |
0:c735c66e37d3
|
627
|
* For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
628
|
* Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
|
| Amyrctdp |
0:c735c66e37d3
|
629
|
* Use MIFARE_Transfer() to store the result in a block.
|
| Amyrctdp |
0:c735c66e37d3
|
630
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
631
|
* @param blockAddr The block (0-0xff) number.
|
| Amyrctdp |
0:c735c66e37d3
|
632
|
* @param delta This number is subtracted from the value of block blockAddr.
|
| Amyrctdp |
0:c735c66e37d3
|
633
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
634
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
635
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
636
|
uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
|
| Amyrctdp |
0:c735c66e37d3
|
637
|
|
| Amyrctdp |
0:c735c66e37d3
|
638
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
639
|
* MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
|
| Amyrctdp |
0:c735c66e37d3
|
640
|
* For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
641
|
* Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
|
| Amyrctdp |
0:c735c66e37d3
|
642
|
* Use MIFARE_Transfer() to store the result in a block.
|
| Amyrctdp |
0:c735c66e37d3
|
643
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
644
|
* @param blockAddr The block (0-0xff) number.
|
| Amyrctdp |
0:c735c66e37d3
|
645
|
* @param delta This number is added to the value of block blockAddr.
|
| Amyrctdp |
0:c735c66e37d3
|
646
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
647
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
648
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
649
|
uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
|
| Amyrctdp |
0:c735c66e37d3
|
650
|
|
| Amyrctdp |
0:c735c66e37d3
|
651
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
652
|
* MIFARE Restore copies the value of the addressed block into a volatile memory.
|
| Amyrctdp |
0:c735c66e37d3
|
653
|
* For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
654
|
* Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
|
| Amyrctdp |
0:c735c66e37d3
|
655
|
* Use MIFARE_Transfer() to store the result in a block.
|
| Amyrctdp |
0:c735c66e37d3
|
656
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
657
|
* @param blockAddr The block (0-0xff) number.
|
| Amyrctdp |
0:c735c66e37d3
|
658
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
659
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
660
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
661
|
uint8_t MIFARE_Restore (uint8_t blockAddr);
|
| Amyrctdp |
0:c735c66e37d3
|
662
|
|
| Amyrctdp |
0:c735c66e37d3
|
663
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
664
|
* MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
|
| Amyrctdp |
0:c735c66e37d3
|
665
|
* For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
|
| Amyrctdp |
0:c735c66e37d3
|
666
|
* Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
|
| Amyrctdp |
0:c735c66e37d3
|
667
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
668
|
* @param blockAddr The block (0-0xff) number.
|
| Amyrctdp |
0:c735c66e37d3
|
669
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
670
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
671
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
672
|
uint8_t MIFARE_Transfer (uint8_t blockAddr);
|
| Amyrctdp |
0:c735c66e37d3
|
673
|
|
| Amyrctdp |
0:c735c66e37d3
|
674
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
675
|
//@}
|
| Amyrctdp |
0:c735c66e37d3
|
676
|
|
| Amyrctdp |
0:c735c66e37d3
|
677
|
|
| Amyrctdp |
0:c735c66e37d3
|
678
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
679
|
//! @name Support functions
|
| Amyrctdp |
0:c735c66e37d3
|
680
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
681
|
//@{
|
| Amyrctdp |
0:c735c66e37d3
|
682
|
|
| Amyrctdp |
0:c735c66e37d3
|
683
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
684
|
* Wrapper for MIFARE protocol communication.
|
| Amyrctdp |
0:c735c66e37d3
|
685
|
* Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
|
| Amyrctdp |
0:c735c66e37d3
|
686
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
687
|
* @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
|
| Amyrctdp |
0:c735c66e37d3
|
688
|
* @param sendLen Number of bytes in sendData.
|
| Amyrctdp |
0:c735c66e37d3
|
689
|
* @param acceptTimeout True => A timeout is also success
|
| Amyrctdp |
0:c735c66e37d3
|
690
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
691
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
692
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
693
|
uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
|
| Amyrctdp |
0:c735c66e37d3
|
694
|
|
| Amyrctdp |
0:c735c66e37d3
|
695
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
696
|
* Translates the SAK (Select Acknowledge) to a PICC type.
|
| Amyrctdp |
0:c735c66e37d3
|
697
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
698
|
* @param sak The SAK byte returned from PICC_Select().
|
| Amyrctdp |
0:c735c66e37d3
|
699
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
700
|
* @return PICC_Type
|
| Amyrctdp |
0:c735c66e37d3
|
701
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
702
|
uint8_t PICC_GetType (uint8_t sak);
|
| Amyrctdp |
0:c735c66e37d3
|
703
|
|
| Amyrctdp |
0:c735c66e37d3
|
704
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
705
|
* Returns a string pointer to the PICC type name.
|
| Amyrctdp |
0:c735c66e37d3
|
706
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
707
|
* @param type One of the PICC_Type enums.
|
| Amyrctdp |
0:c735c66e37d3
|
708
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
709
|
* @return A string pointer to the PICC type name.
|
| Amyrctdp |
0:c735c66e37d3
|
710
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
711
|
char* PICC_GetTypeName (uint8_t type);
|
| Amyrctdp |
0:c735c66e37d3
|
712
|
|
| Amyrctdp |
0:c735c66e37d3
|
713
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
714
|
* Returns a string pointer to a status code name.
|
| Amyrctdp |
0:c735c66e37d3
|
715
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
716
|
* @param code One of the StatusCode enums.
|
| Amyrctdp |
0:c735c66e37d3
|
717
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
718
|
* @return A string pointer to a status code name.
|
| Amyrctdp |
0:c735c66e37d3
|
719
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
720
|
char* GetStatusCodeName (uint8_t code);
|
| Amyrctdp |
0:c735c66e37d3
|
721
|
|
| Amyrctdp |
0:c735c66e37d3
|
722
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
723
|
* Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
|
| Amyrctdp |
0:c735c66e37d3
|
724
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
725
|
* @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
|
| Amyrctdp |
0:c735c66e37d3
|
726
|
* @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
|
| Amyrctdp |
0:c735c66e37d3
|
727
|
* @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
|
| Amyrctdp |
0:c735c66e37d3
|
728
|
* @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
|
| Amyrctdp |
0:c735c66e37d3
|
729
|
* @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
|
| Amyrctdp |
0:c735c66e37d3
|
730
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
731
|
void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
|
| Amyrctdp |
0:c735c66e37d3
|
732
|
uint8_t g0,
|
| Amyrctdp |
0:c735c66e37d3
|
733
|
uint8_t g1,
|
| Amyrctdp |
0:c735c66e37d3
|
734
|
uint8_t g2,
|
| Amyrctdp |
0:c735c66e37d3
|
735
|
uint8_t g3);
|
| Amyrctdp |
0:c735c66e37d3
|
736
|
|
| Amyrctdp |
0:c735c66e37d3
|
737
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
738
|
//@}
|
| Amyrctdp |
0:c735c66e37d3
|
739
|
|
| Amyrctdp |
0:c735c66e37d3
|
740
|
|
| Amyrctdp |
0:c735c66e37d3
|
741
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
742
|
//! @name Convenience functions - does not add extra functionality
|
| Amyrctdp |
0:c735c66e37d3
|
743
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
744
|
//@{
|
| Amyrctdp |
0:c735c66e37d3
|
745
|
|
| Amyrctdp |
0:c735c66e37d3
|
746
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
747
|
* Returns true if a PICC responds to PICC_CMD_REQA.
|
| Amyrctdp |
0:c735c66e37d3
|
748
|
* Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
|
| Amyrctdp |
0:c735c66e37d3
|
749
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
750
|
* @return bool
|
| Amyrctdp |
0:c735c66e37d3
|
751
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
752
|
bool PICC_IsNewCardPresent(void);
|
| Amyrctdp |
0:c735c66e37d3
|
753
|
|
| Amyrctdp |
0:c735c66e37d3
|
754
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
755
|
* Simple wrapper around PICC_Select.
|
| Amyrctdp |
0:c735c66e37d3
|
756
|
* Returns true if a UID could be read.
|
| Amyrctdp |
0:c735c66e37d3
|
757
|
* Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
|
| Amyrctdp |
0:c735c66e37d3
|
758
|
* The read UID is available in the class variable uid.
|
| Amyrctdp |
0:c735c66e37d3
|
759
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
760
|
* @return bool
|
| Amyrctdp |
0:c735c66e37d3
|
761
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
762
|
bool PICC_ReadCardSerial (void);
|
| Amyrctdp |
0:c735c66e37d3
|
763
|
|
| Amyrctdp |
0:c735c66e37d3
|
764
|
// ************************************************************************************
|
| Amyrctdp |
0:c735c66e37d3
|
765
|
//@}
|
| Amyrctdp |
0:c735c66e37d3
|
766
|
|
| Amyrctdp |
0:c735c66e37d3
|
767
|
|
| Amyrctdp |
0:c735c66e37d3
|
768
|
private:
|
| Amyrctdp |
0:c735c66e37d3
|
769
|
SPI m_SPI;
|
| Amyrctdp |
0:c735c66e37d3
|
770
|
DigitalOut m_CS;
|
| Amyrctdp |
0:c735c66e37d3
|
771
|
DigitalOut m_RESET;
|
| Amyrctdp |
0:c735c66e37d3
|
772
|
|
| Amyrctdp |
0:c735c66e37d3
|
773
|
/**
|
| Amyrctdp |
0:c735c66e37d3
|
774
|
* Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
|
| Amyrctdp |
0:c735c66e37d3
|
775
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
776
|
* @param command The command to use
|
| Amyrctdp |
0:c735c66e37d3
|
777
|
* @param blockAddr The block (0-0xff) number.
|
| Amyrctdp |
0:c735c66e37d3
|
778
|
* @param data The data to transfer in step 2
|
| Amyrctdp |
0:c735c66e37d3
|
779
|
*
|
| Amyrctdp |
0:c735c66e37d3
|
780
|
* @return STATUS_OK on success, STATUS_??? otherwise.
|
| Amyrctdp |
0:c735c66e37d3
|
781
|
*/
|
| Amyrctdp |
0:c735c66e37d3
|
782
|
uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
|
| Amyrctdp |
0:c735c66e37d3
|
783
|
};
|
| Amyrctdp |
0:c735c66e37d3
|
784
|
|
| Amyrctdp |
0:c735c66e37d3
|
785
|
#endif
|