Anyela Prado / MFRC522

rfid

Dependents:   ETRFID

MFRC522.cpp@1:d1848b96870f, 2022-01-23 (annotated)

Committer:
anyela
Date:
Sun Jan 23 05:02:23 2022 +0000
Revision:
1:d1848b96870f
Parent:
0:c735c66e37d3 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Amyrctdp 0:c735c66e37d3 1 /*
Amyrctdp 0:c735c66e37d3 2 * MFRC522.cpp - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
Amyrctdp 0:c735c66e37d3 3 * _Please_ see the comments in MFRC522.h - they give useful hints and background.
Amyrctdp 0:c735c66e37d3 4 * Released into the public domain.
Amyrctdp 0:c735c66e37d3 5 */
Amyrctdp 0:c735c66e37d3 6
Amyrctdp 0:c735c66e37d3 7 #include "MFRC522.h"
Amyrctdp 0:c735c66e37d3 8
Amyrctdp 0:c735c66e37d3 9 static const char* const _TypeNamePICC[] =
Amyrctdp 0:c735c66e37d3 10 {
Amyrctdp 0:c735c66e37d3 11 "Unknown type",
Amyrctdp 0:c735c66e37d3 12 "PICC compliant with ISO/IEC 14443-4",
Amyrctdp 0:c735c66e37d3 13 "PICC compliant with ISO/IEC 18092 (NFC)",
Amyrctdp 0:c735c66e37d3 14 "MIFARE Mini, 320 bytes",
Amyrctdp 0:c735c66e37d3 15 "MIFARE 1KB",
Amyrctdp 0:c735c66e37d3 16 "MIFARE 4KB",
Amyrctdp 0:c735c66e37d3 17 "MIFARE Ultralight or Ultralight C",
Amyrctdp 0:c735c66e37d3 18 "MIFARE Plus",
Amyrctdp 0:c735c66e37d3 19 "MIFARE TNP3XXX",
Amyrctdp 0:c735c66e37d3 20
Amyrctdp 0:c735c66e37d3 21 /* not complete UID */
Amyrctdp 0:c735c66e37d3 22 "SAK indicates UID is not complete"
Amyrctdp 0:c735c66e37d3 23 };
Amyrctdp 0:c735c66e37d3 24
Amyrctdp 0:c735c66e37d3 25 static const char* const _ErrorMessage[] =
Amyrctdp 0:c735c66e37d3 26 {
Amyrctdp 0:c735c66e37d3 27 "Unknown error",
Amyrctdp 0:c735c66e37d3 28 "Success",
Amyrctdp 0:c735c66e37d3 29 "Error in communication",
Amyrctdp 0:c735c66e37d3 30 "Collision detected",
Amyrctdp 0:c735c66e37d3 31 "Timeout in communication",
Amyrctdp 0:c735c66e37d3 32 "A buffer is not big enough",
Amyrctdp 0:c735c66e37d3 33 "Internal error in the code, should not happen",
Amyrctdp 0:c735c66e37d3 34 "Invalid argument",
Amyrctdp 0:c735c66e37d3 35 "The CRC_A does not match",
Amyrctdp 0:c735c66e37d3 36 "A MIFARE PICC responded with NAK"
Amyrctdp 0:c735c66e37d3 37 };
Amyrctdp 0:c735c66e37d3 38
Amyrctdp 0:c735c66e37d3 39 #define MFRC522_MaxPICCs (sizeof(_TypeNamePICC)/sizeof(_TypeNamePICC[0]))
Amyrctdp 0:c735c66e37d3 40 #define MFRC522_MaxError (sizeof(_ErrorMessage)/sizeof(_ErrorMessage[0]))
Amyrctdp 0:c735c66e37d3 41
Amyrctdp 0:c735c66e37d3 42 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 43 // Functions for setting up the driver
Amyrctdp 0:c735c66e37d3 44 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 45
Amyrctdp 0:c735c66e37d3 46 /**
Amyrctdp 0:c735c66e37d3 47 * Constructor.
Amyrctdp 0:c735c66e37d3 48 * Prepares the output pins.
Amyrctdp 0:c735c66e37d3 49 */
Amyrctdp 0:c735c66e37d3 50 MFRC522::MFRC522(PinName mosi,
Amyrctdp 0:c735c66e37d3 51 PinName miso,
Amyrctdp 0:c735c66e37d3 52 PinName sclk,
Amyrctdp 0:c735c66e37d3 53 PinName cs,
Amyrctdp 0:c735c66e37d3 54 PinName reset) : m_SPI(mosi, miso, sclk), m_CS(cs), m_RESET(reset)
Amyrctdp 0:c735c66e37d3 55 {
Amyrctdp 0:c735c66e37d3 56 /* Configure SPI bus */
Amyrctdp 0:c735c66e37d3 57 m_SPI.format(8, 0);
Amyrctdp 0:c735c66e37d3 58 m_SPI.frequency(8000000);
Amyrctdp 0:c735c66e37d3 59
Amyrctdp 0:c735c66e37d3 60 /* Release SPI-CS pin */
Amyrctdp 0:c735c66e37d3 61 m_CS = 1;
Amyrctdp 0:c735c66e37d3 62
Amyrctdp 0:c735c66e37d3 63 /* Release RESET pin */
Amyrctdp 0:c735c66e37d3 64 m_RESET = 1;
Amyrctdp 0:c735c66e37d3 65 } // End constructor
Amyrctdp 0:c735c66e37d3 66
Amyrctdp 0:c735c66e37d3 67
Amyrctdp 0:c735c66e37d3 68 /**
Amyrctdp 0:c735c66e37d3 69 * Destructor.
Amyrctdp 0:c735c66e37d3 70 */
Amyrctdp 0:c735c66e37d3 71 MFRC522::~MFRC522()
Amyrctdp 0:c735c66e37d3 72 {
Amyrctdp 0:c735c66e37d3 73
Amyrctdp 0:c735c66e37d3 74 }
Amyrctdp 0:c735c66e37d3 75
Amyrctdp 0:c735c66e37d3 76
Amyrctdp 0:c735c66e37d3 77 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 78 // Basic interface functions for communicating with the MFRC522
Amyrctdp 0:c735c66e37d3 79 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 80
Amyrctdp 0:c735c66e37d3 81 /**
Amyrctdp 0:c735c66e37d3 82 * Writes a byte to the specified register in the MFRC522 chip.
Amyrctdp 0:c735c66e37d3 83 * The interface is described in the datasheet section 8.1.2.
Amyrctdp 0:c735c66e37d3 84 */
Amyrctdp 0:c735c66e37d3 85 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t value)
Amyrctdp 0:c735c66e37d3 86 {
Amyrctdp 0:c735c66e37d3 87 m_CS = 0; /* Select SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 88
Amyrctdp 0:c735c66e37d3 89 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
Amyrctdp 0:c735c66e37d3 90 (void) m_SPI.write(reg & 0x7E);
Amyrctdp 0:c735c66e37d3 91 (void) m_SPI.write(value);
Amyrctdp 0:c735c66e37d3 92
Amyrctdp 0:c735c66e37d3 93 m_CS = 1; /* Release SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 94 } // End PCD_WriteRegister()
Amyrctdp 0:c735c66e37d3 95
Amyrctdp 0:c735c66e37d3 96 /**
Amyrctdp 0:c735c66e37d3 97 * Writes a number of bytes to the specified register in the MFRC522 chip.
Amyrctdp 0:c735c66e37d3 98 * The interface is described in the datasheet section 8.1.2.
Amyrctdp 0:c735c66e37d3 99 */
Amyrctdp 0:c735c66e37d3 100 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t count, uint8_t *values)
Amyrctdp 0:c735c66e37d3 101 {
Amyrctdp 0:c735c66e37d3 102 m_CS = 0; /* Select SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 103
Amyrctdp 0:c735c66e37d3 104 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
Amyrctdp 0:c735c66e37d3 105 (void) m_SPI.write(reg & 0x7E);
Amyrctdp 0:c735c66e37d3 106 for (uint8_t index = 0; index < count; index++)
Amyrctdp 0:c735c66e37d3 107 {
Amyrctdp 0:c735c66e37d3 108 (void) m_SPI.write(values[index]);
Amyrctdp 0:c735c66e37d3 109 }
Amyrctdp 0:c735c66e37d3 110
Amyrctdp 0:c735c66e37d3 111 m_CS = 1; /* Release SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 112 } // End PCD_WriteRegister()
Amyrctdp 0:c735c66e37d3 113
Amyrctdp 0:c735c66e37d3 114 /**
Amyrctdp 0:c735c66e37d3 115 * Reads a byte from the specified register in the MFRC522 chip.
Amyrctdp 0:c735c66e37d3 116 * The interface is described in the datasheet section 8.1.2.
Amyrctdp 0:c735c66e37d3 117 */
Amyrctdp 0:c735c66e37d3 118 uint8_t MFRC522::PCD_ReadRegister(uint8_t reg)
Amyrctdp 0:c735c66e37d3 119 {
Amyrctdp 0:c735c66e37d3 120 uint8_t value;
Amyrctdp 0:c735c66e37d3 121 m_CS = 0; /* Select SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 122
Amyrctdp 0:c735c66e37d3 123 // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
Amyrctdp 0:c735c66e37d3 124 (void) m_SPI.write(0x80 | reg);
Amyrctdp 0:c735c66e37d3 125
Amyrctdp 0:c735c66e37d3 126 // Read the value back. Send 0 to stop reading.
Amyrctdp 0:c735c66e37d3 127 value = m_SPI.write(0);
Amyrctdp 0:c735c66e37d3 128
Amyrctdp 0:c735c66e37d3 129 m_CS = 1; /* Release SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 130
Amyrctdp 0:c735c66e37d3 131 return value;
Amyrctdp 0:c735c66e37d3 132 } // End PCD_ReadRegister()
Amyrctdp 0:c735c66e37d3 133
Amyrctdp 0:c735c66e37d3 134 /**
Amyrctdp 0:c735c66e37d3 135 * Reads a number of bytes from the specified register in the MFRC522 chip.
Amyrctdp 0:c735c66e37d3 136 * The interface is described in the datasheet section 8.1.2.
Amyrctdp 0:c735c66e37d3 137 */
Amyrctdp 0:c735c66e37d3 138 void MFRC522::PCD_ReadRegister(uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign)
Amyrctdp 0:c735c66e37d3 139 {
Amyrctdp 0:c735c66e37d3 140 if (count == 0) { return; }
Amyrctdp 0:c735c66e37d3 141
Amyrctdp 0:c735c66e37d3 142 uint8_t address = 0x80 | reg; // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
Amyrctdp 0:c735c66e37d3 143 uint8_t index = 0; // Index in values array.
Amyrctdp 0:c735c66e37d3 144
Amyrctdp 0:c735c66e37d3 145 m_CS = 0; /* Select SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 146 count--; // One read is performed outside of the loop
Amyrctdp 0:c735c66e37d3 147 (void) m_SPI.write(address); // Tell MFRC522 which address we want to read
Amyrctdp 0:c735c66e37d3 148
Amyrctdp 0:c735c66e37d3 149 while (index < count)
Amyrctdp 0:c735c66e37d3 150 {
Amyrctdp 0:c735c66e37d3 151 if ((index == 0) && rxAlign) // Only update bit positions rxAlign..7 in values[0]
Amyrctdp 0:c735c66e37d3 152 {
Amyrctdp 0:c735c66e37d3 153 // Create bit mask for bit positions rxAlign..7
Amyrctdp 0:c735c66e37d3 154 uint8_t mask = 0;
Amyrctdp 0:c735c66e37d3 155 for (uint8_t i = rxAlign; i <= 7; i++)
Amyrctdp 0:c735c66e37d3 156 {
Amyrctdp 0:c735c66e37d3 157 mask |= (1 << i);
Amyrctdp 0:c735c66e37d3 158 }
Amyrctdp 0:c735c66e37d3 159
Amyrctdp 0:c735c66e37d3 160 // Read value and tell that we want to read the same address again.
Amyrctdp 0:c735c66e37d3 161 uint8_t value = m_SPI.write(address);
Amyrctdp 0:c735c66e37d3 162
Amyrctdp 0:c735c66e37d3 163 // Apply mask to both current value of values[0] and the new data in value.
Amyrctdp 0:c735c66e37d3 164 values[0] = (values[index] & ~mask) | (value & mask);
Amyrctdp 0:c735c66e37d3 165 }
Amyrctdp 0:c735c66e37d3 166 else
Amyrctdp 0:c735c66e37d3 167 {
Amyrctdp 0:c735c66e37d3 168 // Read value and tell that we want to read the same address again.
Amyrctdp 0:c735c66e37d3 169 values[index] = m_SPI.write(address);
Amyrctdp 0:c735c66e37d3 170 }
Amyrctdp 0:c735c66e37d3 171
Amyrctdp 0:c735c66e37d3 172 index++;
Amyrctdp 0:c735c66e37d3 173 }
Amyrctdp 0:c735c66e37d3 174
Amyrctdp 0:c735c66e37d3 175 values[index] = m_SPI.write(0); // Read the final byte. Send 0 to stop reading.
Amyrctdp 0:c735c66e37d3 176
Amyrctdp 0:c735c66e37d3 177 m_CS = 1; /* Release SPI Chip MFRC522 */
Amyrctdp 0:c735c66e37d3 178 } // End PCD_ReadRegister()
Amyrctdp 0:c735c66e37d3 179
Amyrctdp 0:c735c66e37d3 180 /**
Amyrctdp 0:c735c66e37d3 181 * Sets the bits given in mask in register reg.
Amyrctdp 0:c735c66e37d3 182 */
Amyrctdp 0:c735c66e37d3 183 void MFRC522::PCD_SetRegisterBits(uint8_t reg, uint8_t mask)
Amyrctdp 0:c735c66e37d3 184 {
Amyrctdp 0:c735c66e37d3 185 uint8_t tmp = PCD_ReadRegister(reg);
Amyrctdp 0:c735c66e37d3 186 PCD_WriteRegister(reg, tmp | mask); // set bit mask
Amyrctdp 0:c735c66e37d3 187 } // End PCD_SetRegisterBitMask()
Amyrctdp 0:c735c66e37d3 188
Amyrctdp 0:c735c66e37d3 189 /**
Amyrctdp 0:c735c66e37d3 190 * Clears the bits given in mask from register reg.
Amyrctdp 0:c735c66e37d3 191 */
Amyrctdp 0:c735c66e37d3 192 void MFRC522::PCD_ClrRegisterBits(uint8_t reg, uint8_t mask)
Amyrctdp 0:c735c66e37d3 193 {
Amyrctdp 0:c735c66e37d3 194 uint8_t tmp = PCD_ReadRegister(reg);
Amyrctdp 0:c735c66e37d3 195 PCD_WriteRegister(reg, tmp & (~mask)); // clear bit mask
Amyrctdp 0:c735c66e37d3 196 } // End PCD_ClearRegisterBitMask()
Amyrctdp 0:c735c66e37d3 197
Amyrctdp 0:c735c66e37d3 198
Amyrctdp 0:c735c66e37d3 199 /**
Amyrctdp 0:c735c66e37d3 200 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
Amyrctdp 0:c735c66e37d3 201 */
Amyrctdp 0:c735c66e37d3 202 uint8_t MFRC522::PCD_CalculateCRC(uint8_t *data, uint8_t length, uint8_t *result)
Amyrctdp 0:c735c66e37d3 203 {
Amyrctdp 0:c735c66e37d3 204 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
Amyrctdp 0:c735c66e37d3 205 PCD_WriteRegister(DivIrqReg, 0x04); // Clear the CRCIRq interrupt request bit
Amyrctdp 0:c735c66e37d3 206 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
Amyrctdp 0:c735c66e37d3 207 PCD_WriteRegister(FIFODataReg, length, data); // Write data to the FIFO
Amyrctdp 0:c735c66e37d3 208 PCD_WriteRegister(CommandReg, PCD_CalcCRC); // Start the calculation
Amyrctdp 0:c735c66e37d3 209
Amyrctdp 0:c735c66e37d3 210 // Wait for the CRC calculation to complete. Each iteration of the while-loop takes 17.73us.
Amyrctdp 0:c735c66e37d3 211 uint16_t i = 5000;
Amyrctdp 0:c735c66e37d3 212 uint8_t n;
Amyrctdp 0:c735c66e37d3 213 while (1)
Amyrctdp 0:c735c66e37d3 214 {
Amyrctdp 0:c735c66e37d3 215 n = PCD_ReadRegister(DivIrqReg); // DivIrqReg[7..0] bits are: Set2 reserved reserved MfinActIRq reserved CRCIRq reserved reserved
Amyrctdp 0:c735c66e37d3 216 if (n & 0x04)
Amyrctdp 0:c735c66e37d3 217 {
Amyrctdp 0:c735c66e37d3 218 // CRCIRq bit set - calculation done
Amyrctdp 0:c735c66e37d3 219 break;
Amyrctdp 0:c735c66e37d3 220 }
Amyrctdp 0:c735c66e37d3 221
Amyrctdp 0:c735c66e37d3 222 if (--i == 0)
Amyrctdp 0:c735c66e37d3 223 {
Amyrctdp 0:c735c66e37d3 224 // The emergency break. We will eventually terminate on this one after 89ms.
Amyrctdp 0:c735c66e37d3 225 // Communication with the MFRC522 might be down.
Amyrctdp 0:c735c66e37d3 226 return STATUS_TIMEOUT;
Amyrctdp 0:c735c66e37d3 227 }
Amyrctdp 0:c735c66e37d3 228 }
Amyrctdp 0:c735c66e37d3 229
Amyrctdp 0:c735c66e37d3 230 // Stop calculating CRC for new content in the FIFO.
Amyrctdp 0:c735c66e37d3 231 PCD_WriteRegister(CommandReg, PCD_Idle);
Amyrctdp 0:c735c66e37d3 232
Amyrctdp 0:c735c66e37d3 233 // Transfer the result from the registers to the result buffer
Amyrctdp 0:c735c66e37d3 234 result[0] = PCD_ReadRegister(CRCResultRegL);
Amyrctdp 0:c735c66e37d3 235 result[1] = PCD_ReadRegister(CRCResultRegH);
Amyrctdp 0:c735c66e37d3 236 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 237 } // End PCD_CalculateCRC()
Amyrctdp 0:c735c66e37d3 238
Amyrctdp 0:c735c66e37d3 239
Amyrctdp 0:c735c66e37d3 240 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 241 // Functions for manipulating the MFRC522
Amyrctdp 0:c735c66e37d3 242 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 243
Amyrctdp 0:c735c66e37d3 244 /**
Amyrctdp 0:c735c66e37d3 245 * Initializes the MFRC522 chip.
Amyrctdp 0:c735c66e37d3 246 */
Amyrctdp 0:c735c66e37d3 247 void MFRC522::PCD_Init()
Amyrctdp 0:c735c66e37d3 248 {
Amyrctdp 0:c735c66e37d3 249 /* Reset MFRC522 */
Amyrctdp 0:c735c66e37d3 250 m_RESET = 0;
anyela 1:d1848b96870f 251 //wait_ms(10);
anyela 1:d1848b96870f 252 ThisThread::sleep_for(10ms);
Amyrctdp 0:c735c66e37d3 253 m_RESET = 1;
Amyrctdp 0:c735c66e37d3 254
Amyrctdp 0:c735c66e37d3 255 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
anyela 1:d1848b96870f 256
anyela 1:d1848b96870f 257
anyela 1:d1848b96870f 258 //wait_ms(50);
anyela 1:d1848b96870f 259 ThisThread::sleep_for(50ms);
Amyrctdp 0:c735c66e37d3 260
Amyrctdp 0:c735c66e37d3 261 // When communicating with a PICC we need a timeout if something goes wrong.
Amyrctdp 0:c735c66e37d3 262 // f_timer = 13.56 MHz / (2*TPreScaler+1) where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo].
Amyrctdp 0:c735c66e37d3 263 // TPrescaler_Hi are the four low bits in TModeReg. TPrescaler_Lo is TPrescalerReg.
Amyrctdp 0:c735c66e37d3 264 PCD_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds
Amyrctdp 0:c735c66e37d3 265 PCD_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25us.
Amyrctdp 0:c735c66e37d3 266 PCD_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout.
Amyrctdp 0:c735c66e37d3 267 PCD_WriteRegister(TReloadRegL, 0xE8);
Amyrctdp 0:c735c66e37d3 268
Amyrctdp 0:c735c66e37d3 269 PCD_WriteRegister(TxASKReg, 0x40); // Default 0x00. Force a 100 % ASK modulation independent of the ModGsPReg register setting
Amyrctdp 0:c735c66e37d3 270 PCD_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC coprocessor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4)
Amyrctdp 0:c735c66e37d3 271
Amyrctdp 0:c735c66e37d3 272 PCD_WriteRegister(RFCfgReg, (0x07<<4)); // Set Rx Gain to max
Amyrctdp 0:c735c66e37d3 273
Amyrctdp 0:c735c66e37d3 274 PCD_AntennaOn(); // Enable the antenna driver pins TX1 and TX2 (they were disabled by the reset)
Amyrctdp 0:c735c66e37d3 275 } // End PCD_Init()
Amyrctdp 0:c735c66e37d3 276
Amyrctdp 0:c735c66e37d3 277 /**
Amyrctdp 0:c735c66e37d3 278 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
Amyrctdp 0:c735c66e37d3 279 */
Amyrctdp 0:c735c66e37d3 280 void MFRC522::PCD_Reset()
Amyrctdp 0:c735c66e37d3 281 {
Amyrctdp 0:c735c66e37d3 282 PCD_WriteRegister(CommandReg, PCD_SoftReset); // Issue the SoftReset command.
Amyrctdp 0:c735c66e37d3 283 // The datasheet does not mention how long the SoftRest command takes to complete.
Amyrctdp 0:c735c66e37d3 284 // But the MFRC522 might have been in soft power-down mode (triggered by bit 4 of CommandReg)
Amyrctdp 0:c735c66e37d3 285 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
anyela 1:d1848b96870f 286 //wait_ms(50);
anyela 1:d1848b96870f 287 ThisThread::sleep_for(50ms);
Amyrctdp 0:c735c66e37d3 288
Amyrctdp 0:c735c66e37d3 289 // Wait for the PowerDown bit in CommandReg to be cleared
Amyrctdp 0:c735c66e37d3 290 while (PCD_ReadRegister(CommandReg) & (1<<4))
Amyrctdp 0:c735c66e37d3 291 {
Amyrctdp 0:c735c66e37d3 292 // PCD still restarting - unlikely after waiting 50ms, but better safe than sorry.
Amyrctdp 0:c735c66e37d3 293 }
Amyrctdp 0:c735c66e37d3 294 } // End PCD_Reset()
Amyrctdp 0:c735c66e37d3 295
Amyrctdp 0:c735c66e37d3 296 /**
Amyrctdp 0:c735c66e37d3 297 * Turns the antenna on by enabling pins TX1 and TX2.
Amyrctdp 0:c735c66e37d3 298 * After a reset these pins disabled.
Amyrctdp 0:c735c66e37d3 299 */
Amyrctdp 0:c735c66e37d3 300 void MFRC522::PCD_AntennaOn()
Amyrctdp 0:c735c66e37d3 301 {
Amyrctdp 0:c735c66e37d3 302 uint8_t value = PCD_ReadRegister(TxControlReg);
Amyrctdp 0:c735c66e37d3 303 if ((value & 0x03) != 0x03)
Amyrctdp 0:c735c66e37d3 304 {
Amyrctdp 0:c735c66e37d3 305 PCD_WriteRegister(TxControlReg, value | 0x03);
Amyrctdp 0:c735c66e37d3 306 }
Amyrctdp 0:c735c66e37d3 307 } // End PCD_AntennaOn()
Amyrctdp 0:c735c66e37d3 308
Amyrctdp 0:c735c66e37d3 309 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 310 // Functions for communicating with PICCs
Amyrctdp 0:c735c66e37d3 311 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 312
Amyrctdp 0:c735c66e37d3 313 /**
Amyrctdp 0:c735c66e37d3 314 * Executes the Transceive command.
Amyrctdp 0:c735c66e37d3 315 * CRC validation can only be done if backData and backLen are specified.
Amyrctdp 0:c735c66e37d3 316 */
Amyrctdp 0:c735c66e37d3 317 uint8_t MFRC522::PCD_TransceiveData(uint8_t *sendData,
Amyrctdp 0:c735c66e37d3 318 uint8_t sendLen,
Amyrctdp 0:c735c66e37d3 319 uint8_t *backData,
Amyrctdp 0:c735c66e37d3 320 uint8_t *backLen,
Amyrctdp 0:c735c66e37d3 321 uint8_t *validBits,
Amyrctdp 0:c735c66e37d3 322 uint8_t rxAlign,
Amyrctdp 0:c735c66e37d3 323 bool checkCRC)
Amyrctdp 0:c735c66e37d3 324 {
Amyrctdp 0:c735c66e37d3 325 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
Amyrctdp 0:c735c66e37d3 326 return PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, sendData, sendLen, backData, backLen, validBits, rxAlign, checkCRC);
Amyrctdp 0:c735c66e37d3 327 } // End PCD_TransceiveData()
Amyrctdp 0:c735c66e37d3 328
Amyrctdp 0:c735c66e37d3 329 /**
Amyrctdp 0:c735c66e37d3 330 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
Amyrctdp 0:c735c66e37d3 331 * CRC validation can only be done if backData and backLen are specified.
Amyrctdp 0:c735c66e37d3 332 */
Amyrctdp 0:c735c66e37d3 333 uint8_t MFRC522::PCD_CommunicateWithPICC(uint8_t command,
Amyrctdp 0:c735c66e37d3 334 uint8_t waitIRq,
Amyrctdp 0:c735c66e37d3 335 uint8_t *sendData,
Amyrctdp 0:c735c66e37d3 336 uint8_t sendLen,
Amyrctdp 0:c735c66e37d3 337 uint8_t *backData,
Amyrctdp 0:c735c66e37d3 338 uint8_t *backLen,
Amyrctdp 0:c735c66e37d3 339 uint8_t *validBits,
Amyrctdp 0:c735c66e37d3 340 uint8_t rxAlign,
Amyrctdp 0:c735c66e37d3 341 bool checkCRC)
Amyrctdp 0:c735c66e37d3 342 {
Amyrctdp 0:c735c66e37d3 343 uint8_t n, _validBits = 0;
Amyrctdp 0:c735c66e37d3 344 uint32_t i;
Amyrctdp 0:c735c66e37d3 345
Amyrctdp 0:c735c66e37d3 346 // Prepare values for BitFramingReg
Amyrctdp 0:c735c66e37d3 347 uint8_t txLastBits = validBits ? *validBits : 0;
Amyrctdp 0:c735c66e37d3 348 uint8_t bitFraming = (rxAlign << 4) + txLastBits; // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
Amyrctdp 0:c735c66e37d3 349
Amyrctdp 0:c735c66e37d3 350 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
Amyrctdp 0:c735c66e37d3 351 PCD_WriteRegister(ComIrqReg, 0x7F); // Clear all seven interrupt request bits
Amyrctdp 0:c735c66e37d3 352 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
Amyrctdp 0:c735c66e37d3 353 PCD_WriteRegister(FIFODataReg, sendLen, sendData); // Write sendData to the FIFO
Amyrctdp 0:c735c66e37d3 354 PCD_WriteRegister(BitFramingReg, bitFraming); // Bit adjustments
Amyrctdp 0:c735c66e37d3 355 PCD_WriteRegister(CommandReg, command); // Execute the command
Amyrctdp 0:c735c66e37d3 356 if (command == PCD_Transceive)
Amyrctdp 0:c735c66e37d3 357 {
Amyrctdp 0:c735c66e37d3 358 PCD_SetRegisterBits(BitFramingReg, 0x80); // StartSend=1, transmission of data starts
Amyrctdp 0:c735c66e37d3 359 }
Amyrctdp 0:c735c66e37d3 360
Amyrctdp 0:c735c66e37d3 361 // Wait for the command to complete.
Amyrctdp 0:c735c66e37d3 362 // In PCD_Init() we set the TAuto flag in TModeReg. This means the timer automatically starts when the PCD stops transmitting.
Amyrctdp 0:c735c66e37d3 363 // Each iteration of the do-while-loop takes 17.86us.
Amyrctdp 0:c735c66e37d3 364 i = 2000;
Amyrctdp 0:c735c66e37d3 365 while (1)
Amyrctdp 0:c735c66e37d3 366 {
Amyrctdp 0:c735c66e37d3 367 n = PCD_ReadRegister(ComIrqReg); // ComIrqReg[7..0] bits are: Set1 TxIRq RxIRq IdleIRq HiAlertIRq LoAlertIRq ErrIRq TimerIRq
Amyrctdp 0:c735c66e37d3 368 if (n & waitIRq)
Amyrctdp 0:c735c66e37d3 369 { // One of the interrupts that signal success has been set.
Amyrctdp 0:c735c66e37d3 370 break;
Amyrctdp 0:c735c66e37d3 371 }
Amyrctdp 0:c735c66e37d3 372
Amyrctdp 0:c735c66e37d3 373 if (n & 0x01)
Amyrctdp 0:c735c66e37d3 374 { // Timer interrupt - nothing received in 25ms
Amyrctdp 0:c735c66e37d3 375 return STATUS_TIMEOUT;
Amyrctdp 0:c735c66e37d3 376 }
Amyrctdp 0:c735c66e37d3 377
Amyrctdp 0:c735c66e37d3 378 if (--i == 0)
Amyrctdp 0:c735c66e37d3 379 { // The emergency break. If all other condions fail we will eventually terminate on this one after 35.7ms. Communication with the MFRC522 might be down.
Amyrctdp 0:c735c66e37d3 380 return STATUS_TIMEOUT;
Amyrctdp 0:c735c66e37d3 381 }
Amyrctdp 0:c735c66e37d3 382 }
Amyrctdp 0:c735c66e37d3 383
Amyrctdp 0:c735c66e37d3 384 // Stop now if any errors except collisions were detected.
Amyrctdp 0:c735c66e37d3 385 uint8_t errorRegValue = PCD_ReadRegister(ErrorReg); // ErrorReg[7..0] bits are: WrErr TempErr reserved BufferOvfl CollErr CRCErr ParityErr ProtocolErr
Amyrctdp 0:c735c66e37d3 386 if (errorRegValue & 0x13)
Amyrctdp 0:c735c66e37d3 387 { // BufferOvfl ParityErr ProtocolErr
Amyrctdp 0:c735c66e37d3 388 return STATUS_ERROR;
Amyrctdp 0:c735c66e37d3 389 }
Amyrctdp 0:c735c66e37d3 390
Amyrctdp 0:c735c66e37d3 391 // If the caller wants data back, get it from the MFRC522.
Amyrctdp 0:c735c66e37d3 392 if (backData && backLen)
Amyrctdp 0:c735c66e37d3 393 {
Amyrctdp 0:c735c66e37d3 394 n = PCD_ReadRegister(FIFOLevelReg); // Number of bytes in the FIFO
Amyrctdp 0:c735c66e37d3 395 if (n > *backLen)
Amyrctdp 0:c735c66e37d3 396 {
Amyrctdp 0:c735c66e37d3 397 return STATUS_NO_ROOM;
Amyrctdp 0:c735c66e37d3 398 }
Amyrctdp 0:c735c66e37d3 399
Amyrctdp 0:c735c66e37d3 400 *backLen = n; // Number of bytes returned
Amyrctdp 0:c735c66e37d3 401 PCD_ReadRegister(FIFODataReg, n, backData, rxAlign); // Get received data from FIFO
Amyrctdp 0:c735c66e37d3 402 _validBits = PCD_ReadRegister(ControlReg) & 0x07; // RxLastBits[2:0] indicates the number of valid bits in the last received byte. If this value is 000b, the whole byte is valid.
Amyrctdp 0:c735c66e37d3 403 if (validBits)
Amyrctdp 0:c735c66e37d3 404 {
Amyrctdp 0:c735c66e37d3 405 *validBits = _validBits;
Amyrctdp 0:c735c66e37d3 406 }
Amyrctdp 0:c735c66e37d3 407 }
Amyrctdp 0:c735c66e37d3 408
Amyrctdp 0:c735c66e37d3 409 // Tell about collisions
Amyrctdp 0:c735c66e37d3 410 if (errorRegValue & 0x08)
Amyrctdp 0:c735c66e37d3 411 { // CollErr
Amyrctdp 0:c735c66e37d3 412 return STATUS_COLLISION;
Amyrctdp 0:c735c66e37d3 413 }
Amyrctdp 0:c735c66e37d3 414
Amyrctdp 0:c735c66e37d3 415 // Perform CRC_A validation if requested.
Amyrctdp 0:c735c66e37d3 416 if (backData && backLen && checkCRC)
Amyrctdp 0:c735c66e37d3 417 {
Amyrctdp 0:c735c66e37d3 418 // In this case a MIFARE Classic NAK is not OK.
Amyrctdp 0:c735c66e37d3 419 if ((*backLen == 1) && (_validBits == 4))
Amyrctdp 0:c735c66e37d3 420 {
Amyrctdp 0:c735c66e37d3 421 return STATUS_MIFARE_NACK;
Amyrctdp 0:c735c66e37d3 422 }
Amyrctdp 0:c735c66e37d3 423
Amyrctdp 0:c735c66e37d3 424 // We need at least the CRC_A value and all 8 bits of the last byte must be received.
Amyrctdp 0:c735c66e37d3 425 if ((*backLen < 2) || (_validBits != 0))
Amyrctdp 0:c735c66e37d3 426 {
Amyrctdp 0:c735c66e37d3 427 return STATUS_CRC_WRONG;
Amyrctdp 0:c735c66e37d3 428 }
Amyrctdp 0:c735c66e37d3 429
Amyrctdp 0:c735c66e37d3 430 // Verify CRC_A - do our own calculation and store the control in controlBuffer.
Amyrctdp 0:c735c66e37d3 431 uint8_t controlBuffer[2];
Amyrctdp 0:c735c66e37d3 432 n = PCD_CalculateCRC(&backData[0], *backLen - 2, &controlBuffer[0]);
Amyrctdp 0:c735c66e37d3 433 if (n != STATUS_OK)
Amyrctdp 0:c735c66e37d3 434 {
Amyrctdp 0:c735c66e37d3 435 return n;
Amyrctdp 0:c735c66e37d3 436 }
Amyrctdp 0:c735c66e37d3 437
Amyrctdp 0:c735c66e37d3 438 if ((backData[*backLen - 2] != controlBuffer[0]) || (backData[*backLen - 1] != controlBuffer[1]))
Amyrctdp 0:c735c66e37d3 439 {
Amyrctdp 0:c735c66e37d3 440 return STATUS_CRC_WRONG;
Amyrctdp 0:c735c66e37d3 441 }
Amyrctdp 0:c735c66e37d3 442 }
Amyrctdp 0:c735c66e37d3 443
Amyrctdp 0:c735c66e37d3 444 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 445 } // End PCD_CommunicateWithPICC()
Amyrctdp 0:c735c66e37d3 446
Amyrctdp 0:c735c66e37d3 447 /*
Amyrctdp 0:c735c66e37d3 448 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
Amyrctdp 0:c735c66e37d3 449 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Amyrctdp 0:c735c66e37d3 450 */
Amyrctdp 0:c735c66e37d3 451 uint8_t MFRC522::PICC_RequestA(uint8_t *bufferATQA, uint8_t *bufferSize)
Amyrctdp 0:c735c66e37d3 452 {
Amyrctdp 0:c735c66e37d3 453 return PICC_REQA_or_WUPA(PICC_CMD_REQA, bufferATQA, bufferSize);
Amyrctdp 0:c735c66e37d3 454 } // End PICC_RequestA()
Amyrctdp 0:c735c66e37d3 455
Amyrctdp 0:c735c66e37d3 456 /**
Amyrctdp 0:c735c66e37d3 457 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
Amyrctdp 0:c735c66e37d3 458 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Amyrctdp 0:c735c66e37d3 459 */
Amyrctdp 0:c735c66e37d3 460 uint8_t MFRC522::PICC_WakeupA(uint8_t *bufferATQA, uint8_t *bufferSize)
Amyrctdp 0:c735c66e37d3 461 {
Amyrctdp 0:c735c66e37d3 462 return PICC_REQA_or_WUPA(PICC_CMD_WUPA, bufferATQA, bufferSize);
Amyrctdp 0:c735c66e37d3 463 } // End PICC_WakeupA()
Amyrctdp 0:c735c66e37d3 464
Amyrctdp 0:c735c66e37d3 465 /*
Amyrctdp 0:c735c66e37d3 466 * Transmits REQA or WUPA commands.
Amyrctdp 0:c735c66e37d3 467 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
Amyrctdp 0:c735c66e37d3 468 */
Amyrctdp 0:c735c66e37d3 469 uint8_t MFRC522::PICC_REQA_or_WUPA(uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
Amyrctdp 0:c735c66e37d3 470 {
Amyrctdp 0:c735c66e37d3 471 uint8_t validBits;
Amyrctdp 0:c735c66e37d3 472 uint8_t status;
Amyrctdp 0:c735c66e37d3 473
Amyrctdp 0:c735c66e37d3 474 if (bufferATQA == NULL || *bufferSize < 2)
Amyrctdp 0:c735c66e37d3 475 { // The ATQA response is 2 bytes long.
Amyrctdp 0:c735c66e37d3 476 return STATUS_NO_ROOM;
Amyrctdp 0:c735c66e37d3 477 }
Amyrctdp 0:c735c66e37d3 478
Amyrctdp 0:c735c66e37d3 479 // ValuesAfterColl=1 => Bits received after collision are cleared.
Amyrctdp 0:c735c66e37d3 480 PCD_ClrRegisterBits(CollReg, 0x80);
Amyrctdp 0:c735c66e37d3 481
Amyrctdp 0:c735c66e37d3 482 // For REQA and WUPA we need the short frame format
Amyrctdp 0:c735c66e37d3 483 // - transmit only 7 bits of the last (and only) byte. TxLastBits = BitFramingReg[2..0]
Amyrctdp 0:c735c66e37d3 484 validBits = 7;
Amyrctdp 0:c735c66e37d3 485
Amyrctdp 0:c735c66e37d3 486 status = PCD_TransceiveData(&command, 1, bufferATQA, bufferSize, &validBits);
Amyrctdp 0:c735c66e37d3 487 if (status != STATUS_OK)
Amyrctdp 0:c735c66e37d3 488 {
Amyrctdp 0:c735c66e37d3 489 return status;
Amyrctdp 0:c735c66e37d3 490 }
Amyrctdp 0:c735c66e37d3 491
Amyrctdp 0:c735c66e37d3 492 if ((*bufferSize != 2) || (validBits != 0))
Amyrctdp 0:c735c66e37d3 493 { // ATQA must be exactly 16 bits.
Amyrctdp 0:c735c66e37d3 494 return STATUS_ERROR;
Amyrctdp 0:c735c66e37d3 495 }
Amyrctdp 0:c735c66e37d3 496
Amyrctdp 0:c735c66e37d3 497 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 498 } // End PICC_REQA_or_WUPA()
Amyrctdp 0:c735c66e37d3 499
Amyrctdp 0:c735c66e37d3 500 /*
Amyrctdp 0:c735c66e37d3 501 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
Amyrctdp 0:c735c66e37d3 502 */
Amyrctdp 0:c735c66e37d3 503 uint8_t MFRC522::PICC_Select(Uid *uid, uint8_t validBits)
Amyrctdp 0:c735c66e37d3 504 {
Amyrctdp 0:c735c66e37d3 505 bool uidComplete;
Amyrctdp 0:c735c66e37d3 506 bool selectDone;
Amyrctdp 0:c735c66e37d3 507 bool useCascadeTag;
Amyrctdp 0:c735c66e37d3 508 uint8_t cascadeLevel = 1;
Amyrctdp 0:c735c66e37d3 509 uint8_t result;
Amyrctdp 0:c735c66e37d3 510 uint8_t count;
Amyrctdp 0:c735c66e37d3 511 uint8_t index;
Amyrctdp 0:c735c66e37d3 512 uint8_t uidIndex; // The first index in uid->uidByte[] that is used in the current Cascade Level.
Amyrctdp 0:c735c66e37d3 513 uint8_t currentLevelKnownBits; // The number of known UID bits in the current Cascade Level.
Amyrctdp 0:c735c66e37d3 514 uint8_t buffer[9]; // The SELECT/ANTICOLLISION commands uses a 7 byte standard frame + 2 bytes CRC_A
Amyrctdp 0:c735c66e37d3 515 uint8_t bufferUsed; // The number of bytes used in the buffer, ie the number of bytes to transfer to the FIFO.
Amyrctdp 0:c735c66e37d3 516 uint8_t rxAlign; // Used in BitFramingReg. Defines the bit position for the first bit received.
Amyrctdp 0:c735c66e37d3 517 uint8_t txLastBits; // Used in BitFramingReg. The number of valid bits in the last transmitted byte.
Amyrctdp 0:c735c66e37d3 518 uint8_t *responseBuffer;
Amyrctdp 0:c735c66e37d3 519 uint8_t responseLength;
Amyrctdp 0:c735c66e37d3 520
Amyrctdp 0:c735c66e37d3 521 // Description of buffer structure:
Amyrctdp 0:c735c66e37d3 522 // Byte 0: SEL Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3
Amyrctdp 0:c735c66e37d3 523 // Byte 1: NVB Number of Valid Bits (in complete command, not just the UID): High nibble: complete bytes, Low nibble: Extra bits.
Amyrctdp 0:c735c66e37d3 524 // Byte 2: UID-data or CT See explanation below. CT means Cascade Tag.
Amyrctdp 0:c735c66e37d3 525 // Byte 3: UID-data
Amyrctdp 0:c735c66e37d3 526 // Byte 4: UID-data
Amyrctdp 0:c735c66e37d3 527 // Byte 5: UID-data
Amyrctdp 0:c735c66e37d3 528 // Byte 6: BCC Block Check Character - XOR of bytes 2-5
Amyrctdp 0:c735c66e37d3 529 // Byte 7: CRC_A
Amyrctdp 0:c735c66e37d3 530 // Byte 8: CRC_A
Amyrctdp 0:c735c66e37d3 531 // The BCC and CRC_A is only transmitted if we know all the UID bits of the current Cascade Level.
Amyrctdp 0:c735c66e37d3 532 //
Amyrctdp 0:c735c66e37d3 533 // Description of bytes 2-5: (Section 6.5.4 of the ISO/IEC 14443-3 draft: UID contents and cascade levels)
Amyrctdp 0:c735c66e37d3 534 // UID size Cascade level Byte2 Byte3 Byte4 Byte5
Amyrctdp 0:c735c66e37d3 535 // ======== ============= ===== ===== ===== =====
Amyrctdp 0:c735c66e37d3 536 // 4 bytes 1 uid0 uid1 uid2 uid3
Amyrctdp 0:c735c66e37d3 537 // 7 bytes 1 CT uid0 uid1 uid2
Amyrctdp 0:c735c66e37d3 538 // 2 uid3 uid4 uid5 uid6
Amyrctdp 0:c735c66e37d3 539 // 10 bytes 1 CT uid0 uid1 uid2
Amyrctdp 0:c735c66e37d3 540 // 2 CT uid3 uid4 uid5
Amyrctdp 0:c735c66e37d3 541 // 3 uid6 uid7 uid8 uid9
Amyrctdp 0:c735c66e37d3 542
Amyrctdp 0:c735c66e37d3 543 // Sanity checks
Amyrctdp 0:c735c66e37d3 544 if (validBits > 80)
Amyrctdp 0:c735c66e37d3 545 {
Amyrctdp 0:c735c66e37d3 546 return STATUS_INVALID;
Amyrctdp 0:c735c66e37d3 547 }
Amyrctdp 0:c735c66e37d3 548
Amyrctdp 0:c735c66e37d3 549 // Prepare MFRC522
Amyrctdp 0:c735c66e37d3 550 // ValuesAfterColl=1 => Bits received after collision are cleared.
Amyrctdp 0:c735c66e37d3 551 PCD_ClrRegisterBits(CollReg, 0x80);
Amyrctdp 0:c735c66e37d3 552
Amyrctdp 0:c735c66e37d3 553 // Repeat Cascade Level loop until we have a complete UID.
Amyrctdp 0:c735c66e37d3 554 uidComplete = false;
Amyrctdp 0:c735c66e37d3 555 while ( ! uidComplete)
Amyrctdp 0:c735c66e37d3 556 {
Amyrctdp 0:c735c66e37d3 557 // Set the Cascade Level in the SEL byte, find out if we need to use the Cascade Tag in byte 2.
Amyrctdp 0:c735c66e37d3 558 switch (cascadeLevel)
Amyrctdp 0:c735c66e37d3 559 {
Amyrctdp 0:c735c66e37d3 560 case 1:
Amyrctdp 0:c735c66e37d3 561 buffer[0] = PICC_CMD_SEL_CL1;
Amyrctdp 0:c735c66e37d3 562 uidIndex = 0;
Amyrctdp 0:c735c66e37d3 563 useCascadeTag = validBits && (uid->size > 4); // When we know that the UID has more than 4 bytes
Amyrctdp 0:c735c66e37d3 564 break;
Amyrctdp 0:c735c66e37d3 565
Amyrctdp 0:c735c66e37d3 566 case 2:
Amyrctdp 0:c735c66e37d3 567 buffer[0] = PICC_CMD_SEL_CL2;
Amyrctdp 0:c735c66e37d3 568 uidIndex = 3;
Amyrctdp 0:c735c66e37d3 569 useCascadeTag = validBits && (uid->size > 7); // When we know that the UID has more than 7 bytes
Amyrctdp 0:c735c66e37d3 570 break;
Amyrctdp 0:c735c66e37d3 571
Amyrctdp 0:c735c66e37d3 572 case 3:
Amyrctdp 0:c735c66e37d3 573 buffer[0] = PICC_CMD_SEL_CL3;
Amyrctdp 0:c735c66e37d3 574 uidIndex = 6;
Amyrctdp 0:c735c66e37d3 575 useCascadeTag = false; // Never used in CL3.
Amyrctdp 0:c735c66e37d3 576 break;
Amyrctdp 0:c735c66e37d3 577
Amyrctdp 0:c735c66e37d3 578 default:
Amyrctdp 0:c735c66e37d3 579 return STATUS_INTERNAL_ERROR;
Amyrctdp 0:c735c66e37d3 580 //break;
Amyrctdp 0:c735c66e37d3 581 }
Amyrctdp 0:c735c66e37d3 582
Amyrctdp 0:c735c66e37d3 583 // How many UID bits are known in this Cascade Level?
Amyrctdp 0:c735c66e37d3 584 if(validBits > (8 * uidIndex))
Amyrctdp 0:c735c66e37d3 585 {
Amyrctdp 0:c735c66e37d3 586 currentLevelKnownBits = validBits - (8 * uidIndex);
Amyrctdp 0:c735c66e37d3 587 }
Amyrctdp 0:c735c66e37d3 588 else
Amyrctdp 0:c735c66e37d3 589 {
Amyrctdp 0:c735c66e37d3 590 currentLevelKnownBits = 0;
Amyrctdp 0:c735c66e37d3 591 }
Amyrctdp 0:c735c66e37d3 592
Amyrctdp 0:c735c66e37d3 593 // Copy the known bits from uid->uidByte[] to buffer[]
Amyrctdp 0:c735c66e37d3 594 index = 2; // destination index in buffer[]
Amyrctdp 0:c735c66e37d3 595 if (useCascadeTag)
Amyrctdp 0:c735c66e37d3 596 {
Amyrctdp 0:c735c66e37d3 597 buffer[index++] = PICC_CMD_CT;
Amyrctdp 0:c735c66e37d3 598 }
Amyrctdp 0:c735c66e37d3 599
Amyrctdp 0:c735c66e37d3 600 uint8_t bytesToCopy = currentLevelKnownBits / 8 + (currentLevelKnownBits % 8 ? 1 : 0); // The number of bytes needed to represent the known bits for this level.
Amyrctdp 0:c735c66e37d3 601 if (bytesToCopy)
Amyrctdp 0:c735c66e37d3 602 {
Amyrctdp 0:c735c66e37d3 603 // Max 4 bytes in each Cascade Level. Only 3 left if we use the Cascade Tag
Amyrctdp 0:c735c66e37d3 604 uint8_t maxBytes = useCascadeTag ? 3 : 4;
Amyrctdp 0:c735c66e37d3 605 if (bytesToCopy > maxBytes)
Amyrctdp 0:c735c66e37d3 606 {
Amyrctdp 0:c735c66e37d3 607 bytesToCopy = maxBytes;
Amyrctdp 0:c735c66e37d3 608 }
Amyrctdp 0:c735c66e37d3 609
Amyrctdp 0:c735c66e37d3 610 for (count = 0; count < bytesToCopy; count++)
Amyrctdp 0:c735c66e37d3 611 {
Amyrctdp 0:c735c66e37d3 612 buffer[index++] = uid->uidByte[uidIndex + count];
Amyrctdp 0:c735c66e37d3 613 }
Amyrctdp 0:c735c66e37d3 614 }
Amyrctdp 0:c735c66e37d3 615
Amyrctdp 0:c735c66e37d3 616 // Now that the data has been copied we need to include the 8 bits in CT in currentLevelKnownBits
Amyrctdp 0:c735c66e37d3 617 if (useCascadeTag)
Amyrctdp 0:c735c66e37d3 618 {
Amyrctdp 0:c735c66e37d3 619 currentLevelKnownBits += 8;
Amyrctdp 0:c735c66e37d3 620 }
Amyrctdp 0:c735c66e37d3 621
Amyrctdp 0:c735c66e37d3 622 // Repeat anti collision loop until we can transmit all UID bits + BCC and receive a SAK - max 32 iterations.
Amyrctdp 0:c735c66e37d3 623 selectDone = false;
Amyrctdp 0:c735c66e37d3 624 while ( ! selectDone)
Amyrctdp 0:c735c66e37d3 625 {
Amyrctdp 0:c735c66e37d3 626 // Find out how many bits and bytes to send and receive.
Amyrctdp 0:c735c66e37d3 627 if (currentLevelKnownBits >= 32)
Amyrctdp 0:c735c66e37d3 628 { // All UID bits in this Cascade Level are known. This is a SELECT.
Amyrctdp 0:c735c66e37d3 629 //Serial.print("SELECT: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
Amyrctdp 0:c735c66e37d3 630 buffer[1] = 0x70; // NVB - Number of Valid Bits: Seven whole bytes
Amyrctdp 0:c735c66e37d3 631
Amyrctdp 0:c735c66e37d3 632 // Calulate BCC - Block Check Character
Amyrctdp 0:c735c66e37d3 633 buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5];
Amyrctdp 0:c735c66e37d3 634
Amyrctdp 0:c735c66e37d3 635 // Calculate CRC_A
Amyrctdp 0:c735c66e37d3 636 result = PCD_CalculateCRC(buffer, 7, &buffer[7]);
Amyrctdp 0:c735c66e37d3 637 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 638 {
Amyrctdp 0:c735c66e37d3 639 return result;
Amyrctdp 0:c735c66e37d3 640 }
Amyrctdp 0:c735c66e37d3 641
Amyrctdp 0:c735c66e37d3 642 txLastBits = 0; // 0 => All 8 bits are valid.
Amyrctdp 0:c735c66e37d3 643 bufferUsed = 9;
Amyrctdp 0:c735c66e37d3 644
Amyrctdp 0:c735c66e37d3 645 // Store response in the last 3 bytes of buffer (BCC and CRC_A - not needed after tx)
Amyrctdp 0:c735c66e37d3 646 responseBuffer = &buffer[6];
Amyrctdp 0:c735c66e37d3 647 responseLength = 3;
Amyrctdp 0:c735c66e37d3 648 }
Amyrctdp 0:c735c66e37d3 649 else
Amyrctdp 0:c735c66e37d3 650 { // This is an ANTICOLLISION.
Amyrctdp 0:c735c66e37d3 651 //Serial.print("ANTICOLLISION: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
Amyrctdp 0:c735c66e37d3 652 txLastBits = currentLevelKnownBits % 8;
Amyrctdp 0:c735c66e37d3 653 count = currentLevelKnownBits / 8; // Number of whole bytes in the UID part.
Amyrctdp 0:c735c66e37d3 654 index = 2 + count; // Number of whole bytes: SEL + NVB + UIDs
Amyrctdp 0:c735c66e37d3 655 buffer[1] = (index << 4) + txLastBits; // NVB - Number of Valid Bits
Amyrctdp 0:c735c66e37d3 656 bufferUsed = index + (txLastBits ? 1 : 0);
Amyrctdp 0:c735c66e37d3 657
Amyrctdp 0:c735c66e37d3 658 // Store response in the unused part of buffer
Amyrctdp 0:c735c66e37d3 659 responseBuffer = &buffer[index];
Amyrctdp 0:c735c66e37d3 660 responseLength = sizeof(buffer) - index;
Amyrctdp 0:c735c66e37d3 661 }
Amyrctdp 0:c735c66e37d3 662
Amyrctdp 0:c735c66e37d3 663 // Set bit adjustments
Amyrctdp 0:c735c66e37d3 664 rxAlign = txLastBits; // Having a seperate variable is overkill. But it makes the next line easier to read.
Amyrctdp 0:c735c66e37d3 665 PCD_WriteRegister(BitFramingReg, (rxAlign << 4) + txLastBits); // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
Amyrctdp 0:c735c66e37d3 666
Amyrctdp 0:c735c66e37d3 667 // Transmit the buffer and receive the response.
Amyrctdp 0:c735c66e37d3 668 result = PCD_TransceiveData(buffer, bufferUsed, responseBuffer, &responseLength, &txLastBits, rxAlign);
Amyrctdp 0:c735c66e37d3 669 if (result == STATUS_COLLISION)
Amyrctdp 0:c735c66e37d3 670 { // More than one PICC in the field => collision.
Amyrctdp 0:c735c66e37d3 671 result = PCD_ReadRegister(CollReg); // CollReg[7..0] bits are: ValuesAfterColl reserved CollPosNotValid CollPos[4:0]
Amyrctdp 0:c735c66e37d3 672 if (result & 0x20)
Amyrctdp 0:c735c66e37d3 673 { // CollPosNotValid
Amyrctdp 0:c735c66e37d3 674 return STATUS_COLLISION; // Without a valid collision position we cannot continue
Amyrctdp 0:c735c66e37d3 675 }
Amyrctdp 0:c735c66e37d3 676
Amyrctdp 0:c735c66e37d3 677 uint8_t collisionPos = result & 0x1F; // Values 0-31, 0 means bit 32.
Amyrctdp 0:c735c66e37d3 678 if (collisionPos == 0)
Amyrctdp 0:c735c66e37d3 679 {
Amyrctdp 0:c735c66e37d3 680 collisionPos = 32;
Amyrctdp 0:c735c66e37d3 681 }
Amyrctdp 0:c735c66e37d3 682
Amyrctdp 0:c735c66e37d3 683 if (collisionPos <= currentLevelKnownBits)
Amyrctdp 0:c735c66e37d3 684 { // No progress - should not happen
Amyrctdp 0:c735c66e37d3 685 return STATUS_INTERNAL_ERROR;
Amyrctdp 0:c735c66e37d3 686 }
Amyrctdp 0:c735c66e37d3 687
Amyrctdp 0:c735c66e37d3 688 // Choose the PICC with the bit set.
Amyrctdp 0:c735c66e37d3 689 currentLevelKnownBits = collisionPos;
Amyrctdp 0:c735c66e37d3 690 count = (currentLevelKnownBits - 1) % 8; // The bit to modify
Amyrctdp 0:c735c66e37d3 691 index = 1 + (currentLevelKnownBits / 8) + (count ? 1 : 0); // First byte is index 0.
Amyrctdp 0:c735c66e37d3 692 buffer[index] |= (1 << count);
Amyrctdp 0:c735c66e37d3 693 }
Amyrctdp 0:c735c66e37d3 694 else if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 695 {
Amyrctdp 0:c735c66e37d3 696 return result;
Amyrctdp 0:c735c66e37d3 697 }
Amyrctdp 0:c735c66e37d3 698 else
Amyrctdp 0:c735c66e37d3 699 { // STATUS_OK
Amyrctdp 0:c735c66e37d3 700 if (currentLevelKnownBits >= 32)
Amyrctdp 0:c735c66e37d3 701 { // This was a SELECT.
Amyrctdp 0:c735c66e37d3 702 selectDone = true; // No more anticollision
Amyrctdp 0:c735c66e37d3 703 // We continue below outside the while.
Amyrctdp 0:c735c66e37d3 704 }
Amyrctdp 0:c735c66e37d3 705 else
Amyrctdp 0:c735c66e37d3 706 { // This was an ANTICOLLISION.
Amyrctdp 0:c735c66e37d3 707 // We now have all 32 bits of the UID in this Cascade Level
Amyrctdp 0:c735c66e37d3 708 currentLevelKnownBits = 32;
Amyrctdp 0:c735c66e37d3 709 // Run loop again to do the SELECT.
Amyrctdp 0:c735c66e37d3 710 }
Amyrctdp 0:c735c66e37d3 711 }
Amyrctdp 0:c735c66e37d3 712 } // End of while ( ! selectDone)
Amyrctdp 0:c735c66e37d3 713
Amyrctdp 0:c735c66e37d3 714 // We do not check the CBB - it was constructed by us above.
Amyrctdp 0:c735c66e37d3 715
Amyrctdp 0:c735c66e37d3 716 // Copy the found UID bytes from buffer[] to uid->uidByte[]
Amyrctdp 0:c735c66e37d3 717 index = (buffer[2] == PICC_CMD_CT) ? 3 : 2; // source index in buffer[]
Amyrctdp 0:c735c66e37d3 718 bytesToCopy = (buffer[2] == PICC_CMD_CT) ? 3 : 4;
Amyrctdp 0:c735c66e37d3 719 for (count = 0; count < bytesToCopy; count++)
Amyrctdp 0:c735c66e37d3 720 {
Amyrctdp 0:c735c66e37d3 721 uid->uidByte[uidIndex + count] = buffer[index++];
Amyrctdp 0:c735c66e37d3 722 }
Amyrctdp 0:c735c66e37d3 723
Amyrctdp 0:c735c66e37d3 724 // Check response SAK (Select Acknowledge)
Amyrctdp 0:c735c66e37d3 725 if (responseLength != 3 || txLastBits != 0)
Amyrctdp 0:c735c66e37d3 726 { // SAK must be exactly 24 bits (1 byte + CRC_A).
Amyrctdp 0:c735c66e37d3 727 return STATUS_ERROR;
Amyrctdp 0:c735c66e37d3 728 }
Amyrctdp 0:c735c66e37d3 729
Amyrctdp 0:c735c66e37d3 730 // Verify CRC_A - do our own calculation and store the control in buffer[2..3] - those bytes are not needed anymore.
Amyrctdp 0:c735c66e37d3 731 result = PCD_CalculateCRC(responseBuffer, 1, &buffer[2]);
Amyrctdp 0:c735c66e37d3 732 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 733 {
Amyrctdp 0:c735c66e37d3 734 return result;
Amyrctdp 0:c735c66e37d3 735 }
Amyrctdp 0:c735c66e37d3 736
Amyrctdp 0:c735c66e37d3 737 if ((buffer[2] != responseBuffer[1]) || (buffer[3] != responseBuffer[2]))
Amyrctdp 0:c735c66e37d3 738 {
Amyrctdp 0:c735c66e37d3 739 return STATUS_CRC_WRONG;
Amyrctdp 0:c735c66e37d3 740 }
Amyrctdp 0:c735c66e37d3 741
Amyrctdp 0:c735c66e37d3 742 if (responseBuffer[0] & 0x04)
Amyrctdp 0:c735c66e37d3 743 { // Cascade bit set - UID not complete yes
Amyrctdp 0:c735c66e37d3 744 cascadeLevel++;
Amyrctdp 0:c735c66e37d3 745 }
Amyrctdp 0:c735c66e37d3 746 else
Amyrctdp 0:c735c66e37d3 747 {
Amyrctdp 0:c735c66e37d3 748 uidComplete = true;
Amyrctdp 0:c735c66e37d3 749 uid->sak = responseBuffer[0];
Amyrctdp 0:c735c66e37d3 750 }
Amyrctdp 0:c735c66e37d3 751 } // End of while ( ! uidComplete)
Amyrctdp 0:c735c66e37d3 752
Amyrctdp 0:c735c66e37d3 753 // Set correct uid->size
Amyrctdp 0:c735c66e37d3 754 uid->size = 3 * cascadeLevel + 1;
Amyrctdp 0:c735c66e37d3 755
Amyrctdp 0:c735c66e37d3 756 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 757 } // End PICC_Select()
Amyrctdp 0:c735c66e37d3 758
Amyrctdp 0:c735c66e37d3 759 /*
Amyrctdp 0:c735c66e37d3 760 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
Amyrctdp 0:c735c66e37d3 761 */
Amyrctdp 0:c735c66e37d3 762 uint8_t MFRC522::PICC_HaltA()
Amyrctdp 0:c735c66e37d3 763 {
Amyrctdp 0:c735c66e37d3 764 uint8_t result;
Amyrctdp 0:c735c66e37d3 765 uint8_t buffer[4];
Amyrctdp 0:c735c66e37d3 766
Amyrctdp 0:c735c66e37d3 767 // Build command buffer
Amyrctdp 0:c735c66e37d3 768 buffer[0] = PICC_CMD_HLTA;
Amyrctdp 0:c735c66e37d3 769 buffer[1] = 0;
Amyrctdp 0:c735c66e37d3 770
Amyrctdp 0:c735c66e37d3 771 // Calculate CRC_A
Amyrctdp 0:c735c66e37d3 772 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
Amyrctdp 0:c735c66e37d3 773 if (result == STATUS_OK)
Amyrctdp 0:c735c66e37d3 774 {
Amyrctdp 0:c735c66e37d3 775 // Send the command.
Amyrctdp 0:c735c66e37d3 776 // The standard says:
Amyrctdp 0:c735c66e37d3 777 // If the PICC responds with any modulation during a period of 1 ms after the end of the frame containing the
Amyrctdp 0:c735c66e37d3 778 // HLTA command, this response shall be interpreted as 'not acknowledge'.
Amyrctdp 0:c735c66e37d3 779 // We interpret that this way: Only STATUS_TIMEOUT is an success.
Amyrctdp 0:c735c66e37d3 780 result = PCD_TransceiveData(buffer, sizeof(buffer), NULL, 0);
Amyrctdp 0:c735c66e37d3 781 if (result == STATUS_TIMEOUT)
Amyrctdp 0:c735c66e37d3 782 {
Amyrctdp 0:c735c66e37d3 783 result = STATUS_OK;
Amyrctdp 0:c735c66e37d3 784 }
Amyrctdp 0:c735c66e37d3 785 else if (result == STATUS_OK)
Amyrctdp 0:c735c66e37d3 786 { // That is ironically NOT ok in this case ;-)
Amyrctdp 0:c735c66e37d3 787 result = STATUS_ERROR;
Amyrctdp 0:c735c66e37d3 788 }
Amyrctdp 0:c735c66e37d3 789 }
Amyrctdp 0:c735c66e37d3 790
Amyrctdp 0:c735c66e37d3 791 return result;
Amyrctdp 0:c735c66e37d3 792 } // End PICC_HaltA()
Amyrctdp 0:c735c66e37d3 793
Amyrctdp 0:c735c66e37d3 794
Amyrctdp 0:c735c66e37d3 795 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 796 // Functions for communicating with MIFARE PICCs
Amyrctdp 0:c735c66e37d3 797 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 798
Amyrctdp 0:c735c66e37d3 799 /*
Amyrctdp 0:c735c66e37d3 800 * Executes the MFRC522 MFAuthent command.
Amyrctdp 0:c735c66e37d3 801 */
Amyrctdp 0:c735c66e37d3 802 uint8_t MFRC522::PCD_Authenticate(uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
Amyrctdp 0:c735c66e37d3 803 {
Amyrctdp 0:c735c66e37d3 804 uint8_t i, waitIRq = 0x10; // IdleIRq
Amyrctdp 0:c735c66e37d3 805
Amyrctdp 0:c735c66e37d3 806 // Build command buffer
Amyrctdp 0:c735c66e37d3 807 uint8_t sendData[12];
Amyrctdp 0:c735c66e37d3 808 sendData[0] = command;
Amyrctdp 0:c735c66e37d3 809 sendData[1] = blockAddr;
Amyrctdp 0:c735c66e37d3 810
Amyrctdp 0:c735c66e37d3 811 for (i = 0; i < MF_KEY_SIZE; i++)
Amyrctdp 0:c735c66e37d3 812 { // 6 key bytes
Amyrctdp 0:c735c66e37d3 813 sendData[2+i] = key->keyByte[i];
Amyrctdp 0:c735c66e37d3 814 }
Amyrctdp 0:c735c66e37d3 815
Amyrctdp 0:c735c66e37d3 816 for (i = 0; i < 4; i++)
Amyrctdp 0:c735c66e37d3 817 { // The first 4 bytes of the UID
Amyrctdp 0:c735c66e37d3 818 sendData[8+i] = uid->uidByte[i];
Amyrctdp 0:c735c66e37d3 819 }
Amyrctdp 0:c735c66e37d3 820
Amyrctdp 0:c735c66e37d3 821 // Start the authentication.
Amyrctdp 0:c735c66e37d3 822 return PCD_CommunicateWithPICC(PCD_MFAuthent, waitIRq, &sendData[0], sizeof(sendData));
Amyrctdp 0:c735c66e37d3 823 } // End PCD_Authenticate()
Amyrctdp 0:c735c66e37d3 824
Amyrctdp 0:c735c66e37d3 825 /*
Amyrctdp 0:c735c66e37d3 826 * Used to exit the PCD from its authenticated state.
Amyrctdp 0:c735c66e37d3 827 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
Amyrctdp 0:c735c66e37d3 828 */
Amyrctdp 0:c735c66e37d3 829 void MFRC522::PCD_StopCrypto1()
Amyrctdp 0:c735c66e37d3 830 {
Amyrctdp 0:c735c66e37d3 831 // Clear MFCrypto1On bit
Amyrctdp 0:c735c66e37d3 832 PCD_ClrRegisterBits(Status2Reg, 0x08); // Status2Reg[7..0] bits are: TempSensClear I2CForceHS reserved reserved MFCrypto1On ModemState[2:0]
Amyrctdp 0:c735c66e37d3 833 } // End PCD_StopCrypto1()
Amyrctdp 0:c735c66e37d3 834
Amyrctdp 0:c735c66e37d3 835 /*
Amyrctdp 0:c735c66e37d3 836 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
Amyrctdp 0:c735c66e37d3 837 */
Amyrctdp 0:c735c66e37d3 838 uint8_t MFRC522::MIFARE_Read(uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
Amyrctdp 0:c735c66e37d3 839 {
Amyrctdp 0:c735c66e37d3 840 uint8_t result = STATUS_NO_ROOM;
Amyrctdp 0:c735c66e37d3 841
Amyrctdp 0:c735c66e37d3 842 // Sanity check
Amyrctdp 0:c735c66e37d3 843 if ((buffer == NULL) || (*bufferSize < 18))
Amyrctdp 0:c735c66e37d3 844 {
Amyrctdp 0:c735c66e37d3 845 return result;
Amyrctdp 0:c735c66e37d3 846 }
Amyrctdp 0:c735c66e37d3 847
Amyrctdp 0:c735c66e37d3 848 // Build command buffer
Amyrctdp 0:c735c66e37d3 849 buffer[0] = PICC_CMD_MF_READ;
Amyrctdp 0:c735c66e37d3 850 buffer[1] = blockAddr;
Amyrctdp 0:c735c66e37d3 851
Amyrctdp 0:c735c66e37d3 852 // Calculate CRC_A
Amyrctdp 0:c735c66e37d3 853 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
Amyrctdp 0:c735c66e37d3 854 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 855 {
Amyrctdp 0:c735c66e37d3 856 return result;
Amyrctdp 0:c735c66e37d3 857 }
Amyrctdp 0:c735c66e37d3 858
Amyrctdp 0:c735c66e37d3 859 // Transmit the buffer and receive the response, validate CRC_A.
Amyrctdp 0:c735c66e37d3 860 return PCD_TransceiveData(buffer, 4, buffer, bufferSize, NULL, 0, true);
Amyrctdp 0:c735c66e37d3 861 } // End MIFARE_Read()
Amyrctdp 0:c735c66e37d3 862
Amyrctdp 0:c735c66e37d3 863 /*
Amyrctdp 0:c735c66e37d3 864 * Writes 16 bytes to the active PICC.
Amyrctdp 0:c735c66e37d3 865 */
Amyrctdp 0:c735c66e37d3 866 uint8_t MFRC522::MIFARE_Write(uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
Amyrctdp 0:c735c66e37d3 867 {
Amyrctdp 0:c735c66e37d3 868 uint8_t result;
Amyrctdp 0:c735c66e37d3 869
Amyrctdp 0:c735c66e37d3 870 // Sanity check
Amyrctdp 0:c735c66e37d3 871 if (buffer == NULL || bufferSize < 16)
Amyrctdp 0:c735c66e37d3 872 {
Amyrctdp 0:c735c66e37d3 873 return STATUS_INVALID;
Amyrctdp 0:c735c66e37d3 874 }
Amyrctdp 0:c735c66e37d3 875
Amyrctdp 0:c735c66e37d3 876 // Mifare Classic protocol requires two communications to perform a write.
Amyrctdp 0:c735c66e37d3 877 // Step 1: Tell the PICC we want to write to block blockAddr.
Amyrctdp 0:c735c66e37d3 878 uint8_t cmdBuffer[2];
Amyrctdp 0:c735c66e37d3 879 cmdBuffer[0] = PICC_CMD_MF_WRITE;
Amyrctdp 0:c735c66e37d3 880 cmdBuffer[1] = blockAddr;
Amyrctdp 0:c735c66e37d3 881 // Adds CRC_A and checks that the response is MF_ACK.
Amyrctdp 0:c735c66e37d3 882 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
Amyrctdp 0:c735c66e37d3 883 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 884 {
Amyrctdp 0:c735c66e37d3 885 return result;
Amyrctdp 0:c735c66e37d3 886 }
Amyrctdp 0:c735c66e37d3 887
Amyrctdp 0:c735c66e37d3 888 // Step 2: Transfer the data
Amyrctdp 0:c735c66e37d3 889 // Adds CRC_A and checks that the response is MF_ACK.
Amyrctdp 0:c735c66e37d3 890 result = PCD_MIFARE_Transceive(buffer, bufferSize);
Amyrctdp 0:c735c66e37d3 891 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 892 {
Amyrctdp 0:c735c66e37d3 893 return result;
Amyrctdp 0:c735c66e37d3 894 }
Amyrctdp 0:c735c66e37d3 895
Amyrctdp 0:c735c66e37d3 896 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 897 } // End MIFARE_Write()
Amyrctdp 0:c735c66e37d3 898
Amyrctdp 0:c735c66e37d3 899 /*
Amyrctdp 0:c735c66e37d3 900 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
Amyrctdp 0:c735c66e37d3 901 */
Amyrctdp 0:c735c66e37d3 902 uint8_t MFRC522::MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize)
Amyrctdp 0:c735c66e37d3 903 {
Amyrctdp 0:c735c66e37d3 904 uint8_t result;
Amyrctdp 0:c735c66e37d3 905
Amyrctdp 0:c735c66e37d3 906 // Sanity check
Amyrctdp 0:c735c66e37d3 907 if (buffer == NULL || bufferSize < 4)
Amyrctdp 0:c735c66e37d3 908 {
Amyrctdp 0:c735c66e37d3 909 return STATUS_INVALID;
Amyrctdp 0:c735c66e37d3 910 }
Amyrctdp 0:c735c66e37d3 911
Amyrctdp 0:c735c66e37d3 912 // Build commmand buffer
Amyrctdp 0:c735c66e37d3 913 uint8_t cmdBuffer[6];
Amyrctdp 0:c735c66e37d3 914 cmdBuffer[0] = PICC_CMD_UL_WRITE;
Amyrctdp 0:c735c66e37d3 915 cmdBuffer[1] = page;
Amyrctdp 0:c735c66e37d3 916 memcpy(&cmdBuffer[2], buffer, 4);
Amyrctdp 0:c735c66e37d3 917
Amyrctdp 0:c735c66e37d3 918 // Perform the write
Amyrctdp 0:c735c66e37d3 919 result = PCD_MIFARE_Transceive(cmdBuffer, 6); // Adds CRC_A and checks that the response is MF_ACK.
Amyrctdp 0:c735c66e37d3 920 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 921 {
Amyrctdp 0:c735c66e37d3 922 return result;
Amyrctdp 0:c735c66e37d3 923 }
Amyrctdp 0:c735c66e37d3 924
Amyrctdp 0:c735c66e37d3 925 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 926 } // End MIFARE_Ultralight_Write()
Amyrctdp 0:c735c66e37d3 927
Amyrctdp 0:c735c66e37d3 928 /*
Amyrctdp 0:c735c66e37d3 929 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
Amyrctdp 0:c735c66e37d3 930 */
Amyrctdp 0:c735c66e37d3 931 uint8_t MFRC522::MIFARE_Decrement(uint8_t blockAddr, uint32_t delta)
Amyrctdp 0:c735c66e37d3 932 {
Amyrctdp 0:c735c66e37d3 933 return MIFARE_TwoStepHelper(PICC_CMD_MF_DECREMENT, blockAddr, delta);
Amyrctdp 0:c735c66e37d3 934 } // End MIFARE_Decrement()
Amyrctdp 0:c735c66e37d3 935
Amyrctdp 0:c735c66e37d3 936 /*
Amyrctdp 0:c735c66e37d3 937 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
Amyrctdp 0:c735c66e37d3 938 */
Amyrctdp 0:c735c66e37d3 939 uint8_t MFRC522::MIFARE_Increment(uint8_t blockAddr, uint32_t delta)
Amyrctdp 0:c735c66e37d3 940 {
Amyrctdp 0:c735c66e37d3 941 return MIFARE_TwoStepHelper(PICC_CMD_MF_INCREMENT, blockAddr, delta);
Amyrctdp 0:c735c66e37d3 942 } // End MIFARE_Increment()
Amyrctdp 0:c735c66e37d3 943
Amyrctdp 0:c735c66e37d3 944 /**
Amyrctdp 0:c735c66e37d3 945 * MIFARE Restore copies the value of the addressed block into a volatile memory.
Amyrctdp 0:c735c66e37d3 946 */
Amyrctdp 0:c735c66e37d3 947 uint8_t MFRC522::MIFARE_Restore(uint8_t blockAddr)
Amyrctdp 0:c735c66e37d3 948 {
Amyrctdp 0:c735c66e37d3 949 // The datasheet describes Restore as a two step operation, but does not explain what data to transfer in step 2.
Amyrctdp 0:c735c66e37d3 950 // Doing only a single step does not work, so I chose to transfer 0L in step two.
Amyrctdp 0:c735c66e37d3 951 return MIFARE_TwoStepHelper(PICC_CMD_MF_RESTORE, blockAddr, 0L);
Amyrctdp 0:c735c66e37d3 952 } // End MIFARE_Restore()
Amyrctdp 0:c735c66e37d3 953
Amyrctdp 0:c735c66e37d3 954 /*
Amyrctdp 0:c735c66e37d3 955 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
Amyrctdp 0:c735c66e37d3 956 */
Amyrctdp 0:c735c66e37d3 957 uint8_t MFRC522::MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data)
Amyrctdp 0:c735c66e37d3 958 {
Amyrctdp 0:c735c66e37d3 959 uint8_t result;
Amyrctdp 0:c735c66e37d3 960 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
Amyrctdp 0:c735c66e37d3 961
Amyrctdp 0:c735c66e37d3 962 // Step 1: Tell the PICC the command and block address
Amyrctdp 0:c735c66e37d3 963 cmdBuffer[0] = command;
Amyrctdp 0:c735c66e37d3 964 cmdBuffer[1] = blockAddr;
Amyrctdp 0:c735c66e37d3 965
Amyrctdp 0:c735c66e37d3 966 // Adds CRC_A and checks that the response is MF_ACK.
Amyrctdp 0:c735c66e37d3 967 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
Amyrctdp 0:c735c66e37d3 968 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 969 {
Amyrctdp 0:c735c66e37d3 970 return result;
Amyrctdp 0:c735c66e37d3 971 }
Amyrctdp 0:c735c66e37d3 972
Amyrctdp 0:c735c66e37d3 973 // Step 2: Transfer the data
Amyrctdp 0:c735c66e37d3 974 // Adds CRC_A and accept timeout as success.
Amyrctdp 0:c735c66e37d3 975 result = PCD_MIFARE_Transceive((uint8_t *) &data, 4, true);
Amyrctdp 0:c735c66e37d3 976 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 977 {
Amyrctdp 0:c735c66e37d3 978 return result;
Amyrctdp 0:c735c66e37d3 979 }
Amyrctdp 0:c735c66e37d3 980
Amyrctdp 0:c735c66e37d3 981 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 982 } // End MIFARE_TwoStepHelper()
Amyrctdp 0:c735c66e37d3 983
Amyrctdp 0:c735c66e37d3 984 /*
Amyrctdp 0:c735c66e37d3 985 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
Amyrctdp 0:c735c66e37d3 986 */
Amyrctdp 0:c735c66e37d3 987 uint8_t MFRC522::MIFARE_Transfer(uint8_t blockAddr)
Amyrctdp 0:c735c66e37d3 988 {
Amyrctdp 0:c735c66e37d3 989 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
Amyrctdp 0:c735c66e37d3 990
Amyrctdp 0:c735c66e37d3 991 // Tell the PICC we want to transfer the result into block blockAddr.
Amyrctdp 0:c735c66e37d3 992 cmdBuffer[0] = PICC_CMD_MF_TRANSFER;
Amyrctdp 0:c735c66e37d3 993 cmdBuffer[1] = blockAddr;
Amyrctdp 0:c735c66e37d3 994
Amyrctdp 0:c735c66e37d3 995 // Adds CRC_A and checks that the response is MF_ACK.
Amyrctdp 0:c735c66e37d3 996 return PCD_MIFARE_Transceive(cmdBuffer, 2);
Amyrctdp 0:c735c66e37d3 997 } // End MIFARE_Transfer()
Amyrctdp 0:c735c66e37d3 998
Amyrctdp 0:c735c66e37d3 999
Amyrctdp 0:c735c66e37d3 1000 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 1001 // Support functions
Amyrctdp 0:c735c66e37d3 1002 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 1003
Amyrctdp 0:c735c66e37d3 1004 /*
Amyrctdp 0:c735c66e37d3 1005 * Wrapper for MIFARE protocol communication.
Amyrctdp 0:c735c66e37d3 1006 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
Amyrctdp 0:c735c66e37d3 1007 */
Amyrctdp 0:c735c66e37d3 1008 uint8_t MFRC522::PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout)
Amyrctdp 0:c735c66e37d3 1009 {
Amyrctdp 0:c735c66e37d3 1010 uint8_t result;
Amyrctdp 0:c735c66e37d3 1011 uint8_t cmdBuffer[18]; // We need room for 16 bytes data and 2 bytes CRC_A.
Amyrctdp 0:c735c66e37d3 1012
Amyrctdp 0:c735c66e37d3 1013 // Sanity check
Amyrctdp 0:c735c66e37d3 1014 if (sendData == NULL || sendLen > 16)
Amyrctdp 0:c735c66e37d3 1015 {
Amyrctdp 0:c735c66e37d3 1016 return STATUS_INVALID;
Amyrctdp 0:c735c66e37d3 1017 }
Amyrctdp 0:c735c66e37d3 1018
Amyrctdp 0:c735c66e37d3 1019 // Copy sendData[] to cmdBuffer[] and add CRC_A
Amyrctdp 0:c735c66e37d3 1020 memcpy(cmdBuffer, sendData, sendLen);
Amyrctdp 0:c735c66e37d3 1021 result = PCD_CalculateCRC(cmdBuffer, sendLen, &cmdBuffer[sendLen]);
Amyrctdp 0:c735c66e37d3 1022 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 1023 {
Amyrctdp 0:c735c66e37d3 1024 return result;
Amyrctdp 0:c735c66e37d3 1025 }
Amyrctdp 0:c735c66e37d3 1026
Amyrctdp 0:c735c66e37d3 1027 sendLen += 2;
Amyrctdp 0:c735c66e37d3 1028
Amyrctdp 0:c735c66e37d3 1029 // Transceive the data, store the reply in cmdBuffer[]
Amyrctdp 0:c735c66e37d3 1030 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
Amyrctdp 0:c735c66e37d3 1031 uint8_t cmdBufferSize = sizeof(cmdBuffer);
Amyrctdp 0:c735c66e37d3 1032 uint8_t validBits = 0;
Amyrctdp 0:c735c66e37d3 1033 result = PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, cmdBuffer, sendLen, cmdBuffer, &cmdBufferSize, &validBits);
Amyrctdp 0:c735c66e37d3 1034 if (acceptTimeout && result == STATUS_TIMEOUT)
Amyrctdp 0:c735c66e37d3 1035 {
Amyrctdp 0:c735c66e37d3 1036 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 1037 }
Amyrctdp 0:c735c66e37d3 1038
Amyrctdp 0:c735c66e37d3 1039 if (result != STATUS_OK)
Amyrctdp 0:c735c66e37d3 1040 {
Amyrctdp 0:c735c66e37d3 1041 return result;
Amyrctdp 0:c735c66e37d3 1042 }
Amyrctdp 0:c735c66e37d3 1043
Amyrctdp 0:c735c66e37d3 1044 // The PICC must reply with a 4 bit ACK
Amyrctdp 0:c735c66e37d3 1045 if (cmdBufferSize != 1 || validBits != 4)
Amyrctdp 0:c735c66e37d3 1046 {
Amyrctdp 0:c735c66e37d3 1047 return STATUS_ERROR;
Amyrctdp 0:c735c66e37d3 1048 }
Amyrctdp 0:c735c66e37d3 1049
Amyrctdp 0:c735c66e37d3 1050 if (cmdBuffer[0] != MF_ACK)
Amyrctdp 0:c735c66e37d3 1051 {
Amyrctdp 0:c735c66e37d3 1052 return STATUS_MIFARE_NACK;
Amyrctdp 0:c735c66e37d3 1053 }
Amyrctdp 0:c735c66e37d3 1054
Amyrctdp 0:c735c66e37d3 1055 return STATUS_OK;
Amyrctdp 0:c735c66e37d3 1056 } // End PCD_MIFARE_Transceive()
Amyrctdp 0:c735c66e37d3 1057
Amyrctdp 0:c735c66e37d3 1058
Amyrctdp 0:c735c66e37d3 1059 /*
Amyrctdp 0:c735c66e37d3 1060 * Translates the SAK (Select Acknowledge) to a PICC type.
Amyrctdp 0:c735c66e37d3 1061 */
Amyrctdp 0:c735c66e37d3 1062 uint8_t MFRC522::PICC_GetType(uint8_t sak)
Amyrctdp 0:c735c66e37d3 1063 {
Amyrctdp 0:c735c66e37d3 1064 uint8_t retType = PICC_TYPE_UNKNOWN;
Amyrctdp 0:c735c66e37d3 1065
Amyrctdp 0:c735c66e37d3 1066 if (sak & 0x04)
Amyrctdp 0:c735c66e37d3 1067 { // UID not complete
Amyrctdp 0:c735c66e37d3 1068 retType = PICC_TYPE_NOT_COMPLETE;
Amyrctdp 0:c735c66e37d3 1069 }
Amyrctdp 0:c735c66e37d3 1070 else
Amyrctdp 0:c735c66e37d3 1071 {
Amyrctdp 0:c735c66e37d3 1072 switch (sak)
Amyrctdp 0:c735c66e37d3 1073 {
Amyrctdp 0:c735c66e37d3 1074 case 0x09: retType = PICC_TYPE_MIFARE_MINI; break;
Amyrctdp 0:c735c66e37d3 1075 case 0x08: retType = PICC_TYPE_MIFARE_1K; break;
Amyrctdp 0:c735c66e37d3 1076 case 0x18: retType = PICC_TYPE_MIFARE_4K; break;
Amyrctdp 0:c735c66e37d3 1077 case 0x00: retType = PICC_TYPE_MIFARE_UL; break;
Amyrctdp 0:c735c66e37d3 1078 case 0x10:
Amyrctdp 0:c735c66e37d3 1079 case 0x11: retType = PICC_TYPE_MIFARE_PLUS; break;
Amyrctdp 0:c735c66e37d3 1080 case 0x01: retType = PICC_TYPE_TNP3XXX; break;
Amyrctdp 0:c735c66e37d3 1081 default:
Amyrctdp 0:c735c66e37d3 1082 if (sak & 0x20)
Amyrctdp 0:c735c66e37d3 1083 {
Amyrctdp 0:c735c66e37d3 1084 retType = PICC_TYPE_ISO_14443_4;
Amyrctdp 0:c735c66e37d3 1085 }
Amyrctdp 0:c735c66e37d3 1086 else if (sak & 0x40)
Amyrctdp 0:c735c66e37d3 1087 {
Amyrctdp 0:c735c66e37d3 1088 retType = PICC_TYPE_ISO_18092;
Amyrctdp 0:c735c66e37d3 1089 }
Amyrctdp 0:c735c66e37d3 1090 break;
Amyrctdp 0:c735c66e37d3 1091 }
Amyrctdp 0:c735c66e37d3 1092 }
Amyrctdp 0:c735c66e37d3 1093
Amyrctdp 0:c735c66e37d3 1094 return (retType);
Amyrctdp 0:c735c66e37d3 1095 } // End PICC_GetType()
Amyrctdp 0:c735c66e37d3 1096
Amyrctdp 0:c735c66e37d3 1097 /*
Amyrctdp 0:c735c66e37d3 1098 * Returns a string pointer to the PICC type name.
Amyrctdp 0:c735c66e37d3 1099 */
Amyrctdp 0:c735c66e37d3 1100 char* MFRC522::PICC_GetTypeName(uint8_t piccType)
Amyrctdp 0:c735c66e37d3 1101 {
Amyrctdp 0:c735c66e37d3 1102 if(piccType == PICC_TYPE_NOT_COMPLETE)
Amyrctdp 0:c735c66e37d3 1103 {
Amyrctdp 0:c735c66e37d3 1104 piccType = MFRC522_MaxPICCs - 1;
Amyrctdp 0:c735c66e37d3 1105 }
Amyrctdp 0:c735c66e37d3 1106
Amyrctdp 0:c735c66e37d3 1107 return((char *) _TypeNamePICC[piccType]);
Amyrctdp 0:c735c66e37d3 1108 } // End PICC_GetTypeName()
Amyrctdp 0:c735c66e37d3 1109
Amyrctdp 0:c735c66e37d3 1110 /*
Amyrctdp 0:c735c66e37d3 1111 * Returns a string pointer to a status code name.
Amyrctdp 0:c735c66e37d3 1112 */
Amyrctdp 0:c735c66e37d3 1113 char* MFRC522::GetStatusCodeName(uint8_t code)
Amyrctdp 0:c735c66e37d3 1114 {
Amyrctdp 0:c735c66e37d3 1115 return((char *) _ErrorMessage[code]);
Amyrctdp 0:c735c66e37d3 1116 } // End GetStatusCodeName()
Amyrctdp 0:c735c66e37d3 1117
Amyrctdp 0:c735c66e37d3 1118 /*
Amyrctdp 0:c735c66e37d3 1119 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
Amyrctdp 0:c735c66e37d3 1120 */
Amyrctdp 0:c735c66e37d3 1121 void MFRC522::MIFARE_SetAccessBits(uint8_t *accessBitBuffer,
Amyrctdp 0:c735c66e37d3 1122 uint8_t g0,
Amyrctdp 0:c735c66e37d3 1123 uint8_t g1,
Amyrctdp 0:c735c66e37d3 1124 uint8_t g2,
Amyrctdp 0:c735c66e37d3 1125 uint8_t g3)
Amyrctdp 0:c735c66e37d3 1126 {
Amyrctdp 0:c735c66e37d3 1127 uint8_t c1 = ((g3 & 4) << 1) | ((g2 & 4) << 0) | ((g1 & 4) >> 1) | ((g0 & 4) >> 2);
Amyrctdp 0:c735c66e37d3 1128 uint8_t c2 = ((g3 & 2) << 2) | ((g2 & 2) << 1) | ((g1 & 2) << 0) | ((g0 & 2) >> 1);
Amyrctdp 0:c735c66e37d3 1129 uint8_t c3 = ((g3 & 1) << 3) | ((g2 & 1) << 2) | ((g1 & 1) << 1) | ((g0 & 1) << 0);
Amyrctdp 0:c735c66e37d3 1130
Amyrctdp 0:c735c66e37d3 1131 accessBitBuffer[0] = (~c2 & 0xF) << 4 | (~c1 & 0xF);
Amyrctdp 0:c735c66e37d3 1132 accessBitBuffer[1] = c1 << 4 | (~c3 & 0xF);
Amyrctdp 0:c735c66e37d3 1133 accessBitBuffer[2] = c3 << 4 | c2;
Amyrctdp 0:c735c66e37d3 1134 } // End MIFARE_SetAccessBits()
Amyrctdp 0:c735c66e37d3 1135
Amyrctdp 0:c735c66e37d3 1136 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 1137 // Convenience functions - does not add extra functionality
Amyrctdp 0:c735c66e37d3 1138 /////////////////////////////////////////////////////////////////////////////////////
Amyrctdp 0:c735c66e37d3 1139
Amyrctdp 0:c735c66e37d3 1140 /*
Amyrctdp 0:c735c66e37d3 1141 * Returns true if a PICC responds to PICC_CMD_REQA.
Amyrctdp 0:c735c66e37d3 1142 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
Amyrctdp 0:c735c66e37d3 1143 */
Amyrctdp 0:c735c66e37d3 1144 bool MFRC522::PICC_IsNewCardPresent(void)
Amyrctdp 0:c735c66e37d3 1145 {
Amyrctdp 0:c735c66e37d3 1146 uint8_t bufferATQA[2];
Amyrctdp 0:c735c66e37d3 1147 uint8_t bufferSize = sizeof(bufferATQA);
Amyrctdp 0:c735c66e37d3 1148 uint8_t result = PICC_RequestA(bufferATQA, &bufferSize);
Amyrctdp 0:c735c66e37d3 1149 return ((result == STATUS_OK) || (result == STATUS_COLLISION));
Amyrctdp 0:c735c66e37d3 1150 } // End PICC_IsNewCardPresent()
Amyrctdp 0:c735c66e37d3 1151
Amyrctdp 0:c735c66e37d3 1152 /*
Amyrctdp 0:c735c66e37d3 1153 * Simple wrapper around PICC_Select.
Amyrctdp 0:c735c66e37d3 1154 */
Amyrctdp 0:c735c66e37d3 1155 bool MFRC522::PICC_ReadCardSerial(void)
Amyrctdp 0:c735c66e37d3 1156 {
Amyrctdp 0:c735c66e37d3 1157 uint8_t result = PICC_Select(&uid);
Amyrctdp 0:c735c66e37d3 1158 return (result == STATUS_OK);
Amyrctdp 0:c735c66e37d3 1159 } // End PICC_ReadCardSerial()