Andrew Boyson / fram

A module to store data on a fram.

Dependents:   oldheating motorhome heating

spi.c@0:e8f4aff306cd, 2021-04-23 (annotated)

Committer:
andrewboyson
Date:
Fri Apr 23 08:20:00 2021 +0000
Revision:
0:e8f4aff306cd
Stores data on the FRAM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andrewboyson 0:e8f4aff306cd 1 #include "gpio.h"
andrewboyson 0:e8f4aff306cd 2 #include "log.h"
andrewboyson 0:e8f4aff306cd 3
andrewboyson 0:e8f4aff306cd 4 #define CS_DIR FIO0DIR(6)
andrewboyson 0:e8f4aff306cd 5 #define CS_SET FIO0SET(6)
andrewboyson 0:e8f4aff306cd 6 #define CS_CLR FIO0CLR(6)
andrewboyson 0:e8f4aff306cd 7
andrewboyson 0:e8f4aff306cd 8 //SSP1
andrewboyson 0:e8f4aff306cd 9 #define CR0 (*((volatile unsigned *) 0x40030000))
andrewboyson 0:e8f4aff306cd 10 #define CR1 (*((volatile unsigned *) 0x40030004))
andrewboyson 0:e8f4aff306cd 11 #define DR (*((volatile unsigned *) 0x40030008))
andrewboyson 0:e8f4aff306cd 12 #define SR (*((volatile unsigned *) 0x4003000C))
andrewboyson 0:e8f4aff306cd 13 #define CPSR (*((volatile unsigned *) 0x40030010))
andrewboyson 0:e8f4aff306cd 14
andrewboyson 0:e8f4aff306cd 15 void SpiInit(void)
andrewboyson 0:e8f4aff306cd 16 {
andrewboyson 0:e8f4aff306cd 17 //Configure
andrewboyson 0:e8f4aff306cd 18 CR0 |= 7 << 0; //3:0 8 bit transfer
andrewboyson 0:e8f4aff306cd 19 CR0 |= 0 << 4; //5:4 SPI
andrewboyson 0:e8f4aff306cd 20 CR0 |= 0 << 6; //7:6 Mode 0
andrewboyson 0:e8f4aff306cd 21 CR0 |= 0 << 8; //divide by 1
andrewboyson 0:e8f4aff306cd 22
andrewboyson 0:e8f4aff306cd 23 //Set prescaler bps = PCLK / PS ==> PS = PCLK / bps ==> PS = 96/16 = 6
andrewboyson 0:e8f4aff306cd 24 CPSR = 6; //Bit 0 must be 0. 6 ==> 16 bps which is within the 20MHz allowed by the FRAM
andrewboyson 0:e8f4aff306cd 25
andrewboyson 0:e8f4aff306cd 26 //Select the function of the ssel pin: P0.6
andrewboyson 0:e8f4aff306cd 27 CS_SET; //Deselect the output == CS = 1
andrewboyson 0:e8f4aff306cd 28 CS_DIR = 1; //Set the direction to 1 == output
andrewboyson 0:e8f4aff306cd 29
andrewboyson 0:e8f4aff306cd 30 //Enable operation
andrewboyson 0:e8f4aff306cd 31 CR1 |= 2; //Enable the SSP controller
andrewboyson 0:e8f4aff306cd 32 }
andrewboyson 0:e8f4aff306cd 33 void SpiChipSelect(int value)
andrewboyson 0:e8f4aff306cd 34 {
andrewboyson 0:e8f4aff306cd 35 if (value) CS_SET;
andrewboyson 0:e8f4aff306cd 36 else CS_CLR;
andrewboyson 0:e8f4aff306cd 37 }
andrewboyson 0:e8f4aff306cd 38 void SpiWrite(char byte)
andrewboyson 0:e8f4aff306cd 39 {
andrewboyson 0:e8f4aff306cd 40 DR = byte; //This loads the next frame in the TX FIFO
andrewboyson 0:e8f4aff306cd 41 }
andrewboyson 0:e8f4aff306cd 42 int SpiBusy(void)
andrewboyson 0:e8f4aff306cd 43 {
andrewboyson 0:e8f4aff306cd 44 return SR & 0x10; //bit 4 is BSY. This bit is 0 if the SSPn controller is idle, or 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty.
andrewboyson 0:e8f4aff306cd 45 }
andrewboyson 0:e8f4aff306cd 46 char SpiRead(void)
andrewboyson 0:e8f4aff306cd 47 {
andrewboyson 0:e8f4aff306cd 48 return DR & 0xFF; //This reads the oldest frame in the RX FIFO
andrewboyson 0:e8f4aff306cd 49 }
andrewboyson 0:e8f4aff306cd 50 char SpiTransfer(char byte)
andrewboyson 0:e8f4aff306cd 51 {
andrewboyson 0:e8f4aff306cd 52 SpiWrite(byte);
andrewboyson 0:e8f4aff306cd 53 while(SpiBusy()) /*spin until not busy, at 16 bits per us or 2 bytes per us should be only 48 operations*/;
andrewboyson 0:e8f4aff306cd 54 return SpiRead();
andrewboyson 0:e8f4aff306cd 55 }