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Comitter:
The Other Jimmy
Date:
Thu Jun 22 11:12:28 2017 -0500
Parent:
35:da9c89f8be7d
Child:
37:f8cfeb185c30
Commit message:
Tools release 5.5.1

Changed in this revision

add_fib.py Show diff for this revision Revisions of this file
arm_pack_manager/__init__.py Show annotated file Show diff for this revision Revisions of this file
arm_pack_manager/aliases.json Show annotated file Show diff for this revision Revisions of this file
arm_pack_manager/index.json Show annotated file Show diff for this revision Revisions of this file
bootloaders/REALTEK_RTL8195AM/ram_1_prepend.bin Show annotated file Show diff for this revision Revisions of this file
build.py Show annotated file Show diff for this revision Revisions of this file
build_api.py Show annotated file Show diff for this revision Revisions of this file
build_everything.py Show diff for this revision Revisions of this file
build_profiles.py Show annotated file Show diff for this revision Revisions of this file
build_release.py Show diff for this revision Revisions of this file
build_travis.py Show diff for this revision Revisions of this file
buildbot/master.cfg Show diff for this revision Revisions of this file
ci_templates/library_build/build_report.html Show diff for this revision Revisions of this file
ci_templates/library_build/build_report_table.html Show diff for this revision Revisions of this file
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compliance/__init__.py Show diff for this revision Revisions of this file
compliance/ioper_base.py Show diff for this revision Revisions of this file
compliance/ioper_runner.py Show diff for this revision Revisions of this file
compliance/ioper_test_fs.py Show diff for this revision Revisions of this file
compliance/ioper_test_target_id.py Show diff for this revision Revisions of this file
config.py Show diff for this revision Revisions of this file
config/__init__.py Show annotated file Show diff for this revision Revisions of this file
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dev/__init__.py Show diff for this revision Revisions of this file
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dev/intel_hex_utils.py Show diff for this revision Revisions of this file
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export/README.md Show diff for this revision Revisions of this file
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export/iar/__init__.py Show annotated file Show diff for this revision Revisions of this file
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export/lpcxpresso/__init__.py Show annotated file Show diff for this revision Revisions of this file
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latest_targets.json Show annotated file Show diff for this revision Revisions of this file
libraries.py Show annotated file Show diff for this revision Revisions of this file
make.py Show annotated file Show diff for this revision Revisions of this file
memap.py Show annotated file Show diff for this revision Revisions of this file
misc/Doxyfile Show diff for this revision Revisions of this file
misc/docs_gen.py Show diff for this revision Revisions of this file
misc/find_c_includes.py Show diff for this revision Revisions of this file
misc/remove-device-h.py Show diff for this revision Revisions of this file
options.py Show annotated file Show diff for this revision Revisions of this file
patch.py Show diff for this revision Revisions of this file
paths.py Show annotated file Show diff for this revision Revisions of this file
profiles/debug.json Show annotated file Show diff for this revision Revisions of this file
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project.py Show annotated file Show diff for this revision Revisions of this file
project_api.py Show diff for this revision Revisions of this file
size.py Show diff for this revision Revisions of this file
synch.py Show diff for this revision Revisions of this file
targets.py Show diff for this revision Revisions of this file
targets/LPC.py Show annotated file Show diff for this revision Revisions of this file
targets/NCS.py Show annotated file Show diff for this revision Revisions of this file
targets/REALTEK_RTL8195AM.py Show annotated file Show diff for this revision Revisions of this file
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test.py Show annotated file Show diff for this revision Revisions of this file
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--- a/add_fib.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,215 +0,0 @@
-"""
-@copyright (c) 2012 ON Semiconductor. All rights reserved.
-ON Semiconductor is supplying this software for use with ON Semiconductor
-processor based microcontrollers only.
-THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
-INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-"""
-
-from __future__ import absolute_import
-from __future__ import print_function
-
-import itertools
-import binascii
-import intelhex
-from tools.config import Config
-
-FIB_BASE = 0x2000
-FLASH_BASE = 0x3000
-FW_REV = 0x01000100
-TRIM_BASE = 0x2800
-
-def ranges(i):
-    for _, b in itertools.groupby(enumerate(i), lambda x_y: x_y[1] - x_y[0]):
-        b = list(b)
-        yield b[0][1], b[-1][1]
-
-
-def add_fib_at_start(arginput):
-    input_file = arginput + ".bin"
-    file_name_hex = arginput + "_fib.hex"
-    file_name_bin = arginput + ".bin"
-
-    # Read in hex file
-    input_hex_file = intelhex.IntelHex()
-    input_hex_file.padding = 0x00
-    input_hex_file.loadbin(input_file, offset=FLASH_BASE)
-
-    output_hex_file = intelhex.IntelHex()
-    output_hex_file.padding = 0x00
-
-    # Get the starting and ending address
-    addresses = input_hex_file.addresses()
-    addresses.sort()
-    start_end_pairs = list(ranges(addresses))
-    regions = len(start_end_pairs)
-
-    if regions == 1:
-        start, end = start_end_pairs[0]
-    else:
-        start = min(min(start_end_pairs))
-        end = max(max(start_end_pairs))
-
-    assert start >= FLASH_BASE, ("Error - start 0x%x less than begining of user\
-    flash area" %start)
-    # Compute checksum over the range (don't include data at location of crc)
-    size = end - start + 1
-    data = input_hex_file.tobinarray(start=start, size=size)
-    crc32 = binascii.crc32(data) & 0xFFFFFFFF
-
-    fw_rev = FW_REV
-
-    checksum = (start + size + crc32 + fw_rev) & 0xFFFFFFFF
-
-    print("Writing FIB: base 0x%08X, size 0x%08X, crc32 0x%08X, fw rev 0x%08X,\
-    checksum 0x%08X" % (start, size, crc32, fw_rev, checksum))
-
-#expected initial values used by daplink to validate that it is a valid bin
-#file added as dummy values in this file because the fib area preceeds the
-#application area the bootloader will ignore these dummy values
-#  00 is stack pointer (RAM address)
-#  04 is Reset vector  (FLASH address)
-#  08 NMI_Handler      (FLASH address)
-#  0C HardFault_Handler(FLASH address)
-#  10 dummy
-    dummy_sp = 0x3FFFFC00
-    dummy_reset_vector = 0x00003625
-    dummy_nmi_handler = 0x00003761
-    dummy_hardfault_handler = 0x00003691
-    dummy_blank = 0x00000000
-
-#expected fib structure
-#typedef struct fib{
-    #uint32_t base;     /**< Base offset of firmware, indicating what flash the
-    #                        firmware is in. (will never be 0x11111111) */
-    #uint32_t size;     /**< Size of the firmware */
-    #uint32_t crc;      /**< CRC32 for firmware correctness check */
-    #uint32_t rev;      /**< Revision number */
-    #uint32_t checksum; /**< Check-sum of information block */
-#}fib_t, *fib_pt;
-
-    fib_start = FIB_BASE
-    dummy_fib_size = 20
-    fib_size = 20
-    trim_size = 24
-    user_code_start = FLASH_BASE
-    trim_area_start = TRIM_BASE
-
-    # Write FIB to the file in little endian
-    output_hex_file[fib_start + 0] = (dummy_sp >> 0) & 0xFF
-    output_hex_file[fib_start + 1] = (dummy_sp >> 8) & 0xFF
-    output_hex_file[fib_start + 2] = (dummy_sp >> 16) & 0xFF
-    output_hex_file[fib_start + 3] = (dummy_sp >> 24) & 0xFF
-
-    output_hex_file[fib_start + 4] = (dummy_reset_vector >> 0) & 0xFF
-    output_hex_file[fib_start + 5] = (dummy_reset_vector >> 8) & 0xFF
-    output_hex_file[fib_start + 6] = (dummy_reset_vector >> 16) & 0xFF
-    output_hex_file[fib_start + 7] = (dummy_reset_vector >> 24) & 0xFF
-
-    output_hex_file[fib_start + 8] = (dummy_nmi_handler >> 0) & 0xFF
-    output_hex_file[fib_start + 9] = (dummy_nmi_handler >> 8) & 0xFF
-    output_hex_file[fib_start + 10] = (dummy_nmi_handler >> 16) & 0xFF
-    output_hex_file[fib_start + 11] = (dummy_nmi_handler >> 24) & 0xFF
-
-    output_hex_file[fib_start + 12] = (dummy_hardfault_handler >> 0) & 0xFF
-    output_hex_file[fib_start + 13] = (dummy_hardfault_handler >> 8) & 0xFF
-    output_hex_file[fib_start + 14] = (dummy_hardfault_handler >> 16) & 0xFF
-    output_hex_file[fib_start + 15] = (dummy_hardfault_handler >> 24) & 0xFF
-
-    output_hex_file[fib_start + 16] = (dummy_blank >> 0) & 0xFF
-    output_hex_file[fib_start + 17] = (dummy_blank >> 8) & 0xFF
-    output_hex_file[fib_start + 18] = (dummy_blank >> 16) & 0xFF
-    output_hex_file[fib_start + 19] = (dummy_blank >> 24) & 0xFF
-
-    # Write FIB to the file in little endian
-    output_hex_file[fib_start + 20] = (start >> 0) & 0xFF
-    output_hex_file[fib_start + 21] = (start >> 8) & 0xFF
-    output_hex_file[fib_start + 22] = (start >> 16) & 0xFF
-    output_hex_file[fib_start + 23] = (start >> 24) & 0xFF
-
-    output_hex_file[fib_start + 24] = (size >> 0) & 0xFF
-    output_hex_file[fib_start + 25] = (size >> 8) & 0xFF
-    output_hex_file[fib_start + 26] = (size >> 16) & 0xFF
-    output_hex_file[fib_start + 27] = (size >> 24) & 0xFF
-
-    output_hex_file[fib_start + 28] = (crc32 >> 0) & 0xFF
-    output_hex_file[fib_start + 29] = (crc32 >> 8) & 0xFF
-    output_hex_file[fib_start + 30] = (crc32 >> 16) & 0xFF
-    output_hex_file[fib_start + 31] = (crc32 >> 24) & 0xFF
-
-    output_hex_file[fib_start + 32] = (fw_rev >> 0) & 0xFF
-    output_hex_file[fib_start + 33] = (fw_rev >> 8) & 0xFF
-    output_hex_file[fib_start + 34] = (fw_rev >> 16) & 0xFF
-    output_hex_file[fib_start + 35] = (fw_rev >> 24) & 0xFF
-
-    output_hex_file[fib_start + 36] = (checksum >> 0) & 0xFF
-    output_hex_file[fib_start + 37] = (checksum >> 8) & 0xFF
-    output_hex_file[fib_start + 38] = (checksum >> 16) & 0xFF
-    output_hex_file[fib_start + 39] = (checksum >> 24) & 0xFF
-
-    #pad the rest of the file
-    for i in range(fib_start + dummy_fib_size + fib_size, trim_area_start):
-        output_hex_file[i] = 0xFF
-
-    # Read in configuration data from the config parameter in targets.json
-    configData = Config('NCS36510')
-    paramData = configData.get_target_config_data()
-    for v in paramData.values():
-        if (v.name == "target.mac-addr-high"):
-            mac_addr_high = int(v.value, 16)
-        elif (v.name == "target.mac-addr-low"):
-            mac_addr_low = int(v.value,16)
-        elif (v.name == "target.32KHz-clk-trim"):
-            clk_32k_trim = int(v.value,16)
-        elif (v.name == "target.32MHz-clk-trim"):
-            clk_32m_trim = int(v.value,16)
-        elif (v.name == "target.rssi-trim"):
-            rssi = int(v.value,16)
-        elif (v.name == "target.txtune-trim"):
-            txtune = int(v.value,16)
-        else:
-            print("Not a valid param")
-
-    output_hex_file[trim_area_start + 0] = mac_addr_low & 0xFF
-    output_hex_file[trim_area_start + 1] = (mac_addr_low >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 2] = (mac_addr_low >> 16) & 0xFF
-    output_hex_file[trim_area_start + 3] = (mac_addr_low >> 24) & 0xFF
-    
-    output_hex_file[trim_area_start + 4] = mac_addr_high & 0xFF
-    output_hex_file[trim_area_start + 5] = (mac_addr_high >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 6] = (mac_addr_high >> 16) & 0xFF
-    output_hex_file[trim_area_start + 7] = (mac_addr_high >> 24) & 0xFF
-
-    output_hex_file[trim_area_start + 8] = clk_32k_trim & 0xFF
-    output_hex_file[trim_area_start + 9] = (clk_32k_trim >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 10] = (clk_32k_trim >> 16) & 0xFF
-    output_hex_file[trim_area_start + 11] = (clk_32k_trim >> 24) & 0xFF
-
-    output_hex_file[trim_area_start + 12] = clk_32m_trim & 0xFF
-    output_hex_file[trim_area_start + 13] = (clk_32m_trim >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 14] = (clk_32m_trim >> 16) & 0xFF
-    output_hex_file[trim_area_start + 15] = (clk_32m_trim >> 24) & 0xFF
-
-    output_hex_file[trim_area_start + 16] = rssi & 0xFF
-    output_hex_file[trim_area_start + 17] = (rssi >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 18] = (rssi >> 16) & 0xFF
-    output_hex_file[trim_area_start + 19] = (rssi >> 24) & 0xFF
-
-    output_hex_file[trim_area_start + 20] = txtune & 0xFF
-    output_hex_file[trim_area_start + 21] = (txtune >> 8)  & 0xFF
-    output_hex_file[trim_area_start + 22] = (txtune >> 16) & 0xFF
-    output_hex_file[trim_area_start + 23] = (txtune >> 24) & 0xFF
-    
-    # pad the rest of the area with 0xFF
-    for i in range(trim_area_start + trim_size, user_code_start):
-        output_hex_file[i] = 0xFF
-
-    #merge two hex files
-    output_hex_file.merge(input_hex_file, overlap='error')
-
-    # Write out file(s)
-    output_hex_file.tofile(file_name_hex, 'hex')
-    output_hex_file.tofile(file_name_bin, 'bin')
--- a/arm_pack_manager/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/arm_pack_manager/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -7,12 +7,17 @@
 from Queue import Queue
 from re import compile, sub
 from sys import stderr, stdout
-from fuzzywuzzy import process
 from itertools import takewhile
 import argparse
 from json import dump, load
 from zipfile import ZipFile
 from tempfile import gettempdir
+import warnings
+from distutils.version import LooseVersion
+
+warnings.filterwarnings("ignore")
+
+from fuzzywuzzy import process
 
 RootPackURL = "http://www.keil.com/pack/index.idx"
 
@@ -27,7 +32,7 @@
 
 def largest_version(content) :
     return sorted([t['version'] for t in content.package.releases('release')],
-                  reverse=True, key=lambda v: map(int, v.split(".")))[0]
+                  reverse=True, key=lambda v: LooseVersion(v))[0]
 
 def do_queue(Class, function, interable) :
     q = Queue()
@@ -242,19 +247,23 @@
         self.counter += 1
         self.display_counter("Scanning for Aliases")
 
-    def get_flash_algorthim_binary(self, device_name) :
+    def get_flash_algorthim_binary(self, device_name, all=False) :
         """Retrieve the flash algorithm file for a particular part.
 
         Assumes that both the PDSC and the PACK file associated with that part are in the cache.
 
         :param device_name: The exact name of a device
+        :param all: Return an iterator of all flash algos for this device
         :type device_name: str
         :return: A file-like object that, when read, is the ELF file that describes the flashing algorithm
-        :rtype: ZipExtFile
+        :return: A file-like object that, when read, is the ELF file that describes the flashing algorithm.
+                 When "all" is set to True then an iterator for file-like objects is returned
+        :rtype: ZipExtFile or ZipExtFile iterator if all is True
         """
         device = self.index[device_name]
         pack = self.pack_from_cache(device)
-        return pack.open(device['algorithm'].keys()[0])
+        algo_itr = (pack.open(path) for path in device['algorithm'].keys())
+        return algo_itr if all else algo_itr.next()
 
     def get_svd_file(self, device_name) :
         """Retrieve the flash algorithm file for a particular part.
@@ -348,7 +357,7 @@
 
         """
         if not self._aliases :
-            with open(join(self.data_path, "aliases.json")) as i :
+            with open(LocalPackAliases) as i :
                 self._aliases = load(i)
         return self._aliases
 
--- a/arm_pack_manager/aliases.json	Wed Feb 15 13:53:18 2017 -0600
+++ b/arm_pack_manager/aliases.json	Thu Jun 22 11:12:28 2017 -0500
@@ -1,1 +1,1 @@
-{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "NuTiny-SDK-M451": "M453VG6AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "MCB11C14": "LPC11C14FBD48/301", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "FRDM-KL43Z": "MKL43Z256xxx4", "NUCLEO-L152RE": "STM32L152RE", "TWR-KV10Z32": "MKV10Z32xxx7", "EFM32ZG-STK3200": "EFM32ZG222F32", "FRDM-KW40Z": "MKW40Z160xxx4", "NuTiny-SDK-NM1200": "NM1200LBAE", "TWR-K70F120M": "MK70FN1M0xxx12", "MCBSTM32F400": "STM32F407IG", "SAML21-XPRO": "ATSAML21J18A", "STM32F030-Discovery": "STM32F030R8", "STM32756G-EVAL": "STM32F756NGHx", "Apollo EVK": "Apollo_512_BGA", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "MCB1700": "LPC1758", "V2M-MPS2": "CMSDK_CM7", "MCB54110": "LPC54114J256BD64", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EFM32GG-DK3750": "EFM32GG990F1024", "MCBSTM32F200": "STM32F207IG", "EVAL-ADuCM322EBZ": "ADuCM322", "MCBTMPM360": "TMPM362F10FG", "SN32F707B Starter Kit Rev1_0": "SN32F70*B", "NUCLEO-F446RE": "STM32F446RE", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "Z32F0640100KITG": "Z32F06410AES", "FRDM-KL02Z": "MKL02Z32xxx4", "Colibri-iMX7": "MCIMX7D", "SAM3S-EK": "ATSAM3S4C", "NuTiny-SDK-Mini51": "Mini54LDE", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "TRK-KEA64": "SKEAZN64xxx2", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "ADSP-CM419F EZ-BOARD M0": "ADSP-CM419F-BCZ_M0", "NuTiny-SDK-NUC200": "NUC220VE3AN", "FRDM-KE06Z": "MKE06Z128xxx4", "NUCLEO-F072RB": "STM32F072RB", "NuTiny-SDK-NUC100": "NUC100VE3DN", "FRDM-KL25Z": "MKL25Z128xxx4", "FRDM-K20D50M": "MK20DX128xxx5", "TS-R-IN32M3-CEC": "R-IN32M3-EC", "SAM4L-XPRO": "ATSAM4LC4C", "EVAL-ADuCM360MKZ": "ADuCM360", "nRF52 PCA10036": "nRF52832_xxAA", "TWR-KV11Z75M": "MKV11Z128xxx7", "LPCXpresso54102": "LPC54102J512BD64", "SF2_STARTER_KIT": "M2S010", "STM32L-Discovery": "STM32L152RB", "IMX7-PHYBOARD-ZETA": "MCIMX7D", "nRF51 PCA20006": "nRF51822_xxaa", "TWR-KV46F150M": "MKV46F256xxx16", "Koala EVM": "STM32F429II", "EFM32WG-STK3800": "EFM32WG990F256", "MCB1313": "LPC1313FBD48", "TWR-K65F180M": "MK65FN2M0xxx18", "EB_TMPM369FDFG": "TMPM369FDFG", "TS-R-IN32M3-EC": "R-IN32M3-EC", "ADSP-CM403F EZ-Board": "ADSP-CM403BSWZ-CF", "LPCXpresso54114": "LPC54114J256BD64", "TWR-KM34Z50MV3": "MKM34Z128Axxx5", "NUCLEO-F091RC": "STM32F091RC", "SAMV71-XULTRA": "ATSAMV71Q21", "EVAL-ADuCM320EBZ": "ADuCM320", "TWR-KL43Z48M": "MKL43Z256xxx4", "STM32373C-EVAL": "STM32F373VC", "STM32F746G-Discovery": "STM32F746NGHx", "NuTiny-SDK-Mini51X": "Mini54XZAE", "NuTiny-SDK-NUC122": "NUC122SD2AN", "MCIMX7D-SABRE": "MCIMX7D", "nRF52 PCA10040": "nRF52832_xxAA", "MCBSTM32C": "STM32F107VC", "FRDM-KL03Z": "MKL03Z32xxx4", "AC30M1464 MINI B/D": "AC30M1464", "NUCLEO-F401RE": "STM32F401RE", "SF2_EVAL_KIT": "M2S025", "AC33MA384A MINI B/D": "AC33MA384A", "SAML22-XPRO": "ATSAML22N18A", "XMC4800 Relax EtherCAT Kit": "XMC4800-F144x2048", "TRK-KEA128": "SKEAZ128xxx4", "SAM4S-EK": "SAM4S16C", "TWR-K20D50M": "MK20DX128xxx5", "STM32F3-Discovery": "STM32F303VC", "LPC812 LPCXpresso": "LPC812M101JDH20", "LPCXpresso1125": "LPC1125JBD48/303", "STM32F4-Discovery": "STM32F407VG", "CMSIS_RTOS_Tutorial": "STM32F103RB", "SAM3X-EK": "ATSAM3X8H", "STM32303C-EVAL": "STM32F303VC", "SN32F760 Starter Kit Rev1_1": "SN32F76*", "Core103R_Board": "MM32x103", "SF2_DEV_KIT": "M2S050", "EK-TM4C1294XL": "TM4C1294NCPDT", "FRDM-KE04Z": "MKE04Z8xxx4", "NuTiny-SDK-NUC123": "NUC123SD4AN0", "LinkIt 2523 development board": "MT2523x", "Apollo2 EVK": "Apollo2_1024_BGA", "LPC4330-Xplorer": "LPC4330", "TWR-K24F120M": "MK24FN256xxx12", "MCBTMPM330": "TMPM330FDFG", "NUCLEO-L476RG": "STM32L476RG", "Bulb Board": "S6E1A12B0A", "MCB1800": "LPC1850", "EFM32GG-STK3700": "EFM32GG990F1024", "GD32150C-START": "GD32F150C8", "AC33GA256 MINI B/D": "AC33GA256", "TS-R-IN32M3-CL": "R-IN32M3-CL", "SAM3N-EK": "ATSAM3N4C", "AC33M8128/6128 MINI B/D": "AC33M8128", "SAM4S-XPRO": "ATSAM4SD32C", "SAME70-XPLD": "ATSAME70Q21", "ADSP-CM408F EZ-Board": "ADSP-CM408BSWZ-BF", "STM32F429I-Discovery": "STM32F429ZI", "XMC4500 CPU Board - General Purpose (CPU_45A)": "XMC4500-F144x1024", "Z32F3840100KITG": "Z32F38412ALS", "LPCXpresso54608": "LPC54608J512BD208", "LPC824 LPCXpresso": "LPC824M201JHI33", "FRDM-KW41Z": "MKW41Z512xxx4", "EFM32TG-STK3300": "EFM32TG840F32", "AC33M4064/3064 MINI B/D": "AC33M4064", "NUCLEO-F030R8": "STM32F030R8", "NuTiny-SDK-NUC131": "NUC131SD2AE", "TWR-KM34Z50": "MKM34Z128xxx5", "XMC1100 Boot Kit": "XMC1100-T038x0064", "TS-R-IN32M4-CL2": "R-IN32M4-CL2", "MCIMX6SX-SABRE": "MCIMX6SX", "SAM4C-EK": "ATSAM4C16C", "Apollo2 Surrey FPGA": "Apollo2_FPGA", "MCB1500": "LPC1549JBD100", "TWR-KW21D256": "MKW21D256xxx5", "STM32L476G-EVAL": "STM32L476ZG", "MCB9B500": "MB9BF506R", "STM32F051-Discovery": "STM32F051R8", "NUCLEO-L053R8": "STM32L053R8", "FRDM-K64F": "MK64FN1M0xxx12", "NuTiny-SDK-NUC240": "NUC240VE3AE", "DK-TM4C129x": "TM4C129XNCZAD", "SF2_ADV_DEV_KIT": "M2S150", "NuTiny-SDK-Nano112": "NANO112VC2AN", "SAMD20-XPRO": "ATSAMD20J18", "TWR-KL28Z72M": "MKL28Z512xxx7", "SAM4E-EK": "SAM4E16C", "MCB1343": "LPC1343FBD48", "LinkIt 7687 development board": "MT7687F", "XMC4500 CPU Board - General Purpose (CPU_45B)": "XMC4500-E144x1024", "EVAL-ADuCM320iQSPZ": "ADuCM320i", "SN32F100 Starter Kit": "SN32F10*", "SAM3U-EK": "ATSAM3U4E", "SAMG55-XPRO": "ATSAMG55J19", "FRDM-KL82Z": "MKL81Z128xxx7", "XMC1300 Boot Kit": "XMC1302-T038x0200", "LPC1788-32 Developers Kit": "LPC1788", "MCBTMPM395": "TMPM395FWAXBG", "STM32F072-Discovery": "STM32F072RB", "BMSKTOPASM369": "TMPM369FDFG", "uVision Simulator": "ARMCM0", "NuTiny-SDK-NANO100AN": "NANO100VD3AN", "TWR-K60D100M": "MK60DN512xxx10", "TWR-K20D72M": "MK20DX256xxx7", "nRF51 PCA10031": "nRF51422_xxAC", "XMC4700 Relax Kit": "XMC4700-F144x2048", "SK-FM3-176PMC-ETHERNET": "MB9BFD18T", "LPC4088-32 Developers Kit": "LPC4088FET208", "TLE984x Eval.Board": "TLE9844QX", "XMC4500 Relax Lite Kit": "XMC4500-F100x1024", "STM32L053-Discovery": "STM32L053C8", "LPCXpresso11U68": "LPC11U68JBD100", "XMC4400 CPU Board - General Purpose  (CPU_44A)": "XMC4400-F100x512", "NUCLEO-F103RB": "STM32F103RB", "NuTiny-SDK-NUC029AE": "NUC029FAE", "NuTiny-SDK-NUC029AN": "NUC029TAN", "MCBSTM32E": "STM32F103ZG", "XMC4300 Relax Kit": "XMC4300-F100x256", "TWR-KL82Z72M": "MKL82Z128xxx7", "NuTiny-SDK-M0518": "M0518SD2AE", "NuTiny-SDK-M0519": "M0519VE3AE", "TWR-K64F120M": "MK64FN1M0xxx12", "MCB4300": "LPC4350", "XMC4200 CPU Board - Actuator  (CPU_42A)": "XMC4200-F64x256"}
\ No newline at end of file
+{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "NuTiny-SDK-M451": "M453VG6AE", "NuTiny-SDK-M0518": "M0518SD2AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "MCB11C14": "LPC11C14FBD48/301", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "NUCLEO-L152RE": "STM32L152RE", "TWR-KV10Z32": "MKV10Z32xxx7", "NuTiny-SDK-NUC029AE": "NUC029FAE", "FRDM-KW40Z": "MKW40Z160xxx4", "NuTiny-SDK-NM1200": "NM1200LBAE", "TWR-K70F120M": "MK70FN1M0xxx12", "STM32F769I-Discovery": "STM32F769NIHx", "TWR-KE18F": "MKE18F512xxx16", "MCBSTM32F400": "STM32F407IG", "LPCXpresso54608": "LPC54608J512BD208", "STM32F030-Discovery": "STM32F030R8", "Apollo EVK": "Apollo_512_BGA", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "MCB1313": "LPC1313FBD48", "NUCLEO-F446RE": "STM32F446RE", "V2M-MPS2": "CMSDK_CM7", "MCB54110": "LPC54114J256BD64", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EFM32GG-DK3750": "EFM32GG990F1024", "MCBSTM32F200": "STM32F207IG", "EVAL-ADuCM322EBZ": "ADuCM322", "FRDM-KL25Z": "MKL25Z128xxx4", "SN32F707B Starter Kit Rev1_0": "SN32F70*B", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "Z32F0640100KITG": "Z32F06410AES", "LPCXpresso54114": "LPC54114J256BD64", "Colibri-iMX7": "MCIMX7D", "ADuCM3029 EZ-BOARD": "ADuCM3029", "SAM3S-EK": "ATSAM3S4C", "SF2_DEV_KIT": "M2S050", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "FRDM-K28F": "MK28FN2M0xxx15", "TRK-KEA64": "SKEAZN64xxx2", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "XMC4700 Relax Kit": "XMC4700-F144x2048", "SAMG55-XPRO": "ATSAMG55J19", "NuTiny-SDK-NUC200": "NUC220VE3AN", "TWR-K60D100M": "MK60DN512xxx10", "FRDM-KE06Z": "MKE06Z128xxx4", "SF2_ADV_DEV_KIT": "M2S150", "NuTiny-SDK-NUC100": "NUC100VE3DN", "MCB1700": "LPC1758", "MCBTMPM360": "TMPM362F10FG", "FRDM-K20D50M": "MK20DX128xxx5", "STM32756G-EVAL": "STM32F756NGHx", "SAM4L-XPRO": "ATSAM4LC4C", "FRDM-KL43Z": "MKL43Z256xxx4", "nRF52 PCA10036": "nRF52832_xxAA", "TWR-KV11Z75M": "MKV11Z128xxx7", "LPCXpresso54102": "LPC54102J512BD64", "TWR-KM34Z50": "MKM34Z128xxx5", "STM32L-Discovery": "STM32L152RB", "XMC1100 Boot Kit": "XMC1100-T038x0064", "TWR-KV46F150M": "MKV46F256xxx16", "Koala EVM": "STM32F429II", "EFM32WG-STK3800": "EFM32WG990F256", "MCIMX7D-SABRE": "MCIMX7D", "TWR-K65F180M": "MK65FN2M0xxx18", "EB_TMPM369FDFG": "TMPM369FDFG", "TS-R-IN32M3-EC": "R-IN32M3-EC", "ADSP-CM403F EZ-Board": "ADSP-CM403BSWZ-CF", "TWR-KM34Z50MV3": "MKM34Z128Axxx5", "XMC4300 Relax Kit": "XMC4300-F100x256", "NUCLEO-F091RC": "STM32F091RC", "SAMV71-XULTRA": "ATSAMV71Q21", "EVAL-ADuCM320EBZ": "ADuCM320", "TWR-KL43Z48M": "MKL43Z256xxx4", "STM32373C-EVAL": "STM32F373VC", "STM32F746G-Discovery": "STM32F746NGHx", "NuTiny-SDK-Mini51X": "Mini54XZAE", "LinkIt 2523 development board": "MT2523x", "nRF52 PCA10040": "nRF52832_xxAA", "MCBSTM32C": "STM32F107VC", "FRDM-KL03Z": "MKL03Z32xxx4", "AC30M1464 MINI B/D": "AC30M1464", "IMX7-PHYBOARD-ZETA": "MCIMX7D", "SF2_EVAL_KIT": "M2S025", "AC33MA384A MINI B/D": "AC33MA384A", "SAML22-XPRO": "ATSAML22N18A", "XMC4800 Relax EtherCAT Kit": "XMC4800-F144x2048", "iMX7-Dual-COM": "MCIMX7D", "TRK-KEA128": "SKEAZ128xxx4", "SAM4S-EK": "SAM4S16C", "NuTiny-SDK-Mini51": "Mini54LDE", "TWR-K20D50M": "MK20DX128xxx5", "STM32F3-Discovery": "STM32F303VC", "LPCXpresso1125": "LPC1125JBD48/303", "STM32F4-Discovery": "STM32F407VG", "CMSIS_RTOS_Tutorial": "STM32F103RB", "SAM3X-EK": "ATSAM3X8H", "STM32303C-EVAL": "STM32F303VC", "SN32F760 Starter Kit Rev1_1": "SN32F76*", "Core103R_Board": "MM32x103", "ADSP-CM408F EZ-Board": "ADSP-CM408BSWZ-BF", "FRDM-KE04Z": "MKE04Z8xxx4", "NuTiny-SDK-NUC123": "NUC123SD4AN0", "TWR-K24F120M": "MK24FN256xxx12", "Apollo2 EVK": "Apollo2_1024_BGA", "LPC4330-Xplorer": "LPC4330", "MCBTMPM330": "TMPM330FDFG", "NUCLEO-L476RG": "STM32L476RG", "Bulb Board": "S6E1A12B0A", "MCB1800": "LPC1850", "EFM32GG-STK3700": "EFM32GG990F1024", "FRDM-KL02Z": "MKL02Z32xxx4", "AC33GA256 MINI B/D": "AC33GA256", "TS-R-IN32M3-CL": "R-IN32M3-CL", "STM32F334-Discovery": "STM32F334C8", "SAM3N-EK": "ATSAM3N4C", "AC33M8128/6128 MINI B/D": "AC33M8128", "SAM4S-XPRO": "ATSAM4SD32C", "STM32L053-Discovery": "STM32L053C8", "STM32F429I-Discovery": "STM32F429ZI", "XMC4500 CPU Board - General Purpose (CPU_45A)": "XMC4500-F144x1024", "NuTiny-SDK-NUC122": "NUC122SD2AN", "Z32F3840100KITG": "Z32F38412ALS", "SAML21-XPRO": "ATSAML21J18A", "LPC824 LPCXpresso": "LPC824M201JHI33", "FRDM-KW41Z": "MKW41Z512xxx4", "EFM32TG-STK3300": "EFM32TG840F32", "AC33M4064/3064 MINI B/D": "AC33M4064", "NUCLEO-F030R8": "STM32F030R8", "NuTiny-SDK-NUC131": "NUC131SD2AE", "STM32F769I-EVAL": "STM32F769NIHx", "SF2_STARTER_KIT": "M2S010", "nRF51 PCA20006": "nRF51822_xxaa", "TS-R-IN32M4-CL2": "R-IN32M4-CL2", "MCIMX6SX-SABRE": "MCIMX6X1", "SAM4C-EK": "ATSAM4C16C", "Apollo2 Surrey FPGA": "Apollo2_FPGA", "MCB1500": "LPC1549JBD100", "TWR-KW21D256": "MKW21D256xxx5", "STM32L476G-EVAL": "STM32L476ZG", "NuTiny-SDK-NUC029AN": "NUC029TAN", "STM32F051-Discovery": "STM32F051R8", "NUCLEO-L053R8": "STM32L053R8", "FRDM-K64F": "MK64FN1M0VLL12", "NuTiny-SDK-NUC240": "NUC240VE3AE", "DK-TM4C129x": "TM4C129XNCZAD", "NuTiny-SDK-Nano112": "NANO112VC2AN", "SAMD20-XPRO": "ATSAMD20J18", "TWR-KL28Z72M": "MKL28Z512xxx7", "SAM4E-EK": "SAM4E16C", "MCB1343": "LPC1343FBD48", "LinkIt 7687 development board": "MT7687F", "XMC4500 CPU Board - General Purpose (CPU_45B)": "XMC4500-E144x1024", "EVAL-ADuCM320iQSPZ": "ADuCM320i", "SN32F100 Starter Kit": "SN32F10*", "SAM3U-EK": "ATSAM3U4E", "ADSP-CM419F EZ-BOARD M0": "ADSP-CM419F-BCZ_M0", "FRDM-KL82Z": "MKL81Z128xxx7", "XMC1300 Boot Kit": "XMC1302-T038x0200", "LPC1788-32 Developers Kit": "LPC1788", "MCBTMPM395": "TMPM395FWAXBG", "STM32F072-Discovery": "STM32F072RB", "BMSKTOPASM369": "TMPM369FDFG", "uVision Simulator": "ARMCM0", "NuTiny-SDK-NANO100AN": "NANO100VD3AN", "SAMHA1G16A-XPRO": "ATSAMHA1G16A", "TWR-K20D72M": "MK20DX256xxx7", "nRF51 PCA10031": "nRF51422_xxAC", "EK-TM4C1294XL": "TM4C1294NCPDT", "NUCLEO-F401RE": "STM32F401RE", "SK-FM3-176PMC-ETHERNET": "MB9BFD18T", "LPC4088-32 Developers Kit": "LPC4088FET208", "NUCLEO-F072RB": "STM32F072RB", "TLE984x Eval.Board": "TLE9844QX", "XMC4500 Relax Lite Kit": "XMC4500-F100x1024", "SAME70-XPLD": "ATSAME70Q21", "LPCXpresso11U68": "LPC11U68JBD100", "XMC4400 CPU Board - General Purpose  (CPU_44A)": "XMC4400-F100x512", "NUCLEO-F103RB": "STM32F103RB", "EFM32ZG-STK3200": "EFM32ZG222F32", "MCBTWRK60": "MK60DN512xxx10", "MCB9B500": "MB9BF506R", "MCBSTM32E": "STM32F103ZG", "LPC812 LPCXpresso": "LPC812M101JDH20", "TWR-KL82Z72M": "MKL82Z128xxx7", "TS-R-IN32M3-CEC": "R-IN32M3-EC", "NuTiny-SDK-M0519": "M0519VE3AE", "TWR-K64F120M": "MK64FN1M0xxx12", "MCB4300": "LPC4350", "XMC4200 CPU Board - Actuator  (CPU_42A)": "XMC4200-F64x256", "EVAL-ADuCM360MKZ": "ADuCM360"}
\ No newline at end of file
--- a/arm_pack_manager/index.json	Wed Feb 15 13:53:18 2017 -0600
+++ b/arm_pack_manager/index.json	Thu Jun 22 11:12:28 2017 -0500
@@ -1,1 +1,1 @@
-{"S6E2H16E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H16G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TM4C1290NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1290NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC029LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC029AN\\Include\\NUC029xAN.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC029AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC120LC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2H16F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F105RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F105RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F417IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LM3S6730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF317S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32WG390F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG390F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1302-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF317T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MK24FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK24F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC11U35FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO130SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "M452RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC100VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK60DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF106R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF106N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MK21FN1M0Axxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK21FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMC21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1237H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F429ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM383FSEFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "AC30M1364": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG230F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG230F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG230F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMR21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F109F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM383FWEFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F411RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F417IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LM3S6422": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6422.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S6420": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6420.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S2965": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2965.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M452RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC100RD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S600": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s600.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD09C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD09_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMD09\\Include\\samd09.h", "define": "__SAMD09D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD09\\ATSAMD09C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F105R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK22FX512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK22F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM066FWUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M066.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO100ND2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "XMC1201-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NM1120ZC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF328S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF32xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MB9BF328T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF32xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32LG942F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG942F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TLE9879QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "MKV11Z128xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P128_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV11Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "(Generic) NUC100 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK02FN64xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK02F12810.h", "define": "MK02FN64xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK02F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "SN32F725J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F720_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F720"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF529T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF52xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "Z32F06410AES": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F0641.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F0641.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F0641.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF166R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF529S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF52xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "GD32F150G8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG232F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG232F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG232F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK63FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK63F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC230VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F150G4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "GD32F150G6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01800"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F071RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO130KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "SN32F707F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL46Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL46Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM380FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M4TKRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32LG295F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG295F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9844QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9844.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xF000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "ATSAML21E18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21E18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF128S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF12xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "TMPM395FWAXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM395_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM395.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M395.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9BF128T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF12xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MK22DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC100RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "nRF51422_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "ATSAM3A8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3A8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3A8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "nRF51422_xxAB": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "TM4C1237H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1402-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG220F32R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F32R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1301-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1202-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32HG220F32R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F32R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MK52DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\MK52D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32HG220F32R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F767II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32HG220F32R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ARMSC000": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMSC000/Include/ARMSC000.h", "define": "ARMSC000"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMSC000.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "STM32F334K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F64R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334K4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F64R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK82FN256xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK82F25615.h", "define": "MK82FN256xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK82F25615.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MKE04Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P8KB.FLM": {"default": "1", "ramsize": "0x400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKE04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129DNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129DNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F64R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAML22N17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22N17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F766J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "S6E2CC8J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "TM4C1230C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1230C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F121E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F121E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO110SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32L031C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L031C4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S5G36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5G31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1292NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1292NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ISD9160": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"clock": "48000000"}}, "ATSAMV71Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32L486VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV71Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MK22FN256xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK22F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1102LVUK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "SN32F717F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F710"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV30F64xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV30F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F446ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F302CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F446ZC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1301-Q024x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "HT32F1654": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0xFC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xFC00"}}, "debug": "SVD/HT32F1653_54.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MKE14Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE14Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MKE16F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE16F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MK70FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK70F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F777BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32WG295F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG295F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F303VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C1236D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1236D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF616T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1102UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC1102_04.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2HG4E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32GG330F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG330F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG330F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HG4G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG4F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EZR32LG330F256R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4S16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4S16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F100C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MAX71616": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_512KB.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "Apollo_256_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32TG230F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG230F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AFB42N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB42L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB42M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F439II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TLE9873QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9873.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100BFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0xBFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM342FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM342_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00009000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F439IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM380FYDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TLE9845QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9845.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xB000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG942F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG942F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG942F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK64FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG210F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG210F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO130SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TLE9867QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "M452VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F122H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F122H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC200SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32HG220F64R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1778": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM4F122H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F122H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F411RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1774": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC11U14FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1776": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F411CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L100R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC240SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C29H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32LG390F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG390F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5752": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5752.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M4TKVG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NM1120XB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "Mini54ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "MT2523x": {"core": "Cortex-M4", "vendor": "MediaTek:129", "algorithm": {"tools/keil/mt2523/2523_32M_MXIC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00400000", "ramstart": "0x04008000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://download.labs.mediatek.com/MediaTek.MTx.3.3.1.pack", "compile": {"header": "driver/CMSIS/Device/MTK/mt2523/Include/mt2523.h"}, "pdsc_file": "http://download.labs.mediatek.com/MediaTek.MTx.pdsc", "memory": {"IRAM1": {"start": "0x00000000", "size": "0x00400000"}, "IRAM2": {"start": "0x04008000", "size": "0x00020000"}, "IROM1": {"start": "0x08000000", "size": "0x00400000"}}, "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "208000000"}}, "STM32F410C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "(Generic) NUC400 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2C2AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMD21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAMD21G16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F479AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F378VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA1J14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F256R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F256R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F401VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "MK30DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.flm": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM067FWQG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M067.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32TG822F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG822F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TM4C129XNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129XNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S6637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK51DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK51D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6633": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6633.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKE18F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE18F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2C58J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M2S050": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "S6E2C3AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32WG395F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG395F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G880F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G880F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO112LB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32LG895F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG895F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M452LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32GG990F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG990F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG990F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1201-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG980F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG980F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK10DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAME70J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAME70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "TLE9842QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9842.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x800"}, "IROM1": {"start": "0x11000000", "size": "0x8000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LPC1317FBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC131LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F479AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC4088FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC130LE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F100RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NM1120TB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM419F-BCZ_M0": {"core": "Cortex-M0", "vendor": "Analog Devices:1", "algorithm": {}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M0_DFP.1.0.0.pack", "compile": {"header": "Device/inc/M0/CM41x_M0_device.h"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x200F0000", "size": "0x00008000"}}, "debug": "SVD/CM41x_M0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC1100-T016x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F479ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F100RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAM3U1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x20080000", "size": "0x00002000"}, "IROM1": {"start": "0x00080000", "size": "0x00010000"}}, "debug": "SVD/SAM3U/ATSAM3U1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "TM4C1231H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32G280F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G280F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG895F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG895F1024"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG895F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M0516LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32WG330F128R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "(Generic) M051 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC11U12FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F412RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "M052ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F469ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F479II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F469ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1114FDH28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F469ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC442KG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EFM32G290F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G290F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E1A11C0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A11X0A.FLM": {"default": "1", "ramsize": null, "size": "0xE000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1200ZBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32G222F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G222F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK22FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK22F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4CMS16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "GD32F190T4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L152VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "GD32F190T6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "GD32F190T8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC230SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV71N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "EFM32LG990F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG990F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF112N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L432KB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L432xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L432KC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L432xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK11DX256xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK11DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L081CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L081xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL28Z512xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_KL28.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MKL28Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF112R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM368FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M368.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11C22FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKS22FN256xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MKS22F25612.h", "define": "MKS22FN256xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKS22F25612.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF314N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32LG230F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG230F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1538": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1538.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO102SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC472VI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2C38H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NM1120FC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "XMC1302-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1100-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4104-F64x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF314R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAMC20G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG942F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG942F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG295F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG295F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG295F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL13Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL13Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini52LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAM4SD32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4SD32C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4SD32B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4SD32B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L443RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L100C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG900F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG900F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG900F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F706J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F112E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F112E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK26FN2M0xxx18": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\MK26F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2DH5G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC811M001JDH16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x00002000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "EFM32LG840F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG840F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF105N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M451MRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMD09D14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD09_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMD09\\Include\\samd09.h", "define": "__SAMD09D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD09\\ATSAMD09D14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG230F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG230F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F150R6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01800"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "GD32F150R4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L476ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F228F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L476ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M451YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "GD32F150R8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF464K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1937": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1937.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F121H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F121H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF464L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG890F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG890F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG980F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG980F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F210E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F210E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4072FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C1AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC11E67JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11E36FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L151C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F232H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4317": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4310": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "ATSAM3S2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LM4F232H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4313": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "ATSAMD21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F52341": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFE00"}}, "debug": "SVD/HT32F52331_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F756VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF528T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF52xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MB9BF528S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF52xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32G880F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G880F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1823EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK22FN512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK22F51212.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L151UC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK22FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK22F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC140VE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M451MRD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9AF341L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF341M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF341N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF465K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC1224FBD48/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LPC11E11FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1301-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF516S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF406R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F101CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MB9BF406N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M0518SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMC20E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5P36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5P31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C18H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NANO120LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32G842F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G842F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG380F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG380F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK22FN1M0xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK22F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NANO100SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "S6E2C19L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF415N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "M452SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TM4C1294KCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C1294KCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1402-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG840F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG840F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG840F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M451MLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S1P51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1p51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F707BF": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4700-F144x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9BN2": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431KC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431KB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9BN6": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC100VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F051T8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1120EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMDA0E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMv8MBL": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMv8MBL/Include/ARMv8MBL.h", "define": "ARMv8MBL"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MBL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "10000000"}}, "Mini52TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "XMC1301-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32G200F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32G/EFM32G200F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "SN32F765J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKW40Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW40Z4.h", "define": "MKW40Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW40Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW21D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5P3B": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5632.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1768": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1769": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F101C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM366FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "Mini52FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32F101C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LPC1766": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1767": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32GG380F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG380F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG380F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1765": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S5747": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5747.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "CMSDK_CM7_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7_DP.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32L475JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NM1200LBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC11U35FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F378CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5749": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5749.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32PG1B200F256GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F256GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "LPC1786": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1787": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM3U2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x000020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x000004000"}, "IRAM2": {"start": "0x20080000", "size": "0x000004000"}, "IROM1": {"start": "0x00080000", "size": "0x000020000"}}, "debug": "SVD/SAM3U/ATSAM3U2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "STM32L063R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L063xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L063x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C48J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1788": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF416T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F439ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F439ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L071RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG980F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG980F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG980F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG940F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG940F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F131H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F131H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG990F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG990F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L471RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L471RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC100RE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L471RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC240SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC442KI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "LPC11U34FHN33/311": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_40.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xA000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xA000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC220LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AFB41N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB41M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB41L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L162VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F412CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F412CG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1114FHN33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L052K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1114FHN33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21J18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1226FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "STM32F030C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C123BE6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123BE6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM367FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11C24FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1347FBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F405OG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32L100C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG280F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG280F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG280F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L071V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C123BE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123BE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32HG350F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG350F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG350F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F215VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F215VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F756IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S1F11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1f11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF102R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK65FX1M0xxx18": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}, "Flash/MKD256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK65F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM4LS8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C49L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC812M101JDH16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F767ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M452VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF315N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F479ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF315R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "XMC4402-F64x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG321F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG321F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG321F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF102N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11E14FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1201-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC20G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF104R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1233H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32W108C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "M451MLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F778AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC120RD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMC21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Mini51LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC11A14FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF104N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1G21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1g21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1115JET48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG230F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG230F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM3N1A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L053C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMR21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32W108CZ": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_192.FLM": {"default": "1", "ramsize": null, "size": "0x30000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x08000000", "size": "0x30000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "S6E2D55GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S9B81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1201-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C1231H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32W108CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32W108CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F437II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1114LVFHN24/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC54113J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TM4C1231H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK10FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK10F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ADSP-CM407BSWZ-BF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "TM4C123GE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123GE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F207VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMC20J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F207VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMV71N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMV71N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ARMCM7_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "TMPM372FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M372.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG890F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG890F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM380FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM4F231E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F231E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC18S30": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "TLE9879QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L021K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM368FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M368.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NM1520LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F301C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM4F131E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F131E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E1A11B0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A11X0A.FLM": {"default": "1", "ramsize": null, "size": "0xE000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F103VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAM4LC8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3748": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3748.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4LC8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF321K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM037FWUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM03x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM037.h", "define": "TMPM037FWUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M037.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MKL26Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2GK6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gkxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2GK6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gkxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F437ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L151ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV42F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F437ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAMC21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1517JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "NUC120LD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F150K4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1403-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54606J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAMD21J16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M0518SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMC21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1100XAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1112FDH28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ISD9341": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x18000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "ISD9340": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x18000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "S6E2D35GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32G232F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G232F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1200TBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1401-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C5AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F469IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "M0519SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF512R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S3634": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3634.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC230SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L471VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C123AE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123AE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2GM6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gmxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L051T6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2GM6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gmxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L151R6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F427ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Mini51LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32F103V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF512N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F427ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1850": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1850.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG280F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG280F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1404-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4320": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4323": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4322": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4325": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F302CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32LG880F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG880F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG990F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG990F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F1655": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/HT32F1655_56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F1656": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x3FC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x3FC00"}}, "debug": "SVD/HT32F1655_56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO110SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32GG940F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG940F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG940F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51422_xxAC": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "HT32F1653": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F1653_54.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA0E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F777VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32WG880F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG880F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L486JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ADSP-CM419F-BCZ_M4": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"Flash/CM41x_FlashB_512.FLM": {"default": "0", "ramsize": "0x10000", "size": "0x00080000", "ramstart": "0x10008000", "start": "0x11080000"}, "Flash/CM41x_FlashA_512.FLM": {"default": "1", "ramsize": "0x10000", "size": "0x00080000", "ramstart": "0x10008000", "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M4_DFP.1.0.0.pack", "compile": {"header": "Device/inc/M4/CM41x_M4_device.h"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M4_DFP.pdsc", "memory": {"IROM2": {"start": "0x11001000", "size": "0x000FF000"}, "IRAM1": {"start": "0x10000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20010000", "size": "0x00018000"}, "IROM1": {"start": "0x11000000", "size": "0x00001000"}}, "debug": "SVD/CM41x_M4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "LM3S5G56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1404-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E37HFBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML22G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F446VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "SN32F227F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F446VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F412RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM367FWXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M451RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC200SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "SN32F245J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3A4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3A8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3A4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "ATSAMD11C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD11\\ATSAMD11C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F229F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC54101J512UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG895F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG895F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "Z32F12811ARS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F1281.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F1281.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F1281.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C28J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1114FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3S2B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "NUC120RD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32TG232F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG232F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C59H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "HT32F1251": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F1252": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F1253": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x7C00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x7C00"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF465L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "Mini51TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAM4CMP32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM32/Include/sam4cm32.h", "define": "__SAM4CMS32C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4CM32/ATSAM4CMP32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F302C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1402-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F302C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF566K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM462F10XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L071CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F767IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "S6E2DF5J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM370FYDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM370_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M370.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32GG395F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG395F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG395F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F058R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L071CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32LG230F64R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9867QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32LG230F64R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO112VC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NM1820EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C123GE6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123GE6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C29J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32L433RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG895F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG895F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMC20E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG880F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG880F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK40DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.flm": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SKEAZN16xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x4000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NANO110KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TM4C1233H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF311K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM366FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG840F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG840F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ARMv8MML_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h", "define": "ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "M451MRC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "Mini58LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L071C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S2776": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2776.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M052LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF216S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "M0519SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF116N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAMD10D13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD10\\ATSAMD10D13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4088FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKL04Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G280F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G280F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2G28J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g2xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC442RI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EFM32G210F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G210F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G210F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F078CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MAX71636": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_1MB.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "STM32F030CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG840F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG840F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG840F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM440F10XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM440_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM440.h", "define": "TMPM440F10XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Configurable", "clock": "100000000"}}, "LM4F111B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F111B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M052LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD11D14AM": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11D14AM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE18F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE18F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD11D14AS": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11D14AS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429NE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK20DN32xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M0519VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM407BSWZ-AF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "TM4C1294NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1294NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9AF314L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11A04UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TM4C129CNCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129CNCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1403-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F122E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F122E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC131SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK64FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "Z32F12811ATS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F1281.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F1281.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F1281.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32LG380F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG380F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54102J512BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAMS70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC11U35FET48/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC240VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "AC33MA384A": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33MA384A/Flashloader/AC33Mx384A_384.flm": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33MA384A\\Core\\include\\AC33Mx384A.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33MA384A\\SVD\\AC33Mx384A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32HG308F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG308F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG308F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1549JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "M052ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2G28H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g2xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MCIMX7D": {"core": "Cortex-A7", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX7D_M4.h", "define": "iMX7D_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/iMX7D_A7.svd"}, "ATSAM3X4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3X4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "LPC11E67JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3X4E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3X4E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "EFM32GG890F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG890F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG890F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMD21G18AU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G18AU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1302-Q024x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG330F64R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G230F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G230F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG222F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MAX71637": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_1MB.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "LM3S3826": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s3826.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L471QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKE02Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L471QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO100LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32LG980F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG980F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S9B95": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b95.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1114LVFHI33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9B96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9B90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9B92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MK21DN512xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L051R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4108-Q48x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L051R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F048G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U67JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F303RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMG54J19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54J19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "ATSAMDA0G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152VBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM33Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM33Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF114R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "S6E2H46E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H46F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H46G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2D35J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG895F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG895F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG880F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG880F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG880F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF111L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM461F10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM461_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M461.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S1512": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "EFM32HG222F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG222F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG222F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAME70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAME70Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "TM4C1231C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1231C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF312N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32JG1B100F256GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B100F256GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "EFM32TG825F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG825F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F469NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F303R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "M0516LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF312R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F303R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC230RC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F469NE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG890F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG890F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1224FBD64/121": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "XMC4104-F64x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1302-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMDA0J14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F746VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "GD32F130K8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Apollo2_FPGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo2.FLM": {"default": "1", "ramsize": "0x4000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo2.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "S6E2C3AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "TMPM365FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM365_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M365.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "CMSDK_CM0plus": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM0plus/Include/CMSDK_CM0plus.h", "define": "CMSDK_CM0plus"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM0plus.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "GD32F130K6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130K4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1510LC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F302R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L073VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F302R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C129DNCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129DNCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F746BE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "SN32F246J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L073VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F717BF": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710B_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F710B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F427II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F779NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F427IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F072CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF524K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK40DX128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.flm": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF524L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF524M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF466N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMR21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5B91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5b91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC505DL13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "NM1820ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF466R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG995F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG995F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC442VI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EZR32WG330F256R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4C16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MK21FN1M0xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK21F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MK21FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK21F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32WG330F256R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U37FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L151V8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L476JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1233H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK21DX128Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123GH6ZRB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6ZRB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG220F32R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F072C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123ZD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32GG232F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG232F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG232F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L073V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD10C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD10\\ATSAMD10C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120VE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAM4SA16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SA16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4SA16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SA16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F302RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F358RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG290F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG290F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG290F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4800-E196x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F030K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG280F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG280F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC505DSA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "MB9BF404R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C4AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF404N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC4800-F100x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAM4S2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC11E12FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2G36J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g3xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2G36H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g3xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKM14Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM14Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "SN32F758F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO110RD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32WG840F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG840F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1201-T028x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M4LEDLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG842F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG842F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51802_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "HT32F52241": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFC00"}}, "debug": "SVD/HT32F52231_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC4337": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "MB9BF428S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF42xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "STM32L475ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4333": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4330": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F217VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "Mini54XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1297NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1297NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F411VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MKL04Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1231D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1231D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F132H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F132H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F132H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F132H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1231D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1231D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F415OG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F051R6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA0E14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F767NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKV46F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV46F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F358VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32G200F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G200F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F051R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1225FBD64/321": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_80.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x14000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x14000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LM3S8738": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8738.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L052C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S8730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S8733": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8733.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L152C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EZR32HG320F32R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32GG280F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG280F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG280F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4076FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC100VE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M452LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LPC54607J256BF208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54607.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG840F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG840F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32HG320F32R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO100SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S8933": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8933.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1404-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "NM1823ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S8930": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8930.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1N11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1n11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG232F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG232F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100LD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC123SD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TM4C129ENCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129ENCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1345FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1N16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1n16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F205VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "NUC472HI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "STM32F205VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM3U4E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128_B1.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00100000"}, "Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00100000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U4E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "M453LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M052ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1112FHI33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHI33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3U4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128_B1.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00100000"}, "Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00100000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "EZR32HG220F64R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NM1100FBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32HG220F64R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1857": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1850": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAMD10C14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD10\\ATSAMD10C14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F32R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC18S50": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32HG220F64R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "CMSDK_CM7": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "CMSDK_CM0": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM0/Include/CMSDK_CM0.h", "define": "CMSDK_CM0"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM0.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "TLE9861QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9861.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x11007FFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0x7FFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MK30DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.flm": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "CMSDK_CM3": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM3/Include/CMSDK_CM3.h", "define": "CMSDK_CM3"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM3.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S9997": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9997.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F211H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F211H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F769F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M058LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG900F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG900F256"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG900F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG380F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG380F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG380F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54102J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32GG332F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG332F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG332F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF141M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKV31F128xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV31F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NUC140RD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMR21E19A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E19A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1401-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MK10FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK10F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF416R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM4F130C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F130C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F469BE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM3N00B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00400000", "size": "0x00004000"}}, "debug": "SVD/SAM3N/ATSAM3N00B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N00A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00400000", "size": "0x00004000"}}, "debug": "SVD/SAM3N/ATSAM3N00A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAME70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "S6E2G38H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g3xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2G38J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g3xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKL05Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM376FDDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M376.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NM1820LB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC4108-F64x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5762": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5762.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F102R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F102R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F038F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Apollo_128_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAMS70J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F102R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF342L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32ZG210F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC4800-F144x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F779II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32WG942F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG942F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1112FHN33/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHN33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L041C4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MK24FN256xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK24F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1225FBD48/321": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_80.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x14000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x14000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "N572P072": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\N572F072_v3.svd", "processor": {"clock": "48000000"}}, "STM32L051C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG330F64R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1404-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MKL15Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "SKEAZ128xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x20000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SKEAZ1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "M2S005": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "LPC11U34FBD48/311": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_40.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xA000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xA000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF141N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E1A12B0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A12X0A.FLM": {"default": "1", "ramsize": null, "size": "0x16000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x16000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32TG230F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG230F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1403-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC140LD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2GH8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2ghxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1968": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1968.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4500-F144x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F767VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "XMC1202-T016x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M452VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L485JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L485xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF416N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L443CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32WG330F128R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F100ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F303C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32WG330F128R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKE14F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE14F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG390F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG390F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C123GH6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F091RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4088FET208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMV71Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F102RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G890F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G890F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1960": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1960.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1233C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1233C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1346FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM475FYFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TLE9844-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9844_2.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xF000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F103TB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC4700-F100x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "ADuCM320i": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM320i.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M0516ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1517JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32TG232F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG232F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F072RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2CC9L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S5C51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "GD32F150C6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01800"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5C56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2GK8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gkxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11A12FBD48/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2GK8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gkxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32JG1B200F256GM48": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F256GM48.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "GD32F150C8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L152V8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F415RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32LG895F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG895F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L072CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F071VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF565K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC120LD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100NE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9AF344N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF344M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF344L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1120DC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF322K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F410T8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TLE9877QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF322L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF322M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC100VD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ISD9360": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "M4TKLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKL46Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL46Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F071V8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L062K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L062xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L062x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM361FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "Apollo_256_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32HG110F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG110F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MKL24Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL24Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2620": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2620.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S3654": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3634.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F072R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "HT32F1251B": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA0G14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F479VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF115R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAME70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F103T4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5U91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5u91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M451MSD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F103T8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F437VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F101R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EFM32LG395F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG395F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "S6E2DH5J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F101R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LM3S1651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM330FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F437VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11A02UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC122ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "NUC131LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM384FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M384.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA41N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA41L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11C12FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "GD32F170C6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F170C4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C2AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MK60FN1M0xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK60F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EFM32LG232F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG232F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S9790": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9790.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F225J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L073CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKW31Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW31Z4.h", "define": "MKW31Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW31Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG995F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG995F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG995F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F410RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F205RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG880F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG880F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM366FWXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4SP32A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4SP_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4SP/sam4sp.h", "define": "__SAM4SP32A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4SP/ATSAM4SP32A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L151VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG980F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG980F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG980F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK12DN512xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "SN32F736J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F730_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F730"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0400"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMC21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1316FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32G230F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G230F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1777": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F247F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1827YB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L162RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L162RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F051C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L162RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32HG310F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG310F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG310F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAMR21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF467R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F103ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F101RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MB9AF104R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F101RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MB9BF467M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF467N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F101RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MK10DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C123GH6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM330FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F429AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "AC33M8128": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx128/Flashloader/ac33m8128_PFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx128\\Core\\include\\AC33Mx128.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx128\\SVD\\AC33Mx128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32ZG108F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "SN32F768F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK80FN256xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK82F25615.h", "define": "MK82FN256xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK80F25615.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "NANO100SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F745IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F745IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC200SE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK20DN128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC824M201JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "LPC1112JHI33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M451YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F777ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TMPM343FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L475VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMG51N18": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG51\\samg51.h", "define": "__SAMG51N18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD\\SAMG51\\ATSAMG51N18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L063C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L063xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L063x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S3N26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s3n26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF516T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC120LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG890F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG890F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG942F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG942F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129CNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129CNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMC20E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F767BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L151RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF516R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC100VD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF405R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "M4TKVE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L082KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L082xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F103RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C28H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9AF156N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "SKEAZN32xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x8000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "SN32F759F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF405N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L082KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L082xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1115FET48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F358CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AFA31N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "TMPM362F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M362.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EFM32LG842F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG842F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG280F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG280F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AFA41M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAM4S16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4S16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F303RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC472HG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "MB9BF429S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF42xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32LG330F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG330F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF429T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF42xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "M052LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F378RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC100RE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L152R6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV58F1M0xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P1024_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IRAM2": {"start": "0x2F000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00100000"}}, "debug": "SVD/MKV58F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "HT32F52220": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/HT32F52220_30.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NANO120ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "AC33GA256": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33GA256/Flashloader/AC33GA256_CDFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33GA256\\Core\\include\\AC33GA256.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33GA256\\SVD\\AC33GA256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F429AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG842F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG842F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "AC33M4064": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx064/Flashloader/AC33Mx064_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx064\\Core\\include\\AC33Mx064.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx064\\SVD\\AC33Mx064.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LPC11A11FHN33/001": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1435": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005C00"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1435.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "CMSDK_ARMv8MML_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML_DP.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "25000000"}}, "TMPM341FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM341_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "54000000"}}, "LPC11A12FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG360F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG360F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL33Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL33Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F217IE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217IG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG350F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG350F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG350F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "Mini54TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LM3S5791": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5791.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF114N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "S6E2C39H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NM1320LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1320_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1320_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1320_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NM1320AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO103SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1202-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4800-E196x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM364F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M364.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ARMCM7_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "LPC812M101JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F038G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100RD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK20DN64xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini54FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32L053R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L053R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1549JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "STM32F091CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F405OE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32WG360F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG360F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120SD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32TG222F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG222F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M2S010": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "XMC1302-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F439NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAML22N16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22N16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK70FX512xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK70F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MK70FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK70F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG295F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG295F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151VBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L072RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF321M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF321L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM4F110C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F110C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L475QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK20DX128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F417VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "SN32F727F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F720_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F720"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC120RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1236H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1236H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1112FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F767VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC1112FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F301R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC122ZC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "STM32F301R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L072RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L051T8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF116S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF116R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9AF312K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E1A12C0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A12X0A.FLM": {"default": "1", "ramsize": null, "size": "0x16000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x16000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF116T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L152RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG332F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG332F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32L152RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini52LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "NUC240SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK10DN64xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM333FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF218S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF218T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "SN32F715BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710B_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F710B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F121B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F121B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9L71": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9l71.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG825F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG825F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK21DN512Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKE02Z32xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32L152R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M0519LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "SN32F706BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG995F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG995F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG995F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1232C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1232C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1224FBD64/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LPC11E68JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2D55GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "Apollo_64_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "LPC4078FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M0518LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F031K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32HG108F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG108F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG108F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ARMCM4_FP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM4/Include/ARMCM4_FP.h", "define": "ARMCM4_FP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM4.svd", "processor": {"fpu": "1", "endianness": "Configurable", "clock": "10000000"}}, "NANO112SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "AC30M1332": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S5P56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9DN6": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9dn6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4S2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S9DN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9dn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TMPM37AFSQG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M37A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF118S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF118T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC4078FBD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F058C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F737F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F730_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F730"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0400"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "GD32F190C4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F746VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F031E6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC200LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMR21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF121K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF121J": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B120J_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xJ.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF121M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "SN32F108F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK64FN1M0VLL12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"addon_cmsis/Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_SDK_DFP.2.2.0.pack", "compile": {"header": "platform/devices/fsl_device_registers.h", "define": "CPU_MK64FN1M0VLL12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_SDK_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "platform\\devices\\MK64F12\\MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C38L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32LG995F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG995F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F170R8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM374FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M374.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F469NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9AF141L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L021F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F429BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM3S1A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3S1B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3S1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "MKL26Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "S6E2H44F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H44G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H44E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54113J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MT7687F": {"core": "Cortex-M4", "vendor": "MediaTek:129", "algorithm": {"tools/keil/mt7687/7687_32M_MXIC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://download.labs.mediatek.com/MediaTek.MTx.3.3.1.pack", "compile": {"header": "driver/CMSIS/Device/MTK/mt7687/Include/mt7687.h"}, "pdsc_file": "http://download.labs.mediatek.com/MediaTek.MTx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IRAM2": {"start": "0x00100000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00200000"}}, "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "192000000"}}, "NANO103LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F779AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC11E36FHN33/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1301-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9AF156R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32LG880F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG880F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L031F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32L031F6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "BlueNRG-1": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STBlueNRG1.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x28000", "ramstart": "0x200002CC", "start": "0x10040000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STBlueNRG_DFP.1.1.0.pack", "pdsc_file": "http://www.keil.com/pack/Keil.STBlueNRG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x10040000", "size": "0x28000"}}, "debug": "SVD/BlueNRG1.svd", "processor": {"fpu": "0", "endianness": "Little-endian"}}, "NANO120SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "LPC54101J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF564L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO100ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF564K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "M054ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AFA31M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA31L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF156M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "R-IN32M3-EC": {"core": "Cortex-M3", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M3_S25FL064P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29AL032D.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/R-IN32M3_S25FL032P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.1.3.0.pack", "compile": {"header": "Device/Include/RIN32M3.h", "define": "RIN32M3_EC"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M3_EC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S1439": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1439.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123AH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123AH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1402-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F398VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "XMC4800-F100x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "MKL14Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL14Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE02Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NUC122LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "MKE02Z64xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "TM4C1299KCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C1299KCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F756J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF312L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF312M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF312N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NANO130SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "HT32F1755": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Mini54XFHC": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKW20Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW20Z4.h", "define": "MKW20Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW20Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100RD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1233E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1233E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4350": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "EFM32LG990F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG990F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4353": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "NANO102LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "LPC4357": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "EFM32LG940F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG940F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1233E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1233E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKV42F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MB9BF121L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC4502-F100x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2DH5JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NM1100FAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM343F10XBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV42F64xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP64_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MKM14Z64Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM14ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F401VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "MKL34Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL34Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM462F15XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F429BE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC505YLA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "S6E2C58L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S1138": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1138.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AFA42N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA42M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK60FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK60F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MK60FX512xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK60F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EZR32LG230F64R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK21DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1133": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1133.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U67JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK50DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F030F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F779BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F769AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L476ME": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "(Generic) Mini51 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMC20G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4400-F100x512 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4400_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG842F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG842F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4327": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "MKV56F512xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P512_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00080000"}}, "debug": "SVD/MKV56F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "NANO120LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "LM4F211E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F211E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U35FHI33/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK51DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\MK51D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F745VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F745VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32JG1B200F128GM48": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F128GM48.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "STM32F217ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S2533": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2533.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG880F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG880F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG880F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG330F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG330F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKL26Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM367FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F110E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F110E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L471VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK61FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK61F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG232F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG232F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK61FN1M0xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK61F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "STM32L471VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAML21J16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21J16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF324M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11U34FBD48/421": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1302-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MK10DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC11U34FHN33/421": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32HG322F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG322F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG322F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AFA42L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M452LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "SN32F735J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F730_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F730"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0400"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1342FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC220VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1100-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C48L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32ZG210F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC4200-Q48x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4200_4100_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4200_series/Include/XMC4200.h", "define": "XMC4200_Q48x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x5FC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4200.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "Mini51FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMC20E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G232F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G232F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1F16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1f16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32GG330F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG330F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG330F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C4AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC4076FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMDA1E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMG51G18": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG51\\samg51.h", "define": "__SAMG51N18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD\\SAMG51\\ATSAMG51G18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L083VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32G280F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G280F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F231H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F231H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM073FSDUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M073.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F405ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32ZG210F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32HG308F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG308F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG308F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32GG940F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG940F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG940F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "AU9110LF3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/AU9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}, "Flash/AU9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/AU9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAM4LS4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4LS4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1547JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "STM32F469AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L083VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG230F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG230F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG230F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4104-Q48x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NANO103ZD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1225FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "TMPM332FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M332.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2C5AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAM3S2A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "M2S025": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "MKL24Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL24Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S9G97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9g97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "Mini58ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG390F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG390F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF421L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A420L\\mb9a420l.h", "define": "MB9AF421L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF42xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF421K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A420L\\mb9a420l.h", "define": "MB9AF421L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF42xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TM4C1299NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1299NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F769AG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M453VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4N8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAM4N8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4100-F64x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L162QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1313FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11A14FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG840F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG840F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4500-F100x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2D55J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F048T6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL25Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F207ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "NUC029FAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC029AE\\Include\\NUC029FAE.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NUC029AE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "MKL43Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1120EC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1202-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z16xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P16_1KB_SEC.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x4000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/MKV10Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MKW21Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW21Z4.h", "define": "MKW21Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW21Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F427VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F038C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M453RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9AF131M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF131L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32F427VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9AF131N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LPC1313FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF131K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9BFD17S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "XMC1404-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6537": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6537.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BFD17T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32TG232F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG232F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAML21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF567R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM4LC4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21J15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32ZG222F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F446MC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC4078FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKL25Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF567N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF567M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC120VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKM33Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM33Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO112LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "M058SZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F215ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MKV10Z32xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P32_1KB_SEC.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x8000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/MKV10Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LPC11U23FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG995F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG995F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F215ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1111FDH20/002": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1311FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA0G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1313FBD48/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32L152QE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF117S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "M453YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L152C8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F110H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F110H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1114FHN33/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1317FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S9D90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF617S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF617T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F101T4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101T6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "S6E2C4AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "XMC1301-Q040x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F469VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM381FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM381_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M381.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F101T8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EFM32WG895F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG895F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100VE3DE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F417VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32L431VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32HG309F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG309F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG309F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F070F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M451VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L031E4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM13Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM13Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L031E6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG280F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG280F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F412VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F446RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F412VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC54102J512UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC1402-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U13FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL43Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF518T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11U36FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1100-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF155M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG895F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG895F1024"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG895F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L031K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK30DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.flm": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L031K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM34Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM34Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F042C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM333FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S6952": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6952.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4CP16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4CP/sam4cp.h", "define": "__SAM4CP16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CP/ATSAM4CP16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4CP16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4CP/sam4cp.h", "define": "__SAM4CP16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CP/ATSAM4CP16B_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMG55G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG55\\samg55.h", "define": "__SAMG55J19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG55\\ATSAMG55G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKL27Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL27Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMR21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF521M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S2276": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2276.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF521K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF142N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF142M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF142L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L151CBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101TB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM072FSUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M072.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1520RD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG330F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG330F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM372FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M372.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2CC8H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S1R26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1r26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG330F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG330F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL36Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M451MRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "S6E2C29L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F042K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G222F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U35FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AFB44L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TM4C1232D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1232D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AFB44N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1112FHN24/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F415ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "XMC1100-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1114FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FBD48/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ADuCM361": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCMxxx_128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\ADuCM361.h", "define": "ADuCM361"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.pdsc", "memory": {}, "debug": "SVD\\ADuCM361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "MKL17Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL17Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG990F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG990F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F212E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F212E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM390FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM39x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM395.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M395.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32LG290F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG290F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL04Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "N571P032": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N571E000.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\N571P032_v3.svd", "processor": {"clock": "23000000"}}, "TMPM367FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NANO130KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S5956": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5956.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F757F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5951": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5951.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF315M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK40DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.flm": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF315N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32G890F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G890F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1404-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4E8E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4E/ATSAM4E8E.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32WG230F256R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4078FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32GG942F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG942F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG942F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F479VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L152VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF124L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM4F112C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F112C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U24FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2793": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2793.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC120RE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG232F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG232F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG842F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG842F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F102C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F102C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF124K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG900F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG900F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG900F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Mini55LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF514N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "XMC1100-Q024x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF305N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F746ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F746ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TM4C1230H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1230H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK20DX32xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC822M101JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "NUC130VE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S5737": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5737.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV31F512xxx12": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x80000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MKV31F51212.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32LG230F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG230F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1111FHN33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4402-F100x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MKL03Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1343FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK66FN2M0xxx18": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\MK66F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC123ZC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F122C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F122C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMC21G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM361F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "M058SFAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKE15Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE15Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1201-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC824M201JHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "S6E2C18J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1115JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1402-Q048x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129LNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129LNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32ZG222F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC100RC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG330F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG330F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F102CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL16Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1224FBD48/121": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "EZR32LG230F256R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "CMSDK_CM7_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7_SP.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "MB9AF116N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF116M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NUC220LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO110RE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MK12DX256xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1B21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1b21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F756BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC11E14FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC230LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F098CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM36BFYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM365_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M36B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG225F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG225F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120LC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC54606J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F410CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MKW24D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW24D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32WG230F64R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF616S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F303VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MK70FN1M0xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK70F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EZR32WG230F64R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F32R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32WG230F64R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG230F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG230F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2DH5GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF618T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC120RE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F469BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32ZG210F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF618S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11E68JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F469BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK10DX32xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG995F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG995F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F038K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "M452RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4E16E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4E/ATSAM4E16E.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4E16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4E/ATSAM4E16C.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1547JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32G800F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G800F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G800F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C1232H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1232H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9AF154M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF154N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAM4S4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F128R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54608J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TM4C129ENCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129ENCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG110F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG110F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG110F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "AC30M1464": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1530VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L081KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L081xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F031G4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF154R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMD11C14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11C14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C123GH6ZXR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6ZXR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4C32E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4C32/sam4c32.h", "define": "__SAM4C32E_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4C32/ATSAM4C32E_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4C32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4C32/sam4c32.h", "define": "__SAM4C32E_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4C32/ATSAM4C32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG290F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG290F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L073RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L021D4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "version": "0.1.0", "STM32L073RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M453VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG980F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG980F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG980F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG980F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BFD18S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1114FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG295F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG295F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG295F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BFD18T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MKL33Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL33Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F746IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BFD16T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S2D93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s2d93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F131C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F131C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1332": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1332.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini51XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BFD16S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F746IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MK11DN512xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG110F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1520RC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK51DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK51D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF566R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO100LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9BF506N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1233D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1233D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF506R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAML21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21E17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U14FHI33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1519JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MB9BF566L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF566M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF566N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG230F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG230F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKE04Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE04Z1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L476RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF144N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L476RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG332F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG332F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX64xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F429NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM4C4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C4C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9AF314N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S1751": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1751.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK60DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9AF314M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK11DX128Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4504-F100x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L431CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG390F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG390F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L475ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L151CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z128xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P128_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV10Z1287.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "XMC1404-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11A13FHI33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F232E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F232E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M452LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "Mini54XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC4370": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "EFM32TG210F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG210F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F705BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ADuCM320": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM320.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L041K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK20FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK20F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NANO130KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9BF105R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF568R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC1100-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG842F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG842F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F268F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F260_30.FLM": {"default": "1", "ramsize": null, "size": "0x7800", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F260.h", "define": "SN32F260"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x77FC"}}, "debug": "SVD\\SN32F260.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112LVFHI33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF568N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MK40DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.flm": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF568M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMSC300": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMSC300/Include/ARMSC300.h", "define": "ARMSC300"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMSC300.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "STM32F765BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L151C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK30DX128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.flm": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "M451RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TMPM380FWDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA44M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM4F120H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F120H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AFA44N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S1110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "ATSAML22J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMDA1G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129EKCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C129EKCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M451RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L486QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F469AE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK10DX128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "NUC442JI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "TMPM367FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L011K3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC100LE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L011K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG210F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG210F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DF5GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMC21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F412ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG940F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG940F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51822_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "nRF51822_xxAC": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "nRF51822_xxAB": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F412ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32WG230F256R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21G18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F765NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32WG230F256R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKL82Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL82Z7.h", "define": "MKL82Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFA000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL82Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F205RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32PG1B200F128GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F128GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "LM3S9792": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9792.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F205RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1810": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "NUC505DS13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "LPC1812": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1813": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1815": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1817": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L162RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L475VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L475VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L151C8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMD10D14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD10\\ATSAMD10D14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA1G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK61FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK61F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MK61FX512xxx15": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK61F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "NM1120TC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM036FWFG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM03x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM037.h", "define": "TMPM037FWUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M036.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NM1520LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM403BSWZ-FF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00040000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAML22J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F051R4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4088FBD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F439NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F407VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LM3S2651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC130LD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM475FZFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM4F111C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F111C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NM1120XC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC029TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC029AN\\Include\\NUC029xAN.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC029AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1124JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x08000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC112x\\LPC112x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\LPC112x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G230F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G230F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1402-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091VC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F030RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L471JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF368M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32L471JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F098RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM440FEXBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM440_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM440.h", "define": "TMPM440F10XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Configurable", "clock": "100000000"}}, "STM32F767NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO110RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TMPM462F15FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC4504-F144x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L052R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG230F128R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM074FSUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M074.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "XMC1302-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MK20DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32LG230F256R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "Mini58TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F101VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EZR32WG230F64R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG360F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG360F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "ADSP-CM407BSWZ-DF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00100000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EFM32LG280F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG280F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF368R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM367FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C49J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF368N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54607J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54607.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG840F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG840F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF304N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "EFM32G290F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G290F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC240LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32GG390F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG390F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG390F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M4TKRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F100VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MKW21Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW21Z4.h", "define": "MKW21Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW21Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F130H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F130H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F100VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1313FHN33/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6950": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6950.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF304R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMC21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F439BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NANO120LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "Mini54TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LM4F110B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F110B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO102ZB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "TM4C123BH6ZRB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6ZRB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32ZG108F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC130RC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO130KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "S6E2C5AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "XMC1201-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F415VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32ZG222F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F373C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF505N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F072VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32HG108F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG108F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "nRF52832_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf52xxx_sde.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx_uicr.flm": {"default": "1", "ramsize": "0x4000", "size": "0x1000", "ramstart": "0x20000000", "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.9.0.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF52"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\nrf52.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "64000000"}}, "STM32L433VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4CMS8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMD21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9877QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMD20J18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1233D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1233D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L053C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9AF115N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF115M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMC20G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F072V8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F373CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F373CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F031F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK22DN512xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AFA44L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M058SSAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M452YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF168N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "M054LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF168M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F405VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F439BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F765ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF168R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAME70N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAME70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "EFM32HG222F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG222F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "S6E2GM8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gmxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2GM8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gmxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "M451SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EZR32WG230F128R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4N8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG332F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG332F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EZR32WG230F128R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM383FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2D35G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F301K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L151RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F301K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L151RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF412R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC123ZC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F769BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32TG110F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG110F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF412N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAML22N18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22N18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL16Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F769BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9AFA32L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA32M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA32N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MKW01Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW01Z4.h", "define": "MKW01Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKW01Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F120B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F120B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC472JI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "M453VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "HT32F1765": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC812M101JTB16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32L151R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM366FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM14Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM14ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF122K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF122L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF122M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM3S4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EFM32LG840F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG840F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3S4A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3N1B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L162VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG110F4": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32TG/EFM32TG110F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMG54G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "STM32F334C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF144M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF144L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F107VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F334C4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5K36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5k36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1202-T028x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100KC3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32GG890F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG890F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG890F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F64R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO100NC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "S6E2C19J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F302K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "R-IN32M4-CL2": {"core": "Cortex-M4", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M4_MX25L6433F.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M4_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M4_DFP.1.0.0.pack", "compile": {"header": "Device/Include/RIN32M4.h", "define": "RIN32M4_CL2"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M4_CL2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32ZG222F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ADSP-CM408BSWZ-AF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "ADSP-CM403BSWZ-EF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00080000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "STM32F429NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1404-F064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F302K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "M058LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC100LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C39L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S301": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s301.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S300": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s300.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F439AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2HE4G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S308": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s308.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MKV44F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "TM4C1236E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1236E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMD21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1316FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1114FBD48/323": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC4315": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "NM1120ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S8938": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8938.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M452VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC123ZD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MK60DN256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MKM38Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM38Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM369FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKV30F128xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV30F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG330F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG330F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG232F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG232F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4312": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "NUC505YO13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "MKM33Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM33ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG360F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG360F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1827": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L083V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1820": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1823": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1822": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MK51DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\MK51D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S9781": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9781.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKL16Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF367R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC1100-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32HG322F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG322F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG322F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM4F132C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F132C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini55ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK21DX256xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF367M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF367N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F411CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32G840F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G840F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F767BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L041F6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F042G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042G4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EZR32HG220F64R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F64R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO112SB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ARMCM4": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM4/Include/ARMCM4_FP.h", "define": "ARMCM4_FP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM4.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM7": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM0": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM0/Include/ARMCM0.h", "define": "ARMCM0"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM0.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM3": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM3/Include/ARMCM3.h", "define": "ARMCM3"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM3.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "LPC1853": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32G840F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G840F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "CMSDK_CM4": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM4/Include/CMSDK_CM4_FP.h", "define": "CMSDK_CM4_FP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM4.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S5T36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s5t36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG220F64R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L151R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG380F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG380F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM14Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM14Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2CCAH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32L071KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC442JG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "LM3S1D21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1d21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1D26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1d26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC240LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC18S57": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MKL36Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EZR32LG230F128R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4078FET208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M058LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F746NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32LG230F128R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC54114J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54114_cm4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9AF114L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF114M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF114N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK40DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.flm": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4400-F64x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMDA1E14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F716BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710B_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F710B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL26Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32PG1B100F128GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B100F128GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAM3S4B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "MKV11Z64xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV11Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "ATSAMV70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32L083CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M054LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM4F230E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F230E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54101J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L083CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SKEAZ64xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x10000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SKEAZ1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "XMC1402-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F373R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1302-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F715J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F710"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L162VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F373RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F373RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NANO120VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32F101V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F048C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1125JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC112x\\LPC112x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC112x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL27Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL27Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C18L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32TG222F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG222F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1113FHN33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5K31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5k31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC200LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C19H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMD21G15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK22FN1M0Axxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD\\MK22FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L072V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100ZD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC100LD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMG55J19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG55\\samg55.h", "define": "__SAMG55J19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG55\\ATSAMG55J19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S9D96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG290F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG290F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B100F128GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B100F128GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "MB9BF517S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S1911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC131SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S617": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s617.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF121K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A120L\\mb9a120l.h", "define": "MB9AF121L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF121L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A120L\\mb9a120l.h", "define": "MB9AF121L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2D35GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML21_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IRAM2": {"start": "0x30000000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAML21\\ATSAML21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1231E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1231E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "(Generic) NUC200 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F130C6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130C4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "GD32F130C8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMG53G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG53\\samg53.h", "define": "__SAMG53N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG53\\ATSAMG53G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E13FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG108F4": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32TG/EFM32TG108F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S2918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "GD32F190R6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "GD32F190R4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32WG330F256R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3Z26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s3z26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120ZD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32TG108F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG108F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF522L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF522M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM3N0A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100LC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F303VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM4E8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4E/ATSAM4E8C.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM4F130E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F130E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F756NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO120LD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "M451SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG230F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG230F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF132L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF132M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF132N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32HG309F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG309F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG309F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF132K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MKL13Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL13Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG110F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG110F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4300-F100x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4300_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4300c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4300_series/Include/XMC4300.h", "define": "XMC4300_F100x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x0FFC0"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4300.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S3739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4500-F100x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF504R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM470FZFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC812M101JD20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F768AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC100LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF504N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC123LC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKV46F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV46F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NM1330LC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1330_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1330_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1330_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1330AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C38J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32WG900F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG900F256"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG900F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM330FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MAX71617": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_512KB.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "XMC1301-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32HG310F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG310F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG310F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S5R36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5r36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1776": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1776.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F777II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC1225FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "MB9AF316M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF316N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKL05Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4104-Q48x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F111E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F111E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M052LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32GG395F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG395F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG395F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF316N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F765VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKL17Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL17Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG940F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG940F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L433CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L433CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1232E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1232E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F120E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F120E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152CBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF505R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F302ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302ZD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC4074FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F235J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1403-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S310": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s310.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S2B93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2b93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S316": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s316.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S317": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s317.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LPC11E37FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S315": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s315.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MK22DX256xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF415R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NM1827UB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMDA1G14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG842F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG842F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC120LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1114FBD48/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG395F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG395F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "Mini54ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "M452SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L011E4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM341FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM341_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "54000000"}}, "TLE9842-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9842_2.FLM": {"default": "1", "ramsize": null, "size": "0xA000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x800"}, "IROM1": {"start": "0x11000000", "size": "0x9000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2HE4F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32TG822F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG822F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG210F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Apollo2_1024_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo2.FLM": {"default": "1", "ramsize": "0x4000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x40000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/Apollo2.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HE4E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD21E16BU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG842F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG842F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG842F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ADuCM322i": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM322.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F030C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32ZG110F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1833": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1830": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MKW21D256xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1837": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11D14FBD100/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11D14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5P51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM461F15FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM461_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M461.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC18S37": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MKL02Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK51DN256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MK11DX256Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "XMC1402-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L100RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL14Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL14Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF117T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F437IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F745ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ADSP-CM408BSWZ-BF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "XMC1200-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152QC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMS70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F446ME": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "M058LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG940F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG940F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW41Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW41Z4.h", "define": "MKW41Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW41Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F410R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4700-F144x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM370FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM370_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M370.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF112N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L041G6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC442RG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "NANO102ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "TMPM369FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F101ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "ATSAMG54N19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54N19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "STM32F042F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MM32x031": {"core": "Cortex-M0", "vendor": "MindMotion:132", "algorithm": {"Flash/MM32x031_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x031_DFP.1.0.0.pack", "compile": {"header": "Device/Include/MM32x031.h", "define": "MM32x031"}, "pdsc_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x031_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/MM32x031.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S2671": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2671.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1347FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1315FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F429ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S2678": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2678.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F745ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M451MSC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M0519LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L083RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK11DN512Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F401CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401CD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "NUC120VD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK65FN2M0xxx18": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\MK65F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F042T6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042T4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1342FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MKM32Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM32Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L083RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NANO112RB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "TMPM46BF10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM46B_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}, "IRAM2": {"start": "0x20080000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M46B.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F479BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F479BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S5Y36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s5y36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC18S10": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "NUC120RC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L052C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F411VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM470FDFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L021G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1302-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z64xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV10Z1287.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MB9BF366R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EZR32HG320F32R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC4800-F144x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L471ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F32R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L471ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F32R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC11U14FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32LG230F128R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F716J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F710_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F710"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKM33Z64Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM33ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9BN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC220LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S828": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s828.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G880F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G880F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF366K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "HT32F52352": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x1fe00"}}, "debug": "SVD/HT32F52342_52.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF366N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF500N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BF500_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF366L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF366M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG395F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG395F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF306N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F107F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC832M101FDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC832M101FDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC83x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F078VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF306R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1C21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1c21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "CMSDK_CM4_FP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_CM4/Include/CMSDK_CM4_FP.h", "define": "CMSDK_CM4_FP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM4_FP.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F401RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "LM3S1C26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1c26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC4700-F100x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM383FSUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L051C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK53DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK53D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4500-F144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "TLE9879QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MK60FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK60F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L476MG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5C31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5C36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG360F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG360F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F105VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F105VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32WG330F64R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKE06Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE06Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE06Z4.h", "define": "MKE06Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE06Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130R8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U68JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO100LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF102N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M453LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NM1120DB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF102R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1302-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DF5JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC4700-E196x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11E14FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO130SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC1825": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.6.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "NUC130LC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C49H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M4LEDLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "AC30M1432": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2C48H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMD21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F755J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF324L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMC20J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32PG1B100F256GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B100F256GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "MB9BF324K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC220SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG890F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG890F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1230E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1230E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2DF5G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM4CMS32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM32/Include/sam4cm32.h", "define": "__SAM4CMS32C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4CM32/ATSAM4CMS32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "N572F065": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\N572F065_v3.svd", "processor": {"clock": "48000000"}}, "STM32F105V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32LG390F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG390F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1202-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG390F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG390F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG390F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9BF428T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF42xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "LPC54113J128BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1114LVFHN24/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1302-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1518JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LPC54605J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54605.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L431RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG332F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG332F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F745J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F740_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F740"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G232F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G232F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF414R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F401RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "MB9BF414N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAMS70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "SN32F226J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L486RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TLE9877QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "M452YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M451MLC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC120LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100LC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MK50DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM333FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M451LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "XMC1301-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKL43Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5R31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5r31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG295F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG295F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NM1100XBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG942F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG942F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1763": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "S6E2CC9H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MKE15Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE15Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK02FN128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK02F12810.h", "define": "MK02FN64xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK02F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF124M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM4F111H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F111H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKE16F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE16F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF514R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAM4N16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4N/ATSAM4N16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAM4N16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4N/ATSAM4N16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MKV44F64xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP64_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MK22FX512Axxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\MK22FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKS22FN128xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MKS22F25612.h", "define": "MKS22FN256xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKS22F25612.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "120000000"}}, "NM1200TAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NM1530VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM403BSWZ-CF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "STM32L475JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKE14F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE14F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC123LD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TM4C123BH6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F328C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "Mini58FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM4F212H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F212H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F769NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MK21DX256Axxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG295F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG295F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1519JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MK30DX256xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.flm": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S1165": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1165.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F030R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HE6E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1162": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1162.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2HE6G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HE6F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F479IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NANO112RC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC130RD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S9U92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9U90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9U96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG840F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG840F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ADuCM322": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM322.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U68JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G222F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G222F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL17Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL17Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5662": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5662.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L011D3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L011D4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L476QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F64R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L476QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1403-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2U93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s2u93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC472JG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "STM32F429IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L052R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC140LC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK53DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\MK53D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L162ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L162ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG225F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG225F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM3S8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM3SD8/ATSAM3S8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3S8B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "SVD/SAM3SD8/ATSAM3S8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "STM32F777NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC200LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1785": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC4078FBD100": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S3J26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3j26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3U2E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U2E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "STM32F765II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S8630": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8630.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC505DLA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "LPC1110FD20": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_4.FLM": {"default": "1", "ramsize": "0x03E0", "size": "0x1000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0400"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4CMS4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS4C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F765IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "HT32F52331": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F52331_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMV71J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "S6E2C39J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "SKEAZN64xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x10000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NANO100SD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ARMCM0P": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMCM0plus/Include/ARMCM0plus.h", "define": "ARMCM0P"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM0P.svd", "processor": {"fpu": "0", "endianness": "Configurable", "clock": "10000000"}}, "MB9BF365L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF365K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG880F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG880F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF155N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "(Generic) Nano100 Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "TLE9871QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9871.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x11007FFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0x7FFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF518S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "Mini52ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "M451VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG840F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG840F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F058T8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M058SLAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S102": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s102.h", "define": "LM3S102"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\lm3s102.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S101": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s102.h", "define": "LM3S102"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\lm3s101.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "S6E2D55G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MKL27Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL27Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120LD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M0516ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S2110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MK40DX64xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.flm": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC120LD2DE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC122SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "M453VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC100LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2CC8L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAM4CMP16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMP16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "Mini51ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC1227FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "M451LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F401RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F207IC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207IF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207IG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F401RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F207IE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32W108HB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F437AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1302-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG232F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG232F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC220LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD21E16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE02Z16xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00000100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S818": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s818.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMC20J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF112M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF112K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKE02Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00000100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF155R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S811": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s811.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M2S090": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "LM3S812": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s812.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S815": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s815.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "HT32F52342": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/HT32F52342_52.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S817": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s817.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F121C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F121C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC140RC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1302-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120LE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NUC120VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M4TKLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M054LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1114FN28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMV70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MB9BF165K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF165L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM3H6FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM3Hx_code_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/TMPM3Hx_data_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x30000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TXZ3_DFP.1.0.0.pack", "compile": {"header": "Device/Include/TMPM3H6.h", "define": "TMPM3H6FWFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TXZ3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M3H6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMDA1E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F302VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32TG108F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG108F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC140LE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG360F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG360F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21G17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAML21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM376FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M376.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMDA0J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG990F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG990F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG990F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MWPR1516xxx": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKPR1516_P16KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x4000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWPR1516_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MWPR1516.h", "define": "MWPR1516xxx"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWPR1516_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\MWPR1516.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC54101J512BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F031C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4S4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "M451MLD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "S6E2CCAJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "HT32F52231": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F52231_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "HT32F52230": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7C00"}}, "debug": "SVD/HT32F52220_30.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F302VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C1AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1226FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "NM1200LAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKW41Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW41Z4.h", "define": "MKW41Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW41Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B200F256GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F256GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "NUC200VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F417ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MB9BF521L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ADSP-CM402BSWZ-FF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00040000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L152ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F334R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L152ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F334R4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F334R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F031C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4100-Q48x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4S8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4S8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4S8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C59J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32G842F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G842F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F427AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK20DN512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM330FDWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAME70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LM3S2939": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2939.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M0516ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF515N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F427AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF515R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC100LC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC140RE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKL03Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00002000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9867QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "M451LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "GD32F150C4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG380F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG380F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5632": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5632.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F303ZD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L443VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKL02Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F070C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "AC33M6128": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx128/Flashloader/ac33m8128_PFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx128\\Core\\include\\AC33Mx128.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx128\\SVD\\AC33Mx128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32LG290F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG290F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM411F20XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM41xA_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/TMPM41xB_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM411_unitB.h", "define": "TMPM411F20XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x40000"}, "IRAM2": {"start": "0x20008000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54102J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "N572F072": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\N572F072_v3.svd", "processor": {"clock": "48000000"}}, "M453RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F070CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5D56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F746BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S5D51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1548JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "NUC100LD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L072CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4800-F144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L476VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF468R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD20E17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M453LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S3W26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s3w26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF468M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF468N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32L052K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1R21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1r21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4C8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM330FYWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF565L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "Mini51TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC810M021FN8": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_4.FLM": {"default": "1", "ramsize": "0x03E0", "size": "0x00001000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "Mini52XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG842F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG842F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F071CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC220SE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC4400-F64x512 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4400_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1764": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SN32F239F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F756ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC122SC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "EZR32LG330F64R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N2B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151QC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F237F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L151QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151QE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1620": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1620.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S1621": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1621.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1150": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1150.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1625": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1625.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1626": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1626.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1627": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1627.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF417S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1315FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S8530": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s8530.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TMPM462F10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF417T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S8538": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s8538.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG842F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG842F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG842F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F248F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9U81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MCIMX6SX": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.0.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/iMX6SX_A9.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "STM32L152VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1301-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV44F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "Mini54LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "EZR32HG320F64R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC11U24FET48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD21G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L011G3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32HG320F64R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F765ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M0516ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC4072FET80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32TG822F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG822F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG332F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG332F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1237D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1237D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M0516LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AFB44M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F767ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO120LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32ZG110F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MK30DX64xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.flm": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.flm": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG380F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG380F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4800-F100x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "NANO102LB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "XMC4700-E196x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "ISD9361": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9300_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9300_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9300_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "S6E2D55JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ARMv8MML_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h", "define": "ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ATSAMD20G16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F212H5BB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5BB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV71J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMV71J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F446RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1301-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1302-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F769IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L475RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L475RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32G840F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G840F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV56F1M0xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P1024_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IRAM2": {"start": "0x2F000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00100000"}}, "debug": "SVD/MKV56F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "STM32F769II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L475RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1J16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1j16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1J11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1j11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC122LC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "EFM32HG210F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG210F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG210F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S2616": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2616.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1823LB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C123BH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1Z16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s1z16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32LG330F256R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F256R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4500-E144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F256R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM373FWDUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M373.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1346FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F256R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U66JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL27Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL27Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2432": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2432.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21G16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21G16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M2S150": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "STM32L071VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TLE9843-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9843_2.FLM": {"default": "1", "ramsize": null, "size": "0xD000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xC000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1101LVUK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L071VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L051K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M052ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L051K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DH5GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO100LE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NUC123LC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4LS2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F098VC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Mini54LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMDA0J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S328": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s328.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LPC11U37FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini51XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F746NE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32ZG110F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC472KI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "LM3S800": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S801": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s801.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32ZG110F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S808": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s808.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S9971": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9971.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ADuCM360": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCMxxx_128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\ADuCM361.h", "define": "ADuCM361"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.pdsc", "memory": {}, "debug": "SVD\\ADuCM360.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F303K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11U14FET48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F230H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F230H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1237E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1237E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF364K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF364L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F215RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F215RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM369FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U67JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M452RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKV58F512xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P512_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00080000"}}, "debug": "SVD/MKV58F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "TM4C1237E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1237E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S6911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F100R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S6918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F469II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC120LC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F150K8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2H14G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H14F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H14E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "GD32F150K6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01800"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F469IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKL33Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL33Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW22D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK10DN128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S6753": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6753.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F070RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG290F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG290F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG290F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF115N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F417ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MKL16Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L072KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F705J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11U24FHI33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM4LC2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L433RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4LC2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F190C6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC472VG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "GD32F190C8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC472KG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "TM4C123BH6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMD21E15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-F064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1114JHN33/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G290F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G290F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "GD32F130F4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC220SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG942F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG942F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM36BF10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040800"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M36B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EFM32TG825F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG825F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9AF111K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF111N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF111M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TLE9869QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9869.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F405RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MK12DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1120FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1201-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "AC33M3064": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx064/Flashloader/AC33Mx064_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx064\\Core\\include\\AC33Mx064.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx064\\SVD\\AC33Mx064.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S2948": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2948.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9D81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F407ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NANO110RC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F407ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EZR32WG330F256R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK10DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG995F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG995F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK10DX128xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32WG330F256R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF164K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EZR32WG330F256R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F256R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF164L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MKM34Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM34ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1811": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1811.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK20FN1M0xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK20F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F103R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1816": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1816.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F107VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM343FEXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_768.FLM": {"default": "1", "ramsize": null, "size": "0x000C0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x000C0000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC240LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32G890F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G890F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG295F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG295F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1301-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "SN32F236J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F101ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LPC1549JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "M054LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C129XKCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C129XKCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF416S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1112FD20/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD20E18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF342M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "SN32F747F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F740_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F740"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF342N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "SN32F249F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F410TB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32ZG108F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32LG330F128R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S9C97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9c97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC120LD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32LG330F128R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL02Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2CC9J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F051K8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM381FWDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM381_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M381.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F051K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4074FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F051K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1330LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1330_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1330_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1330_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1330AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF217T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF217S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM4F232H5BB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5BB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11E68JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO110KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S6965": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000B800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6965.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1402-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF516N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC100RD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L151V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F103RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F107RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F107RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1518JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "XMC1201-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1548JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "TM4C1231E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1231E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F210H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F210H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG842F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG842F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1301-T038x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF418S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "S6E2C28L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M451VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF418T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L475QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2G26J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g2xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ARMv8MML": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.0-Beta9.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h", "define": "ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "10000000"}}, "S6E2G26H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g2xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM4F112H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F112H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54605J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54605.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Z32F38412ALS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F3841.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F3841.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F3841.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LM3S1635": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1635.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F112H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F112H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F429VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Mini52TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC1112LVFHN24/003": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U68JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG395F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG395F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKL03Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL36Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1202-T028x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG890F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG890F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM34Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP256_2KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34Z7.h", "define": "MKM34Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKM34Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32WG280F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG280F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L052T8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG290F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG290F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L052T6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32PG1B200F128GM48": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F128GM48.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "MK21FX512Axxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK21FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L073CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG990F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG990F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG225F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG225F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL15Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG395F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG395F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK66FX1M0xxx18": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}, "Flash/MKD256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MK66F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2HG6G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG6F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG6E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2C2AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "GD32F170C8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G842F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G842F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL25Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1W16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s1w16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L031G6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "CMSDK_ARMv8MML": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "SN32F238F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC100RC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L031G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1202-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F102C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1401-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX64xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "CMSDK_ARMv8MBL": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MBL/Include/CMSDK_ARMv8MBL.h", "define": "CMSDK_ARMv8MBL"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MBL.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F469VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L162VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F469VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2C58H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NUC442VG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2C3AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S628": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s628.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1404-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B200F128GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F128GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAMS70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "NUC120LE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S2608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC130RE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1201-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32G200F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G200F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1752": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1751": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1756": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1754": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L152RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L011F3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1759": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1758": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L011F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32PG1B200F256GM48": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F256GM48.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "LM3S5739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32ZG108F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAM3U1E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x20080000", "size": "0x00002000"}, "IROM1": {"start": "0x00080000", "size": "0x00010000"}}, "debug": "SVD/SAM3U/ATSAM3U1E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "MKE06Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE06Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE06Z4.h", "define": "MKE06Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE06Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5732": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5732.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1302-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M0518LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1104UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC1102_04.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TLE9843QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9843.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xB000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LM4F132E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F132E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SKEAZN8xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P8KB.FLM": {"default": "1", "ramsize": "0x400", "size": "0x2000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x400"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SKEAZN84.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S8962": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8962.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M4LEDRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NANO100KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F469AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F407VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "XMC1100-Q024x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2D35JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC230LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC11E37FBD48/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5G51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMDA1J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1290NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1290NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S2739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123FH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123FH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S6610": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6610.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S6611": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6611.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF329T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF32xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MB9BF329S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF32xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "STM32F318K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1227FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LM3S6618": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6618.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L100RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L100RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M054ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M054ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF167R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54608J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5460x/chip_5460x/inc/chip.h", "define": "CHIP_LPC5460X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F373V8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11U36FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "HT32F2755": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.4.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM366FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2139": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2139.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MKW30Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW30Z4.h", "define": "MKW30Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW30Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N2A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF167N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF167M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S6100": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "S6E2GH6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2ghxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2GH6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2ghxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG108F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC834M101FHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC832M101FDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC83x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "ATSAM3X8H": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8H.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "MKL15Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2DF5GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM3X8E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "ATSAM3X8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "Apollo_512_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "TM4C1292NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1292NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M0516LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F373VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F373VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM3N1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL17Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL17Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1112FDH20/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M054ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F407IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32HG321F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG321F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG321F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F407IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LPC1115FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L100R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK22FN128xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MK22F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF318S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF318T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MKL05Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG332F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG332F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4SD16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SD16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4SD16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SD16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "XMC4800-E196x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "NANO120SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAMD21E15BU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15BU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130G8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130G6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x08000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F130G4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x04000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 GD32F130_150 USE_STDPERIPH_DRIVER"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x08000000", "size": "0x04000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2GH8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2ghxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF216T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11C14FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK10DN32xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK50DX128xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\MK50D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6432": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6432.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Apollo_128_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF129S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF12xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "LM3S618": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s618.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1821FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF129T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF12xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "LM3S2950": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2950.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S613": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s613.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S612": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s612.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S611": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s611.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S610": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s610.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF517T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9D92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S615": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s615.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L486ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M4LEDRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F479NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1114FHI33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100LD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC1114FHI33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4200-F64x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4200_4100_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4200_series/Include/XMC4200.h", "define": "XMC4200_Q48x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x5FC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4200.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM3SD8B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00440000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3SD8/ATSAM3SD8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3SD8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00440000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3SD8/ATSAM3SD8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "GD32F170T8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F301C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F051C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2CCAL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAML21E15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML21_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IRAM2": {"start": "0x30000000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAML21\\ATSAML21E15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG332F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG332F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG332F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F170T6": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "GD32F170T4": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C1AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF316S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF316R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF316T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9L97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9l97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MKL33Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.9.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL33Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1401-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF500R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BF500_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NM1824FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO120KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAMS70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMS70Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "TMPM475FDFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S3749": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3749.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1958": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1958.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF305R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M453SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMC21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F038E6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F120C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F120C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG290F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG290F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5D91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1294NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1294NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C59L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "TM4C123GH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG980F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG980F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F051C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK21FX512xxx10": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK21F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG380F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG380F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK21FX512xxx12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\MK26F18.h", "define": "MK26FN2M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MK21F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4CMP8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.5.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMP8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC4400-F100x256 ": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.0.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM361FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LPC11U12FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV31F256xxx12": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MKV31F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMD21G17AU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G17AU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE14Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE14Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F101RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "XMC1302-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ISD9130": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"clock": "48000000"}}, "STM32F101RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F103T6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM3N4B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3N/ATSAM3N4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x06000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3N/ATSAM3N4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N4A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3N/ATSAM3N4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F726J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F720_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F720"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM068FWXBG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M068.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1201-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Z32F06410AKS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F0641.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F0641.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F0641.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1607": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1607.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F439VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK50DX256xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\MK50D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMG53N19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG53\\samg53.h", "define": "__SAMG53N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG53\\ATSAMG53N19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1237H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F302VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD\\STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5656": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5656.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "R-IN32M3-CL": {"core": "Cortex-M3", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M3_S25FL064P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29AL032D.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/R-IN32M3_S25FL032P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.1.3.0.pack", "compile": {"header": "Device/Include/RIN32M3.h", "define": "RIN32M3_EC"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M3_CL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SN32F746J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F740_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F740"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F302VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD\\STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC54114J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.1.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54114_cm4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F769NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "XMC1402-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "M058ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "GD32F190R8": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "M453RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMD21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L011G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32LG940F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG940F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S9GN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9gn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MK10DX64xxx5": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK10DX64xxx7": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MK11DA5.h", "define": "MK11DN512Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Mini51ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMD20G15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F64R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAM3N0B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "CMSDK_ARMv8MML_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.4.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML_SP.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "25000000"}}, "TM4C1237D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1237D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM375FSDMG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M375.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAM3N0C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA1J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E66JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.7.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF522K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1202-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1113FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32HG320F64R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1113FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FBD48/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L041C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKE04Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE04Z1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1311FHN33/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32HG320F64R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "Mini52XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "Apollo_64_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAMS70N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMS70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LM3S2637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO100ND3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "SN32F767F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.2.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC123LD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TMPM366FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1345FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F429VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Apollo_512_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "TMPM363F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M363.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LM3S5651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC120VD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S5652": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5652.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9AF112L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF104N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F205ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1111FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F078RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM369FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S8971": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8971.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S8970": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8970.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1230D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1230D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11E67JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U37HFBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ADSP-CM402BSWZ-EF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00080000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "STM32F205ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MKW31Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW31Z4.h", "define": "MKW31Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW31Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F205ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1202-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F205ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MM32x103": {"core": "Cortex-M3", "vendor": "MindMotion:132", "algorithm": {"Flash/MM32x103_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x103_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MM32x103.h", "define": "MM32x103_MD"}, "pdsc_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x103_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/MM32x103.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "EZR32LG230F256R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1113FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC822M101JHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F479NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F439VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG995F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG995F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21J17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1343FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1302-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.0.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1347FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG230F256R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM470FYFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC100LD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C123FE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123FE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "GD32F190RB": {"core": "Cortex-M3", "vendor": "GigaDevice:123", "algorithm": {"Flash/GD32F1x0_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.3.0.0.pack", "compile": {"header": "Device/Include/gd32f1x0.h", "define": "GD32F1x0 USE_STDPERIPH_DRIVER GD32F170_190"}, "pdsc_file": "http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GigaDevice.GD32F1x0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/GD32F1x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG230F256R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6938": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6938.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini52ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "EZR32WG330F128R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F318C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.3.0.pack", "compile": {"header": "Device\\Include\\stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD\\STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1317FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1H11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1H16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LM3S2412": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2412.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S2410": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2410.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NUC100RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.8.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S6110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}}
\ No newline at end of file
+{"S6E2H16E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H16G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF166N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TM4C1290NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1290NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC029LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC029AN\\Include\\NUC029xAN.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC029AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC120LC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2H16F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H16X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h1xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F105RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F105RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF317S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32WG390F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG390F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1302-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF317T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MK24FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK24F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F707F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO130SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "M452RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MK60DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF106R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMDA1G14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF106N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MK21FN1M0Axxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK21FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F722RC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ATSAMC21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1237H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC4400-F64x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4400_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM383FSEFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "AC30M1364": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG230F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG230F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG230F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMR21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF116N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32WG890F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG890F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F411RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F417IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LM3S6422": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6422.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S6420": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6420.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S2965": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2965.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M452RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC100RD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S600": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s600.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD09C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD09_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMD09\\Include\\samd09.h", "define": "__SAMD09D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD09\\ATSAMD09C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F105R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK22FX512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK22F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM066FWUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M066.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO100ND2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "XMC1201-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NM1120ZC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF328S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF32xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MB9BF328T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF32xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32LG942F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG942F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TLE9879QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "MKV11Z128xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P128_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV11Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "STM32L451CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F767F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L451CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK02FN64xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK0x_FAC.FLM": {"default": "0", "ramsize": null, "size": "0x00000024", "ramstart": null, "start": "0xFFFF0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK02F12810.h", "define": "MK02FN64xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK02F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC54607J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54607.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1301-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF529T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF52xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "Z32F06410AES": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F0641.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F0641.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F0641.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF166R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF529S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF52xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "S6E1A11C0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A11X0A.FLM": {"default": "1", "ramsize": null, "size": "0xE000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG232F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG232F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG232F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK63FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK63F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC230VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F071RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO130KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC11U35FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ARMv8MML_DSP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "MKL46Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL46Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM380FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M4TKRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32LG295F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG295F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9844QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9844.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xF000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "ATSAML21E18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21E18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF128S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF12xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "TMPM395FWAXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM395_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM395.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M395.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9BF128T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF12xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MK22DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S308": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s308.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NUC100RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "nRF51422_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "ATSAM3A8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3A8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3A8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "nRF51422_xxAB": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F722IC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F722IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TM4C1237H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F756NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32HG220F32R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F32R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F767IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "XMC1202-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32HG220F32R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F32R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MK52DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK52D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32HG220F32R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F767II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L496RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L496xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG220F32R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ARMSC000": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMSC000/Include/ARMSC000.h", "define": "ARMSC000"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMSC000.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "STM32F334K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F64R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334K4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F64R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK82FN256xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK82F25615.h", "define": "MK82FN256xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK82F25615.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MKE04Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P8KB.FLM": {"default": "1", "ramsize": "0x400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKE04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129DNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129DNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F64R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F64R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAML22N17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22N17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F766J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "S6E2CC8J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "TM4C1230C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1230C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F121E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F121E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO110SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32L031C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L031C4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S5G36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAML22G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C1292NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1292NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ISD9160": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"clock": "48000000"}}, "ATSAMV71Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32L486VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV71Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MK22FN256xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK2x_FAC.FLM": {"default": "0", "ramsize": null, "size": "0x00000024", "ramstart": null, "start": "0xFFFF0000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK22F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1102LVUK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1115JET48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV30F64xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV30F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F446ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F302CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F446ZC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1301-Q024x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "HT32F1654": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0xFC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xFC00"}}, "debug": "SVD/HT32F1653_54.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MKE14Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE14Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MKE16F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE16F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F303VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F777BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "HT32F1656": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x3FC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x3FC00"}}, "debug": "SVD/HT32F1655_56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C1236D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1236D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF616T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1102UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC1102_04.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2HG4E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32GG330F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG330F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG330F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL05Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM376FDDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M376.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32LG330F256R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4S16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4S16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MAX71617": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_512KB.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "MAX71616": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_512KB.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "Apollo_256_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MKW22D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F100C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AFB42N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB42L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB42M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F439II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TLE9873QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9873.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100BFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0xBFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM342FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM342_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00009000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F439IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM380FYDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TLE9845QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9845.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xB000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG942F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG942F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG942F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA0E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32HG210F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG210F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TLE9867QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "MK60FN1M0xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK60F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "M452VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F122H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F122H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC200SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32HG220F64R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1778": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM4F122H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F122H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F109F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1774": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC11U14FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1776": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F411CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L100R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC240SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C29H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32LG390F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG390F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5752": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5752.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M4TKVG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NM1120XB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "Mini54ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "MT2523x": {"core": "Cortex-M4", "vendor": "MediaTek:129", "algorithm": {"tools/keil/mt2523/2523_32M_MXIC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00400000", "ramstart": "0x04008000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://download.labs.mediatek.com/MediaTek.MTx.4.2.0.pack", "compile": {"header": "driver/CMSIS/Device/MTK/mt2523/Include/mt2523.h"}, "pdsc_file": "http://download.labs.mediatek.com/MediaTek.MTx.pdsc", "memory": {"IRAM1": {"start": "0x00000000", "size": "0x00400000"}, "IRAM2": {"start": "0x04008000", "size": "0x00020000"}, "IROM1": {"start": "0x08000000", "size": "0x00400000"}}, "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "208000000"}}, "STM32F410C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC11A12FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAMD21G16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F479AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F378VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA1J14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG230F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG230F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32LG330F256R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M058LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F469BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32LG330F256R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2412": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2412.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F401VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "MK30DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ARMv8MML_DSP_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "TMPM067FWQG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M067.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32TG822F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG822F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TM4C129XNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129XNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S6637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK51DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK51D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMR21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE18F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE18F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2C58J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M2S050": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "S6E2C3AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32WG395F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG395F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G880F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G880F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO112LB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32LG895F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG895F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M452LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TLE9877QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG990F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG990F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG990F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1201-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG980F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG980F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK10DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAME70J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAML21G16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21G16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9842QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9842.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x800"}, "IROM1": {"start": "0x11000000", "size": "0x8000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "NUC131LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F479AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC4088FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC130LE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L071VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1120TB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM419F-BCZ_M0": {"core": "Cortex-M0", "vendor": "Analog Devices:1", "algorithm": {}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M0_DFP.1.0.0.pack", "compile": {"header": "Device/inc/M0/CM41x_M0_device.h"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x200F0000", "size": "0x00008000"}}, "debug": "SVD/CM41x_M0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC1100-T016x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F479ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F100RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAM3U1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x20080000", "size": "0x00002000"}, "IROM1": {"start": "0x00080000", "size": "0x00010000"}}, "debug": "SVD/SAM3U/ATSAM3U1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "TM4C1231H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32G280F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G280F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG895F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG895F1024"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG895F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M0516LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32WG330F128R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U12FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F412RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "M052ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM384FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M384.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F469ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F479II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F479IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1114FDH28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F469ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC442KG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EFM32G290F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G290F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C1232D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1232D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NM1200ZBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F423VH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F423xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32G222F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G222F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK22FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK22F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4CMS16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F038K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG900F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG900F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG900F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV71N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "EFM32LG990F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG990F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF112N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L432KB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L432xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1302-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MK11DX256xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK11DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L081CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L081xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL28Z512xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_KL28.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MKL28Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF112R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM368FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M368.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11C22FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKS22FN256xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MKS22F25612.h", "define": "MKS22FN256xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKS22F25612.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F128R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG230F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG230F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1538": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1538.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO102SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC472VI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2C38H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NM1120FC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "XMC1302-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM4LS2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4104-F64x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF314R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF105R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG942F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG942F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG295F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG295F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG295F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL13Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL13Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini52LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAM4SD32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4SD32C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4SD32B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4SD32B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L443RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L100C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG900F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG900F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG900F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F706J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F112E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F112E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK26FN2M0xxx18": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00200000"}}, "debug": "SVD/MK26F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2DH5G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG840F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG840F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF105N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M451MRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMD09D14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD09_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMD09\\Include\\samd09.h", "define": "__SAMD09D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD09_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD09\\ATSAMD09D14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM367FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M4TKRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L476ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F228F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L476ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M451YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S5D56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5791": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5791.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF464K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1937": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1937.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F121H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F121H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF464L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG890F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG890F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG980F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG980F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F210E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F210E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1202-T028x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C1AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC11U37FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L151C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F232H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4317": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4310": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC1114FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F232H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4313": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "ATSAMD21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2B93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2b93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F756VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S1968": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1968.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF528T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF52xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MB9BF528S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF52xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32G880F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G880F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1823EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK22FN512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}, "Flash/MK2x_FAC.FLM": {"default": "0", "ramsize": null, "size": "0x00000024", "ramstart": null, "start": "0xFFFF0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK22F51212.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L151UC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK22FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK22F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC140VE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M451MRD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L462VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L462xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF341L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF341M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF341N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF465K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC1224FBD48/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LPC11E11FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF516S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF406R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F101CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MB9BF406N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M0518SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1225FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LM3S5P36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5P31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C18H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF516R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32G842F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G842F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F413RH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NUC120RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "S6E2C19L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MKL02Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M452SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "Generic_NUC400_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "TM4C1294KCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C1294KCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F302C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F401RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "EFM32GG840F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG840F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG840F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M451MLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S1P51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1p51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F707BF": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4700-F144x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9BN2": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431KC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431KB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9BN6": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC100VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "Generic_NUC200_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F051T8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1120EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMDA0E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMv8MBL": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MBL/Include/ARMv8MBL.h", "define": "ARMv8MBL"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MBL.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "Mini52TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "EFM32G200F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32G/EFM32G200F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "SN32F765J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG290F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG290F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKW21D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5P3B": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5632.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1768": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SN32F226J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F101C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM366FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1763": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "Mini52FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32F101C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LPC1766": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MKE16F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE16F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32GG380F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG380F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG380F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1765": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S5747": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5747.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "CMSDK_CM7_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7_DP.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32L475JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U35FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F378CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5749": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5749.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32PG1B200F256GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F256GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAM3U2E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U2E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "LPC1787": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM3U2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x000020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x000004000"}, "IRAM2": {"start": "0x20080000", "size": "0x000004000"}, "IROM1": {"start": "0x00080000", "size": "0x000020000"}}, "debug": "SVD/SAM3U/ATSAM3U2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "STM32L063R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L063xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L063x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C48J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1788": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "XMC4200-Q48x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4200_4100_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4200_series/Include/XMC4200.h", "define": "XMC4200_Q48x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x5FC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4200.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F439ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F439ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L071RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG980F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG980F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG980F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG940F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG940F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F131H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F131H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG990F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG990F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L471RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L471RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC100RE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L471RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC240SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC442KI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "LPC11U34FHN33/311": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_40.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xA000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xA000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC220LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AFB41N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB41M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB41L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L162VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F412CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F412CG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1114FHN33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L052K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1114FHN33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21J18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK21DN512Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG822F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG822F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C123BE6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123BE6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM367FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11C24FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1347FBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F405OG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32L100C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM369FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C123BE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123BE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32HG350F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG350F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG350F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F215VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F215VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S1F11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1f11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF102R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK65FX1M0xxx18": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}, "Flash/MKD256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK65F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM4LS8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LS8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC812M101JDH16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "M452VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF315N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F479ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF315R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9AF312K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32HG321F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG321F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG321F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF102N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11E14FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1201-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC20G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF104R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1233H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK20FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK20F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M451MLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F778AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC120RD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMC21J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Mini51LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC11A14FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F232H5BB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F232H5BB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1G21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1g21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1233H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG230F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG230F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L053C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMR21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21G18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMR21\\ATSAMR21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32W108CZ": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_192.FLM": {"default": "1", "ramsize": null, "size": "0x30000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x08000000", "size": "0x30000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "S6E2D55GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32L053C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC43S30": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "TM4C1231H6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32W108CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32W108CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F756IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC54113J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TM4C1231H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1231H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK10FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK10F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ADSP-CM407BSWZ-BF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "STM32F413CG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TM4C123GE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123GE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F207VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1302-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC20J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F207VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMV71N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMV71N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ARMCM7_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "TMPM372FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M372.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG890F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG890F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM380FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM4F231E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F231E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM3N1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9879QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L021K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM368FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M368.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TLE9867QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "NM1520LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F301C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E1A11B0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A11X0A.FLM": {"default": "1", "ramsize": null, "size": "0xE000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F103VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAM4LC8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3748": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3748.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4LC8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/SAM4L/ATSAM4LC8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF321K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM037FWUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM03x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM037.h", "define": "TMPM037FWUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M037.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MKL26Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2GK6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gkxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F437ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L151ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK11DN512xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK11D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F437ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAMC21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1517JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "NUC120LD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC123SD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "XMC1403-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54606J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAMD21J16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F030CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW31Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW31Z4.h", "define": "MKW31Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW31Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MCIMX6X4": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6SX_A9.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "LPC1112FDH28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MCIMX6X1": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6SX_A9.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "MCIMX6X2": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6SX_A9.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "MCIMX6X3": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6SX_A9.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "S6E2D35GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32G232F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G232F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1200TBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1401-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C5AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F423RH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F423xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF512R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S3634": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3634.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC230SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L471VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C123AE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123AE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2GM6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gmxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L051T6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2GM6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gmxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L151R6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F427ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Mini51LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32F103V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF512N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F427ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1850": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1850.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG280F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG280F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F301R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC4320": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4323": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4322": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4325": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F302CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32LG880F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG880F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG990F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG990F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F1655": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/HT32F1655_56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG295F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG295F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32GG940F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG940F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG940F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51422_xxAC": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "HT32F1653": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F1655_56/ht32f1655_56.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F1653_54.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK64FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S5K31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5k31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F777VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32WG880F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG880F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L486JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ADSP-CM419F-BCZ_M4": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"Flash/CM41x_FlashB_512.FLM": {"default": "0", "ramsize": "0x10000", "size": "0x00080000", "ramstart": "0x10008000", "start": "0x11080000"}, "Flash/CM41x_FlashA_512.FLM": {"default": "1", "ramsize": "0x10000", "size": "0x00080000", "ramstart": "0x10008000", "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M4_DFP.1.0.0.pack", "compile": {"header": "Device/inc/M4/CM41x_M4_device.h"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM41x/Releases/AnalogDevices.CM41x_M4_DFP.pdsc", "memory": {"IROM2": {"start": "0x11001000", "size": "0x000FF000"}, "IRAM1": {"start": "0x10000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20010000", "size": "0x00018000"}, "IROM1": {"start": "0x11000000", "size": "0x00001000"}}, "debug": "SVD/CM41x_M4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "LM3S5G56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1404-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E37HFBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML22G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F446VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "SN32F227F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F446VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F412RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM367FWXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M451RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC200SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "SN32F245J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3A4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3A8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3A4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "ATSAMD11C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD11\\ATSAMD11C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F229F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG895F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG895F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "Z32F12811ARS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F1281.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F1281.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F1281.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C28J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAM3S2A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LPC11E36FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3S2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3S2B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3S/ATSAM3S2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "NUC120RD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32TG232F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG232F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C59H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "HT32F1251": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F1252": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F1253": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x7C00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x7C00"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF465L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "Mini51TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAM4CMP32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM32/Include/sam4cm32.h", "define": "__SAM4CMS32C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4CM32/ATSAM4CMP32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1402-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S5C31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F302C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF566K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TM4C129LNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129LNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM462F10XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L071CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4400-F100x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4400_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1301-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DF5J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM370FYDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM370_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M370.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32GG395F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG395F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG395F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F058R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L071CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32LG230F64R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1301-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32LG230F64R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F64R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO112VC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NM1820EB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C123GE6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123GE6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C29J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAM4LC2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG895F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG895F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMC20E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG880F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG880F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK40DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SKEAZN16xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x4000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NANO110KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9AF311K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF311N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM366FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG840F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG840F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ARMv8MML_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "M451MRC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "Mini58LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L071C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S2776": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2776.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M052LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF216S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "M0519SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC131SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD10D13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD10\\ATSAMD10D13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4088FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKL04Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G280F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G280F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2G28J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g2xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC442RI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EFM32G210F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G210F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G210F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MAX71637": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_1MB.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "MAX71636": {"core": "Cortex-M3", "vendor": "Maxim:23", "algorithm": {"Flash/MAX716xx_1MB.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\max716xx.h", "define": "MAX71637"}, "pdsc_file": "http://www.keil.com/pack/Keil.ZEUS_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x00400000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "108000000"}}, "MK21DN512xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG840F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG840F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG840F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM440F10XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM440_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM440.h", "define": "TMPM440F10XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Configurable", "clock": "100000000"}}, "LM4F111B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F111B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M052LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD11D14AM": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11D14AM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE18F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE18F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD11D14AS": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11D14AS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429NE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK20DN32xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M0519VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM407BSWZ-AF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "TM4C1294NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1294NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9AF314L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11A04UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TM4C129CNCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129CNCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1403-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F122E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F122E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK64FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S9L71": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9l71.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F415OG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32LG380F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG380F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54102J512BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAMS70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC11U35FET48/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC240VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "AC33MA384A": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33MA384A/Flashloader/AC33Mx384A_384.flm": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33MA384A\\Core\\include\\AC33Mx384A.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33MA384A\\SVD\\AC33Mx384A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32HG308F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG308F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG308F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1549JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "M052ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "Apollo_128_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L431CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM3X4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3X4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "LPC11E67JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "SKEAZ128xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x20000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SKEAZ1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32GG890F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG890F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG890F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMD21G18AU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G18AU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F732VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F732xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKL16Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1302-Q024x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG330F64R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G230F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G230F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG222F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F078CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3826": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s3826.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L471QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKE02Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L471QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC43S20": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "NANO100LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32LG980F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG980F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S9B95": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b95.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1114LVFHI33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9B96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9B90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32G230F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G230F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L051R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4108-Q48x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L051R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11U67JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F303RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA0G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152VBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM33Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM33Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF114R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "XMC1404-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2H46F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF114N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "S6E2D35J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG895F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG895F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG880F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG880F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG880F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM461F10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM461_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M461.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L452VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32HG222F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG222F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG222F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC54616J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54616.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAME70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAME70Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32L452VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9GN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9gn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1231C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1231C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF312N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32JG1B100F256GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B100F256GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "EFM32TG825F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG825F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F469NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F303R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "M0516LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF312R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F303R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC230RC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F469NE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG890F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG890F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F722ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC1224FBD64/121": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "XMC4104-F64x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F722ZC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MK65FN2M0xxx18": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00200000"}}, "debug": "SVD/MK65F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1224FBD64/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "STM32F746VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "SN32F705BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C3AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F042T6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5G31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "CMSDK_CM0plus": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM0plus/Include/CMSDK_CM0plus.h", "define": "CMSDK_CM0plus"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM0plus.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "ATSAMC20G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NM1510LC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC54S616J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S616.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F302R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MCIMX6Y7": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/MCIMX6Y7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "STM32F302R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C129DNCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129DNCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MCIMX6Y2": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/MCIMX6Y2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "MCIMX6Y1": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/MCIMX6Y1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "MCIMX6Y0": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/MCIMX6Y0.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "STM32L073VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F427II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F779NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F427IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F072CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF524K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK40DX128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF524L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF524M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF466N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF466K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460L/Include/mb9b460l.h", "define": "MB9BF466L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMR21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5B91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5b91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC505DL13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "NM1820ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF466R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG995F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG995F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC442VI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "MK10DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM4C16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}, "Flash/ATSAM4C_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MK21FN1M0xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK21F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MK21FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK21F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG995F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG995F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM381FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM381_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M381.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32GG332F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG332F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG332F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151V8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L476JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF514N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "TM4C1233H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1233H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK21DX128Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1958": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1958.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123GH6ZRB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6ZRB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG220F32R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG220F32R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF164K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F072C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123ZD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EZR32WG330F256R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L073V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DH5J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMC21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD10C13A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\SAMD10\\ATSAMD10C13A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120VE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG840F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG840F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4SA16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SA16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F302RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1224FBD48/121": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "EFM32GG290F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG290F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG290F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4800-E196x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F030K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM34Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM34ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC505DSA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "MB9BF404R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C4AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9BF404N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC4800-F100x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9DN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9dn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11E12FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2G36J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g3xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2G36H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g3xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKM14Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM14Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "SN32F758F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO110RD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NANO100LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "M4LEDLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG842F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG842F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51802_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "STM32L475ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF428S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF42xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "STM32L475ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4333": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC4330": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F217VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "Mini54XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1297NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1297NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F411VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "ARMv8MML_DSP_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "MKL04Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1231D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1231D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F132H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F132H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F132H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F132H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F051R4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F051R6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA0E14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0E14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F767NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKV46F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV46F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F358VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32G200F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G200F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F051R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F131E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F131E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1225FBD64/321": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_80.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x14000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x14000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LM3S8738": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8738.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "nRF51824_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "STM32L052C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S8730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S8733": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8733.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L152C6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF366R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC4076FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "NUC100VE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M452LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32TG840F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG840F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4800-F144x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "NANO100SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S8933": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8933.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NM1823ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S8930": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8930.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2C19J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32WG232F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG232F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100LD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C129ENCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129ENCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1345FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1403-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F205VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "NUC472HI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "STM32F205VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM3U4E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128_B1.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00100000"}, "Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00100000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U4E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "M451VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M052ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1112FHI33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHI33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3U4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_128_B1.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00100000"}, "Flash/ATSAM3U_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00100000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00004000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3U/ATSAM3U4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "LPC54607J256BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54607.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32HG220F64R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NM1100FBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32HG220F64R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F64R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1850": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "SN32F236J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32HG320F32R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC18S50": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32HG220F64R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG220F64R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "CMSDK_CM0": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM0/Include/CMSDK_CM0.h", "define": "CMSDK_CM0"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM0.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "TLE9861QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9861.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x11007FFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0x7FFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MK30DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC18S57": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1549JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LM4F211H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F211H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F769F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M058LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG900F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG900F256"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG900F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF121K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF121J": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B120J_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xJ.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG332F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG332F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG332F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKV31F128xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV31F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NUC140RD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF121L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK10FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK10F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TM4C129XKCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C129XKCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM4F130C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F130C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F469BE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM3N00B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00400000", "size": "0x00004000"}}, "debug": "SVD/SAM3N/ATSAM3N00B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N00A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00400000", "size": "0x00004000"}}, "debug": "SVD/SAM3N/ATSAM3N00A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAME70J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "S6E2G38H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g3xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2G38J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G3XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G3/Include/S6E2G3xJ/s6e2g3xj.h", "define": "S6E2G38J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g3xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2HG4G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG4F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hgxf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54S618J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S618.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NM1820LB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC4108-F64x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S5762": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5762.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F102R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F102R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F038F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMS70J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F102R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32ZG210F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC4800-F144x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32WG942F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG942F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1112FHN33/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F100C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1112FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F303CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IRAM2": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MK24FN256xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK24F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKM33Z64Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM33ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "N572P072": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\N572F072_v3.svd", "processor": {"clock": "48000000"}}, "STM32L432KC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L432xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32WG330F64R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L051C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1402-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F64R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG330F64R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "M2S005": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "LPC11U34FBD48/311": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_40.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xA000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xA000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM374FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M374.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF366M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E1A12B0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A12X0A.FLM": {"default": "1", "ramsize": null, "size": "0x16000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x16000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32TG230F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG230F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG230F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1403-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC43S57": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "LPC43S50": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F429BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC140LD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AF141M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "XMC4500-F144x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F767VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F413MG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "M452VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L485JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L485xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F413MH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF416N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L443CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32WG330F128R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F100ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F303C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32WG330F128R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F128R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F52331": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F52331_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C123GH6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F091RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMV71Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F102RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G890F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G890F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL02Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2678": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2678.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1233C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1233C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1346FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM475FYFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC54S616J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S616.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TLE9844-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9844_2.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xF000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F103TB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC4700-F100x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "ADuCM320i": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM320i.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M0516ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMV70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1517JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32TG232F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG232F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F072RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2CC9L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S5C51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "AC33M6128": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx128/Flashloader/ac33m8128_PFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx128\\Core\\include\\AC33Mx128.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx128\\SVD\\AC33Mx128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LPC1343FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11E68JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11A12FBD48/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC4076FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152V8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F415RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32LG895F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG895F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L072CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F071VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF565K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC120LD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100NE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9AF344N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF344M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF344L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1120DC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF322K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F410T8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "TLE9877QXA40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF322L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF322M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC100VD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ISD9360": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "M4TKLE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKL46Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL46Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F071V8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L062K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L062xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L062x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM361FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "Apollo_256_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32HG110F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG110F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MKL24Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL24Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2620": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2620.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S3654": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3634.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U14FET48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S3651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "HT32F1251B": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F125x/ht32f125x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/HT32F125x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA0G14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F479VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF115R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAME70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F103T4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5U91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5u91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2H46E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F103T8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F723IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F723xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F101R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "XMC1302-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LM3S1651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM330FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F437VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11A02UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC54S608J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC122ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "NUC131LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L073CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9AFA41N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA41L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11C12FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L031G6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L031G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C2AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M453LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MK20DX32xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3S1B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LPC1104UK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC1102_04.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC18S10": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "SN32F225J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F220_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F220"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x3FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L073CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F413VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NUC130RE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32GG995F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG995F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG995F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F410RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S9792": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9792.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG880F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG880F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM366FWXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4SP32A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4SP_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4SP/sam4sp.h", "define": "__SAM4SP32A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00500000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4SP/ATSAM4SP32A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L151VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Z32F12811ATS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F1281.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F1281.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F1281.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK12DN512xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMC21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1316FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF104N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L486ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK27FN2M0xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IRAM2": {"start": "0x1FFC0000", "size": "0x00040000"}, "IROM1": {"start": "0x00000000", "size": "0x00200000"}}, "debug": "SVD/MK27F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "NM1827YB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L162RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F051C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F051C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L162RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32HG310F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG310F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG310F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAMR21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF467R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F103ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TM4C123GH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F101RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32L476ME": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F101RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MK10DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK80FN256xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK82F25615.h", "define": "MK82FN256xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K80_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK80F25615.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "ATSAMG53N19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG53\\samg53.h", "define": "__SAMG53N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG53\\ATSAMG53N19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "AC33M8128": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx128/Flashloader/ac33m8128_PFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx128\\Core\\include\\AC33Mx128.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx128\\SVD\\AC33Mx128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32ZG108F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "SN32F768F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F760_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F760"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123GH6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO100SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F745IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F745IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC200SE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK20DN128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC824M201JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F105VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NANO100SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "M451YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F777ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TMPM343FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S815": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s815.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L475VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMG51N18": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG51\\samg51.h", "define": "__SAMG51N18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD\\SAMG51\\ATSAMG51N18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L063C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L063xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L063x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S3N26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s3n26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF516T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC120LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM383FWEFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32WG942F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG942F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129CNCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129CNCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMC20E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120SD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32L151RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F103RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC100VD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF405R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF40xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "M4TKVE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L082KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L082xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F103RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C28H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9AFA31M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "SKEAZN32xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x8000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "SN32F759F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF405N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B400A\\mb9b400r.h", "define": "MB9BF406R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF40xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L082KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L082xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1115FET48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F358CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF156M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM362F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M362.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EFM32LG842F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG842F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG280F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG280F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAM4S16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4S/ATSAM4S16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMG54J19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54J19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "NUC472HG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "MB9BF429S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF42xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "EFM32LG330F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG330F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF429T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF42xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "M052LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F378RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC100RE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L152R6xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV58F1M0xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P1024_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IRAM2": {"start": "0x2F000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00100000"}}, "debug": "SVD/MKV58F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "HT32F52220": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/HT32F52220_30.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NANO120ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "AC33GA256": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33GA256/Flashloader/AC33GA256_CDFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33GA256\\Core\\include\\AC33GA256.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33GA256\\SVD\\AC33GA256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F429AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG842F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG842F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11A11FHN33/001": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1435": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005C00"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1435.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F411RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "CMSDK_ARMv8MML_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML_DP.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "25000000"}}, "TMPM341FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM341_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "54000000"}}, "S6E2C2AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32LG360F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG360F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL33Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL33Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F217IE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217IG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG350F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG350F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG350F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "Mini54TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "TM4C123AH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123AH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2H46G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H46X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2h4xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2C39H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NM1320LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1320_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1320_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1320_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NM1320AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO103SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1202-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4800-E196x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM364F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M364.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "STM32L475JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ARMCM7_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "LPC812M101JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F413RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F038G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100RD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC120VD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK20DN64xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini54FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32L053R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L053R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L053xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L053x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1549JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "STM32F091CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F405OE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32WG360F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG360F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMHA1G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMH_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMH_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x00010000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.1.0.0.pack", "compile": {"header": "Device/SAMHA1/Include/samha1.h", "define": "__SAMHA1G16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.pdsc", "memory": {"IROM2": {"start": "0x00400000", "size": "0x00000800"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/SAMHA1/ATSAMHA1G16A.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG222F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG222F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M2S010": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "XMC1302-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F423MH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F423xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F439NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAML22N16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22N16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK70FX512xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK70F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MK70FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK70F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32WG295F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG295F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2G26J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g2xj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L072RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF321M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF321L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1547JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "STM32L475QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK20DX128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F417VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NUC120RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1236H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1236H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1112FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F767VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC1112FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1404-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC824M201JHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F301R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L072RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L051T8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF116S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF116R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC54101J512UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "S6E1A12C0A": {"core": "Cortex-M0+", "vendor": "Spansion:100", "algorithm": {"Flash/S6E1A12X0A.FLM": {"default": "1", "ramsize": null, "size": "0x16000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\S6E1A1\\s6e1a1.h", "define": "S6E1A12C0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM0plus_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x16000"}}, "debug": "SVD\\S6E1A1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF116T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L152RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1402-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG332F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG332F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NANO120SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32L152RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini52LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "NUC240SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC54114J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54114_cm4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM333FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF218S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF218T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF116N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MKM14Z64Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM14ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S610": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s610.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F423CH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F423xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32TG825F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG825F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKE02Z32xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P32KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32L152R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M0519LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "SN32F706BJ": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700B_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700B.h", "define": "SN32F700B"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L152R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F048G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG995F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG995F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG995F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1232C3PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_32.FLM": {"default": "1", "ramsize": null, "size": "0x008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x003000"}, "IROM1": {"start": "0x00000000", "size": "0x008000"}}, "debug": "SVD/TM4C123/TM4C1232C3PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F205ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMC20J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E68JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2D55GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM3X4E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000A0000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00020000"}}, "debug": "SVD/SAM3XA/ATSAM3X4E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "LPC4078FET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M0518LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F031K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32HG108F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG108F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG108F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ARMCM4_FP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM4/Include/ARMCM4_FP.h", "define": "ARMCM4_FP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM4.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "NANO112SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "AC30M1332": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L162VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S9DN6": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9dn6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4S2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S2C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x20000"}}, "debug": "SVD/SAM4S/ATSAM4S2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "NANO120KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TMPM37AFSQG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M37A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF118S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF118T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC4078FBD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TM4C1233E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1233E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F746VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F031E6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC200LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S6633": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6633.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO100VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32GG380F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG380F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG380F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC54102J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF121M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "SN32F108F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK64FN1M0VLL12": {"core": "Cortex-M4", "vendor": "Freescale:78", "algorithm": {"addon_cmsis/Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_SDK_DFP.2.2.0.pack", "compile": {"header": "platform/devices/fsl_device_registers.h", "define": "CPU_MK64FN1M0VLL12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_SDK_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "platform\\devices\\MK64F12\\MK64F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C38L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32LG995F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG995F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AF141N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F469NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9AF141L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_DualWflash32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}, "Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L021F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F429BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM3S1A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LPC54606J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM3S1C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3S/ATSAM3S1C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "MKL26Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F100V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO120VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "S6E2H44F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMDA1E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L4A6ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L4A6xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2H44E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54113J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32LG940F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG940F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO103LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L162VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1200LBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC11E36FHN33/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF156R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32LG880F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG880F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L031F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32L031F6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "BlueNRG-1": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STBlueNRG1.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x28000", "ramstart": "0x200002CC", "start": "0x10040000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STBlueNRG_DFP.1.1.1.pack", "pdsc_file": "http://www.keil.com/pack/Keil.STBlueNRG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x10040000", "size": "0x28000"}}, "debug": "SVD/BlueNRG1.svd", "processor": {"fpu": "0", "endianness": "Little-endian"}}, "NANO120SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF564L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO100ZD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF564K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "M054ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9AF156N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA31L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA31N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA3xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "R-IN32M3-EC": {"core": "Cortex-M3", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M3_S25FL064P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29AL032D.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/R-IN32M3_S25FL032P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.1.3.0.pack", "compile": {"header": "Device/Include/RIN32M3.h", "define": "RIN32M3_EC"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M3_EC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "AC33M4064": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx064/Flashloader/AC33Mx064_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx064\\Core\\include\\AC33Mx064.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx064\\SVD\\AC33Mx064.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "TM4C123BH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1402-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4800-F100x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "MKL14Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL14Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE02Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NUC122LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "MKE02Z64xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00000100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "TM4C1299KCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C1299KCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F756J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF312L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF312M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF312N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NANO130SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "HT32F1755": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Mini54XFHC": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKW20Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW20Z4.h", "define": "MKW20Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW20Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100RD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L052T8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F058C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG395F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG395F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4350": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F767BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC4353": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "NANO102LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "LPC4357": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "MT7687F": {"core": "Cortex-M4", "vendor": "MediaTek:129", "algorithm": {"tools/keil/mt7687/7687_32M_MXIC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://download.labs.mediatek.com/MediaTek.MTx.4.2.0.pack", "compile": {"header": "driver/CMSIS/Device/MTK/mt7687/Include/mt7687.h"}, "pdsc_file": "http://download.labs.mediatek.com/MediaTek.MTx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IRAM2": {"start": "0x00100000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00200000"}}, "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "192000000"}}, "TM4C1233E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1233E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKV42F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LPC54101J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4502-F100x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F767BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NM1100FAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM343F10XBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV42F64xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP64_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32F401VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "LPC54616J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54616.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKL34Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL34Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MCIMX6G1": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6UL.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "MCIMX6G0": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6UL.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "MCIMX6G3": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6UL.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "MCIMX6G2": {"core": "Cortex-A9", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX6_DFP.1.2.0.pack", "compile": {"header": "Device/Include/iMX6SX_M4.h", "define": "iMX6SX_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX6_DFP.pdsc", "memory": {}, "debug": "SVD/iMX6UL.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian"}}, "TMPM462F15XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F429BE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC505YLA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "S6E2C58L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM4F120H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F120H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1138": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1138.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK28FN2M0xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IRAM2": {"start": "0x1FFC0000", "size": "0x00040000"}, "IROM1": {"start": "0x00000000", "size": "0x00200000"}}, "debug": "SVD/MK28F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MB9AFA42M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA42L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK60FX512xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK60F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EZR32LG230F64R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG230F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK21DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1133": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1133.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U67JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK50DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "NANO130SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ARMCM23": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM23/Include/ARMCM23_TZ.h", "define": "ARMCM23_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM23.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "STM32F769AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F769AG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_1024dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32WG842F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG842F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAME70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MKV56F512xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P512_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00080000"}}, "debug": "SVD/MKV56F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "NANO120LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32F215ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F215ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MK51DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK51D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F745VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F745VG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32JG1B200F128GM48": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F128GM48.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "STM32F217ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F217ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F217xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S2533": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2533.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG880F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG880F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG880F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG395F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG395F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL26Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM367FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F110E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F110E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L073VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1100-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32WG232F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG232F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK61FN1M0xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK61F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "LM3S1R21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1r21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L471VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAML21J16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21J16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG942F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG942F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG942F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AFA42N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC11U34FBD48/421": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1302-Q040x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MK10DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "SN32F246J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U34FHN33/421": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32HG322F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG322F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG322F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MK60FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK60F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M452LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LPC1342FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC220VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C48L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "XMC4402-F64x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32ZG210F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "Mini51FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMC20E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMR21E19A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E19A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1F16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s1f16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32GG330F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG330F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG330F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C4AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMG51G18": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG51\\samg51.h", "define": "__SAMG51N18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD\\SAMG51\\ATSAMG51G18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L083VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32G280F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G280F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G280F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F231H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F231H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM073FSDUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M073.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F405ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32ZG210F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32HG308F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG308F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG308F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1100-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "AU9110LF3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/AU9100_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}, "Flash/AU9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/AU9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAM4LS4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4LS4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LS4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F469AE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F469AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L083VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG230F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG230F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG230F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4104-Q48x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L152CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NANO103ZD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO103\\Include\\Nano103.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO103AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1225FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "TMPM332FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M332.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32G230F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G230F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G230F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M2S025": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "MKL24Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL24Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123SC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L152C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini58ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG390F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG390F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF421L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A420L\\mb9a420l.h", "define": "MB9AF421L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF42xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF421K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A420L\\mb9a420l.h", "define": "MB9AF421L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF42xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TM4C1299NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1299NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M453VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4N8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAM4N8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4100-F64x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L162QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1313FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11A14FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG840F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG840F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC54S606J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC4500-F100x768": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0xC0000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L152C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1764": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "S6E2D55J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F048T6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL25Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F207ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S8938": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8938.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F207ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "NUC029FAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC029AE\\Include\\NUC029FAE.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NUC029AE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32L083V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1120EC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1202-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z16xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P16_1KB_SEC.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x4000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/MKV10Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MKW21Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW21Z4.h", "define": "MKW21Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW21Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F427VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F038C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M453RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9AF131M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF131L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32F427VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9AF131N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LPC1313FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF131K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF13xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9BFD17S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "XMC1404-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S800": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC4078FET208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BFD17T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32TG232F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG232F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG232F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAML21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF567R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM4LC4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LC4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/SAM4L/ATSAM4LC4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21J15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32ZG222F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F446MC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC4078FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M4LEDRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKL25Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC43S70": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "MB9BF567N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF567M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NM1330LC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1330_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1330_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1330_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1330AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO112LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "M058SZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADuCM3027": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADuCM302x.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM302x/Releases/AnalogDevices.ADuCM302x_DFP.1.0.4.pack", "compile": {"header": "Include/ADuCM3029.h", "define": "__ADUCM3029__"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM302x/Releases/AnalogDevices.ADuCM302x_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x20040000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/ADuCM302x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "26000000"}}, "LM4F211E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F211E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKV10Z32xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P32_1KB_SEC.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x8000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/MKV10Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LPC11U23FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG995F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG995F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U35FHI33/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FDH20/002": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G290F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G290F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF117T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF11xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1313FBD48/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L452CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152QE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF117S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF11xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "M453YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L152C8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451VG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F110H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F110H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1114FHN33/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC4072FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MK22FX512Axxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK22FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M0518SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF617S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF617T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F101T4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101T6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "S6E2C4AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "XMC1301-Q040x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U37FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F101T8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EFM32WG895F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG895F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG895F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100VE3DE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKL03Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F417VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32L431VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32HG309F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG309F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG309F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F070F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M451VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L031E4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM13Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM13Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L031E6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG280F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG280F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4315": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32F412VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F446RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F412VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "LPC54102J512UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F411VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "XMC1402-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML22\\ATSAML22J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U13FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL43Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1512": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MB9BF518T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC4327": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "XMC1100-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F100VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF518S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F042C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L031K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK30DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L031K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L031xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKM34Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM34Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F042C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKV58F512xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P512_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00080000"}}, "debug": "SVD/MKV58F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "LM3S6952": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6952.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4CP16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4CP/sam4cp.h", "define": "__SAM4CP16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CP/ATSAM4CP16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9AF155R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMG55G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG55\\samg55.h", "define": "__SAMG55J19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG55\\ATSAMG55G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKL27Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL27Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMR21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMR21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMR21\\Include\\samr21.h", "define": "__SAMR21E19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMR21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMR21\\ATSAMR21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF521M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF521L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S2608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF521K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG230F256R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF142N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF142M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF142L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L151CBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101TB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM072FSUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M072.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1520RD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC4367": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "ARMCM33_TZ": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h", "define": "ARMCM33_DSP_FP_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM33.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "EFM32WG330F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG330F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM372FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M372.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2CC8H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S1R26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1r26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG330F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG330F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL36Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M451MRE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F042K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G222F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U35FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AFB44L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB44M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFB44N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AB40NA\\mb9ab40n.h", "define": "MB9AFB44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFB4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1112FHN24/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L471VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK61FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK61F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L151RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1114FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FBD48/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ARMCM33": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h", "define": "ARMCM33_DSP_FP_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM33.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ADuCM361": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCMxxx_128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\ADuCM361.h", "define": "ADuCM361"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.pdsc", "memory": {}, "debug": "SVD\\ADuCM361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "ADuCM360": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCMxxx_128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\ADuCM361.h", "define": "ADuCM361"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM36x_DFP.pdsc", "memory": {}, "debug": "SVD\\ADuCM360.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "16000000"}}, "EFM32LG990F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG990F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F212E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F212E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM390FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM39x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM395.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M395.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32LG290F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG290F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG280F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG280F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG280F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "N571P032": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N571E000.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\N571P032_v3.svd", "processor": {"clock": "23000000"}}, "TMPM367FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NANO130KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32L152QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S5956": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5956.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F757F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5951": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5951.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF315M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK40DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF315N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32G890F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G890F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1404-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4E8E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4E/ATSAM4E8E.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32WG230F256R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4078FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F479VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK02FN128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK0x_FAC.FLM": {"default": "0", "ramsize": null, "size": "0x00000024", "ramstart": null, "start": "0xFFFF0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK02F12810.h", "define": "MK02FN64xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K00_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK02F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L152VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1202-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F102C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L4A6AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L4A6xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG232F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG232F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG842F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG842F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F102C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMCM23_TZ": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM23/Include/ARMCM23_TZ.h", "define": "ARMCM23_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM23.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "STM32F102C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F111H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F111H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "Mini55LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1201-T028x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1100-Q024x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF305N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F746ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F746ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TM4C1230H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1230H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC130VE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKV31F512xxx12": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x80000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MKV31F51212.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32LG230F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG230F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1111FHN33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/101": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM4SA16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SA16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32LG230F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG230F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK66FN2M0xxx18": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P2M0.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00200000"}}, "debug": "SVD/MK66F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC810M021FN8": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_4.FLM": {"default": "1", "ramsize": "0x03E0", "size": "0x00001000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F303C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "NUC123ZC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM4F122C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F122C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMC21G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM361F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "M058SFAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1777": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MKE15Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE15Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1201-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMHA1G14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMH_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMH_16_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00000200", "ramstart": null, "start": "0x00010000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.1.0.0.pack", "compile": {"header": "Device/SAMHA1/Include/samha1.h", "define": "__SAMHA1G16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.pdsc", "memory": {"IROM2": {"start": "0x00400000", "size": "0x00000200"}, "IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/SAMHA1/ATSAMHA1G14A.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C18J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1115JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1402-Q048x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK22FN1M0xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK22F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32ZG222F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC100RC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF505N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F102CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_MD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F102xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F733IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F733xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F318C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S9B92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "CMSDK_CM7_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7_SP.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "MK22FN128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK2x_FAC.FLM": {"default": "0", "ramsize": null, "size": "0x00000024", "ramstart": null, "start": "0xFFFF0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK22F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MB9AF116M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NUC220LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO110RE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MK12DX256xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1B21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1b21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F756BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC11E14FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC230LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F098CC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM36BFYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM365_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M36B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG225F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG225F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO120LC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F410CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "MKW24D512xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW24D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32WG230F64R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF616S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F303VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MK70FN1M0xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK70F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "MK70FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK70F15.h", "define": "MK70FX512xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K70_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK70F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32HG320F32R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32WG230F64R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG230F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG230F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1236E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1236E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2DH5GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF618T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF61xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC120RE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L452RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F723ZC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F723xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L452RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF618S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B610T\\mb9b610t.h", "define": "MB9BF618T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF61xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11E68JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F469BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK10DX32xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG995F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG995F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM366FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M452RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAM4E16E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4E/ATSAM4E16E.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4E16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4E/ATSAM4E16C.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1547JBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32G800F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G800F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G800F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC43S67": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "TM4C1232H6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1232H6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "MB9AF154M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF154N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NANO102ZB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAM4S4B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S4A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4S_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM4S/ATSAM4S4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC54608J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TM4C129ENCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C129ENCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32HG110F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG110F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG110F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "AC30M1464": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "NM1530VE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L081KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L081xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F031G4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF154R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF15xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMD11C14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD11_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD11\\Include\\samd11.h", "define": "__SAMD11D14AS__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD11_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD11\\ATSAMD11C14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C123GH6ZXR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123GH6ZXR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4C32E": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4C32/sam4c32.h", "define": "__SAM4C32E_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4C32/ATSAM4C32E_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4C32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4C32/sam4c32.h", "define": "__SAM4C32E_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4C32/ATSAM4C32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MKW40Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW40Z4.h", "define": "MKW40Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW40Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F64R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L073RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L021D4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "version": "0.1.0", "STM32L073RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L073xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M453VE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG980F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG980F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG980F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG980F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BFD18S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1114FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG295F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG295F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG295F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BFD18T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32G232F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G232F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL33Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL33Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4402-F100x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMD20J15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BFD16T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BFD1xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S2D93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s2d93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F131C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F131C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1332": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1332.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini51XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BFD16S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9BD10T\\mb9bd10t.h", "define": "MB9BFD18T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BFD1xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAMD20J17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKV42F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV42F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32TG110F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1520RC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMD21J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HE6G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF566R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF506N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F373CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF506R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAML21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21E17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1519JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MB9BF566L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF566M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF566N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32WG230F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG230F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6610": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6610.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MKE04Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE04Z1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L476RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF144N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L476RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG332F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG332F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF329T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF32xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "STM32F429NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ATSAM4C4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4C_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C4C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C49J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9AF314N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S1751": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1751.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK60DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9AF314M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F318K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "XMC4504-F100x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MCIMX7D": {"core": "Cortex-A7", "vendor": "NXP:11", "algorithm": {"Flash/MCIMX7_QSPI1A_32.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x02000000", "ramstart": "0x20000000", "start": "0x60000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.1.4.1.pack", "compile": {"header": "Device/Include/iMX7D_M4.h", "define": "iMX7D_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/iMX7D_A7.svd"}, "STM32L431CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG390F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG390F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4337": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "STM32L151CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151CC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z128xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P128_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV10Z1287.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "XMC1404-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11A13FHI33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Axx\\LPC11Axx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Axx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F232E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F232E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M452LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MCIMX7S": {"core": "Cortex-A7", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.1.4.1.pack", "compile": {"header": "Device/Include/iMX7D_M4.h", "define": "iMX7D_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.iMX7D_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/iMX7S_A7.svd"}, "Mini54XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC4370": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "204000000"}}, "EFM32TG210F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG210F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Apollo2_FPGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo2.FLM": {"default": "1", "ramsize": "0x4000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo2.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF428T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B420T\\mb9b420t.h", "define": "MB9BF429T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IRAM2": {"start": "0x1FFEC000", "size": "0x14000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF42xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "STM32L041K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO130KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAMC20G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF568R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32GG940F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG940F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG940F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG842F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG842F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F268F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F260_30.FLM": {"default": "1", "ramsize": null, "size": "0x7800", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F260.h", "define": "SN32F260"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x77FC"}}, "debug": "SVD\\SN32F260.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1112LVFHI33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF568N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F358RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000A000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF568M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560R/Include/mb9b560r.h", "define": "MB9BF568R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B560R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMSC300": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMSC300/Include/ARMSC300.h", "define": "ARMSC300"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMSC300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "STM32F765BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L151C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK30DX128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "M451RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TMPM380FWDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM38x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M380.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA44M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA44L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AFA44N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AFA4xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "XMC1404-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML22J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML22_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML22\\ATSAML22J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMDA1G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C129EKCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_512.FLM": {"default": "1", "ramsize": null, "size": "0x080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x080000"}}, "debug": "SVD/TM4C129/TM4C129EKCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M451RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L486QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK10DX128xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK10D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "NUC442JI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "TMPM367FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M367.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L011K3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC100LE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L011K4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG210F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG210F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1439": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s1439.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2DF5GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MK20FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK20F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F412ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG940F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG940F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "nRF51822_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "nRF51822_xxAC": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "nRF51822_xxAB": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf51xxx_ecb.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf51xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF51"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\nrf51.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "16000000"}}, "STM32F412ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x00000210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F412Zx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "CMSIS/SVD/STM32F412xG.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32WG230F256R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G18B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21G18B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML21\\ATSAML21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F765NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32WG230F256R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKL82Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL82Z7.h", "define": "MKL82Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFA000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL82Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F256R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG230F256R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F205RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32PG1B200F128GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F128GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "STM32F205RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205RF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1810": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "NUC505DS13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "LPC1812": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1813": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1815": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1817": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L162RCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L475VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L475VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L151C8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMD10D14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD10\\ATSAMD10D14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2U93": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s2u93.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MK61FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK61F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MK61FX512xxx15": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00080000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK61F15.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "NM1120TC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM036FWFG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM03x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM037.h", "define": "TMPM037FWUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M036.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NM1520LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM403BSWZ-FF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00040000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAML22J18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22J18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TM4C1231D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1231D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC4088FBD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F439NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F407VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LM3S2651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC130LD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM4F121B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F121B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9B81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9b81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F111C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F111C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NM1120XC1AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_29_5.FLM": {"default": "1", "ramsize": null, "size": "0x7600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7600"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC029TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC029_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC029_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC029AN\\Include\\NUC029xAN.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC029AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1124JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x08000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC112x\\LPC112x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\LPC112x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2C5AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MK53DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK53D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC1402-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F091VC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F091xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F030RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L471JE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L471JG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9C97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9c97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F098RC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM440FEXBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM440_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM440.h", "define": "TMPM440F10XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Configurable", "clock": "100000000"}}, "STM32F767NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO110RD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TMPM462F15FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC4504-F144x512": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM3S8B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "SVD/SAM3SD8/ATSAM3S8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EZR32WG230F128R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM074FSUG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM07x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM074.h", "define": "TMPM074FSUG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M074.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "XMC1302-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MK20DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EZR32LG230F256R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FHN33/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F101VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "Mini58TDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32WG230F128R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F64R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG360F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG360F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "ADSP-CM407BSWZ-DF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00100000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "EFM32LG280F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG280F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF368R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF368M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF368N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LPC54607J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54607.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG840F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG840F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG840F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF304N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1311FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG390F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG390F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG390F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100LD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S1635": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1635.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ADuCM3029": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADuCM302x.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://download.analog.com/tools/EZBoards/CM302x/Releases/AnalogDevices.ADuCM302x_DFP.1.0.4.pack", "compile": {"header": "Include/ADuCM3029.h", "define": "__ADUCM3029__"}, "pdsc_file": "http://download.analog.com/tools/EZBoards/CM302x/Releases/AnalogDevices.ADuCM302x_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x20040000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/ADuCM302x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "26000000"}}, "STM32F100VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MKW21Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW21Z4.h", "define": "MKW21Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW21Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F130H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F130H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F100VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1313FHN33/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6950": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6950.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF304R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMC21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F439BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NANO120LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "Mini54TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LM4F110B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F110B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9G97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9g97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C123BH6ZRB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6ZRB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32ZG108F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC130RC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO130KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "S6E2C5AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F415VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32ZG222F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F373C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32LG330F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG330F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2GM8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gmxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F072VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32HG108F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG108F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "nRF52832_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf52xxx_sde.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx_uicr.flm": {"default": "1", "ramsize": "0x4000", "size": "0x1000", "ramstart": "0x20000000", "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF52840_XXAA"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\nrf52.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "64000000"}}, "STM32L433VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4CMS8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAMD21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1403-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20J18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC822M101JDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "MB9AF115N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF115M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMC20G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F746IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ATSAMD20J16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20J16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F746IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F072V8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1233D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1233D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F373CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F031F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F031F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK22DN512xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL04Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL04Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M058SSAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F413VH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "M452YC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF168N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "M054LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF168M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F405VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MB9BF168R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAME70N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAME70N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAME70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAME70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "EFM32HG222F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG222F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG222F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "S6E2GM8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GMXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GM/Include/S6E2GMxJ/s6e2gmxj.h", "define": "S6E2GM8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gmxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM475FZFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M451SC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EZR32WG230F128R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG230F128R68": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R68.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4N8A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4N/ATSAM4N8A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG332F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG332F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101VG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EZR32WG230F128R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "EZR32WG230F128R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG230F128R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "TMPM383FWUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2D35G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F301K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1960": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1960.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L496ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L496xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L151RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F301K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L151RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F769BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_1024dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9BF412R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC123ZC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "XMC4200-F64x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4200_4100_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4200_series/Include/XMC4200.h", "define": "XMC4200_Q48x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x5FC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4200.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG110F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG110F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF412N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAML22N18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML22_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML22_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML22\\Include\\saml22.h", "define": "__SAML22N18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAML22\\ATSAML22N18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL16Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F769BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MB9AFA32L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA32M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AFA32N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA30N\\mb9aa30n.h", "define": "MB9AFA32N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AFA3xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32F423ZH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F423xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAMC21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW01Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW01Z4.h", "define": "MKW01Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKW01Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F120B2QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_32.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LM4F120B2QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S817": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s817.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC472JI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "M453VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "HT32F1765": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC812M101JTB16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32L151R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM366FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM14Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM14ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF122K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF122L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF122M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAM3S4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "EFM32LG840F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG840F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3S4A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3N1B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L162VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG110F4": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32TG/EFM32TG110F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMG54G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "STM32F334C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "MB9AF144M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF144L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A140NA\\mb9a140n.h", "define": "MB9AF144N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF14xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F107VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F334C4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5K36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5k36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120ZD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NANO100KC3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EFM32GG890F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG890F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG890F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L462CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L462xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO100NC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S1N11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1n11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F302K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG900F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG900F256"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG900F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "R-IN32M4-CL2": {"core": "Cortex-M4", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M4_MX25L6433F.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M4_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M4_DFP.1.0.1.pack", "compile": {"header": "Device/Include/RIN32M4.h", "define": "RIN32M4_CL2"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M4_CL2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32ZG222F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG222F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ADSP-CM408BSWZ-AF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "ADSP-CM403BSWZ-EF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00080000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "STM32F429NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1404-F064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F302K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F302x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "M058LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC100LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C39L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S301": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s301.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S300": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s300.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F439AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2HE4G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HE4F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MKV44F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MKM33Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM33Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD21G18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1316FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1114FBD48/323": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L162RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NM1120ZB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S1N16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1n16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M452VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC123ZD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MK60DN256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK60D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MKM38Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM38Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TMPM369FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKV30F128xxx10": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x20000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/MKV30F12810.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32WG330F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG330F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG232F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG232F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4312": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "NUC505YO13Y": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "MKM33Z128Axxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM33ZA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG360F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG360F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1827": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MKL43Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1820": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1823": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1822": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MK51DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK51D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S9781": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9781.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKL16Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1100-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LM4F212H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U66JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1100-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32HG322F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG322F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG322F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM4F132C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F132C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Mini55ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MK21DX256xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF367M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF367N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F411CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F411xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F411xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32G840F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G840F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG990F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG990F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L041F6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F042G6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042G4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110SD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC1857": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32HG220F64R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG220F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG220F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NANO112SB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ARMCM4": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM4/Include/ARMCM4_FP.h", "define": "ARMCM4_FP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM4.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM7": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM7/Include/ARMCM7_DP.h", "define": "ARMCM7_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM7.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM0": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM0/Include/ARMCM0.h", "define": "ARMCM0"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM0.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ARMCM3": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM3/Include/ARMCM3.h", "define": "ARMCM3"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM3.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "LPC1853": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32G840F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G840F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "CMSDK_CM4": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM4/Include/CMSDK_CM4_FP.h", "define": "CMSDK_CM4_FP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM4.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S5T36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s5t36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "CMSDK_CM7": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM7/Include/CMSDK_CM7_DP.h", "define": "CMSDK_CM7_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM7.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32L151R8xxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG380F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG380F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM14Z128xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP128_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM14ZA5.h", "define": "MKM14Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKM14Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "S6E2CCAH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32L071KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC442JG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2GH8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2ghxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1D26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1d26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L071KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC240LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "CMSDK_CM3": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM3/Include/CMSDK_CM3.h", "define": "CMSDK_CM3"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM3.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "MKL36Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG840F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG840F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO100KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "EZR32LG230F128R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6537": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6537.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9997": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9997.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F746NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EZR32LG230F128R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R60": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F128R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S2110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MB9AF114L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF114M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF114N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK40DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK40D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAM3N1A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00010000"}}, "debug": "SVD/SAM3N/ATSAM3N1A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL26Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL26Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32PG1B100F128GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B100F128GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAM3S4B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3S/ATSAM3S4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "MKV11Z64xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV11Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "ATSAMV70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32L083CB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M054LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM4F230E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F230E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54101J256UK49": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L083CZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SKEAZ64xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x10000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SKEAZ1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "XMC1402-F064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F373R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1302-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F373RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F373RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F101V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LPC54618J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54618.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2DH5JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F048C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F048xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1125JBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC112x\\LPC112x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC112x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL27Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL27Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F334C6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C18L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S1626": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1626.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG222F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG222F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG222F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1113FHN33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F107VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMHA1G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMH_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMH_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00000400", "ramstart": null, "start": "0x00010000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.1.0.0.pack", "compile": {"header": "Device/SAMHA1/Include/samha1.h", "define": "__SAMHA1G16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMHA1_DFP.pdsc", "memory": {"IROM2": {"start": "0x00400000", "size": "0x00000400"}, "IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/SAMHA1/ATSAMHA1G15A.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "NUC200LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C19H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32L072V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NANO100ZD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC100LD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMG55J19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG55\\samg55.h", "define": "__SAMG55J19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG55\\ATSAMG55J19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S9D96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG290F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG290F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B100F128GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B100F128GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "MK22FN1M0Axxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK22FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TM4C1231E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1231E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC131SC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC131\\Include\\NUC131.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC131AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S617": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s617.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9AF121K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A120L\\mb9a120l.h", "define": "MB9AF121L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAML21E15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML21_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IRAM2": {"start": "0x30000000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAML21\\ATSAML21E15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2D35GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAML21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_32_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00400", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAML21_32.FLM": {"default": "1", "ramsize": null, "size": "0x08000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x01000"}, "IRAM2": {"start": "0x30000000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x08000"}}, "debug": "SVD\\SAML21\\ATSAML21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1231E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1231E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ATSAMG53G19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG53\\samg53.h", "define": "__SAMG53N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG53\\ATSAMG53G19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E13FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG108F4": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32TG/EFM32TG108F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG330F256R55": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R55.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S3Z26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s3z26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M0519SE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32TG108F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG108F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM3N0B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N0C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N0A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00400000", "size": "0x00008000"}}, "debug": "SVD/SAM3N/ATSAM3N0A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100LC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF522K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM4F130E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F130E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L4A6VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L4A6xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NANO120LD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "M451SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "EFM32WG230F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG230F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG230F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L452CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L452xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF132L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF132M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "MB9AF132N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "EFM32HG309F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG309F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG309F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF132K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AF13x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A130N\\mb9a130n.h", "define": "MB9AF132N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3UltraLowLeak_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF13xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32F722RE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKL13Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL13Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG110F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG110F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG110F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4300-F100x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4300_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4300c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4300_series/Include/XMC4300.h", "define": "XMC4300_F100x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x0FFC0"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4300.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S3739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC4500-F100x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF504R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM470FZFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F768AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC100LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF504N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC123LC2AN1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKV46F128xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP128_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKV46F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NUC120VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C38J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "XMC1402-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L451VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TMPM330FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MK40DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L451VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1301-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NUC120RE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32HG310F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG310F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG310F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S5R36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5r36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1776": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1776.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F777II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ATSAMC20E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC20\\ATSAMC20E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF316M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF31xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF316N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A310A\\mb9a310n.h", "define": "MB9AF316N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9AF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKL05Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4104-Q48x64": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F111E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F111E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M052LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32GG395F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG395F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG395F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC123LD4AE0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF316N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F765VI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKL17Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL17Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1233D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1233D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG940F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG940F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L433CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L433CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1232E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1232E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM4F120E5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F120E5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152CBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF505R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF50xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F302ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302ZD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC4074FBD144": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F235J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1403-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S310": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s310.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MK20DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S316": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s316.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S317": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s317.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LPC11E37FBD64/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S315": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s315.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "MK22DX256xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK22D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF415R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NM1827UB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF415N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32TG842F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG842F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG842F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC120LD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1114FBD48/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1301-T038x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "Mini54ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "M452SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32L011E4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM341FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM341_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "54000000"}}, "TLE9842-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9842_2.FLM": {"default": "1", "ramsize": null, "size": "0xA000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x800"}, "IROM1": {"start": "0x11000000", "size": "0x9000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1226FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "STM32F030C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG210F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG210F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "Apollo2_1024_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo2.FLM": {"default": "1", "ramsize": "0x4000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x40000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/Apollo2.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HE4E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE4X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2hexe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD21E16BU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32GG842F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG842F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG842F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ADuCM322i": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM322.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F030C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32ZG110F16": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC1833": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x40000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x40000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC1830": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_256_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MKW21D256xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MK_P256_50MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW24D5.h", "define": "MKW24D512xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW21D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1837": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11D14FBD100/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11D14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC18S30": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x18000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "TMPM461F15FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM461_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M461.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LPC18S37": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "MK51DN256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MK11DX256Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120SE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "XMC1402-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L100RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xBA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL14Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL14Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMDA0G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F437IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "nRF52840_xxAA": {"core": "Cortex-M0", "vendor": "Nordic Semiconductor:54", "algorithm": {"Flash/nrf52xxx_sde.flm": {"default": "0", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx.flm": {"default": "1", "ramsize": "0x4000", "size": "0x00200000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/nrf52xxx_uicr.flm": {"default": "1", "ramsize": "0x4000", "size": "0x1000", "ramstart": "0x20000000", "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.8.11.1.pack", "compile": {"header": "Device\\Include\\nrf.h", "define": "NRF52840_XXAA"}, "pdsc_file": "http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/NordicSemiconductor.nRF_DeviceFamilyPack.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x40000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\nrf52840.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "64000000"}}, "ADSP-CM408BSWZ-BF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "XMC1200-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32L152QC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMS70J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F446ME": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "M058LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG940F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG940F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKW41Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW41Z4.h", "define": "MKW41Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKW41Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110SC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F410R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4700-F144x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM370FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM370_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M370.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKE02Z16xxx2": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00000100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKE02Z2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "STM32L041G6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC442RG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "NANO102ZC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "LM3S818": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s818.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMD10C14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD10_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD10\\Include\\samd10.h", "define": "__SAMD10D14A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD10\\ATSAMD10C14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMG54N19": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMG_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMG_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\SAMG54\\samg54.h", "define": "__SAMG54N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD\\SAMG54\\ATSAMG54N19.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "96000000"}}, "STM32F042F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MM32x031": {"core": "Cortex-M0", "vendor": "MindMotion:132", "algorithm": {"Flash/MM32x031_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x031_DFP.1.0.0.pack", "compile": {"header": "Device/Include/MM32x031.h", "define": "MM32x031"}, "pdsc_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x031_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/MM32x031.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042F6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F429ZI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S2671": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2671.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1347FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1315FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F429ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F429ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "M451MSC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M0519LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0519_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/M0519_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0519_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0519\\Include\\M0519.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M0519AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L083RZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MK11DN512Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F401CB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401CC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F401CD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "LPC54608J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC120VD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ATSAMDA0J14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Generic_Mini51_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "TMPM365FYXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM365_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M365.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F042T4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F042x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1112FHN33/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKM32Z64xxx5": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP64_1KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34ZA5.h", "define": "MKM34Z128Axxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKM32Z5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L083RB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L083xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M451RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NANO112RB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "TMPM46BF10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM46B_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}, "IRAM2": {"start": "0x20080000", "size": "0x00800"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M46B.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F479BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK10DN32xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IRAM2": {"start": "0x1FFFF000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F479BG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S5Y36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s5y36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9790": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9790.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NUC120RC1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L052C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMS70Q21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70Q21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "TMPM470FDFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L021G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L021xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1302-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV10Z64xxx7": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV11Z7.h", "define": "MKV11Z128xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/MKV10Z1287.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EZR32HG320F32R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG320F32R60": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R60.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG320F32R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L471ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F32R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L471ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L471xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F32R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EZR32HG/EZR32HG320F32R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LPC11U14FBD48/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32LG230F128R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG230F128R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1317FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1225FBD48/321": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_80.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x14000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x14000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "XMC1202-T016x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "NUC220LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S828": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s828.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G880F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G880F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G880F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF366K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "HT32F52352": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x1fe00"}}, "debug": "SVD/HT32F52342_52.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF366N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF500N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BF500_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF366L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003C000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32L051C8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG395F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG395F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100VD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF306N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF30xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F107F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\SN32F100.h", "define": "SN32F100"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SN32F100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC832M101FDH20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC832M101FDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC83x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F078VB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF306R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1C21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1c21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "CMSDK_CM4_FP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_CM4/Include/CMSDK_CM4_FP.h", "define": "CMSDK_CM4_FP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_CM4_FP.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F401RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "LM3S1C26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1c26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC4700-F100x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "TMPM383FSUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM383_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M383.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKL15Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK53DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK53D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "XMC4500-F144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "TLE9879QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9879.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MK60FN1M0xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK60F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L476MG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF104R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A100A\\mb9a100r.h", "define": "MB9AF104R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9AF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S5C36": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c36.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG360F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG360F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-T038x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F105VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1112JHI33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9BN5": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9bn5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKE06Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE06Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE06Z4.h", "define": "MKE06Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKE06Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U68JBD100": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO100LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "MB9BF102N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M453LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NM1120DB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF102R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF10xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1302-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DF5JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC4700-E196x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S5D91": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d91.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "NANO130SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC1825": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_384_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1B000000"}, "Flash/LPC18xx43xx_384_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x60000", "ramstart": "0x10000000", "start": "0x1A000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC18xx.h", "define": "LPC18xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1800_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x60000"}, "IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x60000"}}, "debug": "SVD/LPC18xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "180000000"}}, "NUC130LC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2C49H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M4LEDLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "AC30M1432": {"core": "Cortex-M0", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC30M1x64/Flashloader/AC30M1x64_64.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.1.0.0.pack", "compile": {"header": "AC30M1x64/Core/include/AC30M1x64.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "AC30M1x64/SVD/AC30M1x64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2C48H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMD21E17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F755J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F750_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F760.h", "define": "SN32F750"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F760.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF324L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF324M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "Apollo_64_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32PG1B100F256GM32": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B100F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B100F256GM32.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "MB9BF324K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF32xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC220SC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG890F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG890F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1230E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1230E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2DF5G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM4CMS32C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C32_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM32/Include/sam4cm32.h", "define": "__SAM4CMS32C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x01100000", "size": "0x100000"}, "IRAM1": {"start": "0x20100000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/SAM4CM32/ATSAM4CMS32C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "N572F065": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\N572F065_v3.svd", "processor": {"clock": "48000000"}}, "STM32F105V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F105xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2G28H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2g2xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG390F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG390F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2H44G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H44X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H4/Include/S6E2H4xG/s6e2h4xg.h", "define": "S6E2H46G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h4xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC1202-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG390F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG390F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG390F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LPC54113J128BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/LPC54113.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1114LVFHN24/103": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1302-T038x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1518JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LPC54605J256ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54605.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Mini54LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32L431RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L431RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L431xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG332F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG332F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32G232F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G232F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G232F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M058ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF414R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "EFM32WG380F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG380F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF414N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF41xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAMS70Q19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70Q19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1769": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L486RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L486xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TLE9877QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9877.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "M452YD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M451MLC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC120LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO100LC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "TMPM333FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "M451LD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "XMC1301-T016x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKL43Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL46Z4.h", "define": "MKL46Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL43Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM333FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM33x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M333.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32WG295F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG295F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "NM1100XBAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG942F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG942F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F101C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "S6E2CC9H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MKE15Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE15Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF124L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF124M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF124K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF12xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1767": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MB9BF514R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "ATSAM4N16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4N/ATSAM4N16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "ATSAM4N16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4N_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4N/sam4n.h", "define": "__SAM4N8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x00400000", "size": "0x100000"}}, "debug": "SVD/SAM4N/ATSAM4N16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MKV44F64xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP64_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MKS22FN128xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MKS22F25612.h", "define": "MKS22FN256xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KSxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKS22F25612.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "120000000"}}, "NM1200TAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NM1530VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1500_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1500_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1500_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1500_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ADSP-CM403BSWZ-CF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00200000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20030000", "size": "0x00030000"}, "IROM1": {"start": "0x18000000", "size": "0x00200000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "240000000"}}, "STM32F745ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MKE14F256xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKE14F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NUC123LD4AN0": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_68.FLM": {"default": "1", "ramsize": null, "size": "0x11000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x11000"}}, "debug": "SVD\\Nuvoton\\NUC123AN_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TM4C123BH6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F328C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "Mini58FDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2_5.FLM": {"default": "0", "ramsize": null, "size": "0xa00", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini58\\Include\\Mini58Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\MINI58DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F745ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F745xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM4F212H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F769NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_1024dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "MK21DX256Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK21DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG295F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG295F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC472VG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "LPC1519JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x9000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MK30DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK30D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LM3S1165": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1165.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F030R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2HE6E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1162": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1162.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK51DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK51D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "S6E2HE6F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HE6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HE/Include/S6E2HExG/s6e2hexg.h", "define": "S6E2HE6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hexf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO112RC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC130RD2CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S9U92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9U90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S9U96": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u96.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ADuCM320": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM320.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ADuCM322": {"core": "Cortex-M3", "vendor": "Analog Devices:1", "algorithm": {"Flash/ADUCM320.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.1.1.0.pack", "compile": {"header": "ADuCM322\\common\\ADuCM322.h", "define": "ADuCM322"}, "pdsc_file": "http://www.analog.com/media/en/engineering-tools/design-tools/AnalogDevices.ADuCM320_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\ADuCM322.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC11U68JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32ZG210F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG210F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG210F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EFM32G222F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G222F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G222F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4400-F64x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "MKL17Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL17Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5662": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5662.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L011D3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L011D4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L476QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EZR32HG320F64R55": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L476QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1403-Q064x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMDA1G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC472JG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "STM32F429IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32L052R6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC140LC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F401CE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "LPC811M001JDH16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_8.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x00002000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32L162ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L162ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L162xD"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32TG225F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG225F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM3S8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM3SD8/ATSAM3S8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "STM32L052R8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F777NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F777xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC200LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1785": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC4078FBD100": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S3J26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3j26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1786": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC177x_8x.h", "define": "LPC177x_8x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC178x7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F765II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S8630": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s8630.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Generic_Nano100_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "NUC505DLA": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC505_SPIFLASH.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC505\\Include\\NUC505Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC505_v1.svd", "processor": {"fpu": "FPU", "clock": "100000000"}}, "LPC1226FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "STM32L496VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L496xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4CMS4C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMS4C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F765IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M451MSD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MKE14F512xxx16": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_D64_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/MKE1x_P512_4KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE18F16.h", "define": "MKE18F512xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x1FFF8000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKE14F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMV71J19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV71J19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "S6E2C39J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "SKEAZN64xxx2": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE02Zxxx_P64KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x10000", "ramstart": "0x1FFFFC00", "start": "0x00000000"}, "Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x800", "size": "0x100", "ramstart": "0x1FFFFC00", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SKEAZN642.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "NANO100SD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "ARMCM0P": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM0plus/Include/ARMCM0plus.h", "define": "ARMCM0P"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM0P.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "LPC11U36FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1237D5PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1237D5PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF365L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF365K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG880F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG880F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG880F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF155N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TLE9871QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9871.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE987x.h", "define": "TLE9879QXW40"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE987x_DFP.pdsc", "memory": {"IROM2": {"start": "0x11007FFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0xC00"}, "IROM1": {"start": "0x11000000", "size": "0x7FFC"}}, "debug": "SVD\\TLE987x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MB9AF155M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A150R\\mb9a150r.h", "define": "MB9AF156R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9AF15xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "Mini52ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "EFM32WG840F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG840F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG840F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F058T8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F058xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4088FET208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M058SLAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M058S\\Include\\M058S.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M058SAN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S102": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s102.h", "define": "LM3S102"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\lm3s102.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S101": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s102.h", "define": "LM3S102"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD\\lm3s101.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "S6E2D55G0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF314N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF31xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MKL27Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00010000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL27Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120LD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M0516ZBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC54114J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5411x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5411x/chip_5411x/inc/chip.h", "define": "CHIP_LPC5411X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC54114_cm4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "MK40DX64xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x0008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK40D10.h", "define": "MK40DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K40_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK40D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "NUC120LD2DE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC122SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "M453VC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "NUC100LE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2CC8L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAM4CMP16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMP16C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "Mini51ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC1227FBD64/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "M451LC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F401RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F401x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F207IC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S5D51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5d51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F207IF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F207IG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F401RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F401xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F401xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F401xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "84000000"}}, "STM32F207IE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32W108HB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TLE9869QXA20": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9869.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1101EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0x1EFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1302-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG232F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG232F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC220LD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L152ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMD21E16B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AF112N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "TMPM369FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MB9AF112L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF112M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx02_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF112K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF11xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MKE02Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE02Zxxx_EE256B.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00000100", "ramstart": "0x1FFFFE00", "start": "0x10000000"}, "Flash/MKE02Zxxx_P16KB.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE02Z4.h", "define": "MKE02Z16xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKE02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAM4CP16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4CP/sam4cp.h", "define": "__SAM4CP16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CP/ATSAM4CP16B_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S811": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s811.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M2S090": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "LM3S812": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s812.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F417IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "HT32F52342": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/HT32F52342_52.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F52341": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0200", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFE00"}}, "debug": "SVD/HT32F52331_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F121C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F121C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "NUC140RC1CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M054LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NANO120LE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NUC120VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M4TKLG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "M054LDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1114FN28/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMV70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMV70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MB9BF165K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF165L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "TMPM3H6FWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM3Hx_code_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/TMPM3Hx_data_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x30000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TXZ3_DFP.1.0.0.pack", "compile": {"header": "Device/Include/TMPM3H6.h", "define": "TMPM3H6FWFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TXZ3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M3H6.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAMDA1E16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TM4C1237H6PGE": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C1237H6PGE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG108F16": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/EFM32TG/EFM32TG108F16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC140LE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32WG360F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG360F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG360F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21G17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NANO110KD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAML21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM376FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M376.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMDA0J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MK20DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG990F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG990F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG990F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "R-IN32M3-CL": {"core": "Cortex-M3", "vendor": "Renesas:117", "algorithm": {"Flash/R-IN32M3_S25FL064P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00800000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29AL032D.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x10000000"}, "Flash/R-IN32M3_S25FL032P.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x00400000", "ramstart": "0x20000000", "start": "0x02000000"}, "Flash/R-IN32M3_S29GL128S.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x01000000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.1.3.0.pack", "compile": {"header": "Device/Include/RIN32M3.h", "define": "RIN32M3_EC"}, "pdsc_file": "http://www.keil.com/pack/Keil.R-IN32M3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x80000"}}, "debug": "SVD/RIN32M3_CL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC54101J512BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32F031C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "HT32F12365": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x3FC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F12365_66/ht32f12365_66.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x3FC00"}}, "debug": "SVD/HT32F12365_66.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "M451MLD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "S6E2CCAJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "HT32F12366": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x3FC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F12365_66/ht32f12365_66.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x3FC00"}}, "debug": "SVD/HT32F12365_66.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "HT32F52231": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/HT32F52231_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "HT32F52230": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7C00"}}, "debug": "SVD/HT32F52220_30.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "S6E2C1AL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LPC1110FD20": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_4.FLM": {"default": "1", "ramsize": "0x03E0", "size": "0x1000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0400"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1200LAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKW41Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW41Z4.h", "define": "MKW41Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW41Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F413ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32JG1B200F256GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F256GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "NUC200VE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F417ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NANO120LD2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "LM3S2276": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2276.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ADSP-CM402BSWZ-FF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00040000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L152ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC54S608J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S608.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F051C8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ARMCM33_DSP_FP_TZ": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h", "define": "ARMCM33_DSP_FP_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM33.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "STM32F334R8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L152ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F334R4": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F334R6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F334x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F334x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F031C4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F031x6"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4100-Q48x128": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4200_4100_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4200_4100c_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4100_series/Include/XMC4100.h", "define": "XMC4108_Q48x64"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x20000"}, "IRAM1": {"start": "0x20000000", "size": "0x2FC0"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/XMC4100.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4S8B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4S8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4S8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}, "Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4S8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "S6E2C59J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "EFM32G842F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32G/EFM32G842F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F427AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK20DN512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK20D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM330FDWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "ATSAME70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAME7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME70N20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-E_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAME70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LM3S2939": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2939.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M0516ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF515N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F427AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F427xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F427x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF515R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF51xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC100LC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "NUC140RE3CN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100CN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MKL03Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00002000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9867QXW40": {"core": "Cortex-M3", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9867.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.1.2.4.pack", "compile": {"header": "Device\\Include\\TLE986x.h", "define": "TLE9869QXA20"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE986x_DFP.pdsc", "memory": {"IROM2": {"start": "0x1100EFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1800"}, "IROM1": {"start": "0x11000000", "size": "0xEFFC"}}, "debug": "SVD\\TLE986x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "M451LG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S5P51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F437II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32WG380F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG380F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5632": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5632.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F303ZD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F303ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L443VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L443xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MKL02Z16xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P16_48MHZ.FLM": {"default": "1", "ramsize": "0x00000800", "size": "0x00004000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/MKL02Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F070C6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1Z16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s1z16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32LG290F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG290F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM411F20XBG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM41xA_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/TMPM41xB_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM411_unitB.h", "define": "TMPM411F20XBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x40000"}, "IRAM2": {"start": "0x20008000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\M411_unitA.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54102J256BD64": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5410x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "LPCOpen/lpc5410x/chip_5410x/inc/chip.h", "define": "CHIP_LPC5410X"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x00010000"}, "IRAM2": {"start": "0x02010000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/LPC5410x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "N572F072": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/N572Fxxx.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\N572F072_v3.svd", "processor": {"clock": "48000000"}}, "M453RG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F070CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F723VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F723xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32LG395F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG395F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F746BG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F746BE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "S6E2GK8H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gkxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC100LD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2GK8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2gkxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC4800-F144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4800_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0x1FFC0"}, "IRAM2": {"start": "0x1FFEE000", "size": "0x12000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L476VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L476VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L476xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x6.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMD20E18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B200F256GM48": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F256GM48.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAMD20E15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "M453LE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "LM3S3W26": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s3w26.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF468M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF468N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32L052K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2C29L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F733VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F733xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "TMPM330FYWFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF565L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B560L/Include/mb9b560l.h", "define": "MB9BF566L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003D000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD/MB9B560L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F469ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1401-F064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "Mini52XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG842F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG842F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F071CB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F071xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC220SE3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C1290NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1290NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F239F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F756ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20010000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F756xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NUC122SC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "EZR32LG330F64R55": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R55"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32LG/EZR32LG330F64R55.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N2B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N2C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151QC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC4800-E196x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "STM32L151QD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151QE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LM3S1620": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1620.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LM3S1621": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1621.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1150": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s1150.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1625": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1625.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FHI33/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114FHI33/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF417S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1315FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S8530": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s8530.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M453RE6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M451_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TMPM462F10FG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM462_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM46B.h", "define": "TMPM46BF10FG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x20030000", "size": "0x00400"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\M462.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "MB9BF417T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S8538": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s8538.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG842F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG842F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG842F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "SN32F248F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9U81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s9u81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L152VCxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1301-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MKV44F256xxx16": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKP256_4KB_SECTOR.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV46F16.h", "define": "MKV46F256xxx16"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKV44F16.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "STM32L462RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L462xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x2_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L011G4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC11U24FET48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ATSAMD21G15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32HG320F64R61": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "ATSAMDA1E14A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1E14A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F765ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "M0516ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC4072FET80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32HG320F64R68": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32HG320F64R69": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TM4C1237D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1237D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "M0516LDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F767ZG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F767ZI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F767xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x7_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO120LC2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "EFM32ZG110F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MK30DX64xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MK30D10.h", "define": "MK30DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K30_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK30D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG380F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG380F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4800-F100x2048": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_2048.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4800_series/Include/XMC4800.h", "define": "XMC4800_F100x1024"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x200000"}, "IRAM1": {"start": "0x20000000", "size": "0x3FFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "SVD/XMC4800.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "NANO102LB1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO112\\Include\\Nano1x2Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NANO112AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "XMC4700-E196x1536": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4800_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4800c_1536.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4700_series/Include/XMC4700.h", "define": "XMC4700_F100x1536"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x180000"}, "IRAM1": {"start": "0x20000000", "size": "0x2CFC0"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x180000"}}, "debug": "SVD/XMC4700.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "144000000"}}, "ISD9361": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9300_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/ISD9300_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9300_AP_145.FLM": {"default": "1", "ramsize": null, "size": "0x24400", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x24400"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "S6E2D55JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D5_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D5/Include/s6e2d5.h", "define": "S6E2D55JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S1D21": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1d21.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ARMv8MML_DP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "DP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "ATSAMD20G16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F212H5BB": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F212H5BB.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV71J21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMV71J21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMV71J20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV71/include/sam.h", "define": "__SAMV71Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV71J20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "STM32F446RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F446xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F446x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "XMC1302-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F769IG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_1024dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L475RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L475RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32G840F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G840F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G840F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKV56F1M0xxx24": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKV_P1024_8KB_SEC.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV58F24.h", "define": "MKV58F1M0xxx24"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IRAM2": {"start": "0x2F000000", "size": "0x00010000"}, "IROM1": {"start": "0x10000000", "size": "0x00100000"}}, "debug": "SVD/MKV56F24.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "240000000"}}, "STM32F769II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32L475RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1J16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1j16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1J11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1j11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC122LC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "EFM32HG210F64": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG210F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32HG/EFM32HG210F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S2616": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2616.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1823LB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC812M101JD20": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC812M101JTB16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC800.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F439BI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EZR32LG330F256R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F256R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC4500-E144x1024": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4500c_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/XMC4500_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x0C000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4500_series/Include/XMC4500.h", "define": "XMC4504_F100x512"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x100000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "SVD/XMC4500.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "EZR32LG330F256R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC230SD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TMPM373FWDUG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M373.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LPC1346FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_48.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xC000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xC000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EZR32LG330F256R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG330F256R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21G16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_64_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x00800", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x02000"}, "IRAM2": {"start": "0x30000000", "size": "0x01000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\SAML21\\ATSAML21G16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL27Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL27Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2432": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2432.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1317FBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "M2S150": {"core": "Cortex-M3", "vendor": "Microsemi:112", "algorithm": {"Flash/M2Sxxx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.1.0.61.pack", "compile": {"header": "CMSIS\\m2sxxx.h"}, "pdsc_file": "http://www.actel-ip.com/cwps/CMSIS-Core/Microsemi.M2Sxxx.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\M2Sxxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "166000000"}}, "STM32F100RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "TLE9843-2QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE9843_2.FLM": {"default": "1", "ramsize": null, "size": "0xD000", "ramstart": null, "start": "0x11000000"}, "Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xC000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1101LVUK": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L071VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L051K6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "M052ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M052_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L051K8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L051xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L051x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2DH5GJA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DH_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DH/Include/s6e2dh.h", "define": "S6E2DH5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DH.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "NANO100LE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "NUC123LC2AE1": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC123\\Include\\NUC123.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\NUC123AE_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "XMC1100-Q024x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAM4LS2B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4LS2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LS8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LS2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F098VC": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F098xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2C49L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C4/Include/s6e2c4.h", "define": "S6E2C4AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C4.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "Mini54LAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMDA0J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA0_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA0\\Include\\samda0.h", "define": "__SAMDA0J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA0\\ATSAMDA0J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S328": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s328.h", "define": "LM3S328"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\lm3s328.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "LPC11E67JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini51XLAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F746NE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F746xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x6_v1r1.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32ZG110F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "NUC472KI8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "EFM32LG380F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG380F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG380F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S801": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s801.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32ZG110F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG110F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG110F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S808": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s828.h", "define": "LM3S828"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s808.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072VZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F303K6": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "HT32F22366": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x3FC00", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F12365_66/ht32f12365_66.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x3FC00"}}, "debug": "SVD/HT32F12365_66.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "LPC11U14FHI33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKL17Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL17Z644.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F303K8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F303xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00003000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F303x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F072R8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F072xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x2.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F230H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F230H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "TM4C1237E6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1237E6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF364K": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF364L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360L/Include/mb9b360l.h", "define": "MB9BF366L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B360L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F215RG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F215RE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F215xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F21x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L071V8": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07x_64_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080C00"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L071xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1403-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "M452RC3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_40.FLM": {"default": "1", "ramsize": null, "size": "0xa000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0xa000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "TM4C1237E6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C1237E6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F723IC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F723xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "STM32F100R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F100R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_HD_VL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F100xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32L072VB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC54S618J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S618.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F469II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "NUC120LC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S5P56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s5p56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2H14G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H14F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2H14E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2H14X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2H1/Include/S6E2H1xG/s6e2h1xg.h", "define": "S6E2H16G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0x00004000"}, "IRAM2": {"start": "0x2003E000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/s6e2h1xe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F469IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MKL33Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL33Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F469IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK10DN128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S6753": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6753.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F070RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F070xB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L4A6QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L4A6xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32GG290F512": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG290F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/EFM32GG/EFM32GG290F512.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF115N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B110T\\mb9b110t.h", "define": "MB9BF118T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "STM32F417ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F417xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "HT32F52241": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F520xx/ht32f520xx_01.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFC00"}}, "debug": "SVD/HT32F52231_41.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32L072KZ": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_192.FLM": {"default": "1", "ramsize": null, "size": "0x00030000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00030000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "SN32F705J": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F700_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F700.h", "define": "SN32F700"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F7_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\SN32F700.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429II": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LPC11U24FHI33/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L072KB": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L07_8x_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L072xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00005000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L07x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L433RB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L433RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L433xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM4LC2A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4L_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4L/sam4l.h", "define": "__SAM4LC8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/SAM4L/ATSAM4LC2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F415ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F415xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F41x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MKL17Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL17Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6611": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6611.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC472KG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "TM4C123BH6PZ": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123BH6PZ.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMD21E15B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1402-F064x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21E15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1114JHN33/333": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_56.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0xE000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xE000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32G290F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G290F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G290F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "NUC220SD2AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC200\\Include\\NUC200Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC200AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG942F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG942F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG942F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM36BF10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00040800"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M36B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LM3S9971": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s9971.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32TG825F8": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG825F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32TG/EFM32TG825F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9AF111K": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A310_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xK.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF111N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF111M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF111L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx01_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A110A\\mb9a110n.h", "define": "MB9AF116N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF11xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F405RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F405xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "MK12DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK12D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1120FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1120_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/NM1120_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1120_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\NM1120AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "XMC1201-T038x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "AC33M3064": {"core": "Cortex-M3", "vendor": "ABOV Semiconductor:126", "algorithm": {"AC33Mx064/Flashloader/AC33Mx064_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.1.2.1.pack", "compile": {"header": "AC33Mx064\\Core\\include\\AC33Mx064.h"}, "pdsc_file": "http://www.abov.co.kr/data/mds/PACK/ABOV.CM3_DFP.pdsc", "memory": {}, "debug": "AC33Mx064\\SVD\\AC33Mx064.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S2948": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2948.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9D81": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d81.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F407ZE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "NANO110RC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F407ZG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EZR32WG330F256R67": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R67.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F256R60": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R60"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R60.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F256R61": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R61.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK10DX128xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EZR32WG330F256R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM470FYFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\M470.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32GG232F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG232F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG232F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32WG330F256R69": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32WG/EZR32WG330F256R69.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF164L": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_512.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160L/Include/mb9b160l.h", "define": "MB9BF166L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003E000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MB9B160L.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "EFM32LG280F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG280F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1811": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1811.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32W108C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32W108_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32W108_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\stm32w108xx.h", "define": "STM32W108HB"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32W1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD\\STM32W108.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F103R4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1816": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1816.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103R6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F437VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F103R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM343FEXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM343_768.FLM": {"default": "1", "ramsize": null, "size": "0x000C0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM343.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x000C0000"}}, "debug": "SVD/M343.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC240LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32G890F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G890F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G890F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32WG230F64R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG230F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32WG/EZR32WG230F64R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG295F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG295F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG295F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L151VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_512_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000028", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_512_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00014000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_384_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000020", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32L1xx_384_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00003000", "ramstart": null, "start": "0x08080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L15xC.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L151VB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1301-Q040x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F101ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x14000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "LPC1311FHN33/01": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F101ZD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "STM32F101ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "SVD/STM32F101xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "36000000"}}, "MB9BF416T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF416R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF416S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC1112FD20/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF468R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20038000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9AF342M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF342L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9AF342N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A340NA\\mb9a340n.h", "define": "MB9AF344N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9AF34xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "SN32F249F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F410TB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F410Tx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "CMSIS/SVD/STM32F410xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "EFM32ZG108F4": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00001000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "EZR32LG330F128R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R68": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R68"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R68.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20E16": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMD20\\ATSAMD20E16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120LD3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32LG330F128R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R61": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R61"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R61.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32LG390F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG390F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG390F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG330F128R63": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32LG/EZR32LG330F128R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32ZG108F8": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32ZG.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32ZG/Include/em_device.h", "define": "EFM32ZG108F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32ZGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/EFM32ZG/EFM32ZG108F8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC1402-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2CC9J0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32F051K8": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM381FWDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM381_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM384.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M381.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "STM32F051K6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC4074FBD80": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.2.0.0.pack", "compile": {"header": "Device/Include/LPC407x_8x_177x_8x.h", "define": "CORE_M4"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC408x_7x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F051K4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F051x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11U24FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1800"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1330LD2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1330_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NM1330_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1330_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NM1330AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF217T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF217S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF21xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC122ZC1AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC122\\Include\\NUC122.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC122_v1.svd", "processor": {"fpu": "FPU", "clock": "60000000"}}, "MB9BF104N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx04_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B100A\\mb9b100r.h", "define": "MB9BF106R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF10xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MKW31Z512xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKWxxZ_P512_2KB_SEC.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW31Z4.h", "define": "MKW31Z512xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MKW31Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S6965": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000B800"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6965.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1402-Q048x0200": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x32000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF516N": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF51xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NUC100RD2DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32L151V8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L1xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F103RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103RD": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x60000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1201-T028x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "STM32F107RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F107RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_CL.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_CL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/STM32F107xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LPC1518JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LPC1548JBD100": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "LM4F210H5QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F232H5BB.h", "define": "LM4F232"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F210H5QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32LG842F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG842F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG842F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1301-T038x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF418S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF41xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "S6E2C28L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "M451VD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF418T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B410T\\mb9b410t.h", "define": "MB9BF418T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF41xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "NANO120VD3AN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100AN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100AN_v1.svd", "processor": {"fpu": "FPU", "clock": "32000000"}}, "STM32L475QE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L475xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IRAM2": {"start": "0x10000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32L151VBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L151xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "ARMv8MML": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h", "define": "ARMv8MML_DSP_DP"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMv8MML.svd", "processor": {"fpu": "NO_FPU", "endianness": "Configurable", "clock": "10000000"}}, "S6E2G26H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2G2XX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2G2/Include/S6E2G2xJ/s6e2g2xj.h", "define": "S6E2G28J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2g2xh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM4F112H5QD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F112H5QD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54605J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54605.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "LM3S1637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Z32F38412ALS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F3841.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F3841.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F3841.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "MK10DN64xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM4F112H5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_256.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LM4F112H5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LPC54618J512BD208": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54618.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F429VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Mini52TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LPC1112LVFHN24/003": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x07E0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U68JBD64": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_160.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32WG395F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG395F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG395F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MKL03Z32xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P32_48MHZ_KL03.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00008000", "ramstart": "0x1FFFFE00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFE00", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/MKL03Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKL36Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL36Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC43S37": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC18xx43xx_512_BA.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1A000000"}, "Flash/LPC18xx43xx_512_BB.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x1B000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.2.7.0.pack", "compile": {"header": "Device/Include/LPC43xx.h", "define": "CORE_M0SUB"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC4300_DFP.pdsc", "memory": {"IROM2": {"start": "0x1B000000", "size": "0x80000"}, "IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IRAM2": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x1A000000", "size": "0x80000"}}, "debug": "SVD/LPC43xx.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "204000000"}}, "XMC1202-T028x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "Generic_NUC100_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG890F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG890F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG890F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKM34Z256xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKMP256_2KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.1.3.0.pack", "compile": {"header": "Device/Include/MKM34Z7.h", "define": "MKM34Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KMxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKM34Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "EFM32WG280F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG280F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG280F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4C8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}, "Flash/ATSAM4C_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4C/sam4c.h", "define": "__SAM4C16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4C/ATSAM4C8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "EFM32LG290F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG290F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F779II": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32PG1B200F128GM48": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F128GM48.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "MK21FX512Axxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK21FA12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F030F4": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F030xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F0x0.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG990F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG990F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG990F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32TG225F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG225F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG225F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL15Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG330F64": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG330F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32WG/EFM32WG330F64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "MK66FX1M0xxx18": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P1M0.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}, "Flash/MKD256_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK66F18.h", "define": "MK66FX1M0xxx18"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K60_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00030000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/MK66F18.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2HG6G": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxg.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG6F": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxf.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "S6E2HG6E": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2HG6X0A.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2HG/Include/S6E2HGxG/s6e2hgxg.h", "define": "S6E2HG6G"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF8000", "size": "0x00008000"}, "IRAM2": {"start": "0x2003C000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2hgxe.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F413CH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "S6E2C2AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C2/Include/s6e2c2.h", "define": "S6E2C2AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C2.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "ATSAMC20J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC20\\Include\\samc20.h", "define": "__SAMC20J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC20\\ATSAMC20J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9AFA41M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9AA40NA\\mb9aa40n.h", "define": "MB9AFA44N"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3LowPower_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AFA4xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "EFM32G842F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G842F128"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32G/EFM32G842F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKL25Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL28Z7.h", "define": "MKL28Z512xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL25Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1W16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s1w16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F733ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F733xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "Mini51TAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "LM4F112C4QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F112C4QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SN32F238F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1114LVFHN24/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xxLV\\LPC11xxLV.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11xxLV_LPC111x_LV.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NUC100RC1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC11U67JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11U6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO110KE3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_123.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F779BI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC11U24FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2793": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2793.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "XMC1401-Q048x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "CMSDK_ARMv8MBL": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MBL/Include/CMSDK_ARMv8MBL.h", "define": "CMSDK_ARMv8MBL"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MBL.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "STM32F469VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F469VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F469VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2C58H0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "NUC442VG8AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC400_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC400_LD_16.FLM": {"default": "0", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC400_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\NUC400_v1.svd", "processor": {"fpu": "FPU", "clock": "84000000"}}, "S6E2C3AH0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C3/Include/s6e2c3.h", "define": "S6E2C3AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S628": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s628.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32GG895F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG895F1024"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG895F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32JG1B200F128GM32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32JG1B/Include/em_device.h", "define": "EFM32JG1B200F256GM32"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32JG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32JG1B/EFM32JG1B200F128GM32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "38400000"}}, "ATSAMS70N19": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00040000"}, "IROM1": {"start": "0x00400000", "size": "0x00080000"}}, "debug": "svd/ATSAMS70N19.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "NUC120LE3DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F779AI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F779xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "EFM32G200F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32G/Include/em_device.h", "define": "EFM32G200F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32Gxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32G/EFM32G200F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1752": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1751": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1756": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_256.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x40000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1754": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x2007C000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L152RBxxA": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L152xCA"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L15xxxA.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L011F3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1759": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "LPC1758": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC_IAP_512.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x80000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.2.3.0.pack", "compile": {"header": "Device/Include/LPC17xx.h", "define": "LPC175x_6x"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1700_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IRAM2": {"start": "0x2007C000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/LPC176x5x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "LPC1342FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32L011F4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32PG1B200F256GM48": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/GECKOP2.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.1.0.0.pack", "compile": {"header": "Device/EFM32PG1B/Include/em_device.h", "define": "EFM32PG1B200F256GM48"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32PG1B_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32PG1B/EFM32PG1B200F256GM48.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "38400000"}}, "LM3S5739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5737": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5737.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3U1E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3U_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3U/Include/sam3u.h", "define": "__SAM3U4E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x20080000", "size": "0x00002000"}, "IROM1": {"start": "0x00080000", "size": "0x00010000"}}, "debug": "SVD/SAM3U/ATSAM3U1E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "MKE06Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE06Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE06Z4.h", "define": "MKE06Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE06Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S5732": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5732.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F207VE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F207xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "M0518LC2AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M0518_AP_36.FLM": {"default": "1", "ramsize": null, "size": "0x9000", "ramstart": null, "start": "0x00000000"}, "Flash/M0518_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M0518_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M0518\\Include\\M0518.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x9000"}}, "debug": "SVD\\Nuvoton\\M0518AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EFM32LG232F128": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG232F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32LG/EFM32LG232F128.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TLE9843QX": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/TLE984x_OPT.FLM": {"default": "1", "ramsize": null, "size": "4", "ramstart": null, "start": "0x10FFFFFC"}, "Flash/TLE9843.FLM": {"default": "1", "ramsize": null, "size": "0xC000", "ramstart": null, "start": "0x11000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\TLE984x.h", "define": "TLE9845QX"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.TLE984x_DFP.pdsc", "memory": {"IROM2": {"start": "0x10FFFFFC", "size": "4"}, "IRAM1": {"start": "0x18000000", "size": "0x1000"}, "IROM1": {"start": "0x11000000", "size": "0xB000"}}, "debug": "SVD\\TLE984x.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "LM4F132E5QC": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LM4F132E5QC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "SKEAZN8xxx4": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKE04Zxxx_P8KB.FLM": {"default": "1", "ramsize": "0x400", "size": "0x2000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\SKEAZN642.h", "define": "SKEAZN64xxx2"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KEAxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x400"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\SKEAZN84.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "20000000"}}, "LM3S8962": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8962.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M4LEDRG6AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "STM32F413ZH": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_1536.FLM": {"default": "1", "ramsize": null, "size": "0x00180000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F413xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00180000"}}, "debug": "CMSIS/SVD/STM32F413.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "NANO100KD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F469AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F469xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F407VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "XMC1100-Q024x0008": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x2000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2D35JAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2D3_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2D3/Include/s6e2d3.h", "define": "S6E2D35JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2D3.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F723ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F723xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x3_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC11E37FBD48/501": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S5G51": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_384.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00060000"}}, "debug": "SVD\\lm3s5g51.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMDA1J16A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J16A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2730": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2730.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2739": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2739.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C123FH6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_256.FLM": {"default": "1", "ramsize": null, "size": "0x040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x040000"}}, "debug": "SVD/TM4C123/TM4C123FH6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s1911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK20DX64xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK20D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK20DX64xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK20D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF329S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B320T\\mb9b320t.h", "define": "MB9BF329T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF32xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "MK11DX128Axxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00010000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK11DA5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1227FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LPC12xx\\LPC122x.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1200_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC122x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "45000000"}}, "LM3S6618": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s6618.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L100RC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_256_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00001000", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_256_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000018", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "STM32L100RB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002800"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "XMC1201-Q040x0032": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x8000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "M054ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "M054ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF167R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "STM32F373V8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LPC11U36FBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x18000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "HT32F2755": {"core": "Cortex-M3", "vendor": "Holtek:106", "algorithm": {"ARM/Flash/HT32F.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "ARM/Flash/HT32F_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0400", "ramstart": null, "start": "0x1FF00000"}}, "debug-interface": [], "pack_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.1.0.5.pack", "compile": {"header": "ARM/INC/Holtek/HT32F175x_275x/ht32f175x_275x.h"}, "pdsc_file": "http://mcu.holtek.com.tw/pack/Holtek.HT32_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x1FC00"}}, "debug": "SVD/HT32F175x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM366FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M366.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S2139": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s2139.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "TM4C1230D5PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_64.FLM": {"default": "1", "ramsize": null, "size": "0x010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x006000"}, "IROM1": {"start": "0x00000000", "size": "0x010000"}}, "debug": "SVD/TM4C123/TM4C1230D5PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAM3N2A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00400000", "size": "0x00020000"}}, "debug": "SVD/SAM3N/ATSAM3N2A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF167N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "MB9BF167M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B160R/Include/mb9b160r.h", "define": "MB9BF168R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B160R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "LM3S6100": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "S6E2GH6H": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2ghxh.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "S6E2GH6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2ghxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32TG108F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG108F4"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG108F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC834M101FHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00008000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC832M101FDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/LPC83x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "ATSAM3X8H": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8H.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "MKL15Z64xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_48MHZ.FLM": {"default": "1", "ramsize": "0x00002000", "size": "0x00010000", "ramstart": "0x1FFFF800", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF800", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MKL15Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "S6E2DF5GAA": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2DF_384.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00060000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2DF/Include/s6e2df.h", "define": "S6E2DF5JAA"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {}, "debug": "SVD/S6E2DF.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM3X8E": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8E.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "ATSAM3X8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3X_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00080000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3XA/Include/sam3xa.h", "define": "__SAM3X8H__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x000C0000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x20080000", "size": "0x00008000"}, "IROM1": {"start": "0x00080000", "size": "0x00040000"}}, "debug": "SVD/SAM3XA/ATSAM3X8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "84000000"}}, "Apollo_512_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "TM4C1292NCPDT": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1292NCPDT.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "M0516LBN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM4F110C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F110C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F373VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F373VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F373xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32GG980F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG980F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG980F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1112FDH20/102": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "M054ZDN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M054_AP_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\Nuvoton\\M051DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F407IE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "EFM32HG321F32": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32HG/Include/em_device.h", "define": "EFM32HG321F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32HGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32HG/EFM32HG321F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F407IG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F40xxx_41xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x04", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F407xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "168000000"}}, "LPC1115FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L100R8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L1xx_128_EEPROM.FLM": {"default": "0", "ramsize": null, "size": "0x00000800", "ramstart": null, "start": "0x08080000"}, "Flash/STM32L1xx_128_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FF80000"}, "Flash/STM32L1xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.1.2.0.pack", "compile": {"header": "Device/Include/stm32l1xx.h", "define": "STM32L100xC"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32L100.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EZR32HG320F64R63": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R63.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF318S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF318T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx08_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MKL05Z8xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P8_48MHZ.FLM": {"default": "1", "ramsize": "0x00000400", "size": "0x00002000", "ramstart": "0x1FFFFF00", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL05Z4.h", "define": "MKL05Z32xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFF00", "size": "0x00000400"}, "IROM1": {"start": "0x00000000", "size": "0x00002000"}}, "debug": "SVD/MKL05Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "EFM32WG332F128": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EFM32WG/EFM32WG332F128.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM4SD16C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SD16C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4SD16B": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4S_GPNVM.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFFFF0"}, "Flash/ATSAM4SD_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4S/sam4s.h", "define": "__SAM4SD32C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IROM2": {"start": "0x00480000", "size": "0x80000"}, "IRAM1": {"start": "0x20000000", "size": "0x28000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4S/ATSAM4SD16B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "SN32F237F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F230_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F230"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x7FFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO120SD3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAMD21E15BU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21E15BU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC240LE3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC200_AP_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/NUC200_LD_8.FLM": {"default": "0", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC230_240\\Include\\NUC230_240.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\Nuvoton\\NUC200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "S6E2GH8J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GHXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00100000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GH/Include/S6E2GHxJ/s6e2ghxj.h", "define": "S6E2GH8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/s6e2ghxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MB9BF216T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B210T\\mb9b210t.h", "define": "MB9BF218T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF21xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LPC11C14FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Cxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103C6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F103C4": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_16.FLM": {"default": "1", "ramsize": null, "size": "0x4000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1800"}, "IROM1": {"start": "0x08000000", "size": "0x4000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK50DX128xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MK50D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S6432": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s6432.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F103C8": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x10000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Apollo_128_BGA": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "MB9BF129S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF12xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "LM3S618": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s618.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NM1821FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "MB9BF129T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B520T_ROM1.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00508000"}, "Flash/MB9B520T_1536.FLM": {"default": "1", "ramsize": null, "size": "0x180000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B120T\\mb9b120t.h", "define": "MB9BF129T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00508000", "size": "0x10000"}, "IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IRAM2": {"start": "0x1FFE8000", "size": "0x18000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD\\MB9BF12xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "60000000"}}, "LM3S2950": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2950.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S613": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s613.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S612": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s612.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S611": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s611.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MB9BF517S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF51xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF517T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx07_768.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B510T\\mb9b510t.h", "define": "MB9BF518T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD\\MB9BF51xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9D92": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d92.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S615": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s628.h", "define": "LM3S628"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\lm3s615.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S9D90": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00018000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s9d90.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F479NI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "SN32F247F": {"core": "Cortex-M0", "vendor": "SONiX:110", "algorithm": {"Flash/SN32F240_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.1.2.3.pack", "compile": {"header": "Device\\Include\\SN32F240.h", "define": "SN32F240"}, "pdsc_file": "http://liveupdate.sonix.com.tw/sonix/develop_tool/MCU/DFP/SONiX.SN32F2_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0xFFFC"}}, "debug": "SVD\\SN32F240.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1627": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1627.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAM3SD8B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00440000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3SD8/ATSAM3SD8B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "ATSAM3SD8C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3SD8/Include/sam3sd8.h", "define": "__SAM3SD8C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IROM2": {"start": "0x00440000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0x10000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3SD8/ATSAM3SD8C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "STM32F301C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F301x8"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ARMCM33_DSP_FP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack", "compile": {"header": "Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h", "define": "ARMCM33_DSP_FP_TZ"}, "pdsc_file": "http://www.keil.com/pack/ARM.CMSIS.pdsc", "memory": {}, "debug": "Device/ARM/SVD/ARMCM33.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "10000000"}}, "S6E2CCAL0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2CC/Include/s6e2cc.h", "define": "S6E2CCAL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2CC.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "MB9AF121L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9A420L_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9A120L\\mb9a120l.h", "define": "MB9AF121L"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\MB9AF12xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LPC1114FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "XMC1202-T016x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF522L": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xL.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "S6E2C1AJ0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C1/Include/s6e2c1.h", "define": "S6E2C1AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFD0000", "size": "0x30000"}, "IROM1": {"start": "0x00000000", "size": "0x200000"}}, "debug": "SVD/S6E2C1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "STM32L4A6RG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L4A6xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MB9BF316S": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xS.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF316R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9xFxxx_32WF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x200C0000"}, "Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IROM2": {"start": "0x200C0000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "MB9BF316T": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx06_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B310T\\mb9b310t.h", "define": "MB9BF318T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x8000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD\\MB9BF31xT.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "144000000"}}, "LM3S9L97": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s9u96.h", "define": "LM3S9U96"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s9l97.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103CB": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MKL33Z256xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P256_48MHZ_KL43.FLM": {"default": "1", "ramsize": "0x800", "size": "0x00040000", "ramstart": "0x1FFFE000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL36Z4.h", "define": "MKL36Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFE000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MKL33Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1401-Q048x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "MB9BF500R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BF500_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B500B\\mb9b500r.h", "define": "MB9BF506R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\MB9BF50xN.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S6911": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6911.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F722VC": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x40000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x40000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NM1824FB0AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1820_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1820_AP_17_5.FLM": {"default": "1", "ramsize": null, "size": "0x4600", "ramstart": null, "start": "0x00000000"}, "Flash/NM1820_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\AU9110\\Include\\AU91xx.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x4600"}}, "debug": "SVD\\Nuvoton\\NM1820AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "STM32F722VE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F722xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "NANO120KC2BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "ATSAMS70Q20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70Q20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "MK50DX256xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00040000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK50D10.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "100000000"}}, "TMPM475FDFG": {"core": "Cortex-M4", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM470_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.1.2.0.pack", "compile": {"header": "Device\\Include\\TMPM475.h", "define": "TMPM475FDFG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x20008000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\M475.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S3749": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s3z26.h", "define": "LM3S3Z26"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s3749.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L052T6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L052xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L052x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MB9BF305R": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9BFx05_384.FLM": {"default": "1", "ramsize": null, "size": "0x60000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MB9B300B\\mb9b300r.h", "define": "MB9BF306R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3HighPerformance_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x6000"}, "IRAM2": {"start": "0x1FFFA000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x60000"}}, "debug": "SVD\\MB9BF30xR.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "M453SD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "ATSAMC21J17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAMC21\\ATSAMC21J17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F038E6": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F038xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM4F120C4QR": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM4F_64.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM4F_DFP.1.0.0.pack", "compile": {"header": "Device\\Include\\LM4F132H5QD.h", "define": "LM4F132"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM4F_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x6000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LM4F120C4QR.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "EFM32WG290F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG290F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG290F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E14FBD48/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2800"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\LPC11Exx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "TM4C1294NCZAD": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C129_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C129/TM4C129.h", "define": "TM4C129XNCZAD"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x040000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "SVD/TM4C129/TM4C1294NCZAD.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "LM3S5R31": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s5r31.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "S6E2C59L0A": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2CC_MACRO0_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x2003C000", "start": "0x00000000"}, "Flash/S6E2CC_MACRO1_1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x080000", "ramstart": "0x2003C000", "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2C5/Include/s6e2c5.h", "define": "S6E2C5AL0A"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFE0000", "size": "0x20000"}, "IROM1": {"start": "0x00000000", "size": "0x180000"}}, "debug": "SVD/S6E2C5.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "200000000"}}, "LM3S5C56": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s5c56.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103ZF": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0xC0000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "EFM32WG980F256": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.1.3.0.pack", "compile": {"header": "Device/EFM32WG/Include/em_device.h", "define": "EFM32WG980F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32WGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32WG/EFM32WG980F256.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L451RE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK21FX512xxx10": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK21F10.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "100000000"}}, "STM32L451RC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L451xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32L4x1_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "MK21FX512xxx12": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MKD128_4KB_SECTOR.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P512X.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MK28F15.h", "define": "MK28FN2M0xxx15"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K20_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00020000"}, "IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IRAM2": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/MK21F12.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "ATSAM4CMP8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4C_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x01000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/SAM4CM/Include/sam4cm.h", "define": "__SAM4CMS16C_1__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20100000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD/SAM4CM/ATSAM4CMP8C_0.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "TMPM361FYFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/M361.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LPC11U12FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x4000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKV31F256xxx12": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MK_P256.FLM": {"default": "1", "ramsize": "0x0800", "size": "0x40000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/MKV31F51212.h", "define": "MKV31F512xxx12"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KVxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFC000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD/MKV31F25612.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "STM32L496QG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L496xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMD21G17AU": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G17AU.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "MKE14Z128xxx7": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE1x_P256_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}, "Flash/MKE1x_D32_2KB_SEC.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00008000", "ramstart": "0x20000000", "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE15Z7.h", "define": "MKE15Z256xxx7"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE14Z7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MB9BF467M": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "XMC1302-T038x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "S6E2GK6J": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/S6E2GKXX0A1024KB.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x20040000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/S6E2GK/Include/S6E2GKxJ/s6e2gkxj.h", "define": "S6E2GK8J"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFF0000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/s6e2gkxj.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ISD9130": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\ISD9100_v3.svd", "processor": {"clock": "48000000"}}, "MB9BF467N": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B460R/Include/mb9b460r.h", "define": "MB9BF468R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B460R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAM3N4B": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3N/ATSAM3N4B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N4C": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x06000"}, "IROM1": {"start": "0x00400000", "size": "0x40000"}}, "debug": "SVD/SAM3N/ATSAM3N4C.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAM3N4A": {"core": "Cortex-M3", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM3N_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM3_DFP.1.2.0.pack", "compile": {"header": "Device/SAM3N/Include/sam3n.h", "define": "__SAM3N4C__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x00400000", "size": "0x00040000"}}, "debug": "SVD/SAM3N/ATSAM3N4A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM068FWXBG": {"core": "Cortex-M0", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM06x_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.1.2.0.pack", "compile": {"header": "Device/Include/TMPM068.h", "define": "TMPM068FWXBG"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM0_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/M068.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "LM3S2918": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s2918.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S1608": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1608.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Z32F06410AKS": {"core": "Cortex-M3", "vendor": "Zilog:89", "algorithm": {"Flash/Z32F0641.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.1.0.2.pack", "compile": {"header": "Device/Include/Z32F0641.h"}, "pdsc_file": "http://www.ixys.com/Zilog/packs/Zilog.ZNEO32_DFP.pdsc", "memory": {}, "debug": "SVD/Z32F0641.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LM3S1607": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1607.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F439VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "MK50DX256xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}, "Flash/MK_P256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.1.2.0.pack", "compile": {"header": "Device/Include/MK53D10.h", "define": "MK53DX256xxx10"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K50_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IRAM2": {"start": "0x1FFF8000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/MK50D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "TMPM330FDFG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM330_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM333.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M330.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "LM3S1601": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s1601.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F302VC": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x08000000", "size": "0x00040000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302VB": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00006000"}, "IROM1": {"start": "0x08000000", "size": "0x00020000"}}, "debug": "SVD/STM32F30x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S5656": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5656.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "MWPR1516xxx": {"core": "Cortex-M0+", "vendor": "Freescale:78", "algorithm": {"Flash/MKPR1516_P16KB.FLM": {"default": "1", "ramsize": "0x800", "size": "0x4000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWPR1516_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\MWPR1516.h", "define": "MWPR1516xxx"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWPR1516_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFFC00", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x4000"}}, "debug": "SVD\\MWPR1516.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "STM32F302VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F302VD": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00060000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F302xE"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00060000"}}, "debug": "SVD/STM32F303xE.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F205ZC": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x18000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F769NI": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7xTCM_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048dual.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7xTCM_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x_2048.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x200000", "ramstart": "0x20020000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F769xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x200000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F7x9_v1r2.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "XMC1402-Q040x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "M058ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M058_AP_32.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M051\\Include\\M051Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LPC1548JBD64": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC15xx_128.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x20000", "ramstart": "0x02000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.1.2.0.pack", "compile": {"header": "LPCOpen/software/lpc_core/lpc_chip/chip_15xx/chip.h", "define": "LPC1549JBD100"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1500_DFP.pdsc", "memory": {"IRAM1": {"start": "0x02000000", "size": "0x5000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD/LPC15xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "75000000"}}, "M453RD3AE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M451_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/M451_AP_72.FLM": {"default": "1", "ramsize": null, "size": "0x12000", "ramstart": null, "start": "0x00000000"}, "Flash/M451_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\M451\\Include\\M451Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x12000"}}, "debug": "SVD\\Nuvoton\\M451_v1.svd", "processor": {"fpu": "FPU", "clock": "72000000"}}, "MB9BF367R": {"core": "Cortex-M4", "vendor": "Spansion:100", "algorithm": {"Flash/MB9B560_1024.FLM": {"default": "1", "ramsize": null, "size": "0xC0000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM4_DFP.1.5.1.pack", "compile": {"header": "Device/MB9B360R/Include/mb9b360r.h", "define": "MB9BF368R"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x2003A000", "size": "0xC000"}, "IRAM2": {"start": "0x1FFF4000", "size": "0xC000"}, "IROM1": {"start": "0x00000000", "size": "0xC0000"}}, "debug": "SVD/MB9B360R.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "160000000"}}, "ATSAMD21G17A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G17A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC120RD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32HG320F64R67": {"core": "Cortex-M0+", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32M0P.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.1.0.0.pack", "compile": {"header": "Device/EZR32HG/Include/em_device.h", "define": "EZR32HG320F64R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32HG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EZR32HG/EZR32HG320F64R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "24000000"}}, "XMC4400-F100x256": {"core": "Cortex-M4", "vendor": "Infineon:7", "algorithm": {"Flash/XMC4400_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x0C000000"}, "Flash/XMC4400c_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.2.7.1.pack", "compile": {"header": "Device/XMC4400_series/Include/XMC4400.h", "define": "XMC4402_F64x256"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC4000_DFP.pdsc", "memory": {"IROM2": {"start": "0x0C000000", "size": "0x40000"}, "IRAM1": {"start": "0x20000000", "size": "0xFFC0"}, "IRAM2": {"start": "0x1FFFC000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x40000"}}, "debug": "SVD/XMC4400.svd", "processor": {"fpu": "FPU", "endianness": "Little-endian", "clock": "120000000"}}, "LPC54S606J512ET180": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/LPC5460x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.2.2.0.pack", "compile": {"header": "Device/Include/LPC54S618.h", "define": "LPC54S618"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC54000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00028000"}, "IRAM2": {"start": "0x04000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/LPC54S606.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG940F256": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG940F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EFM32LG/EFM32LG940F256.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G18": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G18.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L496AG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32l4xx.h", "define": "STM32L496xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00050000"}, "IROM1": {"start": "0x08000000", "size": "0x00100000"}}, "debug": "SVD/STM32L4x6_v1r1.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F103T6": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F10x_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F10x_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack", "compile": {"header": "Device/Include/stm32f10x.h", "define": "STM32F10X_XL"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F1xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x2800"}, "IROM1": {"start": "0x08000000", "size": "0x8000"}}, "debug": "SVD/STM32F103xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "MK10DX64xxx5": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_50MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK10D5.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MK10DX64xxx7": {"core": "Cortex-M4", "vendor": "NXP:11", "algorithm": {"Flash/MK_P64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}, "Flash/MK_D32_72MHZ.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x10000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.1.2.1.pack", "compile": {"header": "Device/Include/MK12D5.h", "define": "MK12DX256xxx5"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_K10_DFP.pdsc", "memory": {"IROM2": {"start": "0x10000000", "size": "0x00008000"}, "IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x00002000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/MK10D7.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "Mini51ZAN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_AP_4.FLM": {"default": "1", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00000000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x1000"}}, "debug": "SVD\\Nuvoton\\MINI51AN_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "ATSAMD20G15": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G15.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G14": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G14.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD20G17": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD20_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.1.1.0.pack", "compile": {"header": "Device\\SAMD20\\Include\\samd20.h", "define": "__SAMD20J18__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD20_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\SAMD20\\ATSAMD20G17.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAMD21G15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMD21_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.1.2.0.pack", "compile": {"header": "Device\\SAMD21\\Include\\samd21.h", "define": "__SAMD21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMD21_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMD21\\ATSAMD21G15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "XMC1301-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "CMSDK_ARMv8MML_SP": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML_SP.svd", "processor": {"fpu": "SP_FPU", "endianness": "Configurable", "clock": "25000000"}}, "STM32L011G3": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_8.FLM": {"default": "1", "ramsize": null, "size": "0x00002000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L011xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00000800"}, "IROM1": {"start": "0x08000000", "size": "0x00002000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "TMPM375FSDMG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM37x_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM37A.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/M375.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "40000000"}}, "MB9BF522M": {"core": "Cortex-M3", "vendor": "Spansion:100", "algorithm": {"Flash/MB9AB40_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/MB9xFxxx_32DWF.FLM": {"default": "1", "ramsize": null, "size": "0x8000", "ramstart": null, "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.1.0.1.pack", "compile": {"header": "Device\\Include\\MB9B520T\\mb9b520t.h", "define": "MB9BF529T"}, "pdsc_file": "http://www.keil.com/pack/Keil.FM3Basic_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x2000"}, "IRAM2": {"start": "0x1FFFE000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\MB9BF52xM.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAMDA1J15A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMDA1_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMDA1\\Include\\samda1.h", "define": "__SAMDA1J16A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAMDA1_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD\\SAMDA1\\ATSAMDA1J15A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E66JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F765NG": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_1024.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x08000000"}, "CMSIS/Flash/STM32F7x_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x100000", "ramstart": "0x20020000", "start": "0x00200000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F765xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x100000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F7x5_v1r1.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "ATSAM4E8C": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAM4E_512.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM4_DFP.1.6.0.pack", "compile": {"header": "Device/Include/SAM4E/sam4e.h", "define": "__SAM4E8E__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM4_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x00400000", "size": "0x80000"}}, "debug": "SVD/SAM4E/ATSAM4E8C.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "120000000"}}, "XMC1202-T016x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1200_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1200_series/Include/XMC1200.h", "define": "XMC1202_T016x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1200.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1113FBD48/301": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "EFM32TG822F32": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.1.2.0.pack", "compile": {"header": "Device/EFM32TG/Include/em_device.h", "define": "EFM32TG822F8"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32TGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00008000"}}, "debug": "SVD/EFM32TG/EFM32TG822F32.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "LPC1113FBD48/303": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FBD48/302": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32L041C6": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_32.FLM": {"default": "1", "ramsize": null, "size": "0x00008000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00008000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "MKE04Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MKE04Zxxx_P128KB.FLM": {"default": "1", "ramsize": "0x00001000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.1.7.0.pack", "compile": {"header": "Device/Include/MKE04Z1284.h", "define": "MKE04Z128xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KExx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKE04Z1284.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32L041C4": {"core": "Cortex-M0+", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32L0xx_16.FLM": {"default": "1", "ramsize": null, "size": "0x00004000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.1.6.0.pack", "compile": {"header": "Device/Include/stm32l0xx.h", "define": "STM32L041xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32L0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00002000"}, "IROM1": {"start": "0x08000000", "size": "0x00004000"}}, "debug": "SVD/STM32L0x1.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32LG332F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG332F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG332F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "Mini52XZAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51X\\Include\\Mini51XSeries.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51XAE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S6938": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6938.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ATSAMS70N21": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_2048.FLM": {"default": "1", "ramsize": null, "size": "0x00200000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00200000"}}, "debug": "svd/ATSAMS70N21.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "ATSAMS70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMS7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.2.1.0.pack", "compile": {"header": "include/sam.h", "define": "__SAMS70Q20__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-S_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMS70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LM3S2637": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s2637.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "NANO100ND3BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Nano100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/Nano100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Nano100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NANO100BN\\Include\\Nano100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NANO100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "42000000"}}, "STM32F398VE": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x08000000", "size": "0x00080000"}}, "debug": "SVD/STM32F37x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F732ZE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F732xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LPC1345FHN33": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "STM32F429VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "Apollo_512_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x00000000", "size": "0x80000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "TMPM363F10FG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/M363.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "64000000"}}, "LM3S5651": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5651.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F732IE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F732xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S5652": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s5y36.h", "define": "LM3S5Y36"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD\\lm3s5652.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F429VI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F429xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F429x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "CMSDK_ARMv8MML": {"core": "Cortex-M0", "vendor": "ARM:82", "algorithm": {}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.1.6.0.pack", "compile": {"header": "Device/CMSDK_ARMv8MML/Include/CMSDK_ARMv8MML_DP.h", "define": "CMSDK_ARMv8MML_DP"}, "pdsc_file": "http://www.keil.com/pack/Keil.V2M-MPS2_CMx_BSP.pdsc", "memory": {}, "debug": "SVD/CMSDK_ARMv8MML.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "25000000"}}, "XMC1404-Q064x0128": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1400_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1400_series/Include/XMC1400.h", "define": "XMC1404_F064x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x20000"}}, "debug": "SVD/XMC1400.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1111FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1111FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_8.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x2000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "STM32F078RB": {"core": "Cortex-M0", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F0xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x0010", "ramstart": null, "start": "0x1FFFF800"}, "Flash/STM32F0xx_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/stm32f0xx.h", "define": "STM32F078xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F0xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/STM32F0x8.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "TMPM369FDXBG": {"core": "Cortex-M3", "vendor": "Toshiba:92", "algorithm": {"Flash/TMPM36x_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.1.4.0.pack", "compile": {"header": "Device/Include/TMPM36B.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.TMPM3_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD/M369.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S8971": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8971.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S8970": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s8971.h", "define": "LM3S8971"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s8970.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "MKW30Z160xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P160_48MHZ.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00028000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.1.5.0.pack", "compile": {"header": "Device/Include/MKW30Z4.h", "define": "MKW30Z160xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KWxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00005000"}, "IROM1": {"start": "0x00000000", "size": "0x00028000"}}, "debug": "SVD/MKW30Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC11E67JBD48": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_96_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Exx\\LPC11E6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x4000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11E6x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC11U37HFBD64/401": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_128.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x20000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11Uxx\\LPC11U6x.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20004000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\LPC11Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "ADSP-CM402BSWZ-EF": {"core": "Cortex-M4", "vendor": "Analog Devices:1", "algorithm": {"addon_mdk/Flash/CM40x_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x00080000", "ramstart": "0x10000000", "start": "0x18000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.1.1.0.pack", "compile": {"header": "inc/device.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.CM4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20010000", "size": "0x00010000"}, "IROM1": {"start": "0x18000000", "size": "0x00080000"}}, "debug": "addon_mdk/SVD/CM40x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "150000000"}}, "XMC1100-Q024x0016": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1100_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1100_series/Include/XMC1100.h", "define": "XMC1100_T038x0064"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x4000"}}, "debug": "SVD/XMC1100.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "ATSAMC21E18A": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAMC_256.FLM": {"default": "1", "ramsize": null, "size": "0x40000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAMC_256_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x02000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.1.0.0.pack", "compile": {"header": "Device\\SAMC21\\Include\\samc21.h", "define": "__SAMC21J18A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x08000"}, "IROM1": {"start": "0x00000000", "size": "0x40000"}}, "debug": "SVD\\SAMC21\\ATSAMC21E18A.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F205ZE": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x80000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "STM32F205ZG": {"core": "Cortex-M3", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F2xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F2xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x10", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F2xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.2.6.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h", "define": "STM32F205xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F2xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x20000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F20x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "120000000"}}, "MM32x103": {"core": "Cortex-M3", "vendor": "MindMotion:132", "algorithm": {"Flash/MM32x103_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x103_DFP.1.1.0.pack", "compile": {"header": "Device/Include/MM32x103.h", "define": "MM32x103_MD"}, "pdsc_file": "http://www.mindmotion.com.cn/Download/MDK_KEIL/MindMotion.MM32x103_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x5000"}, "IROM1": {"start": "0x08000000", "size": "0x20000"}}, "debug": "SVD/MM32x103.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "96000000"}}, "NM1100XAAE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NM1200_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NM1200_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}, "Flash/NM1200_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NM1200\\Include\\NM1200_NM1100.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\NM1200AE_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "EZR32LG230F256R69": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R69"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R69.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1113FHN33/202": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/203": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC1113FHN33/201": {"core": "Cortex-M0", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_24.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x6000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.1.4.0.pack", "compile": {"header": "Device\\Include\\LPC11xx\\LPC11xx.h", "define": "LPC1125"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1100_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x6000"}}, "debug": "SVD\\LPC111x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "LPC822M101JHI33": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/LPC8xx_16.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x00004000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC800_DFP.1.4.0.pack", "compile": {"header": "Device/Include/LPC8xx.h", "define": "LPC822M101JDH20"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC800_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x00001000"}, "IROM1": {"start": "0x00000000", "size": "0x00004000"}}, "debug": "SVD/LPC82x.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "30000000"}}, "STM32F479NG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F469_Quad_SPI.FLM": {"default": "1", "ramsize": null, "size": "0x2000000", "ramstart": null, "start": "0x90000000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F479xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x50000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F46_79x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "STM32F439VG": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}, "CMSIS/Flash/STM32F4xx_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F439xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x100000"}}, "debug": "CMSIS/SVD/STM32F439x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "EFM32LG995F64": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x00008000", "size": "0x00010000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.1.4.0.pack", "compile": {"header": "Device/EFM32LG/Include/em_device.h", "define": "EFM32LG995F64"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32LGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD/EFM32LG/EFM32LG995F64.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "ATSAML21J17B": {"core": "Cortex-M0+", "vendor": "Atmel:3", "algorithm": {"Flash/ATSAML21_128.FLM": {"default": "1", "ramsize": null, "size": "0x20000", "ramstart": null, "start": "0x00000000"}, "Flash/ATSAML21_128_EEPROM.FLM": {"default": "1", "ramsize": null, "size": "0x01000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.1.2.0.pack", "compile": {"header": "Device\\SAML21\\Include\\saml21.h", "define": "__SAML21J18B__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-L_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x04000"}, "IRAM2": {"start": "0x30000000", "size": "0x02000"}, "IROM1": {"start": "0x00000000", "size": "0x20000"}}, "debug": "SVD\\SAML21\\ATSAML21J17B.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1343FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_32.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x8000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IROM1": {"start": "0x00000000", "size": "0x8000"}}, "debug": "SVD/LPC13xx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "XMC1302-Q040x0064": {"core": "Cortex-M0", "vendor": "Infineon:7", "algorithm": {"Flash/XMC1300_200.FLM": {"default": "1", "ramsize": null, "size": "0x32000", "ramstart": null, "start": "0x10001000"}}, "debug-interface": [], "pack_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.2.5.1.pack", "compile": {"header": "Device/XMC1300_series/Include/XMC1300.h", "define": "XMC1302_Q040x0200"}, "pdsc_file": "http://dave.infineon.com/Libraries/CMSIS_PACK/Infineon.XMC1000_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3FFC"}, "IROM1": {"start": "0x10001000", "size": "0x10000"}}, "debug": "SVD/XMC1300.svd", "processor": {"fpu": "NO_FPU", "endianness": "Little-endian", "clock": "32000000"}}, "EFM32GG280F1024": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32GG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00100000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.2.3.0.pack", "compile": {"header": "Device/EFM32GG/Include/em_device.h", "define": "EFM32GG280F512"}, "pdsc_file": "http://www.keil.com/pack/Keil.EFM32GGxxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00020000"}, "IROM1": {"start": "0x00000000", "size": "0x00100000"}}, "debug": "SVD/EFM32GG/EFM32GG280F1024.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "STM32F437AI": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F4xx_2048.FLM": {"default": "1", "ramsize": null, "size": "0x200000", "ramstart": null, "start": "0x08000000"}, "CMSIS/Flash/STM32F4xx_OTP.FLM": {"default": "0", "ramsize": null, "size": "0x0210", "ramstart": null, "start": "0x1FFF7800"}, "CMSIS/Flash/STM32F42xxx_43xxx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x08", "ramstart": null, "start": "0x1FFFC000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h", "define": "STM32F437xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F4xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x30000"}, "IRAM2": {"start": "0x10000000", "size": "0x10000"}, "IROM1": {"start": "0x08000000", "size": "0x200000"}}, "debug": "CMSIS/SVD/STM32F437x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "180000000"}}, "ISD9341": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x18000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x4000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "MKL16Z128xxx4": {"core": "Cortex-M0+", "vendor": "NXP:11", "algorithm": {"Flash/MK_P128_48MHZ.FLM": {"default": "1", "ramsize": "0x00004000", "size": "0x00020000", "ramstart": "0x1FFFF000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.1.13.0.pack", "compile": {"header": "Device/Include/MKL17Z4.h", "define": "MKL17Z256xxx4"}, "pdsc_file": "http://www.keil.com/pack/Keil.Kinetis_KLxx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x1FFFF000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/MKL16Z4.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "NUC100LD1DN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100DN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "ISD9340": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/ISD9100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/ISD9100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x18000", "ramstart": null, "start": "0x00000000"}, "Flash/ISD9100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x3000"}, "IROM1": {"start": "0x00000000", "size": "0x18000"}}, "debug": "SVD\\Nuvoton\\ISD9300_v3.svd", "processor": {"clock": "48000000"}}, "Generic_M051_Series": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/M051_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/M0516_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}, "Flash/M051_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC400\\Include\\NUC472_442.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\M051AN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "TM4C123FE6PM": {"core": "Cortex-M4", "vendor": "Texas Instruments:16", "algorithm": {"Flash/TM4C123_128.FLM": {"default": "1", "ramsize": null, "size": "0x020000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.TM4C_DFP.1.1.0.pack", "compile": {"header": "Device/Include/TM4C123/TM4C123.h", "define": "TM4C123GH6ZXR"}, "pdsc_file": "http://www.keil.com/pack/Keil.TM4C_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x008000"}, "IROM1": {"start": "0x00000000", "size": "0x020000"}}, "debug": "SVD/TM4C123/TM4C123FE6PM.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "80000000"}}, "STM32F732RE": {"core": "Cortex-M7", "vendor": "STMicroelectronics:13", "algorithm": {"CMSIS/Flash/STM32F7x_512_TCM.FLM": {"default": "0", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x00200000"}, "CMSIS/Flash/STM32F7x2_512.FLM": {"default": "1", "ramsize": "0x1000", "size": "0x80000", "ramstart": "0x20010000", "start": "0x08000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F732xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "Apollo_64_WLCSP": {"core": "Cortex-M4", "vendor": "Ambiq Micro:120", "algorithm": {"Flash/Apollo.FLM": {"default": "1", "ramsize": "0x2000", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.0.9.2.pack", "compile": {"header": "Device/Include/system_Apollo2.h", "define": "APOLLO2_1024"}, "pdsc_file": "http://s3.asia.ambiqmicro.com/pack/AmbiqMicro.Apollo_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x04000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/Apollo.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "24000000"}}, "Mini52ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "EZR32WG330F128R63": {"core": "Cortex-M4", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32WG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00020000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32WG/Include/em_device.h", "define": "EZR32WG330F256R63"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32WG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00020000"}}, "debug": "SVD/EZR32WG/EZR32WG330F128R63.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "48000000"}}, "EZR32LG230F256R67": {"core": "Cortex-M3", "vendor": "Silicon Labs:21", "algorithm": {"Flash/EFM32LG.FLM": {"default": "1", "ramsize": "0x8000", "size": "0x00040000", "ramstart": "0x20000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.1.1.0.pack", "compile": {"header": "Device/EZR32LG/Include/em_device.h", "define": "EZR32LG230F256R67"}, "pdsc_file": "http://www.keil.com/pack/Keil.EZR32LG_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD/EZR32LG/EZR32LG230F256R67.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "48000000"}}, "LPC1317FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S1H11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1H16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1347FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S2410": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2410.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NUC100RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.0.9.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S6110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}}
\ No newline at end of file
Binary file bootloaders/REALTEK_RTL8195AM/ram_1_prepend.bin has changed
--- a/build.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/build.py	Thu Jun 22 11:12:28 2017 -0500
@@ -34,7 +34,6 @@
 from tools.options import extract_profile
 from tools.build_api import build_library, build_mbed_libs, build_lib
 from tools.build_api import mcu_toolchain_matrix
-from tools.build_api import static_analysis_scan, static_analysis_scan_lib, static_analysis_scan_library
 from tools.build_api import print_build_results
 from tools.settings import CPPCHECK_CMD, CPPCHECK_MSG_FORMAT
 from utils import argparse_filestring_type, args_error
@@ -69,17 +68,6 @@
                       default=False,
                       help="Compile the rpc library")
 
-    parser.add_argument("-e", "--eth",
-                      action="store_true", dest="eth",
-                      default=False,
-                      help="Compile the ethernet library")
-
-    parser.add_argument("-U", "--usb_host",
-                      action="store_true",
-                      dest="usb_host",
-                      default=False,
-                      help="Compile the USB Host library")
-
     parser.add_argument("-u", "--usb",
                       action="store_true",
                       dest="usb",
@@ -92,18 +80,6 @@
                       default=False,
                       help="Compile the DSP library")
 
-    parser.add_argument("-F", "--fat",
-                      action="store_true",
-                      dest="fat",
-                      default=False,
-                      help="Compile FS and SD card file system library")
-
-    parser.add_argument("-b", "--ublox",
-                      action="store_true",
-                      dest="ublox",
-                      default=False,
-                      help="Compile the u-blox library")
-
     parser.add_argument( "--cpputest",
                       action="store_true",
                       dest="cpputest_lib",
@@ -126,12 +102,6 @@
                       default=None,
                       help='For some commands you can use filter to filter out results')
 
-    parser.add_argument("--cppcheck",
-                      action="store_true",
-                      dest="cppcheck_validation",
-                      default=False,
-                      help="Forces 'cppcheck' static code analysis")
-
     parser.add_argument("-j", "--jobs", type=int, dest="jobs",
                       default=0, help="Number of concurrent jobs. Default: 0/auto (based on host machine's number of CPUs)")
     parser.add_argument("-N", "--artifact-name", dest="artifact_name",
@@ -187,22 +157,12 @@
     libraries = []
 
     # Additional Libraries
-    if options.rtos:
-        libraries.extend(["rtx", "rtos"])
     if options.rpc:
         libraries.extend(["rpc"])
-    if options.eth:
-        libraries.append("eth")
     if options.usb:
         libraries.append("usb")
-    if options.usb_host:
-        libraries.append("usb_host")
     if options.dsp:
         libraries.extend(["dsp"])
-    if options.fat:
-        libraries.extend(["fat"])
-    if options.ublox:
-        libraries.extend(["rtx", "rtos", "usb_host", "ublox"])
     if options.cpputest_lib:
         libraries.extend(["cpputest"])
 
@@ -220,84 +180,56 @@
 
     for toolchain in toolchains:
         for target in targets:
-            # CPPCHECK code validation
-            if options.cppcheck_validation:
+            tt_id = "%s::%s" % (toolchain, target)
+            if toolchain not in TARGET_MAP[target].supported_toolchains:
+                # Log this later
+                print "%s skipped: toolchain not supported" % tt_id
+                skipped.append(tt_id)
+            else:
                 try:
                     mcu = TARGET_MAP[target]
-                    # CMSIS and MBED libs analysis
                     profile = extract_profile(parser, options, toolchain)
-                    static_analysis_scan(
-                        mcu, toolchain, CPPCHECK_CMD, CPPCHECK_MSG_FORMAT,
-                        verbose=options.verbose, jobs=options.jobs,
-                        build_profile=profile)
+                    if options.source_dir:
+                        lib_build_res = build_library(options.source_dir, options.build_dir, mcu, toolchain,
+                                                    extra_verbose=options.extra_verbose_notify,
+                                                    verbose=options.verbose,
+                                                    silent=options.silent,
+                                                    jobs=options.jobs,
+                                                    clean=options.clean,
+                                                    archive=(not options.no_archive),
+                                                    macros=options.macros,
+                                                    name=options.artifact_name,
+                                                    build_profile=profile)
+                    else:
+                        lib_build_res = build_mbed_libs(mcu, toolchain,
+                                                    extra_verbose=options.extra_verbose_notify,
+                                                    verbose=options.verbose,
+                                                    silent=options.silent,
+                                                    jobs=options.jobs,
+                                                    clean=options.clean,
+                                                        macros=options.macros,
+                                                        build_profile=profile)
+
                     for lib_id in libraries:
-                        # Static check for library
-                        static_analysis_scan_lib(
-                            lib_id, mcu, toolchain, CPPCHECK_CMD,
-                            CPPCHECK_MSG_FORMAT,
-                            extra_verbose=options.extra_verbose_notify,
-                            verbose=options.verbose, jobs=options.jobs,
-                            clean=options.clean, macros=options.macros,
-                            build_profile=profile)
-                        pass
+                        build_lib(lib_id, mcu, toolchain,
+                                extra_verbose=options.extra_verbose_notify,
+                                verbose=options.verbose,
+                                silent=options.silent,
+                                clean=options.clean,
+                                macros=options.macros,
+                                    jobs=options.jobs,
+                                    build_profile=profile)
+                    if lib_build_res:
+                        successes.append(tt_id)
+                    else:
+                        skipped.append(tt_id)
                 except Exception, e:
                     if options.verbose:
                         import traceback
                         traceback.print_exc(file=sys.stdout)
                         sys.exit(1)
+                    failures.append(tt_id)
                     print e
-            else:
-                # Build
-                tt_id = "%s::%s" % (toolchain, target)
-                if toolchain not in TARGET_MAP[target].supported_toolchains:
-                    # Log this later
-                    print "%s skipped: toolchain not supported" % tt_id
-                    skipped.append(tt_id)
-                else:
-                    try:
-                        mcu = TARGET_MAP[target]
-                        profile = extract_profile(parser, options, toolchain)
-                        if options.source_dir:
-                            lib_build_res = build_library(options.source_dir, options.build_dir, mcu, toolchain,
-                                                        extra_verbose=options.extra_verbose_notify,
-                                                        verbose=options.verbose,
-                                                        silent=options.silent,
-                                                        jobs=options.jobs,
-                                                        clean=options.clean,
-                                                        archive=(not options.no_archive),
-                                                        macros=options.macros,
-                                                        name=options.artifact_name,
-                                                        build_profile=profile)
-                        else:
-                            lib_build_res = build_mbed_libs(mcu, toolchain,
-                                                        extra_verbose=options.extra_verbose_notify,
-                                                        verbose=options.verbose,
-                                                        silent=options.silent,
-                                                        jobs=options.jobs,
-                                                        clean=options.clean,
-                                                            macros=options.macros,
-                                                            build_profile=profile)
-
-                        for lib_id in libraries:
-                            build_lib(lib_id, mcu, toolchain,
-                                    extra_verbose=options.extra_verbose_notify,
-                                    verbose=options.verbose,
-                                    silent=options.silent,
-                                    clean=options.clean,
-                                    macros=options.macros,
-                                      jobs=options.jobs,
-                                      build_profile=profile)
-                        if lib_build_res:
-                            successes.append(tt_id)
-                        else:
-                            skipped.append(tt_id)
-                    except Exception, e:
-                        if options.verbose:
-                            import traceback
-                            traceback.print_exc(file=sys.stdout)
-                            sys.exit(1)
-                        failures.append(tt_id)
-                        print e
 
 
     # Write summary of the builds
--- a/build_api.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/build_api.py	Thu Jun 22 11:12:28 2017 -0500
@@ -17,14 +17,19 @@
 
 import re
 import tempfile
+import datetime
+import uuid
 from types import ListType
 from shutil import rmtree
-from os.path import join, exists, dirname, basename, abspath, normpath
-from os import linesep, remove
+from os.path import join, exists, dirname, basename, abspath, normpath, splitext
+from os.path import relpath
+from os import linesep, remove, makedirs
 from time import time
+from intelhex import IntelHex
+from json import load, dump
 
 from tools.utils import mkdir, run_cmd, run_cmd_ext, NotSupportedException,\
-    ToolException, InvalidReleaseTargetException
+    ToolException, InvalidReleaseTargetException, intelhex_offset
 from tools.paths import MBED_CMSIS_PATH, MBED_TARGETS_PATH, MBED_LIBRARIES,\
     MBED_HEADER, MBED_DRIVERS, MBED_PLATFORM, MBED_HAL, MBED_CONFIG_FILE,\
     MBED_LIBRARIES_DRIVERS, MBED_LIBRARIES_PLATFORM, MBED_LIBRARIES_HAL,\
@@ -102,6 +107,8 @@
     report - the report to append to
     result - the result to append
     """
+    result["date"] = datetime.datetime.utcnow().isoformat()
+    result["uuid"] = str(uuid.uuid1())
     target = result["target_name"]
     toolchain = result["toolchain_name"]
     id_name = result['id']
@@ -121,7 +128,7 @@
         src_paths = [src_paths]
 
     # Pass all params to the unified prepare_resources()
-    toolchain = prepare_toolchain(src_paths, target, toolchain_name)
+    toolchain = prepare_toolchain(src_paths, None, target, toolchain_name)
 
     # Scan src_path for config files
     resources = toolchain.scan_resources(src_paths[0])
@@ -145,6 +152,8 @@
 
         prev_features = features
     toolchain.config.validate_config()
+    if toolchain.config.has_regions:
+        _ = list(toolchain.config.regions)
 
     cfg, macros = toolchain.config.get_config_data()
     features = toolchain.config.get_features()
@@ -275,8 +284,33 @@
 
     return mbed_official_release
 
+def add_regions_to_profile(profile, config, toolchain_class):
+    """Add regions to the build profile, if there are any.
 
-def prepare_toolchain(src_paths, target, toolchain_name,
+    Positional Arguments:
+    profile - the profile to update
+    config - the configuration object that owns the region
+    toolchain_class - the class of the toolchain being used
+    """
+    if not profile:
+        return
+    regions = list(config.regions)
+    for region in regions:
+        for define in [(region.name.upper() + "_ADDR", region.start),
+                       (region.name.upper() + "_SIZE", region.size)]:
+            profile["common"].append("-D%s=0x%x" %  define)
+    active_region = [r for r in regions if r.active][0]
+    for define in [("MBED_APP_START", active_region.start),
+                   ("MBED_APP_SIZE", active_region.size)]:
+        profile["ld"].append(toolchain_class.make_ld_define(*define))
+
+    print("Using regions in this build:")
+    for region in regions:
+        print("  Region %s size 0x%x, offset 0x%x"
+              % (region.name, region.size, region.start))
+
+
+def prepare_toolchain(src_paths, build_dir, target, toolchain_name,
                       macros=None, clean=False, jobs=1,
                       notify=None, silent=False, verbose=False,
                       extra_verbose=False, config=None,
@@ -285,7 +319,7 @@
 
     Positional arguments:
     src_paths - the paths to source directories
-    target - ['LPC1768', 'LPC11U24', 'LPC2368', etc.]
+    target - ['LPC1768', 'LPC11U24', etc.]
     toolchain_name - ['ARM', 'uARM', 'GCC_ARM', 'GCC_CR']
 
     Keyword arguments:
@@ -298,7 +332,7 @@
     extra_verbose - even more output!
     config - a Config object to use instead of creating one
     app_config - location of a chosen mbed_app.json file
-    build_profile - a dict of flags that will be passed to the compiler
+    build_profile - a list of mergeable build profiles
     """
 
     # We need to remove all paths which are repeated to avoid
@@ -308,15 +342,22 @@
     # If the configuration object was not yet created, create it now
     config = config or Config(target, src_paths, app_config=app_config)
     target = config.target
-
-    # Toolchain instance
     try:
-        toolchain = TOOLCHAIN_CLASSES[toolchain_name](
-            target, notify, macros, silent,
-            extra_verbose=extra_verbose, build_profile=build_profile)
+        cur_tc = TOOLCHAIN_CLASSES[toolchain_name]
     except KeyError:
         raise KeyError("Toolchain %s not supported" % toolchain_name)
 
+    profile = {'c': [], 'cxx': [], 'common': [], 'asm': [], 'ld': []}
+    for contents in build_profile or []:
+        for key in profile:
+            profile[key].extend(contents[toolchain_name][key])
+
+    if config.has_regions:
+        add_regions_to_profile(profile, config, cur_tc)
+
+    toolchain = cur_tc(target, notify, macros, silent, build_dir=build_dir,
+                       extra_verbose=extra_verbose, build_profile=profile)
+
     toolchain.config = config
     toolchain.jobs = jobs
     toolchain.build_all = clean
@@ -324,6 +365,41 @@
 
     return toolchain
 
+def merge_region_list(region_list, destination, padding=b'\xFF'):
+    """Merege the region_list into a single image
+
+    Positional Arguments:
+    region_list - list of regions, which should contain filenames
+    destination - file name to write all regions to
+    padding - bytes to fill gapps with
+    """
+    merged = IntelHex()
+
+    print("Merging Regions:")
+
+    for region in region_list:
+        if region.active and not region.filename:
+            raise ToolException("Active region has no contents: No file found.")
+        if region.filename:
+            print("  Filling region %s with %s" % (region.name, region.filename))
+            part = intelhex_offset(region.filename, offset=region.start)
+            part_size = (part.maxaddr() - part.minaddr()) + 1
+            if part_size > region.size:
+                raise ToolException("Contents of region %s does not fit"
+                                    % region.name)
+            merged.merge(part)
+            pad_size = region.size - part_size
+            if pad_size > 0 and region != region_list[-1]:
+                print("  Padding region %s with 0x%x bytes" % (region.name, pad_size))
+                merged.puts(merged.maxaddr() + 1, padding * pad_size)
+
+    if not exists(dirname(destination)):
+        makedirs(dirname(destination))
+    print("Space used after regions merged: 0x%x" %
+          (merged.maxaddr() - merged.minaddr() + 1))
+    with open(destination, "wb+") as output:
+        merged.tofile(output, format='bin')
+
 def scan_resources(src_paths, toolchain, dependencies_paths=None,
                    inc_dirs=None, base_path=None):
     """ Scan resources using initialized toolcain
@@ -408,7 +484,6 @@
         src_paths.extend(libraries_paths)
         inc_dirs.extend(map(dirname, libraries_paths))
 
-    # Build Directory
     if clean and exists(build_path):
         rmtree(build_path)
     mkdir(build_path)
@@ -452,16 +527,15 @@
     # mbed Classic/2.0/libary support #
     ###################################
 
-    # Pass all params to the unified prepare_toolchain()
     toolchain = prepare_toolchain(
-        src_paths, target, toolchain_name, macros=macros, clean=clean,
-        jobs=jobs, notify=notify, silent=silent, verbose=verbose,
+        src_paths, build_path, target, toolchain_name, macros=macros,
+        clean=clean, jobs=jobs, notify=notify, silent=silent, verbose=verbose,
         extra_verbose=extra_verbose, config=config, app_config=app_config,
         build_profile=build_profile)
 
     # The first path will give the name to the library
-    if name is None:
-        name = basename(normpath(abspath(src_paths[0])))
+    name = (name or toolchain.config.name or
+            basename(normpath(abspath(src_paths[0]))))
     toolchain.info("Building project %s (%s, %s)" %
                    (name, toolchain.target.name, toolchain_name))
 
@@ -482,18 +556,36 @@
     try:
         # Call unified scan_resources
         resources = scan_resources(src_paths, toolchain, inc_dirs=inc_dirs)
+        if  (hasattr(toolchain.target, "release_versions") and
+             "5" not in toolchain.target.release_versions and
+             "rtos" in toolchain.config.lib_config_data):
+            if "Cortex-A" in toolchain.target.core:
+                raise NotSupportedException(
+                    ("%s Will be supported in mbed OS 5.6. "
+                     "To use the %s, please checkout the mbed OS 5.4 release branch. "
+                     "See https://developer.mbed.org/platforms/Renesas-GR-PEACH/#important-notice "
+                     "for more information") % (toolchain.target.name, toolchain.target.name))
+            else:
+                raise NotSupportedException("Target does not support mbed OS 5")
 
         # Change linker script if specified
         if linker_script is not None:
             resources.linker_script = linker_script
 
         # Compile Sources
-        objects = toolchain.compile_sources(resources, build_path,
-                                            resources.inc_dirs)
+        objects = toolchain.compile_sources(resources, resources.inc_dirs)
         resources.objects.extend(objects)
 
         # Link Program
-        res, _ = toolchain.link_program(resources, build_path, name)
+        if toolchain.config.has_regions:
+            res, _ = toolchain.link_program(resources, build_path, name + "_application")
+            region_list = list(toolchain.config.regions)
+            region_list = [r._replace(filename=res) if r.active else r
+                           for r in region_list]
+            res = join(build_path, name) + ".bin"
+            merge_region_list(region_list, res)
+        else:
+            res, _ = toolchain.link_program(resources, build_path, name)
 
         memap_instance = getattr(toolchain, 'memap_instance', None)
         memap_table = ''
@@ -520,6 +612,9 @@
             cur_result["output"] = toolchain.get_output() + memap_table
             cur_result["result"] = "OK"
             cur_result["memory_usage"] = toolchain.map_outputs
+            cur_result["bin"] = res
+            cur_result["elf"] = splitext(res)[0] + ".elf"
+            cur_result.update(toolchain.report)
 
             add_result_to_report(report, cur_result)
 
@@ -600,9 +695,9 @@
 
     # Pass all params to the unified prepare_toolchain()
     toolchain = prepare_toolchain(
-        src_paths, target, toolchain_name, macros=macros, clean=clean,
-        jobs=jobs, notify=notify, silent=silent, verbose=verbose,
-        extra_verbose=extra_verbose, app_config=app_config,
+        src_paths, build_path, target, toolchain_name, macros=macros,
+        clean=clean, jobs=jobs, notify=notify, silent=silent,
+        verbose=verbose, extra_verbose=extra_verbose, app_config=app_config,
         build_profile=build_profile)
 
     # The first path will give the name to the library
@@ -621,6 +716,7 @@
         prep_report(report, toolchain.target.name, toolchain_name, id_name)
         cur_result = create_result(toolchain.target.name, toolchain_name,
                                    id_name, description)
+        cur_result['type'] = 'library'
         if properties != None:
             prep_properties(properties, toolchain.target.name, toolchain_name,
                             vendor_label)
@@ -658,8 +754,7 @@
                                  resources=resources)
 
         # Compile Sources
-        objects = toolchain.compile_sources(resources, abspath(tmp_path),
-                                            resources.inc_dirs)
+        objects = toolchain.compile_sources(resources, resources.inc_dirs)
         resources.objects.extend(objects)
 
         if archive:
@@ -704,6 +799,10 @@
 ### Legacy methods ###
 ######################
 
+def mbed2_obj_path(target_name, toolchain_name):
+    real_tc_name = TOOLCHAIN_CLASSES[toolchain_name].__name__
+    return join("TARGET_" + target_name, "TOOLCHAIN_" + real_tc_name)
+
 def build_lib(lib_id, target, toolchain_name, verbose=False,
               clean=False, macros=None, notify=None, jobs=1, silent=False,
               report=None, properties=None, extra_verbose=False,
@@ -780,19 +879,23 @@
 
     try:
         # Toolchain instance
-        toolchain = TOOLCHAIN_CLASSES[toolchain_name](
-            target, macros=macros, notify=notify, silent=silent,
-            extra_verbose=extra_verbose, build_profile=build_profile)
-        toolchain.VERBOSE = verbose
-        toolchain.jobs = jobs
-        toolchain.build_all = clean
+        # Create the desired build directory structure
+        bin_path = join(build_path, mbed2_obj_path(target.name, toolchain_name))
+        mkdir(bin_path)
+        tmp_path = join(build_path, '.temp', mbed2_obj_path(target.name,
+                                                            toolchain_name))
+        mkdir(tmp_path)
+
+        toolchain = prepare_toolchain(
+            src_paths, tmp_path, target, toolchain_name, macros=macros,
+            notify=notify, silent=silent, extra_verbose=extra_verbose,
+            build_profile=build_profile, jobs=jobs, clean=clean)
 
         toolchain.info("Building library %s (%s, %s)" %
                        (name.upper(), target.name, toolchain_name))
 
         # Take into account the library configuration (MBED_CONFIG_FILE)
-        config = Config(target)
-        toolchain.config = config
+        config = toolchain.config
         config.add_config_files([MBED_CONFIG_FILE])
 
         # Scan Resources
@@ -823,11 +926,6 @@
             config.load_resources(res)
         toolchain.set_config_data(toolchain.config.get_config_data())
 
-        # Create the desired build directory structure
-        bin_path = join(build_path, toolchain.obj_path)
-        mkdir(bin_path)
-        tmp_path = join(build_path, '.temp', toolchain.obj_path)
-        mkdir(tmp_path)
 
         # Copy Headers
         for resource in resources:
@@ -840,8 +938,7 @@
         # Compile Sources
         objects = []
         for resource in resources:
-            objects.extend(toolchain.compile_sources(resource, tmp_path,
-                                                     dependencies_include_dir))
+            objects.extend(toolchain.compile_sources(resource, dependencies_include_dir))
 
         needed_update = toolchain.build_library(objects, bin_path, name)
 
@@ -925,28 +1022,25 @@
         return False
 
     try:
+        # Source and Build Paths
+        build_target = join(MBED_LIBRARIES, "TARGET_" + target.name)
+        build_toolchain = join(MBED_LIBRARIES, mbed2_obj_path(target.name, toolchain_name))
+        mkdir(build_toolchain)
+
         # Toolchain
-        toolchain = TOOLCHAIN_CLASSES[toolchain_name](
-            target, macros=macros, notify=notify, silent=silent,
-            extra_verbose=extra_verbose, build_profile=build_profile)
-        toolchain.VERBOSE = verbose
-        toolchain.jobs = jobs
-        toolchain.build_all = clean
+        tmp_path = join(MBED_LIBRARIES, '.temp', mbed2_obj_path(target.name, toolchain_name))
+        mkdir(tmp_path)
+
+        toolchain = prepare_toolchain(
+            [""], tmp_path, target, toolchain_name, macros=macros,
+            notify=notify, silent=silent, extra_verbose=extra_verbose,
+            build_profile=build_profile, jobs=jobs, clean=clean)
 
         # Take into account the library configuration (MBED_CONFIG_FILE)
-        config = Config(target)
-        toolchain.config = config
+        config = toolchain.config
         config.add_config_files([MBED_CONFIG_FILE])
         toolchain.set_config_data(toolchain.config.get_config_data())
 
-        # Source and Build Paths
-        build_target = join(MBED_LIBRARIES, "TARGET_" + target.name)
-        build_toolchain = join(build_target, "TOOLCHAIN_" + toolchain.name)
-        mkdir(build_toolchain)
-
-        tmp_path = join(MBED_LIBRARIES, '.temp', toolchain.obj_path)
-        mkdir(tmp_path)
-
         # CMSIS
         toolchain.info("Building library %s (%s, %s)" %
                        ('CMSIS', target.name, toolchain_name))
@@ -986,7 +1080,7 @@
         toolchain.copy_files(hal_implementation.linker_script, build_toolchain)
         toolchain.copy_files(hal_implementation.bin_files, build_toolchain)
         incdirs = toolchain.scan_resources(build_target).inc_dirs
-        objects = toolchain.compile_sources(hal_implementation, tmp_path,
+        objects = toolchain.compile_sources(hal_implementation,
                                             library_incdirs + incdirs)
         toolchain.copy_files(objects, build_toolchain)
 
@@ -995,18 +1089,19 @@
         for dir in [MBED_DRIVERS, MBED_PLATFORM, MBED_HAL]:
             mbed_resources += toolchain.scan_resources(dir)
 
-        objects = toolchain.compile_sources(mbed_resources, tmp_path,
+        objects = toolchain.compile_sources(mbed_resources,
                                             library_incdirs + incdirs)
 
         # A number of compiled files need to be copied as objects as opposed to
         # way the linker search for symbols in archives. These are:
-        #   - retarget.o: to make sure that the C standard lib symbols get
+        #   - mbed_retarget.o: to make sure that the C standard lib symbols get
         #                 overridden
-        #   - board.o: mbed_die is weak
+        #   - mbed_board.o: mbed_die is weak
         #   - mbed_overrides.o: this contains platform overrides of various
         #                       weak SDK functions
-        separate_names, separate_objects = ['retarget.o', 'board.o',
-                                            'mbed_overrides.o'], []
+        #   - mbed_main.o: this contains main redirection
+        separate_names, separate_objects = ['mbed_retarget.o', 'mbed_board.o',
+                                            'mbed_overrides.o', 'mbed_main.o', 'mbed_sdk_boot.o'], []
 
         for obj in objects:
             for name in separate_names:
@@ -1072,6 +1167,75 @@
 
     return unique_supported_toolchains
 
+def mcu_toolchain_list(release_version='5'):
+    """  Shows list of toolchains
+
+    """
+
+    if isinstance(release_version, basestring):
+        # Force release_version to lowercase if it is a string
+        release_version = release_version.lower()
+    else:
+        # Otherwise default to printing all known targets and toolchains
+        release_version = 'all'
+
+
+    version_release_targets = {}
+    version_release_target_names = {}
+
+    for version in RELEASE_VERSIONS:
+        version_release_targets[version] = get_mbed_official_release(version)
+        version_release_target_names[version] = [x[0] for x in
+                                                 version_release_targets[
+                                                     version]]
+
+    if release_version in RELEASE_VERSIONS:
+        release_targets = version_release_targets[release_version]
+    else:
+        release_targets = None
+
+    unique_supported_toolchains = get_unique_supported_toolchains(
+        release_targets)
+    columns = ["mbed OS %s" % x for x in RELEASE_VERSIONS] + unique_supported_toolchains
+    return "\n".join(columns)
+
+
+def mcu_target_list(release_version='5'):
+    """  Shows target list 
+
+    """
+
+    if isinstance(release_version, basestring):
+        # Force release_version to lowercase if it is a string
+        release_version = release_version.lower()
+    else:
+        # Otherwise default to printing all known targets and toolchains
+        release_version = 'all'
+
+
+    version_release_targets = {}
+    version_release_target_names = {}
+
+    for version in RELEASE_VERSIONS:
+        version_release_targets[version] = get_mbed_official_release(version)
+        version_release_target_names[version] = [x[0] for x in
+                                                 version_release_targets[
+                                                     version]]
+
+    if release_version in RELEASE_VERSIONS:
+        release_targets = version_release_targets[release_version]
+    else:
+        release_targets = None
+
+    target_names = []
+
+    if release_targets:
+        target_names = [x[0] for x in release_targets]
+    else:
+        target_names = TARGET_NAMES
+
+    return "\n".join(target_names)
+
 
 def mcu_toolchain_matrix(verbose_html=False, platform_filter=None,
                          release_version='5'):
@@ -1174,283 +1338,6 @@
         else None
 
 
-def static_analysis_scan(target, toolchain_name, cppcheck_cmd,
-                         cppcheck_msg_format, verbose=False,
-                         clean=False, macros=None, notify=None, jobs=1,
-                         extra_verbose=False, build_profile=None):
-    """Perform static analysis on a target and toolchain combination
-
-    Positional arguments:
-    target - the target to fake the build for
-    toolchain_name - pretend you would compile with this toolchain
-    cppcheck_cmd - the command used to do static analysis
-    cppcheck_msg_format - the format of the check messages
-
-    Keyword arguments:
-    verbose - more printing!
-    clean - start from a clean slate
-    macros - extra macros to compile with
-    notify - the notification event handling function
-    jobs - number of commands to run at once
-    extra_verbose - even moar printing
-    build_profile - a dict of flags that will be passed to the compiler
-    """
-    # Toolchain
-    toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, macros=macros,
-                                                  notify=notify,
-                                                  extra_verbose=extra_verbose,
-                                                  build_profile=build_profile)
-    toolchain.VERBOSE = verbose
-    toolchain.jobs = jobs
-    toolchain.build_all = clean
-
-    # Source and Build Paths
-    build_target = join(MBED_LIBRARIES, "TARGET_" + target.name)
-    build_toolchain = join(build_target, "TOOLCHAIN_" + toolchain.name)
-    mkdir(build_toolchain)
-
-    tmp_path = join(MBED_LIBRARIES, '.temp', toolchain.obj_path)
-    mkdir(tmp_path)
-
-    # CMSIS
-    toolchain.info("Static analysis for %s (%s, %s)" %
-                   ('CMSIS', target.name, toolchain_name))
-    cmsis_src = MBED_CMSIS_PATH
-    resources = toolchain.scan_resources(cmsis_src)
-
-    # Copy files before analysis
-    toolchain.copy_files(resources.headers, build_target)
-    toolchain.copy_files(resources.linker_script, build_toolchain)
-
-    # Gather include paths, c, cpp sources and macros to transfer to cppcheck
-    # command line
-    includes = ["-I%s"% i for i in resources.inc_dirs]
-    includes.append("-I%s"% str(build_target))
-    c_sources = " ".join(resources.c_sources)
-    cpp_sources = " ".join(resources.cpp_sources)
-    macros = ["-D%s"% s for s in toolchain.get_symbols() + toolchain.macros]
-
-    includes = [inc.strip() for inc in includes]
-    macros = [mac.strip() for mac in macros]
-
-    check_cmd = cppcheck_cmd
-    check_cmd += cppcheck_msg_format
-    check_cmd += includes
-    check_cmd += macros
-
-    # We need to pass some params via file to avoid "command line too long in
-    # some OSs"
-    tmp_file = tempfile.NamedTemporaryFile(delete=False)
-    tmp_file.writelines(line + '\n' for line in c_sources.split())
-    tmp_file.writelines(line + '\n' for line in cpp_sources.split())
-    tmp_file.close()
-    check_cmd += ["--file-list=%s"% tmp_file.name]
-
-    _stdout, _stderr, _ = run_cmd(check_cmd)
-    if verbose:
-        print _stdout
-    print _stderr
-
-    # =========================================================================
-
-    # MBED
-    toolchain.info("Static analysis for %s (%s, %s)" %
-                   ('MBED', target.name, toolchain_name))
-
-    # Common Headers
-    toolchain.copy_files([MBED_HEADER], MBED_LIBRARIES)
-    toolchain.copy_files(toolchain.scan_resources(MBED_DRIVERS).headers,
-                         MBED_LIBRARIES)
-    toolchain.copy_files(toolchain.scan_resources(MBED_PLATFORM).headers,
-                         MBED_LIBRARIES)
-    toolchain.copy_files(toolchain.scan_resources(MBED_HAL).headers,
-                         MBED_LIBRARIES)
-
-    # Target specific sources
-    hal_src = join(MBED_TARGETS_PATH, "hal")
-    hal_implementation = toolchain.scan_resources(hal_src)
-
-    # Copy files before analysis
-    toolchain.copy_files(hal_implementation.headers +
-                         hal_implementation.hex_files, build_target,
-                         resources=hal_implementation)
-    incdirs = toolchain.scan_resources(build_target)
-
-    target_includes = ["-I%s" % i for i in incdirs.inc_dirs]
-    target_includes.append("-I%s"% str(build_target))
-    target_includes.append("-I%s"% str(hal_src))
-    target_c_sources = " ".join(incdirs.c_sources)
-    target_cpp_sources = " ".join(incdirs.cpp_sources)
-    target_macros = ["-D%s"% s for s in
-                     toolchain.get_symbols() + toolchain.macros]
-
-    # Common Sources
-    mbed_resources = toolchain.scan_resources(MBED_COMMON)
-
-    # Gather include paths, c, cpp sources and macros to transfer to cppcheck
-    # command line
-    mbed_includes = ["-I%s" % i for i in mbed_resources.inc_dirs]
-    mbed_includes.append("-I%s"% str(build_target))
-    mbed_includes.append("-I%s"% str(MBED_DRIVERS))
-    mbed_includes.append("-I%s"% str(MBED_PLATFORM))
-    mbed_includes.append("-I%s"% str(MBED_HAL))
-    mbed_c_sources = " ".join(mbed_resources.c_sources)
-    mbed_cpp_sources = " ".join(mbed_resources.cpp_sources)
-
-    target_includes = [inc.strip() for inc in target_includes]
-    mbed_includes = [inc.strip() for inc in mbed_includes]
-    target_macros = [mac.strip() for mac in target_macros]
-
-    check_cmd = cppcheck_cmd
-    check_cmd += cppcheck_msg_format
-    check_cmd += target_includes
-    check_cmd += mbed_includes
-    check_cmd += target_macros
-
-    # We need to pass some parames via file to avoid "command line too long in
-    # some OSs"
-    tmp_file = tempfile.NamedTemporaryFile(delete=False)
-    tmp_file.writelines(line + '\n' for line in target_c_sources.split())
-    tmp_file.writelines(line + '\n' for line in target_cpp_sources.split())
-    tmp_file.writelines(line + '\n' for line in mbed_c_sources.split())
-    tmp_file.writelines(line + '\n' for line in mbed_cpp_sources.split())
-    tmp_file.close()
-    check_cmd += ["--file-list=%s"% tmp_file.name]
-
-    _stdout, _stderr, _ = run_cmd_ext(check_cmd)
-    if verbose:
-        print _stdout
-    print _stderr
-
-
-def static_analysis_scan_lib(lib_id, target, toolchain, cppcheck_cmd,
-                             cppcheck_msg_format, verbose=False,
-                             clean=False, macros=None, notify=None, jobs=1,
-                             extra_verbose=False, build_profile=None):
-    """Perform static analysis on a library as if it were to be compiled for a
-    particular target and toolchain combination
-    """
-    lib = Library(lib_id)
-    if lib.is_supported(target, toolchain):
-        static_analysis_scan_library(
-            lib.source_dir, lib.build_dir, target, toolchain, cppcheck_cmd,
-            cppcheck_msg_format, lib.dependencies, verbose=verbose,
-            clean=clean, macros=macros, notify=notify, jobs=jobs,
-            extra_verbose=extra_verbose, build_profile=build_profile)
-    else:
-        print('Library "%s" is not yet supported on target %s with toolchain %s'
-              % (lib_id, target.name, toolchain))
-
-
-def static_analysis_scan_library(src_paths, build_path, target, toolchain_name,
-                                 cppcheck_cmd, cppcheck_msg_format,
-                                 dependencies_paths=None,
-                                 name=None, clean=False, notify=None,
-                                 verbose=False, macros=None, jobs=1,
-                                 extra_verbose=False, build_profile=None):
-    """ Function scans library for statically detectable defects
-
-    Positional arguments:
-    src_paths - the list of library paths to scan
-    build_path - the location directory of result files
-    target - the target to fake the build for
-    toolchain_name - pretend you would compile with this toolchain
-    cppcheck_cmd - the command used to do static analysis
-    cppcheck_msg_format - the format of the check messages
-
-    Keyword arguments:
-    dependencies_paths - the paths to sources that this library depends on
-    name - the name of this library
-    clean - start from a clean slate
-    notify - the notification event handling function
-    verbose - more printing!
-    macros - extra macros to compile with
-    jobs - number of commands to run at once
-    extra_verbose - even moar printing
-    build_profile - a dict of flags that will be passed to the compiler
-    """
-    if type(src_paths) != ListType:
-        src_paths = [src_paths]
-
-    for src_path in src_paths:
-        if not exists(src_path):
-            raise Exception("The library source folder does not exist: %s",
-                            src_path)
-
-    # Toolchain instance
-    toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, macros=macros,
-                                                  notify=notify,
-                                                  extra_verbose=extra_verbose,
-                                                  build_profile=build_profile)
-    toolchain.VERBOSE = verbose
-    toolchain.jobs = jobs
-
-    # The first path will give the name to the library
-    name = basename(src_paths[0])
-    toolchain.info("Static analysis for library %s (%s, %s)" %
-                   (name.upper(), target.name, toolchain_name))
-
-    # Scan Resources
-    resources = []
-    for src_path in src_paths:
-        resources.append(toolchain.scan_resources(src_path))
-
-    # Dependencies Include Paths
-    dependencies_include_dir = []
-    if dependencies_paths is not None:
-        for path in dependencies_paths:
-            lib_resources = toolchain.scan_resources(path)
-            dependencies_include_dir.extend(lib_resources.inc_dirs)
-
-    # Create the desired build directory structure
-    bin_path = join(build_path, toolchain.obj_path)
-    mkdir(bin_path)
-    tmp_path = join(build_path, '.temp', toolchain.obj_path)
-    mkdir(tmp_path)
-
-    # Gather include paths, c, cpp sources and macros to transfer to cppcheck
-    # command line
-    includes = ["-I%s" % i for i in dependencies_include_dir + src_paths]
-    c_sources = " "
-    cpp_sources = " "
-    macros = ['-D%s' % s for s in toolchain.get_symbols() + toolchain.macros]
-
-    # Copy Headers
-    for resource in resources:
-        toolchain.copy_files(resource.headers, build_path, resources=resource)
-        includes += ["-I%s" % i for i in resource.inc_dirs]
-        c_sources += " ".join(resource.c_sources) + " "
-        cpp_sources += " ".join(resource.cpp_sources) + " "
-
-    dependencies_include_dir.extend(
-        toolchain.scan_resources(build_path).inc_dirs)
-
-    includes = [inc.strip() for inc in includes]
-    macros = [mac.strip() for mac in macros]
-
-    check_cmd = cppcheck_cmd
-    check_cmd += cppcheck_msg_format
-    check_cmd += includes
-    check_cmd += macros
-
-    # We need to pass some parameters via file to avoid "command line too long
-    # in some OSs". A temporary file is created to store e.g. cppcheck list of
-    # files for command line
-    tmp_file = tempfile.NamedTemporaryFile(delete=False)
-    tmp_file.writelines(line + '\n' for line in c_sources.split())
-    tmp_file.writelines(line + '\n' for line in cpp_sources.split())
-    tmp_file.close()
-    check_cmd += ["--file-list=%s"% tmp_file.name]
-
-    # This will allow us to grab result from both stdio and stderr outputs (so
-    # we can show them) We assume static code analysis tool is outputting
-    # defects on STDERR
-    _stdout, _stderr, _ = run_cmd_ext(check_cmd)
-    if verbose:
-        print _stdout
-    print _stderr
-
-
 def print_build_results(result_list, build_name):
     """ Generate result string for build results
 
@@ -1540,3 +1427,24 @@
         placeholder.write(template.render(
             failing_builds=build_report_failing,
             passing_builds=build_report_passing))
+
+
+def merge_build_data(filename, toolchain_report, app_type):
+    path_to_file = dirname(abspath(filename))
+    try:
+        build_data = load(open(filename))
+    except (IOError, ValueError):
+        build_data = {'builds': []}
+    for tgt in toolchain_report.values():
+        for tc in tgt.values():
+            for project in tc.values():
+                for build in project:
+                    try:
+                        build[0]['elf'] = relpath(build[0]['elf'], path_to_file)
+                        build[0]['bin'] = relpath(build[0]['bin'], path_to_file)
+                    except KeyError:
+                        pass
+                    if 'type' not in build[0]:
+                        build[0]['type'] = app_type
+                    build_data['builds'].append(build[0])
+    dump(build_data, open(filename, "wb"), indent=4, separators=(',', ': '))
--- a/build_everything.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,239 +0,0 @@
-#! /usr/bin/env python
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-import sys
-from time import time
-from os.path import join, abspath, dirname, normpath
-from optparse import OptionParser
-import json
-
-# Be sure that the tools directory is in the search path
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-
-from tools.build_api import build_library
-from tools.build_api import write_build_report
-from tools.targets import TARGET_MAP, TARGET_NAMES
-from tools.toolchains import TOOLCHAINS
-from tools.test_exporters import ReportExporter, ResultExporterType
-from tools.test_api import find_tests, build_tests, test_spec_from_test_builds
-from tools.build_release import OFFICIAL_MBED_LIBRARY_BUILD
-
-if __name__ == '__main__':
-    try:
-        parser = OptionParser()
-        
-        parser.add_option("--source", dest="source_dir",
-                          default=None, help="The source (input) directory (for sources other than tests). Defaults to current directory.", action="append")
-                          
-        parser.add_option("--build", dest="build_dir",
-                          default=None, help="The build (output) directory")
-        
-        parser.add_option('-c', '--clean',
-                          dest='clean',
-                          metavar=False,
-                          action="store_true",
-                          help='Clean the build directory')
-        
-        parser.add_option('-a', '--all', dest="all", default=False, action="store_true",
-                          help="Build every target (including unofficial targets) and with each of the supported toolchains")
-                          
-        parser.add_option('-o', '--official', dest="official_only", default=False, action="store_true",
-                          help="Build using only the official toolchain for each target")
-                          
-        parser.add_option("-D", "",
-                          action="append",
-                          dest="macros",
-                          help="Add a macro definition")
-                          
-        parser.add_option("-j", "--jobs", type="int", dest="jobs",
-                          default=0, help="Number of concurrent jobs. Default: 0/auto (based on host machine's number of CPUs)")
-                          
-        parser.add_option("-v", "--verbose", action="store_true", dest="verbose",
-                          default=False, help="Verbose diagnostic output")
-                          
-        parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
-
-        parser.add_option("-p", "--platforms", dest="platforms", default="", help="Build only for the platform namesseparated by comma")
-
-        parser.add_option("", "--config", action="store_true", dest="list_config",
-                          default=False, help="List the platforms and toolchains in the release in JSON")
-        
-        parser.add_option("", "--test-spec", dest="test_spec",
-                          default=None, help="Destination path for a test spec file that can be used by the Greentea automated test tool")
-
-        parser.add_option("", "--build-report-junit", dest="build_report_junit", help="Output the build results to an junit xml file")
-        
-        parser.add_option("--continue-on-build-fail", action="store_true", dest="continue_on_build_fail",
-                          default=False, help="Continue trying to build all tests if a build failure occurs")
-
-        options, args = parser.parse_args()
-        
-        # Get set of valid targets
-        all_platforms = set(TARGET_NAMES)
-        bad_platforms = set()
-        platforms = set()
-        if options.platforms != "":
-            platforms = set(options.platforms.split(","))
-            bad_platforms = platforms.difference(all_platforms)
-            platforms = platforms.intersection(all_platforms)
-        elif options.all:
-            platforms = all_platforms
-        else:
-            platforms = set(x[0] for x in OFFICIAL_MBED_LIBRARY_BUILD)
-            bad_platforms = platforms.difference(all_platforms)
-            platforms = platforms.intersection(all_platforms)
-        
-        for bad_platform in bad_platforms:
-            print "Platform '%s' is not a valid platform. Skipping." % bad_platform
-        
-        if options.platforms:
-            print "Limiting build to the following platforms: %s" % ",".join(platforms)
-        
-        # Get set of valid toolchains
-        all_toolchains = set(TOOLCHAINS)
-        bad_toolchains = set()
-        toolchains = set()
-        
-        if options.toolchains:
-            toolchains = set(options.toolchains.split(","))
-            bad_toolchains = toolchains.difference(all_toolchains)
-            toolchains = toolchains.intersection(all_toolchains)
-        else:
-            toolchains = all_toolchains
-        
-        for bad_toolchain in bad_toolchains:
-            print "Toolchain '%s' is not a valid toolchain. Skipping." % bad_toolchain
-        
-        if options.toolchains:
-            print "Limiting build to the following toolchains: %s" % ",".join(toolchains)
-        
-        build_config = {}
-        
-        for platform in platforms:
-            target = TARGET_MAP[platform]
-            
-            if options.official_only:
-                default_toolchain = getattr(target, 'default_toolchain', 'ARM')
-                build_config[platform] = list(toolchains.intersection(set([default_toolchain])))
-            else:
-                build_config[platform] = list(toolchains.intersection(set(target.supported_toolchains)))
-        
-        if options.list_config:
-            print json.dumps(build_config, indent=4)
-            sys.exit(0)
-        
-        # Ensure build directory is set
-        if not options.build_dir:
-            print "[ERROR] You must specify a build path"
-            sys.exit(1)
-        
-        # Default base source path is the current directory
-        base_source_paths = options.source_dir
-        if not base_source_paths:
-            base_source_paths = ['.']
-        
-        
-        start = time()    
-        build_report = {}
-        build_properties = {}
-        test_builds = {}
-        total_build_success = True
-
-        for target_name, target_toolchains in build_config.iteritems():
-            target = TARGET_MAP[target_name]
-            
-            for target_toolchain in target_toolchains:
-                library_build_success = True
-                
-                try:
-                    build_directory = join(options.build_dir, target_name, target_toolchain)
-                    # Build sources
-                    build_library(base_source_paths, build_directory, target, target_toolchain,
-                                                    jobs=options.jobs,
-                                                    clean=options.clean,
-                                                    report=build_report,
-                                                    properties=build_properties,
-                                                    name="mbed-os",
-                                                    macros=options.macros,
-                                                    verbose=options.verbose,
-                                                    archive=False)
-                except Exception, e:
-                    library_build_success = False
-                    print "Failed to build library"
-                    print e
-                    
-                if options.continue_on_build_fail or library_build_success:
-                    # Build all the tests
-                    all_tests = find_tests(base_source_paths[0], target_name, toolchain_name)
-                    test_build_success, test_build = build_tests(all_tests, [build_directory], build_directory, target, target_toolchain,
-                            clean=options.clean,
-                            report=build_report,
-                            properties=build_properties,
-                            macros=options.macros,
-                            verbose=options.verbose,
-                            jobs=options.jobs,
-                            continue_on_build_fail=options.continue_on_build_fail)
-                            
-                    if not test_build_success:
-                        total_build_success = False
-                        print "Failed to build some tests, check build log for details"
-                    
-                    test_builds.update(test_build)
-                else:
-                    total_build_success = False
-                    break
-            
-        # If a path to a test spec is provided, write it to a file
-        if options.test_spec:
-            test_spec_data = test_spec_from_test_builds(test_builds)
-            
-            # Create the target dir for the test spec if necessary
-            # mkdir will not create the dir if it already exists
-            test_spec_dir = dirname(options.test_spec)
-            if test_spec_dir:
-                mkdir(test_spec_dir)
-            
-            try:
-                with open(options.test_spec, 'w') as f:
-                    f.write(json.dumps(test_spec_data, indent=2))
-            except IOError, e:
-                print "[ERROR] Error writing test spec to file"
-                print e
-        
-        # If a path to a JUnit build report spec is provided, write it to a file
-        if options.build_report_junit:
-            report_exporter = ReportExporter(ResultExporterType.JUNIT)
-            report_exporter.report_to_file(build_report, options.build_report_junit, test_suite_properties=build_properties)
-
-        print "\n\nCompleted in: (%.2f)s" % (time() - start)
-
-        print_report_exporter = ReportExporter(ResultExporterType.PRINT, package="build")
-        status = print_report_exporter.report(build_report)
-
-        if status:
-            sys.exit(0)
-        else:
-            sys.exit(1)
-    
-    except KeyboardInterrupt, e:
-        print "\n[CTRL+c] exit"
-    except Exception,e:
-        import traceback
-        traceback.print_exc(file=sys.stdout)
-        print "[ERROR] %s" % str(e)
-        sys.exit(1)
--- a/build_profiles.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/build_profiles.py	Thu Jun 22 11:12:28 2017 -0500
@@ -60,7 +60,6 @@
 
         for filename in filter(lambda s: s.endswith(".bld"), files):
             try:
-                # TODO check user has permission to link against build
                 url = open(join(root, filename), 'r').read().strip()
                 builds.append(re.sub(r'^.+/(.*?)$', r'\1', url))
             except:
@@ -72,7 +71,7 @@
 def find_targets_json(path, depth=1):
     f = 'targets.json'
     if exists(join(path, f)):
-        return os.path.abspath(join(path, f))
+        return abspath(join(path, f))
 
     if depth > 2:
         return None
@@ -196,6 +195,14 @@
     '1a303c31ec8f': 134,
     '0b434d521da0': 135,
     '2abc4044d39c': 136,
+    'c2078c12af99': 137,
+    '86e42d5e9f93': 138,
+    '4ba4acebdbae': 139,
+    '608e850de46b': 140,
+    'd616554d63fc': 141,
+    '46ffe6167a0b': 142,
+    'c417c1db60ce': 143,
+    '6b1076ac9921': 144,
     '6c34061e7c34': 121,
     '7c328cabac7e': 120,
     'aae6fcc7d9bb': 119,
--- a/build_release.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,198 +0,0 @@
-#! /usr/bin/env python
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-import sys
-from time import time
-from os.path import join, abspath, dirname, normpath
-from optparse import OptionParser
-import json
-from shutil import copy
-
-# Be sure that the tools directory is in the search path
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-
-from tools.build_api import build_mbed_libs
-from tools.build_api import write_build_report
-from tools.build_api import get_mbed_official_release
-from tools.options import extract_profile
-from tools.targets import TARGET_MAP, TARGET_NAMES
-from tools.test_exporters import ReportExporter, ResultExporterType
-from tools.test_api import SingleTestRunner
-from tools.test_api import singletest_in_cli_mode
-from tools.paths import TEST_DIR, MBED_LIBRARIES
-from tools.tests import TEST_MAP
-
-OFFICIAL_MBED_LIBRARY_BUILD = get_mbed_official_release('2')
-
-if __name__ == '__main__':
-    parser = OptionParser()
-    parser.add_option('-o', '--official', dest="official_only", default=False, action="store_true",
-                      help="Build using only the official toolchain for each target")
-    parser.add_option("-j", "--jobs", type="int", dest="jobs",
-                      default=1, help="Number of concurrent jobs (default 1). Use 0 for auto based on host machine's number of CPUs")
-    parser.add_option("-v", "--verbose", action="store_true", dest="verbose",
-                      default=False, help="Verbose diagnostic output")
-    parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
-
-    parser.add_option("--profile", dest="profile", action="append", default=[])
-
-    parser.add_option("-p", "--platforms", dest="platforms", default="", help="Build only for the platform namesseparated by comma")
-
-    parser.add_option("-L", "--list-config", action="store_true", dest="list_config",
-                      default=False, help="List the platforms and toolchains in the release in JSON")
-
-    parser.add_option("", "--report-build", dest="report_build_file_name", help="Output the build results to an junit xml file")
-
-    parser.add_option("", "--build-tests", dest="build_tests", help="Build all tests in the given directories (relative to /libraries/tests)")
-
-
-    options, args = parser.parse_args()
-
-
-
-    if options.list_config:
-        print json.dumps(OFFICIAL_MBED_LIBRARY_BUILD, indent=4)
-        sys.exit()
-
-    start = time()
-    build_report = {}
-    build_properties = {}
-
-    platforms = None
-    if options.platforms != "":
-        platforms = set(options.platforms.split(","))
-
-    if options.build_tests:
-        # Get all paths
-        directories = options.build_tests.split(',')
-        for i in range(len(directories)):
-            directories[i] = normpath(join(TEST_DIR, directories[i]))
-
-        test_names = []
-
-        for test_id in TEST_MAP.keys():
-            # Prevents tests with multiple source dirs from being checked
-            if isinstance( TEST_MAP[test_id].source_dir, basestring):
-                test_path = normpath(TEST_MAP[test_id].source_dir)
-                for directory in directories:
-                    if directory in test_path:
-                        test_names.append(test_id)
-
-        mut_counter = 1
-        mut = {}
-        test_spec = {
-            "targets": {}
-        }
-
-        if options.toolchains:
-            print "Only building using the following toolchains: %s" % (options.toolchains)
-
-        for target_name, toolchain_list in OFFICIAL_MBED_LIBRARY_BUILD:
-            toolchains = None
-            if platforms is not None and not target_name in platforms:
-                print("Excluding %s from release" % target_name)
-                continue
-
-            if target_name not in TARGET_NAMES:
-                print "Target '%s' is not a valid target. Excluding from release"
-                continue
-
-            if options.official_only:
-                toolchains = (getattr(TARGET_MAP[target_name], 'default_toolchain', 'ARM'),)
-            else:
-                toolchains = toolchain_list
-
-            if options.toolchains:
-                toolchainSet = set(toolchains)
-                toolchains = toolchainSet.intersection(set((options.toolchains).split(',')))
-
-            mut[str(mut_counter)] = {
-                "mcu": target_name
-            }
-
-            mut_counter += 1
-
-            test_spec["targets"][target_name] = toolchains
-
-        single_test = SingleTestRunner(_muts=mut,
-                                       _parser=parser,
-                                       _opts=options,
-                                       _opts_report_build_file_name=options.report_build_file_name,
-                                       _test_spec=test_spec,
-                                       _opts_test_by_names=",".join(test_names),
-                                       _opts_verbose=options.verbose,
-                                       _opts_only_build_tests=True,
-                                       _opts_suppress_summary=True,
-                                       _opts_jobs=options.jobs,
-                                       _opts_include_non_automated=True,
-                                       _opts_build_report=build_report,
-                                       _opts_build_properties=build_properties)
-        # Runs test suite in CLI mode
-        test_summary, shuffle_seed, test_summary_ext, test_suite_properties_ext, new_build_report, new_build_properties = single_test.execute()
-    else:
-        for target_name, toolchain_list in OFFICIAL_MBED_LIBRARY_BUILD:
-            if platforms is not None and not target_name in platforms:
-                print("Excluding %s from release" % target_name)
-                continue
-
-            if target_name not in TARGET_NAMES:
-                print "Target '%s' is not a valid target. Excluding from release"
-                continue
-
-            if options.official_only:
-                toolchains = (getattr(TARGET_MAP[target_name], 'default_toolchain', 'ARM'),)
-            else:
-                toolchains = toolchain_list
-
-            if options.toolchains:
-                print "Only building using the following toolchains: %s" % (options.toolchains)
-                toolchainSet = set(toolchains)
-                toolchains = toolchainSet.intersection(set((options.toolchains).split(',')))
-
-            for toolchain in toolchains:
-                id = "%s::%s" % (target_name, toolchain)
-
-                profile = extract_profile(parser, options, toolchain)
-
-                try:
-                    built_mbed_lib = build_mbed_libs(TARGET_MAP[target_name],
-                                                     toolchain,
-                                                     verbose=options.verbose,
-                                                     jobs=options.jobs,
-                                                     report=build_report,
-                                                     properties=build_properties,
-                                                     build_profile=profile)
-
-                except Exception, e:
-                    print str(e)
-
-    # copy targets.json file as part of the release
-    copy(join(dirname(abspath(__file__)), '..', 'targets', 'targets.json'), MBED_LIBRARIES)
-
-    # Write summary of the builds
-    if options.report_build_file_name:
-        file_report_exporter = ReportExporter(ResultExporterType.JUNIT, package="build")
-        file_report_exporter.report_to_file(build_report, options.report_build_file_name, test_suite_properties=build_properties)
-
-    print "\n\nCompleted in: (%.2f)s" % (time() - start)
-
-    print_report_exporter = ReportExporter(ResultExporterType.PRINT, package="build")
-    status = print_report_exporter.report(build_report)
-
-    if not status:
-        sys.exit(1)
--- a/build_travis.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,331 +0,0 @@
-#!/usr/bin/env python2
-
-"""
-Travis-CI build script
-
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import os
-import sys
-
-################################################################################
-# Configure builds here
-# "libs" can contain "dsp", "rtos", "eth", "usb_host", "usb", "ublox", "fat"
-
-build_list = (
-    { "target": "LPC1768",           "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "eth", "usb_host", "usb", "ublox", "fat"] },
-    { "target": "LPC2368",           "toolchains": "GCC_ARM", "libs": ["fat"]  },
-    { "target": "LPC2460",           "toolchains": "GCC_ARM", "libs": ["rtos", "usb_host", "usb", "fat"]  },
-    { "target": "LPC11U24",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "OC_MBUINO",         "toolchains": "GCC_ARM", "libs": ["fat"]  },
-
-    { "target": "LPC11U24_301",      "toolchains": "GCC_ARM", "libs": ["fat"] },
-
-    { "target": "B96B_F446VE",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_L053R8",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_L152RE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F030R8",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F031K6",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F042K6",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F070RB",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F072RB",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F091RC",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F103RB",     "toolchains": "GCC_ARM", "libs": ["rtos", "fat"] },
-    { "target": "NUCLEO_F207ZG",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_F302R8",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F303K8",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F303RE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F303ZE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "NUCLEO_F334R8",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F401RE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_F410RB",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NUCLEO_F411RE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_F412ZG",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_L432KC",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_L476RG",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat", "rtos", "usb_host"] },
-    { "target": "NUCLEO_L011K4",     "toolchains": "GCC_ARM", "libs": ["dsp"] },
-    { "target": "NUCLEO_L031K6",     "toolchains": "GCC_ARM", "libs": ["dsp"] },
-    { "target": "NUCLEO_L073RZ",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F429ZI",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_F446RE",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NUCLEO_F446ZE",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    { "target": "NUCLEO_F746ZG",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host" ] },
-    { "target": "NUCLEO_F767ZI",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-
-    { "target": "MOTE_L152RC",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-
-    { "target": "ELMO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-
-    { "target": "MTS_MDOT_F405RG",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos"] },
-    { "target": "MTS_MDOT_F411RE",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos"] },
-    { "target": "MTS_DRAGONFLY_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "ARCH_MAX",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-
-    { "target": "DISCO_F051R8",      "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "DISCO_F303VC",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "DISCO_F334C8",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "DISCO_F401VC",      "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "DISCO_F407VG",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "DISCO_F429ZI",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat", "usb_host"] },
-    { "target": "DISCO_F469NI",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "DISCO_F746NG",      "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "DISCO_F769NI",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-
-    { "target": "LPC1114",           "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "LPC11U35_401",      "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "UBLOX_C027",        "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "LPC11U35_501",      "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "LPC11U68",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "LPC11U37H_401",     "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-
-    { "target": "KL05Z",             "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "KL25Z",             "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "KL27Z",             "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "KL43Z",             "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "KL46Z",             "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "K20D50M",           "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "TEENSY3_1",         "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "K64F",              "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "K22F",              "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "LPC4088",           "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "ARCH_PRO",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "LPC1549",           "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NRF51822",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "DELTA_DFCM_NNN40",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "NRF51_DK",          "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-    { "target": "NRF51_MICROBIT",    "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
-
-    { "target": "EFM32ZG_STK3200",   "toolchains": "GCC_ARM", "libs": ["dsp"] },
-    { "target": "EFM32HG_STK3400",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
-    { "target": "EFM32LG_STK3600",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
-    { "target": "EFM32GG_STK3700",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
-    { "target": "EFM32WG_STK3800",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
-    { "target": "EFM32PG_STK3401",   "toolchains": "GCC_ARM", "libs": ["dsp", "rtos"] },
-
-    { "target": "MAXWSNENV",    "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "MAX32600MBED", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "MAX32620HSP",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-
-    { "target": "RZ_A1H", "toolchains": "GCC_ARM", "libs": ["fat"] },
-
-    { "target": "SAMR21G18A",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "SAMD21J18A",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "SAMD21G18A",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "SAML21J18A",  "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
-    { "target": "DISCO_L476VG",     "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat", "usb_host"] },
-    
-    { "target": "NUMAKER_PFM_NUC472",   "toolchains": "GCC_ARM",    "libs": ["dsp", "rtos", "usb", "fat"] },
-    { "target": "NUMAKER_PFM_M453",     "toolchains": "GCC_ARM",    "libs": ["dsp", "rtos", "usb", "fat"] },
- )
-
-################################################################################
-# Configure example test building (linking against external mbed SDK libraries liek fat or rtos)
-
-linking_list = [
-    {"target": "LPC1768",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_15", "MBED_16", "MBED_17"],
-               "eth"  : ["NET_1", "NET_2", "NET_3", "NET_4"],
-               "fat"  : ["MBED_A12", "MBED_19", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     },
-    {"target": "K64F",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "fat"  : ["MBED_A12", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     },
-    {"target": "K22F",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "fat"  : ["MBED_A12", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     },
-    {"target": "KL43Z",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "fat"  : ["MBED_A12", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     },
-    {"target": "NUCLEO_F446ZE",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F401RE",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"], 
-             }
-    },
-    {"target": "NUCLEO_F411RE",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F412ZG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F429ZI",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F207ZG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F746ZG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_F767ZI",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUCLEO_L476RG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : [ "USB_10", "USB_11"],
-             }
-    },
-    {"target": "DISCO_F429ZI",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : [ "USB_10", "USB_11"],
-             }
-    },
-    {"target": "DISCO_F407VG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-             }
-    },
-    {"target": "NUCLEO_F303ZE",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-             }
-    },
-    {"target": "DISCO_L476VG",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3", "USB_10", "USB_11"],
-             }
-    },
-    {"target": "NUMAKER_PFM_NUC472",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "fat"  : ["MBED_A12", "MBED_19", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     },
-     {"target": "NUMAKER_PFM_M453",
-     "toolchains": "GCC_ARM",
-     "tests": {""     : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
-               "fat"  : ["MBED_A12", "MBED_19", "PERF_1", "PERF_2", "PERF_3"],
-               "rtos" : ["RTOS_1", "RTOS_2", "RTOS_3"],
-               "usb"  : ["USB_1", "USB_2" ,"USB_3"],
-               }
-     }
-
-    ]
-
-################################################################################
-
-# Driver
-
-def run_builds(dry_run):
-    for build in build_list:
-        toolchain_list = build["toolchains"]
-        if type(toolchain_list) != type([]): toolchain_list = [toolchain_list]
-        for toolchain in toolchain_list:
-            cmdline = "python tools/build.py -m %s -t %s -j 4 -c --silent "% (build["target"], toolchain)
-            libs = build.get("libs", [])
-            if libs:
-                cmdline = cmdline + " ".join(["--" + l for l in libs])
-            print "Executing: " + cmdline
-            if not dry_run:
-                if os.system(cmdline) != 0:
-                    sys.exit(1)
-
-
-def run_test_linking(dry_run):
-    """ Function run make.py commands to build and link simple mbed SDK
-        tests against few libraries to make sure there are no simple linking errors.
-    """
-    for link in linking_list:
-        toolchain_list = link["toolchains"]
-        if type(toolchain_list) != type([]):
-            toolchain_list = [toolchain_list]
-        for toolchain in toolchain_list:
-            tests = link["tests"]
-            # Call make.py for each test group for particular library
-            for test_lib in tests:
-                test_names = tests[test_lib]
-                test_lib_switch = "--" + test_lib if test_lib else ""
-                cmdline = "python tools/make.py -m %s -t %s -c --silent %s -n %s " % (link["target"], toolchain, test_lib_switch, ",".join(test_names))
-                print "Executing: " + cmdline
-                if not dry_run:
-                    if os.system(cmdline) != 0:
-                        sys.exit(1)
-
-def run_test_testsuite(dry_run):
-    cmdline = "python tools/singletest.py --version"
-    print "Executing: " + cmdline
-    if not dry_run:
-        if os.system(cmdline) != 0:
-            sys.exit(1)
-
-if __name__ == "__main__":
-    run_builds("-s" in sys.argv)
-    run_test_linking("-s" in sys.argv)
-    run_test_testsuite("-s" in sys.argv)
--- a/buildbot/master.cfg	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,406 +0,0 @@
-# -*- python -*-
-# ex: set syntax=python:
-
-# This is a sample buildmaster config file. It must be installed as
-# 'master.cfg' in your buildmaster's base directory.
-
-# This is the dictionary that the buildmaster pays attention to. We also use
-# a shorter alias to save typing.
-c = BuildmasterConfig = {}
-
-####### BUILDSLAVES
-
-# The 'slaves' list defines the set of recognized buildslaves. Each element is
-# a BuildSlave object, specifying a unique slave name and password.  The same
-# slave name and password must be configured on the slave.
-from buildbot.buildslave import BuildSlave
-c['slaves'] = [BuildSlave("example-slave", "pass"),
-               BuildSlave("example-slave-2", "pass"),
-               BuildSlave("example-slave-KL25Z", "pass"),
-               BuildSlave("example-slave-LPC1768", "pass"),
-               BuildSlave("example-slave-LPC11U24", "pass"),
-              ]
-
-# 'slavePortnum' defines the TCP port to listen on for connections from slaves.
-# This must match the value configured into the buildslaves (with their
-# --master option)
-c['slavePortnum'] = 9989
-
-####### OFFICIAL_MBED_LIBRARY_BUILD
-
-OFFICIAL_MBED_LIBRARY_BUILD = (
-    ('LPC1768', ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
-    ('KL05Z', ('ARM', 'uARM', 'GCC_ARM')),
-    ('KL25Z', ('ARM', 'GCC_ARM')),
-    ('LPC11U24', ('ARM', 'uARM')),
-    ('KL46Z', ('ARM', 'GCC_ARM')),
-    ('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR')),
-    ('LPC1347', ('ARM',)),
-    ('LPC1549', ('uARM',)),
-    ('LPC2368', ('ARM',)),
-    ('LPC812', ('uARM',)),
-    ('LPC11U35_401', ('ARM', 'uARM')),
-    ('LPC1114', ('uARM',)),
-    ('NUCLEO_F103RB', ('ARM', 'uARM')),
-    ('NUCLEO_L152RE', ('ARM', 'uARM')),
-    ('NUCLEO_F401RE', ('ARM', 'uARM')),
-    ('NUCLEO_F030R8', ('ARM', 'uARM')),
-    ('UBLOX_C027', ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
-    # ('NRF51822', ('ARM',)),
-)
-
-# Which hardware platforms are supported for target testing
-OFFICIAL_MBED_TESTBED_SUPPORTED_HARDWARE = (
-    # 'KL25Z',
-    # 'LPC1768',
-    # 'LPC11U24',
-)
-
-####### CHANGESOURCES
-
-# the 'change_source' setting tells the buildmaster how it should find out
-# about source code changes.  Here we point to the buildbot clone of pyflakes.
-
-from buildbot.changes.gitpoller import GitPoller
-c['change_source'] = []
-"""
-c['change_source'].append(GitPoller(
-        'git://github.com/buildbot/pyflakes.git',
-        workdir='gitpoller-workdir', branch='master',
-        pollinterval=300))
-"""
-####### SCHEDULERS
-
-# Configure the Schedulers, which decide how to react to incoming changes.  In this
-# case, just kick off a 'runtests' build
-
-from buildbot.schedulers.basic import SingleBranchScheduler
-from buildbot.schedulers.forcesched import ForceScheduler
-from buildbot.changes import filter
-c['schedulers'] = []
-
-# Create builders to generate one target using all assigned toolchains
-release_builder_name = "BuildRelease"
-builder_names = [release_builder_name]
-for target_name, toolchains in OFFICIAL_MBED_LIBRARY_BUILD:
-    builder_name = "All_TC_%s" % target_name
-    builder_names.append(builder_name)
-c['schedulers'].append(ForceScheduler(name="force", builderNames=builder_names))
-
-####### BUILDERS
-
-# The 'builders' list defines the Builders, which tell Buildbot how to perform a build:
-# what steps, and which slaves can execute them.  Note that any particular build will
-# only take place on one slave.
-
-from buildbot.process.factory import BuildFactory
-from buildbot.steps.source.git import Git
-from buildbot.steps.shell import ShellCommand
-from buildbot.process.buildstep import LogLineObserver
-import buildbot.status.results
-import re
-import pprint
-
-class TestCommand(ShellCommand):
-    failedTestsCount = 0    # FAIL
-    passedTestsCount = 0    # OK
-    errorsTestsCount = 0    # ERROR
-    undefsTestsCount = 0    # UNDEF
-    testsResults = []
-
-    def __init__(self, stage=None,module=None, moduleset=None, **kwargs):
-        ShellCommand.__init__(self, **kwargs)
-        self.failedTestsCount = 0
-        self.passedTestsCount = 0
-        self.errorsTestsCount = 0
-        self.tracebackPyCount = 0
-        self.testsResults = []
-        testFailuresObserver = UnitTestsObserver ()
-        self.addLogObserver('stdio', testFailuresObserver)
-
-    def createSummary(self, log):
-        if self.failedTestsCount >= 0 or self.passedTestsCount >= 0 or self.errorsTestsCount >= 0 or self.undefsTestsCount >= 0:
-            self.addHTMLLog ('tests summary', self.createTestsSummary())
-
-    def getText(self, cmd, results):
-        text = ShellCommand.getText(self, cmd, results)
-        text.append("OK: "    + str(self.passedTestsCount))
-        text.append("FAIL: "  + str(self.failedTestsCount))
-        text.append("ERROR: " + str(self.errorsTestsCount))
-        text.append("UNDEF: " + str(self.undefsTestsCount))
-        text.append("Traceback: " + str(self.tracebackPyCount))
-        return text
-
-    def evaluateCommand(self, cmd):
-        if self.failedTestsCount > 0:
-            return buildbot.status.results.WARNINGS
-        elif self.errorsTestsCount > 0 or self.undefsTestsCount > 0 or self.tracebackPyCount > 0:
-            return buildbot.status.results.FAILURE
-        return buildbot.status.results.SUCCESS
-
-    def find_unique_tc_result_value(self, index):
-        """ Get unique values from each row in data parameter """
-        result = []
-        for tc_result_list in self.testsResults:
-            if tc_result_list[index] not in result:
-                result.append(tc_result_list[index])
-        return result
-
-    def html_view_test_result(self, targets, tests, toolchain):
-        """ Generates simple result table """
-        COLOR_OK      = "LimeGreen"
-        COLOR_FAIL    = "LightCoral"
-        COLOR_UNDEF   = "LightSlateGray"
-        COLOR_NEUTRAL = "Silver"
-
-        STATUS_COLORS = { "OK"    : COLOR_OK,
-                          "FAIL"  : COLOR_FAIL,
-                          "UNDEF" : COLOR_UNDEF}
-
-        result = "<table>"
-        result += "<tr valign='center'><td align='center'><b>" + toolchain + "</b></td>"
-        for test in tests:
-            result += "<td align='center'>" + test + "<br></td>"
-        result += "</tr>"
-
-        for target in targets:
-            result += "<tr><td width='110px'><br>" + target + "<br></td>"
-            for test in tests:
-                for tc_result_list in self.testsResults:
-                    if tc_result_list[1] == target and tc_result_list[2] == toolchain and tc_result_list[3] == test:
-                        status = tc_result_list[4]
-                        bgcolor = STATUS_COLORS[status]
-                        result += "<td align='center' bgcolor='" + bgcolor + "'>" + status + "</td>"
-                        break;
-                else:
-                    result += "<td bgcolor='" + COLOR_NEUTRAL + "'></td>"
-            result += "</tr>"
-        result += "</table>"
-        return result
-
-    def createTestsSummary (self):
-        targets = self.find_unique_tc_result_value(1)
-        toolchains = self.find_unique_tc_result_value(2)
-        tests = self.find_unique_tc_result_value(3)
-        html_result = ""
-        for toolchain in toolchains:
-            html_result += self.html_view_test_result(targets, tests, toolchain)
-            html_result += "<br>"
-        return html_result
-
-
-class UnitTestsObserver(LogLineObserver):
-    reGroupTestResult = []
-    reGroupPyResult = []
-
-    def __init__(self):
-        LogLineObserver.__init__(self)
-        if len(self.reGroupTestResult) == 0:
-            self.reGroupTestResult.append(re.compile("^(\w+Test)::(\w+)::(\w+)::(\w+)::.* \[(\w+)\] in (\d+\.\d+) of (\d+) sec[\r\n]*$"))
-
-    def outLineReceived(self, line):
-        matched = False
-        for r in self.reGroupTestResult:
-            result = r.match(line)
-            if result:
-                self.step.testsResults.append(result.groups())
-                if result.group(5) == 'OK':
-                    self.step.passedTestsCount += 1
-                elif result.group(5) == 'FAIL':
-                    self.step.failedTestsCount += 1
-                elif result.group(5) == 'UNDEF':
-                    self.step.undefsTestsCount += 1
-                elif result.group(5) == 'ERROR':
-                    self.step.errorsTestsCount += 1
-                matched = True
-
-
-class BuildCommand(ShellCommand):
-    warningsCount = 0    # [Warning]
-    errorsCount = 0      # [Error]
-    testsResults = []
-
-    def __init__(self, stage=None,module=None, moduleset=None, **kwargs):
-        ShellCommand.__init__(self, **kwargs)
-        self.warningsCount = 0
-        self.errorsCount = 0
-        self.testsResults = []
-        buildProcessObserver = BuildObserver ()
-        self.addLogObserver('stdio', buildProcessObserver)
-
-    def createSummary(self, log):
-        if self.warningsCount >= 0 or self.errorsCount >= 0:
-            self.addHTMLLog ('tests summary', self.createTestsSummary())
-
-    def getText(self, cmd, results):
-        text = ShellCommand.getText(self, cmd, results)
-        if self.warningsCount > 0 or self.errorsCount > 0:
-            text.append("warnings: " + str(self.warningsCount))
-            text.append("errors: " + str(self.errorsCount))
-        return text
-
-    def evaluateCommand(self, cmd):
-        if self.warningsCount > 0:
-            return buildbot.status.results.WARNINGS
-        elif self.errorsCount > 0:
-            return buildbot.status.results.FAILURE
-        else:
-            return buildbot.status.results.SUCCESS
-
-    def createTestsSummary (self):
-            # Create a string with your html report and return it
-            html = "<h4>Report</h4><table>"
-            #for result in self.testsResults:
-            html += "</table>"
-            return html
-
-class BuildObserver(LogLineObserver):
-    regroupresult = []
-
-    def __init__(self):
-        LogLineObserver.__init__(self)
-        if len(self.regroupresult) == 0:
-            self.regroupresult.append(re.compile("^\[([Ww]arning)\] (.*)"))
-            self.regroupresult.append(re.compile("^\[([Ee]rror)\] (.*)"))
-
-    def outLineReceived(self, line):
-        matched = False
-        for r in self.regroupresult:
-            result = r.match(line)
-            if result:
-                self.step.testsResults.append(result.groups())
-                if result.group(1) == 'Warning':
-                    self.step.warningsCount += 1
-                elif result.group(1) == 'Error':
-                    self.step.errorsCount += 1
-                matched = True
-        #if not matched:
-            # [Future-Dev] Other check...
-
-
-####### BUILDERS - mbed project
-git_clone = Git(repourl='https://github.com/mbedmicro/mbed.git', mode='incremental')
-
-# create the build factory for mbed and add the steps to it
-from buildbot.config import BuilderConfig
-
-c['builders'] = []
-
-copy_mbed_settings = ShellCommand(name = "copy mbed_settings.py",
-                                     command = "cp ../mbed_settings.py mbed_settings.py",
-                                     haltOnFailure = True,
-                                     description = "Copy mbed_settings.py")
-
-mbed_build_release = BuildFactory()
-mbed_build_release.addStep(git_clone)
-mbed_build_release.addStep(copy_mbed_settings)
-
-for target_name, toolchains in OFFICIAL_MBED_LIBRARY_BUILD:
-    builder_name = "All_TC_%s" % target_name
-    mbed_build = BuildFactory()
-    mbed_build.addStep(git_clone)
-    mbed_build.addStep(copy_mbed_settings)
-    # Adding all chains for target
-    for toolchain in toolchains:
-        build_py = BuildCommand(name = "Build %s using %s"  % (target_name, toolchain),
-                               command = "python tools/build.py -m %s -t %s" % (target_name, toolchain),
-                               haltOnFailure = True,
-                               warnOnWarnings = True,
-                               description = "Building %s using %s"  % (target_name, toolchain),
-                               descriptionDone = "Built %s using %s"  % (target_name, toolchain))
-
-        mbed_build.addStep(build_py)
-        mbed_build_release.addStep(build_py)    # For build release we need all toolchains
-
-    if target_name in OFFICIAL_MBED_TESTBED_SUPPORTED_HARDWARE:
-        copy_example_test_spec_json = ShellCommand(name = "Copy example_test_spec.json",
-                                                   command = "cp ../example_test_spec.json tools/data/example_test_spec.json",
-                                                   haltOnFailure = True,
-                                                   description = "Copy example_test_spec.json")
-
-        autotest_py = ShellCommand(name = "Running autotest.py for %s" % (target_name),
-                                   command = "python tools/autotest.py tools/data/example_test_spec.json",
-                                   haltOnFailure = True,
-                                   description = "Running autotest.py")
-
-        mbed_build.addStep(copy_example_test_spec_json)
-        mbed_build.addStep(autotest_py)
-
-        # Add builder with steps for each toolchain
-        c['builders'].append(BuilderConfig(name=builder_name,
-                             slavenames=["example-slave-%s" % (target_name)],
-                             factory=mbed_build))
-    else:
-        # Add builder with steps for each toolchain
-        c['builders'].append(BuilderConfig(name=builder_name,
-                             slavenames=["example-slave"],
-                             factory=mbed_build))
-
-# copy_example_test_spec_json = ShellCommand(name = "Copy example_test_spec.json",
-                                           # command = "cp ../example_test_spec.json tools/data/example_test_spec.json",
-                                           # haltOnFailure = True,
-                                           # description = "Copy example_test_spec.json")
-
-singletest_py = TestCommand(name = "Running Target Tests",
-                            command = "python tools/singletest.py -i tools/test_spec.json -M tools/muts_all.json",
-                            haltOnFailure = True,
-                            warnOnWarnings = True,
-                            description = "Running Target Tests",
-                            descriptionDone = "Target Testing Finished")
-
-mbed_build_release.addStep(singletest_py)
-# Release build collects all building toolchains
-c['builders'].append(BuilderConfig(name=release_builder_name,
-                     slavenames=["example-slave"],
-                     factory=mbed_build_release))
-
-####### STATUS TARGETS
-
-# 'status' is a list of Status Targets. The results of each build will be
-# pushed to these targets. buildbot/status/*.py has a variety to choose from,
-# including web pages, email senders, and IRC bots.
-
-c['status'] = []
-
-from buildbot.status import html
-from buildbot.status.web import authz, auth
-
-authz_cfg=authz.Authz(
-    # change any of these to True to enable; see the manual for more
-    # options
-    auth=auth.BasicAuth([("pyflakes","pyflakes")]),
-    gracefulShutdown = False,
-    forceBuild = 'auth', # use this to test your slave once it is set up
-    forceAllBuilds = True,
-    pingBuilder = True,
-    stopBuild = True,
-    stopAllBuilds = True,
-    cancelPendingBuild = True,
-)
-c['status'].append(html.WebStatus(http_port=8010, authz=authz_cfg, order_console_by_time=True))
-
-####### PROJECT IDENTITY
-
-# the 'title' string will appear at the top of this buildbot
-# installation's html.WebStatus home page (linked to the
-# 'titleURL') and is embedded in the title of the waterfall HTML page.
-
-c['title'] = "Green Tea"
-c['titleURL'] = ""
-
-# the 'buildbotURL' string should point to the location where the buildbot's
-# internal web server (usually the html.WebStatus page) is visible. This
-# typically uses the port number set in the Waterfall 'status' entry, but
-# with an externally-visible host name which the buildbot cannot figure out
-# without some help.
-
-c['buildbotURL'] = "http://localhost:8010/"
-
-####### DB URL
-
-c['db'] = {
-    # This specifies what database buildbot uses to store its state.  You can leave
-    # this at its default for all but the largest installations.
-    'db_url' : "sqlite:///state.sqlite",
-    # 'db_url' : "mysql://buildbot:123456@localhost/buildbot_mbed?max_idle=300",
-}
--- a/ci_templates/library_build/build_report.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,31 +0,0 @@
-<div class="toggleshow{% if report.failing|length == 0 %} toggleshow-hide{% endif %}">
-  <h3>
-    <a href="#" class="toggleshow-title">
-      <span class="toggleshow-arrow"></span>
-      {% if report.failing|length > 0 %}
-      <span class="redbold">[FAIL]</span>
-      {% else %}
-      <span class="greenbold">[PASS]</span>
-      {% endif %}
-
-      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}, Skipped: {{report.skipped|length}}
-    </a>
-  </h3>
-
-  <div class="toggleshow-body">
-    <h4 class="redbold">Failing</h4>
-    {% with build = report.failing %}
-    {% include 'library_build/build_report_table.html' %}
-    {% endwith %}
-
-    <h4 class="greenbold">Passing</h4>
-    {% with build = report.passing %}
-    {% include 'library_build/build_report_table.html' %}
-    {% endwith %}
-
-    <h4>Skipped</h4>
-    {% with build = report.skipped %}
-    {% include 'library_build/build_report_table.html' %}
-    {% endwith %}
-  </div>
-</div>
--- a/ci_templates/library_build/build_report_table.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,10 +0,0 @@
-<table class="sortable pane bigtable stripped-odd">
-  <tr>
-    <th>Toolchain</th>
-  </tr>
-  {% for run in build %}
-  <tr>
-    <td>{{run.toolchain}}</td>
-  </tr>
-  {% endfor %}
-</table>
--- a/ci_templates/library_build/report.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,11 +0,0 @@
-<h2>{{failing_builds|length}} Failing Builds</h2>
-{% for report in failing_builds %}
-{% include 'library_build/build_report.html' %}
-{% endfor %}
-
-<h2>{{passing_builds|length}} Passing Builds</h2>
-{% for report in passing_builds %}
-{% include 'library_build/build_report.html' %}
-{% endfor %}
-
-{% include 'scripts.js' %}
--- a/ci_templates/scripts.js	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,53 +0,0 @@
-<script>
-  var elements = document.querySelectorAll(".toggleshow"),
-      hideClass = 'toggleshow-hide';
-
-  for (var i = 0; i < elements.length; i++) {
-    var arrow = elements[i].querySelector(".toggleshow-arrow");
-    // Initial hide/show based on class
-    // Update arrow as well
-    if (containsClass(elements[i], 'toggleshow-hide')) {
-      toggleDisplay(elements[i]);
-      changeArrow(arrow, false);
-    } else {
-      changeArrow(arrow, true);
-    }
-
-    // Add click handler
-    addClick(elements[i], toggleDisplay);
-  }
-
-  function containsClass(element, className) {
-    var eleClassName = ' ' + elements[i].className + ' ';
-    return eleClassName.indexOf(' ' + className + ' ') > -1;
-  }
-
-  function toggleDisplay(parentElement) {
-    var body = parentElement.querySelector(".toggleshow-body"),
-        arrow = parentElement.querySelector(".toggleshow-arrow");
-
-    if (body.style.display == 'block' || body.style.display == '') {
-      body.style.display = 'none';
-      changeArrow(arrow, false);
-    } else {
-      body.style.display = 'block';
-      changeArrow(arrow, true);
-    }
-  }
-
-  function changeArrow(element, visible) {
-    if (visible) {
-      element.innerHTML = '&#9650';
-    } else {
-      element.innerHTML = '&#9660';
-    }
-  }
-
-  function addClick(parentElement, func) {
-    parentElement.querySelector(".toggleshow-title").addEventListener("click", function(e) {
-      func(parentElement);
-      e.preventDefault();
-      return false;
-    });
-  }
-</script>
--- a/ci_templates/tests_build/build_report.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,31 +0,0 @@
-<div class="toggleshow{% if report.failing|length == 0 %} toggleshow-hide{% endif %}">
-  <h3>
-    <a href="#" class="toggleshow-title">
-      <span class="toggleshow-arrow"></span>
-      {% if report.failing|length > 0 %}
-      <span class="redbold">[FAIL]</span>
-      {% else %}
-      <span class="greenbold">[PASS]</span>
-      {% endif %}
-
-      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}, Skipped: {{report.skipped|length}}
-    </a>
-  </h3>
-
-  <div class="toggleshow-body">
-    <h4 class="redbold">Failing</h4>
-    {% with build = report.failing %}
-    {% include 'tests_build/build_report_table.html' %}
-    {% endwith %}
-
-    <h4 class="greenbold">Passing</h4>
-    {% with build = report.passing %}
-    {% include 'tests_build/build_report_table.html' %}
-    {% endwith %}
-
-    <h4>Skipped</h4>
-    {% with build = report.skipped %}
-    {% include 'tests_build/build_report_table.html' %}
-    {% endwith %}
-  </div>
-</div>
--- a/ci_templates/tests_build/build_report_table.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,12 +0,0 @@
-<table class="sortable pane bigtable stripped-odd">
-  <tr>
-    <th>Toolchain</th>
-    <th>Project</th>
-  </tr>
-  {% for run in build %}
-  <tr>
-    <td>{{run.toolchain}}</td>
-    <td>{{run.project}}</td>
-  </tr>
-  {% endfor %}
-</table>
--- a/ci_templates/tests_build/report.html	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,11 +0,0 @@
-<h2>{{failing_builds|length}} Failing Builds</h2>
-{% for report in failing_builds %}
-{% include 'tests_build/build_report.html' %}
-{% endfor %}
-
-<h2>{{passing_builds|length}} Passing Builds</h2>
-{% for report in passing_builds %}
-{% include 'tests_build/build_report.html' %}
-{% endfor %}
-
-{% include 'scripts.js' %}
--- a/compliance/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2015 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
--- a/compliance/ioper_base.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,69 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2015 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-Author: Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
-
-"""
-
-import sys
-
-try:
-    from colorama import Fore
-except:
-    pass
-
-COLORAMA = 'colorama' in sys.modules
-
-
-class IOperTestCaseBase():
-    """ Interoperability test case base class
-        @return list of tuple (severity, Description)
-                Example:      (result.append((IOperTestSeverity.INFO, ""))
-    """
-
-    def __init__(self, scope=None):
-        self.PASS = 'PASS'
-        self.INFO = 'INFO'
-        self.ERROR = 'ERROR'
-        self.WARN = 'WARN'
-
-        self.scope = scope   # Default test scope (basic, pedantic, mbed-enabled etc...)
-
-    def test(self, param=None):
-        result = []
-        return result
-
-    def RED(self, text):
-        return self.color_text(text, color=Fore.RED, delim=Fore.RESET) if COLORAMA else text
-
-    def GREEN(self, text):
-        return self.color_text(text, color=Fore.GREEN, delim=Fore.RESET) if COLORAMA else text
-
-    def YELLOW(self, text):
-        return self.color_text(text, color=Fore.YELLOW, delim=Fore.RESET) if COLORAMA else text
-
-    def color_text(self, text, color='', delim=''):
-        return color + text + color + delim
-
-    def COLOR(self, severity, text):
-        colors = {
-            self.PASS : self.GREEN,
-            self.ERROR : self.RED,
-            self.WARN : self.YELLOW
-        }
-        if severity in colors:
-            return colors[severity](text)
-        return text
--- a/compliance/ioper_runner.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,125 +0,0 @@
-#!/usr/bin/env python2
-"""
-mbed SDK
-Copyright (c) 2011-2015 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-Author: Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
-
-"""
-
-import sys
-import mbed_lstools
-from prettytable import PrettyTable
-
-try:
-    from colorama import init
-except:
-    pass
-
-COLORAMA = 'colorama' in sys.modules
-
-from ioper_base import IOperTestCaseBase
-from ioper_test_fs import IOperTest_FileStructure_Basic
-from ioper_test_fs import IOperTest_FileStructure_MbedEnabled
-from ioper_test_target_id import IOperTest_TargetID_Basic
-from ioper_test_target_id import IOperTest_TargetID_MbedEnabled
-
-
-TEST_LIST = [IOperTest_TargetID_Basic('basic'),
-             IOperTest_TargetID_MbedEnabled('mbed-enabled'),
-             IOperTest_FileStructure_Basic('basic'),
-             IOperTest_FileStructure_MbedEnabled('mbed-enabled'),
-             IOperTestCaseBase('all'),  # Dummy used to add 'all' option
-            ]
-
-
-class IOperTestRunner():
-    """ Calls all i/face interoperability tests
-    """
-
-    def __init__(self, scope=None):
-        """ Test scope:
-            'pedantic' - all
-            'mbed-enabled' - let's try to check if this device is mbed-enabled
-            'basic' - just simple, passive tests (no device flashing)
-        """
-        self.requested_scope = scope    # Test scope given by user
-        self.raw_test_results = {}      # Raw test results, can be used by exporters: { Platform: [test results]} 
-
-        # Test scope definitions
-        self.SCOPE_BASIC = 'basic'                  # Basic tests, sanity checks
-        self.SCOPE_MBED_ENABLED = 'mbed-enabled'    # Let's try to check if this device is mbed-enabled
-        self.SCOPE_PEDANTIC = 'pedantic'            # Extensive tests
-        self.SCOPE_ALL = 'all'                      # All tests, equal to highest scope level
-
-        # This structure will help us sort test scopes so we can include them
-        # e.g. pedantic also includes basic and mbed-enabled tests
-        self.scopes = {self.SCOPE_BASIC : 0,
-                       self.SCOPE_MBED_ENABLED : 1,
-                       self.SCOPE_PEDANTIC : 2,
-                       self.SCOPE_ALL : 99,
-                    }
-
-        if COLORAMA:
-            init()  # colorama.init()
-
-    def run(self):
-        """ Run tests, calculate overall score and print test results
-        """
-        mbeds = mbed_lstools.create()
-        muts_list = mbeds.list_mbeds()
-        test_base = IOperTestCaseBase()
-
-        self.raw_test_results = {}
-        for i, mut in enumerate(muts_list):
-            result = []
-            self.raw_test_results[mut['platform_name']] = []
-
-            print "MBEDLS: Detected %s, port: %s, mounted: %s"% (mut['platform_name'],
-                                                                 mut['serial_port'],
-                                                                 mut['mount_point'])
-            print "Running interoperability test suite, scope '%s'" % (self.requested_scope)
-            for test_case in TEST_LIST:
-                if self.scopes[self.requested_scope] >= self.scopes[test_case.scope]:
-                    res = test_case.test(param=mut)
-                    result.extend(res)
-                    self.raw_test_results[mut['platform_name']].extend(res)
-
-            columns = ['Platform', 'Test Case', 'Result', 'Scope', 'Description']
-            pt = PrettyTable(columns)
-            for col in columns:
-                pt.align[col] = 'l'
-
-            for tr in result:
-                severity, tr_name, tr_scope, text = tr
-                tr = (test_base.COLOR(severity, mut['platform_name']),
-                      test_base.COLOR(severity, tr_name),
-                      test_base.COLOR(severity, severity),
-                      test_base.COLOR(severity, tr_scope),
-                      test_base.COLOR(severity, text))
-                pt.add_row(list(tr))
-            print pt.get_string(border=True, sortby='Result')
-            if i + 1 < len(muts_list):
-                print
-        return self.raw_test_results
-
-def get_available_oper_test_scopes():
-    """ Get list of available test scopes
-    """
-    scopes = set()
-    for oper_test in TEST_LIST:
-        if oper_test.scope is not None:
-            scopes.add(oper_test.scope)
-    return list(scopes)
--- a/compliance/ioper_test_fs.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,69 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2015 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-Author: Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
-
-"""
-
-import os.path
-from ioper_base import IOperTestCaseBase
-
-
-class IOperTest_FileStructure(IOperTestCaseBase):
-
-    def __init__(self, scope=None):
-        IOperTestCaseBase.__init__(self, scope)
-
-    def if_file_exist(self, fname, fail_severity=None):
-        file_path = os.path.join(self.param['mount_point'], fname)
-        exist = os.path.isfile(file_path)
-        tr_name = "FILE_EXIST(%s)" % fname.upper()
-        if exist:
-            self.result.append((self.PASS, tr_name, self.scope, "File '%s' exists" % file_path))
-        else:
-            self.result.append((fail_severity if fail_severity else self.ERROR, tr_name, self.scope, "File '%s' not found" % file_path))
-
-    def test(self, param=None):
-        self.result = []
-        if param:
-            pass
-        return self.result
-
-
-class IOperTest_FileStructure_Basic(IOperTest_FileStructure):
-    def __init__(self, scope=None):
-        IOperTest_FileStructure.__init__(self, scope)
-
-    def test(self, param=None):
-        self.param = param
-        self.result = []
-        if param:
-            self.if_file_exist('mbed.htm', self.ERROR)
-        return self.result
-
-
-class IOperTest_FileStructure_MbedEnabled(IOperTest_FileStructure):
-    def __init__(self, scope=None):
-        IOperTest_FileStructure.__init__(self, scope)
-
-    def test(self, param=None):
-        self.param = param
-        self.result = []
-        if param:
-            self.if_file_exist('mbed.htm', self.ERROR)
-            self.if_file_exist('DETAILS.TXT', self.ERROR)
-            self.if_file_exist('FAIL.TXT', self.INFO)
-        return self.result
--- a/compliance/ioper_test_target_id.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,111 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2015 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-Author: Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
-
-"""
-
-from ioper_base import IOperTestCaseBase
-
-
-class IOperTest_TargetID(IOperTestCaseBase):
-    """ tests related to target_id value
-    """
-
-    def __init__(self, scope=None):
-        IOperTestCaseBase.__init__(self, scope)
-        self.TARGET_ID_LEN = 24
-
-    def test_target_id_format(self, target_id, target_id_name):
-        # Expected length == 24, eg. "02400203D94B0E7724B7F3CF"
-        result = []
-        target_id_len = len(target_id) if target_id else 0
-        if target_id_len == self.TARGET_ID_LEN:
-            result.append((self.PASS, "TARGET_ID_LEN", self.scope, "%s '%s' is %d chars long " % (target_id_name, target_id, target_id_len)))
-            result.append((self.INFO, "FW_VER_STR", self.scope, "%s Version String is %s.%s.%s " % (target_id_name,
-                                                                                      target_id[0:4],
-                                                                                      target_id[4:8],
-                                                                                      target_id[8:24],
-                                                                                      )))
-        else:
-            result.append((self.ERROR, "TARGET_ID_LEN", self.scope, "%s '%s' is %d chars long. Expected %d chars" % (target_id_name, target_id, target_id_len, self.TARGET_ID_LEN)))
-        return result
-
-    def test_decode_target_id(self, target_id, target_id_name):
-        result = []
-        target_id_len = len(target_id) if target_id else 0
-        if target_id_len >= 4:
-            result.append((self.INFO, "FW_VEN_CODE", self.scope, "%s Vendor Code is '%s'" % (target_id_name, target_id[0:2])))
-            result.append((self.INFO, "FW_PLAT_CODE", self.scope, "%s Platform Code is '%s'" % (target_id_name, target_id[2:4])))
-            result.append((self.INFO, "FW_VER", self.scope, "%s Firmware Version is '%s'" % (target_id_name, target_id[4:8])))
-            result.append((self.INFO, "FW_HASH_SEC", self.scope, "%s Hash of secret is '%s'" % (target_id_name, target_id[8:24])))
-        return result
-
-    def test(self, param=None):
-        result = []
-        if param:
-            pass
-        return result
-
-
-class IOperTest_TargetID_Basic(IOperTest_TargetID):
-    """ Basic interoperability tests checking TargetID compliance
-    """
-
-    def __init__(self, scope=None):
-        IOperTest_TargetID.__init__(self, scope)
-
-    def test(self, param=None):
-        result = []
-
-        if param:
-            result.append((self.PASS, "TARGET_ID", self.scope, "TargetID '%s' found" % param['target_id']))
-
-            # Check if target name can be decoded with mbed-ls
-            if param['platform_name']:
-                result.append((self.PASS, "TARGET_ID_DECODE", self.scope, "TargetID '%s' decoded as '%s'" % (param['target_id'][0:4], param['platform_name'])))
-            else:
-                result.append((self.ERROR, "TARGET_ID_DECODE", self.scope, "TargetID '%s'... not decoded" % (param['target_id'] if param['target_id'] else '')))
-
-            # Test for USBID and mbed.htm consistency
-            if param['target_id_mbed_htm'] == param['target_id_usb_id']:
-                result.append((self.PASS, "TARGET_ID_MATCH", self.scope, "TargetID (USBID) and TargetID (mbed.htm) match"))
-            else:
-                text = "TargetID (USBID) and TargetID (mbed.htm) don't match: '%s' != '%s'" % (param['target_id_usb_id'], param['target_id_mbed_htm'])
-                result.append((self.WARN, "TARGET_ID_MATCH", self.scope, text))
-        else:
-            result.append((self.ERROR, "TARGET_ID", self.scope, "TargetID not found"))
-        return result
-
-class IOperTest_TargetID_MbedEnabled(IOperTest_TargetID):
-    """ Basic interoperability tests checking TargetID compliance
-    """
-
-    def __init__(self, scope=None):
-        IOperTest_TargetID.__init__(self, scope)
-
-    def test(self, param=None):
-        result = []
-
-        if param:
-            # Target ID tests:
-            result += self.test_target_id_format(param['target_id_usb_id'], "TargetId (USBID)")
-            result += self.test_target_id_format(param['target_id_mbed_htm'], "TargetId (mbed.htm)")
-
-            # Some extra info about TargetID itself
-            result += self.test_decode_target_id(param['target_id_usb_id'], "TargetId (USBID)")
-            result += self.test_decode_target_id(param['target_id_mbed_htm'], "TargetId (mbed.htm)")
-        return result
--- a/config.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,819 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-from copy import deepcopy
-import os
-import sys
-# Implementation of mbed configuration mechanism
-from tools.utils import json_file_to_dict
-from tools.targets import CUMULATIVE_ATTRIBUTES, TARGET_MAP, \
-    generate_py_target, get_resolution_order
-
-# Base class for all configuration exceptions
-class ConfigException(Exception):
-    """Config system only exception. Makes it easier to distinguish config
-    errors"""
-    pass
-
-class ConfigParameter(object):
-    """This class keeps information about a single configuration parameter"""
-
-    def __init__(self, name, data, unit_name, unit_kind):
-        """Construct a ConfigParameter
-
-        Positional arguments:
-        name - the name of the configuration parameter
-        data - the data associated with the configuration parameter
-        unit_name - the unit (target/library/application) that defines this
-                    parameter
-        unit_ kind - the kind of the unit ("target", "library" or "application")
-        """
-        self.name = self.get_full_name(name, unit_name, unit_kind,
-                                       allow_prefix=False)
-        self.defined_by = self.get_display_name(unit_name, unit_kind)
-        self.set_value(data.get("value", None), unit_name, unit_kind)
-        self.help_text = data.get("help", None)
-        self.required = data.get("required", False)
-        self.macro_name = data.get("macro_name", "MBED_CONF_%s" %
-                                   self.sanitize(self.name.upper()))
-        self.config_errors = []
-
-    @staticmethod
-    def get_full_name(name, unit_name, unit_kind, label=None,
-                      allow_prefix=True):
-        """Return the full (prefixed) name of a parameter. If the parameter
-        already has a prefix, check if it is valid
-
-        Positional arguments:
-        name - the simple (unqualified) name of the parameter
-        unit_name - the unit (target/library/application) that defines this
-                    parameter
-        unit_kind - the kind of the unit ("target", "library" or "application")
-
-        Keyword arguments:
-        label - the name of the label in the 'target_config_overrides' section
-        allow_prefix - True to allow the original name to have a prefix, False
-                       otherwise
-        """
-        if name.find('.') == -1: # the name is not prefixed
-            if unit_kind == "target":
-                prefix = "target."
-            elif unit_kind == "application":
-                prefix = "app."
-            else:
-                prefix = unit_name + '.'
-            return prefix + name
-        # The name has a prefix, so check if it is valid
-        if not allow_prefix:
-            raise ConfigException("Invalid parameter name '%s' in '%s'" %
-                                  (name, ConfigParameter.get_display_name(
-                                      unit_name, unit_kind, label)))
-        temp = name.split(".")
-        # Check if the parameter syntax is correct (must be
-        # unit_name.parameter_name)
-        if len(temp) != 2:
-            raise ConfigException("Invalid parameter name '%s' in '%s'" %
-                                  (name, ConfigParameter.get_display_name(
-                                      unit_name, unit_kind, label)))
-        prefix = temp[0]
-        # Check if the given parameter prefix matches the expected prefix
-        if (unit_kind == "library" and prefix != unit_name) or \
-           (unit_kind == "target" and prefix != "target"):
-            raise ConfigException(
-                "Invalid prefix '%s' for parameter name '%s' in '%s'" %
-                (prefix, name, ConfigParameter.get_display_name(
-                    unit_name, unit_kind, label)))
-        return name
-
-    @staticmethod
-    def get_display_name(unit_name, unit_kind, label=None):
-        """Return the name displayed for a unit when interrogating the origin
-        and the last set place of a parameter
-
-        Positional arguments:
-        unit_name - the unit (target/library/application) that defines this
-                    parameter
-        unit_kind - the kind of the unit ("target", "library" or "application")
-
-        Keyword arguments:
-        label - the name of the label in the 'target_config_overrides' section
-        """
-        if unit_kind == "target":
-            return "target:" + unit_name
-        elif unit_kind == "application":
-            return "application%s" % ("[%s]" % label if label else "")
-        else: # library
-            return "library:%s%s" % (unit_name, "[%s]" % label if label else "")
-
-    @staticmethod
-    def sanitize(name):
-        """ "Sanitize" a name so that it is a valid C macro name. Currently it
-        simply replaces '.' and '-' with '_'.
-
-        Positional arguments:
-        name - the name to make into a valid C macro
-        """
-        return name.replace('.', '_').replace('-', '_')
-
-    def set_value(self, value, unit_name, unit_kind, label=None):
-        """ Sets a value for this parameter, remember the place where it was
-        set.  If the value is a Boolean, it is converted to 1 (for True) or
-        to 0 (for False).
-
-        Positional arguments:
-        value - the value of the parameter
-        unit_name - the unit (target/library/application) that defines this
-                   parameter
-        unit_kind - the kind of the unit ("target", "library" or "application")
-
-        Keyword arguments:
-        label - the name of the label in the 'target_config_overrides' section
-               (optional)
-        """
-        self.value = int(value) if isinstance(value, bool) else value
-        self.set_by = self.get_display_name(unit_name, unit_kind, label)
-
-    def __str__(self):
-        """Return the string representation of this configuration parameter
-
-        Arguments: None
-        """
-        if self.value is not None:
-            return '%s = %s (macro name: "%s")' % \
-                (self.name, self.value, self.macro_name)
-        else:
-            return '%s has no value' % self.name
-
-    def get_verbose_description(self):
-        """Return a verbose description of this configuration parameter as a
-        string
-
-        Arguments: None
-        """
-        desc = "Name: %s%s\n" % \
-               (self.name, " (required parameter)" if self.required else "")
-        if self.help_text:
-            desc += "    Description: %s\n" % self.help_text
-        desc += "    Defined by: %s\n" % self.defined_by
-        if not self.value:
-            return desc + "    No value set"
-        desc += "    Macro name: %s\n" % self.macro_name
-        desc += "    Value: %s (set by %s)" % (self.value, self.set_by)
-        return desc
-
-class ConfigMacro(object):
-    """ A representation of a configuration macro. It handles both macros
-    without a value (MACRO) and with a value (MACRO=VALUE)
-    """
-    def __init__(self, name, unit_name, unit_kind):
-        """Construct a ConfigMacro object
-
-        Positional arguments:
-        name - the macro's name
-        unit_name - the location where the macro was defined
-        unit_kind - the type of macro this is
-        """
-        self.name = name
-        self.defined_by = ConfigParameter.get_display_name(unit_name, unit_kind)
-        if name.find("=") != -1:
-            tmp = name.split("=")
-            if len(tmp) != 2:
-                raise ValueError("Invalid macro definition '%s' in '%s'" %
-                                 (name, self.defined_by))
-            self.macro_name = tmp[0]
-            self.macro_value = tmp[1]
-        else:
-            self.macro_name = name
-            self.macro_value = None
-
-class ConfigCumulativeOverride(object):
-    """Representation of overrides for cumulative attributes"""
-    def __init__(self, name, additions=None, removals=None, strict=False):
-        """Construct a ConfigCumulativeOverride object
-
-        Positional arguments:
-        name - the name of the config file this came from ?
-
-        Keyword arguments:
-        additions - macros to add to the overrides
-        removals - macros to remove from the overrides
-        strict - Boolean indicating that attempting to remove from an override
-                 that does not exist should error
-        """
-        self.name = name
-        if additions:
-            self.additions = set(additions)
-        else:
-            self.additions = set()
-        if removals:
-            self.removals = set(removals)
-        else:
-            self.removals = set()
-        self.strict = strict
-
-    def remove_cumulative_overrides(self, overrides):
-        """Extend the list of override removals.
-
-        Positional arguments:
-        overrides - a list of names that, when the override is evaluated, will
-                    be removed
-        """
-        for override in overrides:
-            if override in self.additions:
-                raise ConfigException(
-                    "Configuration conflict. The %s %s both added and removed."
-                    % (self.name[:-1], override))
-
-        self.removals |= set(overrides)
-
-    def add_cumulative_overrides(self, overrides):
-        """Extend the list of override additions.
-
-        Positional arguments:
-        overrides - a list of a names that, when the override is evaluated, will
-                    be added to the list
-        """
-        for override in overrides:
-            if override in self.removals or \
-               (self.strict and override not in self.additions):
-                raise ConfigException(
-                    "Configuration conflict. The %s %s both added and removed."
-                    % (self.name[:-1], override))
-
-        self.additions |= set(overrides)
-
-    def strict_cumulative_overrides(self, overrides):
-        """Remove all overrides that are not the specified ones
-
-        Positional arguments:
-        overrides - a list of names that will replace the entire attribute when
-                    this override is evaluated.
-        """
-        self.remove_cumulative_overrides(self.additions - set(overrides))
-        self.add_cumulative_overrides(overrides)
-        self.strict = True
-
-    def update_target(self, target):
-        """Update the attributes of a target based on this override"""
-        setattr(target, self.name,
-                list((set(getattr(target, self.name, []))
-                      | self.additions) - self.removals))
-
-
-def _process_config_parameters(data, params, unit_name, unit_kind):
-    """Process a "config_parameters" section in either a target, a library,
-    or the application.
-
-    Positional arguments:
-    data - a dictionary with the configuration parameters
-    params - storage for the discovered configuration parameters
-    unit_name - the unit (target/library/application) that defines this
-                parameter
-    unit_kind - the kind of the unit ("target", "library" or "application")
-    """
-    for name, val in data.items():
-        full_name = ConfigParameter.get_full_name(name, unit_name, unit_kind)
-        # If the parameter was already defined, raise an error
-        if full_name in params:
-            raise ConfigException(
-                "Parameter name '%s' defined in both '%s' and '%s'" %
-                (name, ConfigParameter.get_display_name(unit_name, unit_kind),
-                 params[full_name].defined_by))
-        # Otherwise add it to the list of known parameters
-        # If "val" is not a dictionary, this is a shortcut definition,
-        # otherwise it is a full definition
-        params[full_name] = ConfigParameter(name, val if isinstance(val, dict)
-                                            else {"value": val}, unit_name,
-                                            unit_kind)
-    return params
-
-
-def _process_macros(mlist, macros, unit_name, unit_kind):
-    """Process a macro definition and check for incompatible duplicate
-    definitions.
-
-    Positional arguments:
-    mlist - list of macro names to process
-    macros - dictionary with currently discovered macros
-    unit_name - the unit (library/application) that defines this macro
-    unit_kind - the kind of the unit ("library" or "application")
-    """
-    for mname in mlist:
-        macro = ConfigMacro(mname, unit_name, unit_kind)
-        if (macro.macro_name in macros) and \
-           (macros[macro.macro_name].name != mname):
-            # Found an incompatible definition of the macro in another module,
-            # so raise an error
-            full_unit_name = ConfigParameter.get_display_name(unit_name,
-                                                              unit_kind)
-            raise ConfigException(
-                ("Macro '%s' defined in both '%s' and '%s'"
-                 % (macro.macro_name, macros[macro.macro_name].defined_by,
-                    full_unit_name)) +
-                " with incompatible values")
-        macros[macro.macro_name] = macro
-
-
-class Config(object):
-    """'Config' implements the mbed configuration mechanism"""
-
-    # Libraries and applications have different names for their configuration
-    # files
-    __mbed_app_config_name = "mbed_app.json"
-    __mbed_lib_config_name = "mbed_lib.json"
-
-    # Allowed keys in configuration dictionaries
-    # (targets can have any kind of keys, so this validation is not applicable
-    # to them)
-    __allowed_keys = {
-        "library": set(["name", "config", "target_overrides", "macros",
-                        "__config_path"]),
-        "application": set(["config", "target_overrides",
-                            "macros", "__config_path"])
-    }
-
-    # Allowed features in configurations
-    __allowed_features = [
-        "UVISOR", "BLE", "CLIENT", "IPV4", "LWIP", "COMMON_PAL", "STORAGE", "NANOSTACK",
-        # Nanostack configurations
-        "LOWPAN_BORDER_ROUTER", "LOWPAN_HOST", "LOWPAN_ROUTER", "NANOSTACK_FULL", "THREAD_BORDER_ROUTER", "THREAD_END_DEVICE", "THREAD_ROUTER", "ETHERNET_HOST"
-        ]
-
-    def __init__(self, tgt, top_level_dirs=None, app_config=None):
-        """Construct a mbed configuration
-
-        Positional arguments:
-        target - the name of the mbed target used for this configuration
-                 instance
-
-        Keyword argumets:
-        top_level_dirs - a list of top level source directories (where
-                         mbed_app_config.json could be found)
-        app_config - location of a chosen mbed_app.json file
-
-        NOTE: Construction of a Config object will look for the application
-        configuration file in top_level_dirs. If found once, it'll parse it.
-        top_level_dirs may be None (in this case, the constructor will not
-        search for a configuration file).
-        """
-        app_config_location = app_config
-        if app_config_location is None:
-            for directory in top_level_dirs or []:
-                full_path = os.path.join(directory, self.__mbed_app_config_name)
-                if os.path.isfile(full_path):
-                    if app_config_location is not None:
-                        raise ConfigException("Duplicate '%s' file in '%s' and '%s'"
-                                              % (self.__mbed_app_config_name,
-                                                 app_config_location, full_path))
-                    else:
-                        app_config_location = full_path
-        try:
-            self.app_config_data = json_file_to_dict(app_config_location) \
-                                   if app_config_location else {}
-        except ValueError as exc:
-            sys.stderr.write(str(exc) + "\n")
-            self.app_config_data = {}
-
-        # Check the keys in the application configuration data
-        unknown_keys = set(self.app_config_data.keys()) - \
-                       self.__allowed_keys["application"]
-        if unknown_keys:
-            raise ConfigException("Unknown key(s) '%s' in %s" %
-                                  (",".join(unknown_keys),
-                                   self.__mbed_app_config_name))
-        # Update the list of targets with the ones defined in the application
-        # config, if applicable
-        self.lib_config_data = {}
-        # Make sure that each config is processed only once
-        self.processed_configs = {}
-        if isinstance(tgt, basestring):
-            if tgt in TARGET_MAP:
-                self.target = TARGET_MAP[tgt]
-            else:
-                self.target = generate_py_target(
-                    self.app_config_data.get("custom_targets", {}), tgt)
-
-        else:
-            self.target = tgt
-        self.target = deepcopy(self.target)
-        self.target_labels = self.target.labels
-
-        self.cumulative_overrides = {key: ConfigCumulativeOverride(key)
-                                     for key in CUMULATIVE_ATTRIBUTES}
-
-        self._process_config_and_overrides(self.app_config_data, {}, "app",
-                                           "application")
-        self.config_errors = None
-
-    def add_config_files(self, flist):
-        """Add configuration files
-
-        Positional arguments:
-        flist - a list of files to add to this configuration
-        """
-        for config_file in flist:
-            if not config_file.endswith(self.__mbed_lib_config_name):
-                continue
-            full_path = os.path.normpath(os.path.abspath(config_file))
-            # Check that we didn't already process this file
-            if self.processed_configs.has_key(full_path):
-                continue
-            self.processed_configs[full_path] = True
-            # Read the library configuration and add a "__full_config_path"
-            # attribute to it
-            try:
-                cfg = json_file_to_dict(config_file)
-            except ValueError as exc:
-                sys.stderr.write(str(exc) + "\n")
-                continue
-
-            cfg["__config_path"] = full_path
-
-            if "name" not in cfg:
-                raise ConfigException(
-                    "Library configured at %s has no name field." % full_path)
-            # If there's already a configuration for a module with the same
-            # name, exit with error
-            if self.lib_config_data.has_key(cfg["name"]):
-                raise ConfigException(
-                    "Library name '%s' is not unique (defined in '%s' and '%s')"
-                    % (cfg["name"], full_path,
-                       self.lib_config_data[cfg["name"]]["__config_path"]))
-            self.lib_config_data[cfg["name"]] = cfg
-
-
-    def _process_config_and_overrides(self, data, params, unit_name, unit_kind):
-        """Process "config_parameters" and "target_config_overrides" into a
-        given dictionary
-
-        Positional arguments:
-        data - the configuration data of the library/appliation
-        params - storage for the discovered configuration parameters
-        unit_name - the unit (library/application) that defines this parameter
-        unit_kind - the kind of the unit ("library" or "application")
-        """
-        self.config_errors = []
-        _process_config_parameters(data.get("config", {}), params, unit_name,
-                                   unit_kind)
-        for label, overrides in data.get("target_overrides", {}).items():
-            # If the label is defined by the target or it has the special value
-            # "*", process the overrides
-            if (label == '*') or (label in self.target_labels):
-                # Check for invalid cumulative overrides in libraries
-                if (unit_kind == 'library' and
-                    any(attr.startswith('target.extra_labels') for attr
-                        in overrides.iterkeys())):
-                    raise ConfigException(
-                        "Target override 'target.extra_labels' in " +
-                        ConfigParameter.get_display_name(unit_name, unit_kind,
-                                                         label) +
-                        " is only allowed at the application level")
-
-                # Parse out cumulative overrides
-                for attr, cumulatives in self.cumulative_overrides.iteritems():
-                    if 'target.'+attr in overrides:
-                        cumulatives.strict_cumulative_overrides(
-                            overrides['target.'+attr])
-                        del overrides['target.'+attr]
-
-                    if 'target.'+attr+'_add' in overrides:
-                        cumulatives.add_cumulative_overrides(
-                            overrides['target.'+attr+'_add'])
-                        del overrides['target.'+attr+'_add']
-
-                    if 'target.'+attr+'_remove' in overrides:
-                        cumulatives.remove_cumulative_overrides(
-                            overrides['target.'+attr+'_remove'])
-                        del overrides['target.'+attr+'_remove']
-
-                # Consider the others as overrides
-                for name, val in overrides.items():
-                    # Get the full name of the parameter
-                    full_name = ConfigParameter.get_full_name(name, unit_name,
-                                                              unit_kind, label)
-                    if full_name in params:
-                        params[full_name].set_value(val, unit_name, unit_kind,
-                                                    label)
-                    else:
-                        self.config_errors.append(
-                            ConfigException(
-                                "Attempt to override undefined parameter" +
-                                (" '%s' in '%s'"
-                                 % (full_name,
-                                    ConfigParameter.get_display_name(unit_name,
-                                                                     unit_kind,
-                                                                     label)))))
-
-        for cumulatives in self.cumulative_overrides.itervalues():
-            cumulatives.update_target(self.target)
-
-        return params
-
-    def get_target_config_data(self):
-        """Read and interpret configuration data defined by targets.
-
-        We consider the resolution order for our target and sort it by level
-        reversed, so that we first look at the top level target (the parent),
-        then its direct children, then the children of those children and so on,
-        until we reach self.target
-        TODO: this might not work so well in some multiple inheritance scenarios
-        At each step, look at two keys of the target data:
-          - config_parameters: used to define new configuration parameters
-          - config_overrides: used to override already defined configuration
-                              parameters
-
-        Arguments: None
-        """
-        params, json_data = {}, self.target.json_data
-        resolution_order = [e[0] for e
-                            in sorted(
-                                self.target.resolution_order,
-                                key=lambda e: e[1], reverse=True)]
-        for tname in resolution_order:
-            # Read the target data directly from its description
-            target_data = json_data[tname]
-            # Process definitions first
-            _process_config_parameters(target_data.get("config", {}), params,
-                                       tname, "target")
-            # Then process overrides
-            for name, val in target_data.get("overrides", {}).items():
-                full_name = ConfigParameter.get_full_name(name, tname, "target")
-                # If the parameter name is not defined or if there isn't a path
-                # from this target to the target where the parameter was defined
-                # in the target inheritance tree, raise an error We need to use
-                # 'defined_by[7:]' to remove the "target:" prefix from
-                # defined_by
-                rel_names = [tgt for tgt, _ in
-                             get_resolution_order(self.target.json_data, tname,
-                                                  [])]
-                if (full_name not in params) or \
-                   (params[full_name].defined_by[7:] not in rel_names):
-                    raise ConfigException(
-                        "Attempt to override undefined parameter '%s' in '%s'"
-                        % (name,
-                           ConfigParameter.get_display_name(tname, "target")))
-                # Otherwise update the value of the parameter
-                params[full_name].set_value(val, tname, "target")
-        return params
-
-    def get_lib_config_data(self):
-        """ Read and interpret configuration data defined by libraries. It is
-        assumed that "add_config_files" above was already called and the library
-        configuration data exists in self.lib_config_data
-
-        Arguments: None
-        """
-        all_params, macros = {}, {}
-        for lib_name, lib_data in self.lib_config_data.items():
-            unknown_keys = set(lib_data.keys()) - self.__allowed_keys["library"]
-            if unknown_keys:
-                raise ConfigException("Unknown key(s) '%s' in %s" %
-                                      (",".join(unknown_keys), lib_name))
-            all_params.update(self._process_config_and_overrides(lib_data, {},
-                                                                 lib_name,
-                                                                 "library"))
-            _process_macros(lib_data.get("macros", []), macros, lib_name,
-                            "library")
-        return all_params, macros
-
-    def get_app_config_data(self, params, macros):
-        """ Read and interpret the configuration data defined by the target. The
-        target can override any configuration parameter, as well as define its
-        own configuration data.
-
-        Positional arguments.
-        params - the dictionary with configuration parameters found so far (in
-                 the target and in libraries)
-        macros - the list of macros defined in the configuration
-        """
-        app_cfg = self.app_config_data
-        # The application can have a "config_parameters" and a
-        # "target_config_overrides" section just like a library
-        self._process_config_and_overrides(app_cfg, params, "app",
-                                           "application")
-        # The application can also defined macros
-        _process_macros(app_cfg.get("macros", []), macros, "app",
-                        "application")
-
-    def get_config_data(self):
-        """ Return the configuration data in two parts: (params, macros)
-        params - a dictionary with mapping a name to a ConfigParam
-        macros - the list of macros defined with "macros" in libraries and in
-                 the application (as ConfigMacro instances)
-
-        Arguments: None
-        """
-        all_params = self.get_target_config_data()
-        lib_params, macros = self.get_lib_config_data()
-        all_params.update(lib_params)
-        self.get_app_config_data(all_params, macros)
-        return all_params, macros
-
-    @staticmethod
-    def _check_required_parameters(params):
-        """Check that there are no required parameters without a value
-
-        Positional arguments:
-        params - the list of parameters to check
-
-        NOTE: This function does not return. Instead, it throws a
-        ConfigException when any of the required parameters are missing values
-        """
-        for param in params.values():
-            if param.required and (param.value is None):
-                raise ConfigException("Required parameter '" + param.name +
-                                      "' defined by '" + param.defined_by +
-                                      "' doesn't have a value")
-
-    @staticmethod
-    def parameters_to_macros(params):
-        """ Encode the configuration parameters as C macro definitions.
-
-        Positional arguments:
-        params - a dictionary mapping a name to a ConfigParameter
-
-        Return: a list of strings that encode the configuration parameters as
-        C pre-processor macros
-        """
-        return ['%s=%s' % (m.macro_name, m.value) for m in params.values()
-                if m.value is not None]
-
-    @staticmethod
-    def config_macros_to_macros(macros):
-        """ Return the macro definitions generated for a dictionary of
-        ConfigMacros (as returned by get_config_data).
-
-        Positional arguments:
-        params - a dictionary mapping a name to a ConfigMacro instance
-
-        Return: a list of strings that are the C pre-processor macros
-        """
-        return [m.name for m in macros.values()]
-
-    @staticmethod
-    def config_to_macros(config):
-        """Convert the configuration data to a list of C macros
-
-        Positional arguments:
-        config - configuration data as (ConfigParam instances, ConfigMacro
-                 instances) tuple (as returned by get_config_data())
-        """
-        params, macros = config[0], config[1]
-        Config._check_required_parameters(params)
-        return Config.config_macros_to_macros(macros) + \
-            Config.parameters_to_macros(params)
-
-    def get_config_data_macros(self):
-        """ Convert a Config object to a list of C macros
-
-        Arguments: None
-        """
-        return self.config_to_macros(self.get_config_data())
-
-    def get_features(self):
-        """ Extract any features from the configuration data
-
-        Arguments: None
-        """
-        params, _ = self.get_config_data()
-        self._check_required_parameters(params)
-        self.cumulative_overrides['features']\
-            .update_target(self.target)
-
-        return self.target.features
-
-    def validate_config(self):
-        """ Validate configuration settings. This either returns True or
-        raises an exception
-
-        Arguments: None
-        """
-        if self.config_errors:
-            raise self.config_errors[0]
-        return True
-
-
-    def load_resources(self, resources):
-        """ Load configuration data from a Resources instance and expand it
-        based on defined features.
-
-        Positional arguments:
-        resources - the resources object to load from and expand
-        """
-        # Update configuration files until added features creates no changes
-        prev_features = set()
-        while True:
-            # Add/update the configuration with any .json files found while
-            # scanning
-            self.add_config_files(resources.json_files)
-
-            # Add features while we find new ones
-            features = set(self.get_features())
-            if features == prev_features:
-                break
-
-            for feature in features:
-                if feature in resources.features:
-                    resources.add(resources.features[feature])
-
-            prev_features = features
-        self.validate_config()
-
-        return resources
-
-    @staticmethod
-    def config_to_header(config, fname=None):
-        """ Convert the configuration data to the content of a C header file,
-        meant to be included to a C/C++ file. The content is returned as a
-        string.
-
-        Positional arguments:
-        config - configuration data as (ConfigParam instances, ConfigMacro
-                 instances) tuple (as returned by get_config_data())
-
-        Keyword arguments:
-        fname -  also write the content is to the file called "fname".
-                 WARNING: if 'fname' names an existing file, it will be
-                 overwritten!
-        """
-        params, macros = config[0], config[1]
-        Config._check_required_parameters(params)
-        header_data = "// Automatically generated configuration file.\n"
-        header_data += "// DO NOT EDIT, content will be overwritten.\n\n"
-        header_data += "#ifndef __MBED_CONFIG_DATA__\n"
-        header_data += "#define __MBED_CONFIG_DATA__\n\n"
-        # Compute maximum length of macro names for proper alignment
-        max_param_macro_name_len = (max([len(m.macro_name) for m
-                                         in params.values()
-                                         if m.value is not None])
-                                    if params else 0)
-        max_direct_macro_name_len = (max([len(m.macro_name) for m
-                                         in macros.values()])
-                                     if macros else 0)
-        max_macro_name_len = max(max_param_macro_name_len,
-                                 max_direct_macro_name_len)
-        # Compute maximum length of macro values for proper alignment
-        max_param_macro_val_len = (max([len(str(m.value)) for m
-                                       in params.values()
-                                       if m.value is not None])
-                                   if params else 0)
-        max_direct_macro_val_len = max([len(m.macro_value or "") for m
-                                        in macros.values()]) if macros else 0
-        max_macro_val_len = max(max_param_macro_val_len,
-                                max_direct_macro_val_len)
-        # Generate config parameters first
-        if params:
-            header_data += "// Configuration parameters\n"
-            for macro in params.values():
-                if macro.value is not None:
-                    header_data += ("#define {0:<{1}} {2!s:<{3}} " +
-                                    "// set by {4}\n")\
-                        .format(macro.macro_name, max_macro_name_len,
-                                macro.value, max_macro_val_len, macro.set_by)
-        # Then macros
-        if macros:
-            header_data += "// Macros\n"
-            for macro in macros.values():
-                if macro.macro_value:
-                    header_data += ("#define {0:<{1}} {2!s:<{3}}" +
-                                    " // defined by {4}\n")\
-                        .format(macro.macro_name, max_macro_name_len,
-                                macro.macro_value, max_macro_val_len,
-                                macro.defined_by)
-                else:
-                    header_data += ("#define {0:<{1}}" +
-                                    " // defined by {2}\n")\
-                        .format(macro.macro_name,
-                                max_macro_name_len + max_macro_val_len + 1,
-                                macro.defined_by)
-        header_data += "\n#endif\n"
-        # If fname is given, write "header_data" to it
-        if fname:
-            with open(fname, "w+") as file_desc:
-                file_desc.write(header_data)
-        return header_data
-
-    def get_config_data_header(self, fname=None):
-        """ Convert a Config instance to the content of a C header file, meant
-        to be included to a C/C++ file. The content is returned as a string.
-
-        Keyword arguments:
-        fname - also write the content to the file called "fname".
-                WARNING: if 'fname' names an existing file, it will be
-                overwritten!
-        """
-        return self.config_to_header(self.get_config_data(), fname)
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/config/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,947 @@
+"""
+mbed SDK
+Copyright (c) 2016 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+
+from copy import deepcopy
+import os
+from os.path import dirname, abspath, exists, join
+import sys
+from collections import namedtuple
+from os.path import splitext, relpath
+from intelhex import IntelHex
+from jinja2 import FileSystemLoader, StrictUndefined
+from jinja2.environment import Environment
+# Implementation of mbed configuration mechanism
+from tools.utils import json_file_to_dict, intelhex_offset
+from tools.arm_pack_manager import Cache
+from tools.targets import CUMULATIVE_ATTRIBUTES, TARGET_MAP, \
+    generate_py_target, get_resolution_order
+
+# Base class for all configuration exceptions
+class ConfigException(Exception):
+    """Config system only exception. Makes it easier to distinguish config
+    errors"""
+    pass
+
+class ConfigParameter(object):
+    """This class keeps information about a single configuration parameter"""
+
+    def __init__(self, name, data, unit_name, unit_kind):
+        """Construct a ConfigParameter
+
+        Positional arguments:
+        name - the name of the configuration parameter
+        data - the data associated with the configuration parameter
+        unit_name - the unit (target/library/application) that defines this
+                    parameter
+        unit_ kind - the kind of the unit ("target", "library" or "application")
+        """
+        self.name = self.get_full_name(name, unit_name, unit_kind,
+                                       allow_prefix=False)
+        self.defined_by = self.get_display_name(unit_name, unit_kind)
+        self.set_value(data.get("value", None), unit_name, unit_kind)
+        self.help_text = data.get("help", None)
+        self.required = data.get("required", False)
+        self.macro_name = data.get("macro_name", "MBED_CONF_%s" %
+                                   self.sanitize(self.name.upper()))
+        self.config_errors = []
+
+    @staticmethod
+    def get_full_name(name, unit_name, unit_kind, label=None,
+                      allow_prefix=True):
+        """Return the full (prefixed) name of a parameter. If the parameter
+        already has a prefix, check if it is valid
+
+        Positional arguments:
+        name - the simple (unqualified) name of the parameter
+        unit_name - the unit (target/library/application) that defines this
+                    parameter
+        unit_kind - the kind of the unit ("target", "library" or "application")
+
+        Keyword arguments:
+        label - the name of the label in the 'target_config_overrides' section
+        allow_prefix - True to allow the original name to have a prefix, False
+                       otherwise
+        """
+        if name.find('.') == -1: # the name is not prefixed
+            if unit_kind == "target":
+                prefix = "target."
+            elif unit_kind == "application":
+                prefix = "app."
+            else:
+                prefix = unit_name + '.'
+            return prefix + name
+        # The name has a prefix, so check if it is valid
+        if not allow_prefix:
+            raise ConfigException("Invalid parameter name '%s' in '%s'" %
+                                  (name, ConfigParameter.get_display_name(
+                                      unit_name, unit_kind, label)))
+        temp = name.split(".")
+        # Check if the parameter syntax is correct (must be
+        # unit_name.parameter_name)
+        if len(temp) != 2:
+            raise ConfigException("Invalid parameter name '%s' in '%s'" %
+                                  (name, ConfigParameter.get_display_name(
+                                      unit_name, unit_kind, label)))
+        prefix = temp[0]
+        # Check if the given parameter prefix matches the expected prefix
+        if (unit_kind == "library" and prefix != unit_name) or \
+           (unit_kind == "target" and prefix != "target"):
+            raise ConfigException(
+                "Invalid prefix '%s' for parameter name '%s' in '%s'" %
+                (prefix, name, ConfigParameter.get_display_name(
+                    unit_name, unit_kind, label)))
+        return name
+
+    @staticmethod
+    def get_display_name(unit_name, unit_kind, label=None):
+        """Return the name displayed for a unit when interrogating the origin
+        and the last set place of a parameter
+
+        Positional arguments:
+        unit_name - the unit (target/library/application) that defines this
+                    parameter
+        unit_kind - the kind of the unit ("target", "library" or "application")
+
+        Keyword arguments:
+        label - the name of the label in the 'target_config_overrides' section
+        """
+        if unit_kind == "target":
+            return "target:" + unit_name
+        elif unit_kind == "application":
+            return "application%s" % ("[%s]" % label if label else "")
+        else: # library
+            return "library:%s%s" % (unit_name, "[%s]" % label if label else "")
+
+    @staticmethod
+    def sanitize(name):
+        """ "Sanitize" a name so that it is a valid C macro name. Currently it
+        simply replaces '.' and '-' with '_'.
+
+        Positional arguments:
+        name - the name to make into a valid C macro
+        """
+        return name.replace('.', '_').replace('-', '_')
+
+    def set_value(self, value, unit_name, unit_kind, label=None):
+        """ Sets a value for this parameter, remember the place where it was
+        set.  If the value is a Boolean, it is converted to 1 (for True) or
+        to 0 (for False).
+
+        Positional arguments:
+        value - the value of the parameter
+        unit_name - the unit (target/library/application) that defines this
+                   parameter
+        unit_kind - the kind of the unit ("target", "library" or "application")
+
+        Keyword arguments:
+        label - the name of the label in the 'target_config_overrides' section
+               (optional)
+        """
+        self.value = int(value) if isinstance(value, bool) else value
+        self.set_by = self.get_display_name(unit_name, unit_kind, label)
+
+    def __str__(self):
+        """Return the string representation of this configuration parameter
+
+        Arguments: None
+        """
+        if self.value is not None:
+            return '%s = %s (macro name: "%s")' % \
+                (self.name, self.value, self.macro_name)
+        else:
+            return '%s has no value' % self.name
+
+    def get_verbose_description(self):
+        """Return a verbose description of this configuration parameter as a
+        string
+
+        Arguments: None
+        """
+        desc = "Name: %s%s\n" % \
+               (self.name, " (required parameter)" if self.required else "")
+        if self.help_text:
+            desc += "    Description: %s\n" % self.help_text
+        desc += "    Defined by: %s\n" % self.defined_by
+        if not self.value:
+            return desc + "    No value set"
+        desc += "    Macro name: %s\n" % self.macro_name
+        desc += "    Value: %s (set by %s)" % (self.value, self.set_by)
+        return desc
+
+class ConfigMacro(object):
+    """ A representation of a configuration macro. It handles both macros
+    without a value (MACRO) and with a value (MACRO=VALUE)
+    """
+    def __init__(self, name, unit_name, unit_kind):
+        """Construct a ConfigMacro object
+
+        Positional arguments:
+        name - the macro's name
+        unit_name - the location where the macro was defined
+        unit_kind - the type of macro this is
+        """
+        self.name = name
+        self.defined_by = ConfigParameter.get_display_name(unit_name, unit_kind)
+        if name.find("=") != -1:
+            tmp = name.split("=")
+            if len(tmp) != 2:
+                raise ValueError("Invalid macro definition '%s' in '%s'" %
+                                 (name, self.defined_by))
+            self.macro_name = tmp[0]
+            self.macro_value = tmp[1]
+        else:
+            self.macro_name = name
+            self.macro_value = None
+
+class ConfigCumulativeOverride(object):
+    """Representation of overrides for cumulative attributes"""
+    def __init__(self, name, additions=None, removals=None, strict=False):
+        """Construct a ConfigCumulativeOverride object
+
+        Positional arguments:
+        name - the name of the config file this came from ?
+
+        Keyword arguments:
+        additions - macros to add to the overrides
+        removals - macros to remove from the overrides
+        strict - Boolean indicating that attempting to remove from an override
+                 that does not exist should error
+        """
+        self.name = name
+        if additions:
+            self.additions = set(additions)
+        else:
+            self.additions = set()
+        if removals:
+            self.removals = set(removals)
+        else:
+            self.removals = set()
+        self.strict = strict
+
+    def remove_cumulative_overrides(self, overrides):
+        """Extend the list of override removals.
+
+        Positional arguments:
+        overrides - a list of names that, when the override is evaluated, will
+                    be removed
+        """
+        for override in overrides:
+            if override in self.additions:
+                raise ConfigException(
+                    "Configuration conflict. The %s %s both added and removed."
+                    % (self.name[:-1], override))
+
+        self.removals |= set(overrides)
+
+    def add_cumulative_overrides(self, overrides):
+        """Extend the list of override additions.
+
+        Positional arguments:
+        overrides - a list of a names that, when the override is evaluated, will
+                    be added to the list
+        """
+        for override in overrides:
+            if override in self.removals or \
+               (self.strict and override not in self.additions):
+                raise ConfigException(
+                    "Configuration conflict. The %s %s both added and removed."
+                    % (self.name[:-1], override))
+
+        self.additions |= set(overrides)
+
+    def strict_cumulative_overrides(self, overrides):
+        """Remove all overrides that are not the specified ones
+
+        Positional arguments:
+        overrides - a list of names that will replace the entire attribute when
+                    this override is evaluated.
+        """
+        self.remove_cumulative_overrides(self.additions - set(overrides))
+        self.add_cumulative_overrides(overrides)
+        self.strict = True
+
+    def update_target(self, target):
+        """Update the attributes of a target based on this override"""
+        setattr(target, self.name,
+                list((set(getattr(target, self.name, []))
+                      | self.additions) - self.removals))
+
+
+def _process_config_parameters(data, params, unit_name, unit_kind):
+    """Process a "config_parameters" section in either a target, a library,
+    or the application.
+
+    Positional arguments:
+    data - a dictionary with the configuration parameters
+    params - storage for the discovered configuration parameters
+    unit_name - the unit (target/library/application) that defines this
+                parameter
+    unit_kind - the kind of the unit ("target", "library" or "application")
+    """
+    for name, val in data.items():
+        full_name = ConfigParameter.get_full_name(name, unit_name, unit_kind)
+        # If the parameter was already defined, raise an error
+        if full_name in params:
+            raise ConfigException(
+                "Parameter name '%s' defined in both '%s' and '%s'" %
+                (name, ConfigParameter.get_display_name(unit_name, unit_kind),
+                 params[full_name].defined_by))
+        # Otherwise add it to the list of known parameters
+        # If "val" is not a dictionary, this is a shortcut definition,
+        # otherwise it is a full definition
+        params[full_name] = ConfigParameter(name, val if isinstance(val, dict)
+                                            else {"value": val}, unit_name,
+                                            unit_kind)
+    return params
+
+
+def _process_macros(mlist, macros, unit_name, unit_kind):
+    """Process a macro definition and check for incompatible duplicate
+    definitions.
+
+    Positional arguments:
+    mlist - list of macro names to process
+    macros - dictionary with currently discovered macros
+    unit_name - the unit (library/application) that defines this macro
+    unit_kind - the kind of the unit ("library" or "application")
+    """
+    for mname in mlist:
+        macro = ConfigMacro(mname, unit_name, unit_kind)
+        if (macro.macro_name in macros) and \
+           (macros[macro.macro_name].name != mname):
+            # Found an incompatible definition of the macro in another module,
+            # so raise an error
+            full_unit_name = ConfigParameter.get_display_name(unit_name,
+                                                              unit_kind)
+            raise ConfigException(
+                ("Macro '%s' defined in both '%s' and '%s'"
+                 % (macro.macro_name, macros[macro.macro_name].defined_by,
+                    full_unit_name)) +
+                " with incompatible values")
+        macros[macro.macro_name] = macro
+
+
+def check_dict_types(dict, type_dict, dict_loc):
+    for key, value in dict.iteritems():
+        if not isinstance(value, type_dict[key]):
+            raise ConfigException("The value of %s.%s is not of type %s" %
+                                  (dict_loc, key, type_dict[key].__name__))
+
+Region = namedtuple("Region", "name start size active filename")
+
+class Config(object):
+    """'Config' implements the mbed configuration mechanism"""
+
+    # Libraries and applications have different names for their configuration
+    # files
+    __mbed_app_config_name = "mbed_app.json"
+    __mbed_lib_config_name = "mbed_lib.json"
+
+    # Allowed keys in configuration dictionaries, and their types
+    # (targets can have any kind of keys, so this validation is not applicable
+    # to them)
+    __allowed_keys = {
+        "library": {"name": str, "config": dict, "target_overrides": dict,
+                    "macros": list, "__config_path": str},
+        "application": {"config": dict, "target_overrides": dict,
+                        "macros": list, "__config_path": str,
+                        "artifact_name": str}
+    }
+
+    __unused_overrides = set(["target.bootloader_img", "target.restrict_size",
+                              "target.mbed_app_start", "target.mbed_app_size"])
+
+    # Allowed features in configurations
+    __allowed_features = [
+        "UVISOR", "BLE", "CLIENT", "IPV4", "LWIP", "COMMON_PAL", "STORAGE", "NANOSTACK",
+        # Nanostack configurations
+        "LOWPAN_BORDER_ROUTER", "LOWPAN_HOST", "LOWPAN_ROUTER", "NANOSTACK_FULL", "THREAD_BORDER_ROUTER", "THREAD_END_DEVICE", "THREAD_ROUTER", "ETHERNET_HOST"
+        ]
+
+    def __init__(self, tgt, top_level_dirs=None, app_config=None):
+        """Construct a mbed configuration
+
+        Positional arguments:
+        target - the name of the mbed target used for this configuration
+                 instance
+
+        Keyword argumets:
+        top_level_dirs - a list of top level source directories (where
+                         mbed_app_config.json could be found)
+        app_config - location of a chosen mbed_app.json file
+
+        NOTE: Construction of a Config object will look for the application
+        configuration file in top_level_dirs. If found once, it'll parse it.
+        top_level_dirs may be None (in this case, the constructor will not
+        search for a configuration file).
+        """
+        config_errors = []
+        self.app_config_location = app_config
+        if self.app_config_location is None:
+            for directory in top_level_dirs or []:
+                full_path = os.path.join(directory, self.__mbed_app_config_name)
+                if os.path.isfile(full_path):
+                    if self.app_config_location is not None:
+                        raise ConfigException("Duplicate '%s' file in '%s' and '%s'"
+                                              % (self.__mbed_app_config_name,
+                                                 self.app_config_location, full_path))
+                    else:
+                        self.app_config_location = full_path
+        try:
+            self.app_config_data = json_file_to_dict(self.app_config_location) \
+                                   if self.app_config_location else {}
+        except ValueError as exc:
+            self.app_config_data = {}
+            config_errors.append(
+                ConfigException("Could not parse mbed app configuration from %s"
+                                % self.app_config_location))
+
+        # Check the keys in the application configuration data
+        unknown_keys = set(self.app_config_data.keys()) - \
+                       set(self.__allowed_keys["application"].keys())
+        if unknown_keys:
+            raise ConfigException("Unknown key(s) '%s' in %s" %
+                                  (",".join(unknown_keys),
+                                   self.__mbed_app_config_name))
+        check_dict_types(self.app_config_data, self.__allowed_keys["application"],
+                         "app-config")
+        # Update the list of targets with the ones defined in the application
+        # config, if applicable
+        self.lib_config_data = {}
+        # Make sure that each config is processed only once
+        self.processed_configs = {}
+        if isinstance(tgt, basestring):
+            if tgt in TARGET_MAP:
+                self.target = TARGET_MAP[tgt]
+            else:
+                self.target = generate_py_target(
+                    self.app_config_data.get("custom_targets", {}), tgt)
+
+        else:
+            self.target = tgt
+        self.target = deepcopy(self.target)
+        self.target_labels = self.target.labels
+
+        self.cumulative_overrides = {key: ConfigCumulativeOverride(key)
+                                     for key in CUMULATIVE_ATTRIBUTES}
+
+        self._process_config_and_overrides(self.app_config_data, {}, "app",
+                                           "application")
+        self.config_errors = config_errors
+
+    def add_config_files(self, flist):
+        """Add configuration files
+
+        Positional arguments:
+        flist - a list of files to add to this configuration
+        """
+        for config_file in flist:
+            if not config_file.endswith(self.__mbed_lib_config_name):
+                continue
+            full_path = os.path.normpath(os.path.abspath(config_file))
+            # Check that we didn't already process this file
+            if self.processed_configs.has_key(full_path):
+                continue
+            self.processed_configs[full_path] = True
+            # Read the library configuration and add a "__full_config_path"
+            # attribute to it
+            try:
+                cfg = json_file_to_dict(config_file)
+            except ValueError as exc:
+                sys.stderr.write(str(exc) + "\n")
+                continue
+
+            cfg["__config_path"] = full_path
+
+            if "name" not in cfg:
+                raise ConfigException(
+                    "Library configured at %s has no name field." % full_path)
+            # If there's already a configuration for a module with the same
+            # name, exit with error
+            if self.lib_config_data.has_key(cfg["name"]):
+                raise ConfigException(
+                    "Library name '%s' is not unique (defined in '%s' and '%s')"
+                    % (cfg["name"], full_path,
+                       self.lib_config_data[cfg["name"]]["__config_path"]))
+            self.lib_config_data[cfg["name"]] = cfg
+
+    @property
+    def has_regions(self):
+        """Does this config have regions defined?"""
+        if 'target_overrides' in self.app_config_data:
+            target_overrides = self.app_config_data['target_overrides'].get(
+                self.target.name, {})
+            return ('target.bootloader_img' in target_overrides or
+                    'target.restrict_size' in target_overrides or
+                    'target.mbed_app_start' in target_overrides or
+                    'target.mbed_app_size' in target_overrides)
+        else:
+            return False
+
+    @property
+    def regions(self):
+        """Generate a list of regions from the config"""
+        if not self.target.bootloader_supported:
+            raise ConfigException("Bootloader not supported on this target.")
+        if not hasattr(self.target, "device_name"):
+            raise ConfigException("Bootloader not supported on this target: "
+                                  "targets.json `device_name` not specified.")
+        cache = Cache(False, False)
+        if self.target.device_name not in cache.index:
+            raise ConfigException("Bootloader not supported on this target: "
+                                  "targets.json `device_name` not found in "
+                                  "arm_pack_manager index.")
+        cmsis_part = cache.index[self.target.device_name]
+        target_overrides = self.app_config_data['target_overrides'].get(
+            self.target.name, {})
+        if  (('target.bootloader_img' in target_overrides or
+              'target.restrict_size' in target_overrides) and
+             ('target.mbed_app_start' in target_overrides or
+              'target.mbed_app_size' in target_overrides)):
+            raise ConfigException(
+                "target.bootloader_img and target.restirct_size are "
+                "incompatible with target.mbed_app_start and "
+                "target.mbed_app_size")
+        try:
+            rom_size = int(cmsis_part['memory']['IROM1']['size'], 0)
+            rom_start = int(cmsis_part['memory']['IROM1']['start'], 0)
+        except KeyError:
+            raise ConfigException("Not enough information in CMSIS packs to "
+                                  "build a bootloader project")
+        if  ('target.bootloader_img' in target_overrides or
+             'target.restrict_size' in target_overrides):
+            return self._generate_booloader_build(target_overrides,
+                                                  rom_start, rom_size)
+        elif ('target.mbed_app_start' in target_overrides or
+              'target.mbed_app_size' in target_overrides):
+            return self._generate_linker_overrides(target_overrides,
+                                                   rom_start, rom_size)
+        else:
+            raise ConfigException(
+                "Bootloader build requested but no bootlader configuration")
+
+    def _generate_booloader_build(self, target_overrides, rom_start, rom_size):
+        start = 0
+        if 'target.bootloader_img' in target_overrides:
+            basedir = abspath(dirname(self.app_config_location))
+            filename = join(basedir, target_overrides['target.bootloader_img'])
+            if not exists(filename):
+                raise ConfigException("Bootloader %s not found" % filename)
+            part = intelhex_offset(filename, offset=rom_start)
+            if part.minaddr() != rom_start:
+                raise ConfigException("bootloader executable does not "
+                                      "start at 0x%x" % rom_start)
+            part_size = (part.maxaddr() - part.minaddr()) + 1
+            yield Region("bootloader", rom_start + start, part_size, False,
+                         filename)
+            start += part_size
+        if 'target.restrict_size' in target_overrides:
+            new_size = int(target_overrides['target.restrict_size'], 0)
+            yield Region("application", rom_start + start, new_size, True, None)
+            start += new_size
+            yield Region("post_application", rom_start +start, rom_size - start,
+                         False, None)
+        else:
+            yield Region("application", rom_start + start, rom_size - start,
+                         True, None)
+        if start > rom_size:
+            raise ConfigException("Not enough memory on device to fit all "
+                                  "application regions")
+
+    @property
+    def report(self):
+        return {'app_config': self.app_config_location,
+                'library_configs': map(relpath, self.processed_configs.keys())}
+
+    @staticmethod
+    def _generate_linker_overrides(target_overrides, rom_start, rom_size):
+        if 'target.mbed_app_start' in target_overrides:
+            start = int(target_overrides['target.mbed_app_start'], 0)
+        else:
+            start = rom_start
+        if 'target.mbed_app_size' in target_overrides:
+            size = int(target_overrides['target.mbed_app_size'], 0)
+        else:
+            size = (rom_size + rom_start) - start
+        if start < rom_start:
+            raise ConfigException("Application starts before ROM")
+        if size + start > rom_size + rom_start:
+            raise ConfigException("Application ends after ROM")
+        yield Region("application", start, size, True, None)
+
+    def _process_config_and_overrides(self, data, params, unit_name, unit_kind):
+        """Process "config_parameters" and "target_config_overrides" into a
+        given dictionary
+
+        Positional arguments:
+        data - the configuration data of the library/appliation
+        params - storage for the discovered configuration parameters
+        unit_name - the unit (library/application) that defines this parameter
+        unit_kind - the kind of the unit ("library" or "application")
+        """
+        self.config_errors = []
+        _process_config_parameters(data.get("config", {}), params, unit_name,
+                                   unit_kind)
+        for label, overrides in data.get("target_overrides", {}).items():
+            # If the label is defined by the target or it has the special value
+            # "*", process the overrides
+            if (label == '*') or (label in self.target_labels):
+                # Check for invalid cumulative overrides in libraries
+                if (unit_kind == 'library' and
+                    any(attr.startswith('target.extra_labels') for attr
+                        in overrides.iterkeys())):
+                    raise ConfigException(
+                        "Target override 'target.extra_labels' in " +
+                        ConfigParameter.get_display_name(unit_name, unit_kind,
+                                                         label) +
+                        " is only allowed at the application level")
+
+                # Parse out cumulative overrides
+                for attr, cumulatives in self.cumulative_overrides.iteritems():
+                    if 'target.'+attr in overrides:
+                        key = 'target.' + attr
+                        if not isinstance(overrides[key], list):
+                            raise ConfigException(
+                                "The value of %s.%s is not of type %s" %
+                                (unit_name, "target_overrides." + key,
+                                 "list"))
+                        cumulatives.strict_cumulative_overrides(overrides[key])
+                        del overrides[key]
+
+                    if 'target.'+attr+'_add' in overrides:
+                        key = 'target.' + attr + "_add"
+                        if not isinstance(overrides[key], list):
+                            raise ConfigException(
+                                "The value of %s.%s is not of type %s" %
+                                (unit_name, "target_overrides." + key,
+                                 "list"))
+                        cumulatives.add_cumulative_overrides(overrides[key])
+                        del overrides[key]
+
+                    if 'target.'+attr+'_remove' in overrides:
+                        key = 'target.' + attr + "_remove"
+                        if not isinstance(overrides[key], list):
+                            raise ConfigException(
+                                "The value of %s.%s is not of type %s" %
+                                (unit_name, "target_overrides." + key,
+                                 "list"))
+                        cumulatives.remove_cumulative_overrides(overrides[key])
+                        del overrides[key]
+
+                # Consider the others as overrides
+                for name, val in overrides.items():
+                    # Get the full name of the parameter
+                    full_name = ConfigParameter.get_full_name(name, unit_name,
+                                                              unit_kind, label)
+                    if full_name in params:
+                        params[full_name].set_value(val, unit_name, unit_kind,
+                                                    label)
+                    elif name in self.__unused_overrides:
+                        pass
+                    elif (name.startswith("target.") and
+                          unit_kind is "application"):
+                        _, attribute = name.split(".")
+                        setattr(self.target, attribute, val)
+                    else:
+                        self.config_errors.append(
+                            ConfigException(
+                                "Attempt to override undefined parameter" +
+                                (" '%s' in '%s'"
+                                 % (full_name,
+                                    ConfigParameter.get_display_name(unit_name,
+                                                                     unit_kind,
+                                                                     label)))))
+
+        for cumulatives in self.cumulative_overrides.itervalues():
+            cumulatives.update_target(self.target)
+
+        return params
+
+    def get_target_config_data(self):
+        """Read and interpret configuration data defined by targets.
+
+        We consider the resolution order for our target and sort it by level
+        reversed, so that we first look at the top level target (the parent),
+        then its direct children, then the children of those children and so on,
+        until we reach self.target
+        TODO: this might not work so well in some multiple inheritance scenarios
+        At each step, look at two keys of the target data:
+          - config_parameters: used to define new configuration parameters
+          - config_overrides: used to override already defined configuration
+                              parameters
+
+        Arguments: None
+        """
+        params, json_data = {}, self.target.json_data
+        resolution_order = [e[0] for e
+                            in sorted(
+                                self.target.resolution_order,
+                                key=lambda e: e[1], reverse=True)]
+        for tname in resolution_order:
+            # Read the target data directly from its description
+            target_data = json_data[tname]
+            # Process definitions first
+            _process_config_parameters(target_data.get("config", {}), params,
+                                       tname, "target")
+            # Then process overrides
+            for name, val in target_data.get("overrides", {}).items():
+                full_name = ConfigParameter.get_full_name(name, tname, "target")
+                # If the parameter name is not defined or if there isn't a path
+                # from this target to the target where the parameter was defined
+                # in the target inheritance tree, raise an error We need to use
+                # 'defined_by[7:]' to remove the "target:" prefix from
+                # defined_by
+                rel_names = [tgt for tgt, _ in
+                             get_resolution_order(self.target.json_data, tname,
+                                                  [])]
+                if full_name in self.__unused_overrides:
+                    continue
+                if (full_name not in params) or \
+                   (params[full_name].defined_by[7:] not in rel_names):
+                    raise ConfigException(
+                        "Attempt to override undefined parameter '%s' in '%s'"
+                        % (name,
+                           ConfigParameter.get_display_name(tname, "target")))
+                # Otherwise update the value of the parameter
+                params[full_name].set_value(val, tname, "target")
+        return params
+
+    def get_lib_config_data(self):
+        """ Read and interpret configuration data defined by libraries. It is
+        assumed that "add_config_files" above was already called and the library
+        configuration data exists in self.lib_config_data
+
+        Arguments: None
+        """
+        all_params, macros = {}, {}
+        for lib_name, lib_data in self.lib_config_data.items():
+            unknown_keys = (set(lib_data.keys()) -
+                            set(self.__allowed_keys["library"].keys()))
+            if unknown_keys:
+                raise ConfigException("Unknown key(s) '%s' in %s" %
+                                      (",".join(unknown_keys), lib_name))
+            check_dict_types(lib_data, self.__allowed_keys["library"], lib_name)
+            all_params.update(self._process_config_and_overrides(lib_data, {},
+                                                                 lib_name,
+                                                                 "library"))
+            _process_macros(lib_data.get("macros", []), macros, lib_name,
+                            "library")
+        return all_params, macros
+
+    def get_app_config_data(self, params, macros):
+        """ Read and interpret the configuration data defined by the target. The
+        target can override any configuration parameter, as well as define its
+        own configuration data.
+
+        Positional arguments.
+        params - the dictionary with configuration parameters found so far (in
+                 the target and in libraries)
+        macros - the list of macros defined in the configuration
+        """
+        app_cfg = self.app_config_data
+        # The application can have a "config_parameters" and a
+        # "target_config_overrides" section just like a library
+        self._process_config_and_overrides(app_cfg, params, "app",
+                                           "application")
+        # The application can also defined macros
+        _process_macros(app_cfg.get("macros", []), macros, "app",
+                        "application")
+
+    def get_config_data(self):
+        """ Return the configuration data in two parts: (params, macros)
+        params - a dictionary with mapping a name to a ConfigParam
+        macros - the list of macros defined with "macros" in libraries and in
+                 the application (as ConfigMacro instances)
+
+        Arguments: None
+        """
+        all_params = self.get_target_config_data()
+        lib_params, macros = self.get_lib_config_data()
+        all_params.update(lib_params)
+        self.get_app_config_data(all_params, macros)
+        return all_params, macros
+
+    @staticmethod
+    def _check_required_parameters(params):
+        """Check that there are no required parameters without a value
+
+        Positional arguments:
+        params - the list of parameters to check
+
+        NOTE: This function does not return. Instead, it throws a
+        ConfigException when any of the required parameters are missing values
+        """
+        for param in params.values():
+            if param.required and (param.value is None):
+                raise ConfigException("Required parameter '" + param.name +
+                                      "' defined by '" + param.defined_by +
+                                      "' doesn't have a value")
+
+    @staticmethod
+    def parameters_to_macros(params):
+        """ Encode the configuration parameters as C macro definitions.
+
+        Positional arguments:
+        params - a dictionary mapping a name to a ConfigParameter
+
+        Return: a list of strings that encode the configuration parameters as
+        C pre-processor macros
+        """
+        return ['%s=%s' % (m.macro_name, m.value) for m in params.values()
+                if m.value is not None]
+
+    @staticmethod
+    def config_macros_to_macros(macros):
+        """ Return the macro definitions generated for a dictionary of
+        ConfigMacros (as returned by get_config_data).
+
+        Positional arguments:
+        params - a dictionary mapping a name to a ConfigMacro instance
+
+        Return: a list of strings that are the C pre-processor macros
+        """
+        return [m.name for m in macros.values()]
+
+    @staticmethod
+    def config_to_macros(config):
+        """Convert the configuration data to a list of C macros
+
+        Positional arguments:
+        config - configuration data as (ConfigParam instances, ConfigMacro
+                 instances) tuple (as returned by get_config_data())
+        """
+        params, macros = config[0], config[1]
+        Config._check_required_parameters(params)
+        return Config.config_macros_to_macros(macros) + \
+            Config.parameters_to_macros(params)
+
+    def get_config_data_macros(self):
+        """ Convert a Config object to a list of C macros
+
+        Arguments: None
+        """
+        return self.config_to_macros(self.get_config_data())
+
+    def get_features(self):
+        """ Extract any features from the configuration data
+
+        Arguments: None
+        """
+        params, _ = self.get_config_data()
+        self._check_required_parameters(params)
+        self.cumulative_overrides['features']\
+            .update_target(self.target)
+
+        return self.target.features
+
+    def validate_config(self):
+        """ Validate configuration settings. This either returns True or
+        raises an exception
+
+        Arguments: None
+        """
+        if self.config_errors:
+            raise self.config_errors[0]
+        return True
+
+
+    @property
+    def name(self):
+        if "artifact_name" in self.app_config_data:
+            return self.app_config_data["artifact_name"]
+        else:
+            return None
+
+    def load_resources(self, resources):
+        """ Load configuration data from a Resources instance and expand it
+        based on defined features.
+
+        Positional arguments:
+        resources - the resources object to load from and expand
+        """
+        # Update configuration files until added features creates no changes
+        prev_features = set()
+        self.validate_config()
+        while True:
+            # Add/update the configuration with any .json files found while
+            # scanning
+            self.add_config_files(resources.json_files)
+
+            # Add features while we find new ones
+            features = set(self.get_features())
+            if features == prev_features:
+                break
+
+            for feature in features:
+                if feature in resources.features:
+                    resources.add(resources.features[feature])
+
+            prev_features = features
+        self.validate_config()
+
+        return resources
+
+    @staticmethod
+    def config_to_header(config, fname=None):
+        """ Convert the configuration data to the content of a C header file,
+        meant to be included to a C/C++ file. The content is returned as a
+        string.
+
+        Positional arguments:
+        config - configuration data as (ConfigParam instances, ConfigMacro
+                 instances) tuple (as returned by get_config_data())
+
+        Keyword arguments:
+        fname -  also write the content is to the file called "fname".
+                 WARNING: if 'fname' names an existing file, it will be
+                 overwritten!
+        """
+        params, macros = config[0] or {}, config[1] or {}
+        Config._check_required_parameters(params)
+        params_with_values = [p for p in params.values() if p.value is not None]
+        ctx = {
+            "cfg_params" : [(p.macro_name, str(p.value), p.set_by)
+                            for p in params_with_values],
+            "macros": [(m.macro_name, str(m.macro_value or ""), m.defined_by)
+                       for m in macros.values()],
+            "name_len":  max([len(m.macro_name) for m in macros.values()] +
+                             [len(m.macro_name) for m in params_with_values]
+                             + [0]),
+            "val_len" : max([len(str(m.value)) for m in params_with_values] +
+                            [len(m.macro_value or "") for m in macros.values()]
+                            + [0]),
+        }
+        jinja_loader = FileSystemLoader(dirname(abspath(__file__)))
+        jinja_environment = Environment(loader=jinja_loader,
+                                        undefined=StrictUndefined)
+        header_data = jinja_environment.get_template("header.tmpl").render(ctx)
+        # If fname is given, write "header_data" to it
+        if fname:
+            with open(fname, "w+") as file_desc:
+                file_desc.write(header_data)
+        return header_data
+
+    def get_config_data_header(self, fname=None):
+        """ Convert a Config instance to the content of a C header file, meant
+        to be included to a C/C++ file. The content is returned as a string.
+
+        Keyword arguments:
+        fname - also write the content to the file called "fname".
+                WARNING: if 'fname' names an existing file, it will be
+                overwritten!
+        """
+        return self.config_to_header(self.get_config_data(), fname)
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/config/header.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,44 @@
+/*
+ * mbed SDK
+ * Copyright (c) 2017 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// Automatically generated configuration file.
+// DO NOT EDIT, content will be overwritten.
+
+#ifndef __MBED_CONFIG_DATA__
+#define __MBED_CONFIG_DATA__
+
+{% if cfg_params -%}
+// Configuration parameters
+{% for name, value, set_by in cfg_params -%}
+{% if value is not none -%}
+#define {{name.ljust(name_len)}} {{value.ljust(val_len)}} // set by {{set_by}}
+{%- endif %}
+{% endfor %}
+{%- endif -%}
+
+{%- if macros -%}
+// Macros
+{% for name, value, set_by in macros -%}
+{% if value is not none -%}
+#define {{name.ljust(name_len)}} {{value.ljust(val_len)}} // defined by {{set_by}}
+{%- else -%}
+#define {{name.ljust(name_len + val_len + 1)}} // defined by {{set_by}}
+{%- endif %}
+{% endfor %}
+{%- endif %}
+#endif
+
--- a/dev/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
--- a/dev/dsp_fir.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,89 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-from numpy import sin, arange, pi
-from scipy.signal import lfilter, firwin
-from pylab import figure, plot, grid, show
-
-#------------------------------------------------
-# Create a signal for demonstration.
-#------------------------------------------------
-# 320 samples of (1000Hz + 15000 Hz) at 48 kHz
-sample_rate = 48000.
-nsamples = 320
-
-F_1KHz = 1000.
-A_1KHz = 1.0
-
-F_15KHz = 15000.
-A_15KHz = 0.5
-
-t = arange(nsamples) / sample_rate
-signal = A_1KHz * sin(2*pi*F_1KHz*t) + A_15KHz*sin(2*pi*F_15KHz*t)
-
-#------------------------------------------------
-# Create a FIR filter and apply it to signal.
-#------------------------------------------------
-# The Nyquist rate of the signal.
-nyq_rate = sample_rate / 2.
-
-# The cutoff frequency of the filter: 6KHz
-cutoff_hz = 6000.0
-
-# Length of the filter (number of coefficients, i.e. the filter order + 1)
-numtaps = 29
-
-# Use firwin to create a lowpass FIR filter
-fir_coeff = firwin(numtaps, cutoff_hz/nyq_rate)
-
-# Use lfilter to filter the signal with the FIR filter
-filtered_signal = lfilter(fir_coeff, 1.0, signal)
-
-#------------------------------------------------
-# Plot the original and filtered signals.
-#------------------------------------------------
-
-# The first N-1 samples are "corrupted" by the initial conditions
-warmup = numtaps - 1
-
-# The phase delay of the filtered signal
-delay = (warmup / 2) / sample_rate
-
-figure(1)
-# Plot the original signal
-plot(t, signal)
-
-# Plot the filtered signal, shifted to compensate for the phase delay
-plot(t-delay, filtered_signal, 'r-')
-
-# Plot just the "good" part of the filtered signal.  The first N-1
-# samples are "corrupted" by the initial conditions.
-plot(t[warmup:]-delay, filtered_signal[warmup:], 'g', linewidth=4)
-
-grid(True)
-
-show()
-
-#------------------------------------------------
-# Print values
-#------------------------------------------------
-def print_values(label, values):
-    var = "float32_t %s[%d]" % (label, len(values))
-    print "%-30s = {%s}" % (var, ', '.join(["%+.10f" % x for x in values]))
-
-print_values('signal', signal)
-print_values('fir_coeff', fir_coeff)
-print_values('filtered_signal', filtered_signal)
--- a/dev/intel_hex_utils.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,31 +0,0 @@
-from intelhex import IntelHex
-from cStringIO import StringIO
-
-
-def sections(h):
-    start, last_address = None, None
-    for a in h.addresses():
-        if last_address is None:
-            start, last_address = a, a
-            continue
-
-        if a > last_address + 1:
-            yield (start, last_address)
-            start = a
-
-        last_address = a
-
-    if start:
-        yield (start, last_address)
-
-
-def print_sections(h):
-    for s in sections(h):
-        print "[0x%08X - 0x%08X]" % s
-
-
-def decode(record):
-    h = IntelHex()
-    f = StringIO(record)
-    h.loadhex(f)
-    h.dump()
--- a/dev/rpc_classes.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,190 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-from os.path import join
-from jinja2 import Template
-
-from tools.paths import TOOLS_DATA, MBED_RPC
-
-RPC_TEMPLATES_PATH = join(TOOLS_DATA, "rpc")
-
-RPC_TEMPLATE = "RPCClasses.h"
-CLASS_TEMPLATE = "class.cpp"
-RPC_CLASSES_PATH = join(MBED_RPC, RPC_TEMPLATE)
-
-
-def get_template(name):
-    return Template(open(join(RPC_TEMPLATES_PATH, name)).read())
-
-
-def write_rpc_classes(classes):
-    template = get_template(RPC_TEMPLATE)
-    open(RPC_CLASSES_PATH, "w").write(template.render({"classes":classes}))
-
-
-RPC_CLASSES = (
-    {
-        "name": "DigitalOut",
-        "cons_args": ["PinName"],
-        "methods": [
-            (None , "write", ["int"]),
-            ("int", "read" , []),
-        ]
-    },
-    {
-        "name": "DigitalIn",
-        "cons_args": ["PinName"],
-        "methods": [
-            ("int", "read" , []),
-        ]
-    },
-    {
-        "name": "DigitalInOut",
-        "cons_args": ["PinName"],
-        "methods": [
-            ("int", "read"  , []),
-            (None , "write" , ["int"]),
-            (None , "input" , []),
-            (None , "output", []),
-        ]
-    },
-    {
-        "name": "AnalogIn",
-        "required": "ANALOGIN",
-        "cons_args": ["PinName"],
-        "methods": [
-            ("float"         , "read"    , []),
-            ("unsigned short", "read_u16", []),
-        ]
-    },
-    {
-        "name": "AnalogOut",
-        "required": "ANALOGOUT",
-        "cons_args": ["PinName"],
-        "methods": [
-            ("float", "read"     , []),
-            (None   , "write"    , ["float"]),
-            (None   , "write_u16", ["unsigned short"]),
-        ]
-    },
-    {
-        "name": "PwmOut",
-        "required": "PWMOUT",
-        "cons_args": ["PinName"],
-        "methods": [
-            ("float", "read"         , []),
-            (None   , "write"        , ["float"]),
-            (None   , "period"       , ["float"]),
-            (None   , "period_ms"    , ["int"]),
-            (None   , "pulsewidth"   , ["float"]),
-            (None   , "pulsewidth_ms", ["int"]),
-        ]
-    },
-    {
-        "name": "SPI",
-        "required": "SPI",
-        "cons_args": ["PinName", "PinName", "PinName"],
-        "methods": [
-            (None , "format"   , ["int", "int"]),
-            (None , "frequency", ["int"]),
-            ("int", "write"    , ["int"]),
-        ]
-    },
-    {
-        "name": "Serial",
-        "required": "SERIAL",
-        "cons_args": ["PinName", "PinName"],
-        "methods": [
-            (None , "baud"     , ["int"]),
-            ("int", "readable" , []),
-            ("int", "writeable", []),
-            ("int", "putc"     , ["int"]),
-            ("int", "getc"     , []),
-            ("int", "puts"     , ["const char *"]),
-        ]
-    },
-    {
-        "name": "Timer",
-        "cons_args": [],
-        "methods": [
-            (None   , "start"  , []),
-            (None   , "stop"   , []),
-            (None   , "reset"  , []),
-            ("float", "read"   , []),
-            ("int"  , "read_ms", []),
-            ("int"  , "read_us", []),
-        ]
-    }
-)
-
-
-def get_args_proto(args_types, extra=None):
-    args = ["%s a%d" % (s, n) for n, s in enumerate(args_types)]
-    if extra:
-        args.extend(extra)
-    return ', '.join(args)
-
-
-def get_args_call(args):
-    return ', '.join(["a%d"    % (n)    for n in range(len(args))])
-
-
-classes = []
-class_template = get_template(CLASS_TEMPLATE)
-
-for c in RPC_CLASSES:
-    c_args = c['cons_args']
-    data = {
-        'name': c['name'],
-        'cons_type': ', '.join(c_args + ['const char*']),
-        "cons_proto": get_args_proto(c_args, ["const char *name=NULL"]),
-        "cons_call": get_args_call(c_args)
-    }
-
-    c_name = "Rpc" +  c['name']
-
-    methods = []
-    rpc_methods = []
-    for r, m, a in c['methods']:
-        ret_proto = r if r else "void"
-        args_proto = "void"
-
-        ret_defin = "return " if r else ""
-        args_defin = ""
-
-        if a:
-            args_proto = get_args_proto(a)
-            args_defin = get_args_call(a)
-
-        proto = "%s %s(%s)"   % (ret_proto, m, args_proto)
-        defin = "{%so.%s(%s);}" % (ret_defin, m, args_defin)
-        methods.append("%s %s" % (proto, defin))
-
-        rpc_method_type = [r] if r else []
-        rpc_method_type.append(c_name)
-        rpc_method_type.extend(a)
-        rpc_methods.append('{"%s", rpc_method_caller<%s, &%s::%s>}' % (m, ', '.join(rpc_method_type), c_name, m))
-
-    data['methods'] = "\n    ".join(methods)
-    data['rpc_methods'] = ",\n            ".join(rpc_methods)
-
-    class_decl = class_template.render(data)
-    if 'required' in c:
-        class_decl = "#if DEVICE_%s\n%s\n#endif" % (c['required'], class_decl)
-
-    classes.append(class_decl)
-
-write_rpc_classes('\n\n'.join(classes))
--- a/dev/syms.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,75 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-
-Utility to find which libraries could define a given symbol
-"""
-from argparse import ArgumentParser
-from os.path import join, splitext
-from os import walk
-from subprocess import Popen, PIPE
-
-
-OBJ_EXT = ['.o', '.a', '.ar']
-
-
-def find_sym_in_lib(sym, obj_path):
-    contain_symbol = False
-
-    out = Popen(["nm", "-C", obj_path], stdout=PIPE, stderr=PIPE).communicate()[0]
-    for line in out.splitlines():
-            tokens = line.split()
-            n = len(tokens)
-            if n == 2:
-                sym_type = tokens[0]
-                sym_name = tokens[1]
-            elif n == 3:
-                sym_type = tokens[1]
-                sym_name = tokens[2]
-            else:
-                continue
-
-            if sym_type == "U":
-                # This object is using this symbol, not defining it
-                continue
-
-            if sym_name == sym:
-                contain_symbol = True
-
-    return contain_symbol
-
-
-def find_sym_in_path(sym, dir_path):
-    for root, _, files in walk(dir_path):
-        for file in files:
-
-            _, ext = splitext(file)
-            if ext not in OBJ_EXT: continue
-
-            path = join(root, file)
-            if find_sym_in_lib(sym, path):
-                print path
-
-
-if __name__ == '__main__':
-    parser = ArgumentParser(description='Find Symbol')
-    parser.add_argument('-s', '--sym',  required=True,
-                        help='The symbol to be searched')
-    parser.add_argument('-p', '--path',  required=True,
-                        help='The path where to search')
-    args = parser.parse_args()
-
-    find_sym_in_path(args.sym, args.path)
--- a/export/README.md	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1148 +0,0 @@
-Exporter IDE/Platform Support
------------------------------------
-
-<table>
-    <tr>
-        <th>Platform</th>
-        <th>codesourcery</th>
-        <th>coide</th>
-        <th>ds5_5</th>
-        <th>emblocks</th>
-        <th>gcc_arm</th>
-        <th>iar</th>
-        <th>kds</th>
-        <th>lpcxpresso</th>
-        <th>uvision</th>
-    </tr>
-    <tr>
-        <td>APPNEARME_MICRONFCBOARD</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARCH_BLE</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>ARCH_GPRS</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARCH_MAX</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>ARCH_PRO</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M0</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M0P</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M1</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M3</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M4</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>ARM_MPS2_M7</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DELTA_DFCM_NNN40</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>DELTA_DFCM_NNN40_OTA</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F051R8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F100RB</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F303VC</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F334C8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F401VC</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_F407VG</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>DISCO_F429ZI</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>DISCO_L053C8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>HRM1017</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>K20D50M</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>K22F</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>K64F</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>KL05Z</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>KL25Z</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>KL43Z</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>KL46Z</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC1114</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC11C24</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC11U24</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC11U24_301</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U34_421</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U35_401</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U35_501</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U35_Y5_MBUG</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U37H_401</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC11U37_501</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC11U68</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC1347</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC1549</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC1768</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC2368</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC4088</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC4088_DM</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC4330_M0</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC4330_M4</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC4337</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC810</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>LPC812</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPC824</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>LPCCAPPUCCINO</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>MTS_DRAGONFLY_F411RE</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>MTS_GAMBIT</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>MTS_MDOT_F405RG</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>MTS_MDOT_F411RE</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51822</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NRF51822_BOOT</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51822_OTA</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51822_Y5_MBUG</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51_DK</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NRF51_DK_BOOT</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51_DK_OTA</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>NRF51_DONGLE</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F030R8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F070RB</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F072RB</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F091RC</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F103RB</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F302R8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F303RE</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F334R8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F401RE</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_F411RE</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_L053R8</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_L073RZ</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>NUCLEO_L152RE</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>OC_MBUINO</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>RBLAB_BLENANO</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>RBLAB_NRF51822</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>RZ_A1H</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>SEEED_TINY_BLE</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>SEEED_TINY_BLE_BOOT</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>SEEED_TINY_BLE_OTA</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>SSCI824</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>STM32F3XX</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>STM32F407</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>TEENSY3_1</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>UBLOX_C027</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>&#10003;</td>
-    </tr>
-    <tr>
-        <td>UBLOX_EVK_ODIN_W2</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>WALLBOT_BLE</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-    <tr>
-        <td>XADOW_M0</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>&#10003;</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-        <td>-</td>
-    </tr>
-</table>
-Total IDEs: 9
-<br>Total platforms: 94
-<br>Total permutations: 288
--- a/export/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -15,15 +15,32 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-from tools.export import codered, ds5_5, iar, makefile
+import sys
+from os.path import join, abspath, dirname, exists
+from os.path import basename, relpath, normpath, splitext
+from os import makedirs, walk
+import copy
+from shutil import rmtree, copyfile
+import zipfile
+ROOT = abspath(join(dirname(__file__), ".."))
+sys.path.insert(0, ROOT)
+
+from tools.build_api import prepare_toolchain
+from tools.build_api import scan_resources
+from tools.toolchains import Resources, mbedToolchain
+from tools.export import lpcxpresso, ds5_5, iar, makefile
 from tools.export import embitz, coide, kds, simplicity, atmelstudio
-from tools.export import sw4stm32, e2studio, zip, cmsis, uvision, cdt
-from tools.targets import TARGET_NAMES
+from tools.export import sw4stm32, e2studio, zip, cmsis, uvision, cdt, vscode
+from tools.export import gnuarmeclipse
+from tools.export import qtcreator
+from tools.targets import TARGET_NAMES, set_targets_json_location
+from tools.build_profiles import find_build_profile, find_targets_json
+from tools.build_profiles import get_toolchain_profile
 
 EXPORTERS = {
     'uvision5': uvision.Uvision,
     'uvision': uvision.Uvision,
-    'lpcxpresso': codered.CodeRed,
+    'lpcxpresso': lpcxpresso.LPCXpresso,
     'gcc_arm': makefile.GccArm,
     'make_gcc_arm': makefile.GccArm,
     'make_armc5': makefile.Armc5,
@@ -40,8 +57,13 @@
     'eclipse_gcc_arm'  : cdt.EclipseGcc,
     'eclipse_iar'      : cdt.EclipseIAR,
     'eclipse_armc5'    : cdt.EclipseArmc5,
+    'gnuarmeclipse': gnuarmeclipse.GNUARMEclipse,
+    'qtcreator': qtcreator.QtCreator,
     'zip' : zip.ZIP,
-    'cmsis'    : cmsis.CMSIS
+    'cmsis'    : cmsis.CMSIS,
+    'vscode_gcc_arm' : vscode.VSCodeGcc,
+    'vscode_iar' : vscode.VSCodeIAR,
+    'vscode_armc5' : vscode.VSCodeArmc5
 }
 
 ERROR_MESSAGE_UNSUPPORTED_TOOLCHAIN = """
@@ -53,6 +75,14 @@
 To export this project please <a href='http://mbed.org/compiler/?import=http://mbed.org/users/mbed_official/code/mbed-export/k&mode=lib' target='_blank'>import the export version of the mbed library</a>.
 """
 
+def mcu_ide_list():
+    """Shows list of exportable ides
+
+    """
+    supported_ides = sorted(EXPORTERS.keys())
+    return "\n".join(supported_ides)
+
+
 def mcu_ide_matrix(verbose_html=False):
     """Shows target map using prettytable
 
@@ -103,3 +133,267 @@
     if verbose_html:
         result = result.replace("&amp;", "&")
     return result
+
+
+def get_exporter_toolchain(ide):
+    """ Return the exporter class and the toolchain string as a tuple
+
+    Positional arguments:
+    ide - the ide name of an exporter
+    """
+    return EXPORTERS[ide], EXPORTERS[ide].TOOLCHAIN
+
+
+def rewrite_basepath(file_name, resources, export_path, loc):
+    """ Replace the basepath of filename with export_path
+
+    Positional arguments:
+    file_name - the absolute path to a file
+    resources - the resources object that the file came from
+    export_path - the final destination of the file after export
+    """
+    new_f = join(loc, relpath(file_name, resources.file_basepath[file_name]))
+    resources.file_basepath[new_f] = export_path
+    return new_f
+
+
+def subtract_basepath(resources, export_path, loc=""):
+    """ Rewrite all of the basepaths with the export_path
+
+    Positional arguments:
+    resources - the resource object to rewrite the basepaths of
+    export_path - the final destination of the resources with respect to the
+      generated project files
+    """
+    keys = ['s_sources', 'c_sources', 'cpp_sources', 'hex_files',
+            'objects', 'libraries', 'inc_dirs', 'headers', 'linker_script',
+            'lib_dirs']
+    for key in keys:
+        vals = getattr(resources, key)
+        if isinstance(vals, set):
+            vals = list(vals)
+        if isinstance(vals, list):
+            new_vals = []
+            for val in vals:
+                new_vals.append(rewrite_basepath(val, resources, export_path,
+                                                 loc))
+            if isinstance(getattr(resources, key), set):
+                setattr(resources, key, set(new_vals))
+            else:
+                setattr(resources, key, new_vals)
+        elif vals:
+            setattr(resources, key, rewrite_basepath(vals, resources,
+                                                     export_path, loc))
+
+
+def generate_project_files(resources, export_path, target, name, toolchain, ide,
+                           macros=None):
+    """Generate the project files for a project
+
+    Positional arguments:
+    resources - a Resources object containing all of the files needed to build
+      this project
+    export_path - location to place project files
+    name - name of the project
+    toolchain - a toolchain class that corresponds to the toolchain used by the
+      IDE or makefile
+    ide - IDE name to export to
+
+    Optional arguments:
+    macros - additional macros that should be defined within the exported
+      project
+    """
+    exporter_cls, _ = get_exporter_toolchain(ide)
+    exporter = exporter_cls(target, export_path, name, toolchain,
+                            extra_symbols=macros, resources=resources)
+    exporter.generate()
+    files = exporter.generated_files
+    return files, exporter
+
+
+def zip_export(file_name, prefix, resources, project_files, inc_repos):
+    """Create a zip file from an exported project.
+
+    Positional Parameters:
+    file_name - the file name of the resulting zip file
+    prefix - a directory name that will prefix the entire zip file's contents
+    resources - a resources object with files that must be included in the zip
+    project_files - a list of extra files to be added to the root of the prefix
+      directory
+    """
+    with zipfile.ZipFile(file_name, "w") as zip_file:
+        for prj_file in project_files:
+            zip_file.write(prj_file, join(prefix, basename(prj_file)))
+        for loc, res in resources.iteritems():
+            to_zip = (
+                res.headers + res.s_sources + res.c_sources +\
+                res.cpp_sources + res.libraries + res.hex_files + \
+                [res.linker_script] + res.bin_files + res.objects + \
+                res.json_files + res.lib_refs + res.lib_builds)
+            if inc_repos:
+                for directory in res.repo_dirs:
+                    for root, _, files in walk(directory):
+                        for repo_file in files:
+                            source = join(root, repo_file)
+                            to_zip.append(source)
+                            res.file_basepath[source] = res.base_path
+                to_zip += res.repo_files
+            for source in to_zip:
+                if source:
+                    zip_file.write(
+                        source,
+                        join(prefix, loc,
+                             relpath(source, res.file_basepath[source])))
+            for source in res.lib_builds:
+                target_dir, _ = splitext(source)
+                dest = join(prefix, loc,
+                            relpath(target_dir, res.file_basepath[source]),
+                            ".bld", "bldrc")
+                zip_file.write(source, dest)
+
+
+
+def export_project(src_paths, export_path, target, ide, libraries_paths=None,
+                   linker_script=None, notify=None, verbose=False, name=None,
+                   inc_dirs=None, jobs=1, silent=False, extra_verbose=False,
+                   config=None, macros=None, zip_proj=None, inc_repos=False,
+                   build_profile=None, app_config=None):
+    """Generates a project file and creates a zip archive if specified
+
+    Positional Arguments:
+    src_paths - a list of paths from which to find source files
+    export_path - a path specifying the location of generated project files
+    target - the mbed board/mcu for which to generate the executable
+    ide - the ide for which to generate the project fields
+
+    Keyword Arguments:
+    libraries_paths - paths to additional libraries
+    linker_script - path to the linker script for the specified target
+    notify - function is passed all events, and expected to handle notification
+      of the user, emit the events to a log, etc.
+    verbose - assigns the notify function to toolchains print_notify_verbose
+    name - project name
+    inc_dirs - additional include directories
+    jobs - number of threads
+    silent - silent build - no output
+    extra_verbose - assigns the notify function to toolchains
+      print_notify_verbose
+    config - toolchain's config object
+    macros - User-defined macros
+    zip_proj - string name of the zip archive you wish to creat (exclude arg
+     if you do not wish to create an archive
+    """
+
+    # Convert src_path to a list if needed
+    if isinstance(src_paths, dict):
+        paths = sum(src_paths.values(), [])
+    elif isinstance(src_paths, list):
+        paths = src_paths[:]
+    else:
+        paths = [src_paths]
+
+    # Extend src_paths wit libraries_paths
+    if libraries_paths is not None:
+        paths.extend(libraries_paths)
+
+    if not isinstance(src_paths, dict):
+        src_paths = {"": paths}
+
+    # Export Directory
+    if not exists(export_path):
+        makedirs(export_path)
+
+    _, toolchain_name = get_exporter_toolchain(ide)
+
+    ###################################
+    # mbed Classic/2.0/libary support #
+
+    # Find build system profile
+    profile = None
+    targets_json = None
+    for path in paths:
+        profile = find_build_profile(path) or profile
+        if profile:
+            targets_json = join(dirname(dirname(abspath(__file__))), 'legacy_targets.json')
+        else:
+            targets_json = find_targets_json(path) or targets_json
+
+    # Apply targets.json to active targets
+    if targets_json:
+        if not silent:
+            print("Using targets from %s" % targets_json)
+        set_targets_json_location(targets_json)
+
+    # Apply profile to toolchains
+    if profile:
+        def init_hook(self):
+            profile_data = get_toolchain_profile(self.name, profile)
+            if not profile_data:
+                return
+            if not silent:
+                self.info("Using toolchain %s profile %s" % (self.name, profile))
+
+            for k,v in profile_data.items():
+                if self.flags.has_key(k):
+                    self.flags[k] = v
+                else:
+                    setattr(self, k, v)
+
+        mbedToolchain.init = init_hook
+
+    # mbed Classic/2.0/libary support #
+    ###################################
+
+    # Pass all params to the unified prepare_resources()
+    toolchain = prepare_toolchain(
+        paths, "", target, toolchain_name, macros=macros, jobs=jobs,
+        notify=notify, silent=silent, verbose=verbose,
+        extra_verbose=extra_verbose, config=config, build_profile=build_profile,
+        app_config=app_config)
+    # The first path will give the name to the library
+    if name is None:
+        name = basename(normpath(abspath(src_paths[0])))
+
+    # Call unified scan_resources
+    resource_dict = {loc: scan_resources(path, toolchain, inc_dirs=inc_dirs)
+                     for loc, path in src_paths.iteritems()}
+    resources = Resources()
+    toolchain.build_dir = export_path
+    config_header = toolchain.get_config_header()
+    resources.headers.append(config_header)
+    resources.file_basepath[config_header] = dirname(config_header)
+
+    if zip_proj:
+        subtract_basepath(resources, ".")
+        for loc, res in resource_dict.iteritems():
+            temp = copy.deepcopy(res)
+            subtract_basepath(temp, ".", loc)
+            resources.add(temp)
+    else:
+        for _, res in resource_dict.iteritems():
+            resources.add(res)
+
+    # Change linker script if specified
+    if linker_script is not None:
+        resources.linker_script = linker_script
+
+    files, exporter = generate_project_files(resources, export_path,
+                                             target, name, toolchain, ide,
+                                             macros=macros)
+    files.append(config_header)
+    if zip_proj:
+        for resource in resource_dict.values():
+            for label, res in resource.features.iteritems():
+                if label not in toolchain.target.features:
+                    resource.add(res)
+        if isinstance(zip_proj, basestring):
+            zip_export(join(export_path, zip_proj), name, resource_dict, files,
+                       inc_repos)
+        else:
+            zip_export(zip_proj, name, resource_dict, files, inc_repos)
+    else:
+        for exported in files:
+            if not exists(join(export_path, basename(exported))):
+                copyfile(exported, join(export_path, basename(exported)))
+
+    return exporter
--- a/export/cmsis/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/cmsis/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -121,7 +121,7 @@
             new_srcs = []
             for f in list(files):
                 spl = f.name.split(sep)
-                if len(spl)==2:
+                if len(spl) <= 2:
                     file_element = Element('file',
                                            attrib={
                                                'category':f.type,
@@ -148,8 +148,4 @@
             'device': DeviceCMSIS(self.target),
             'date': ''
         }
-        # TODO: find how to keep prettyxml from adding xml version to this blob
-        #dom = parseString(ctx['project_files'])
-        #ctx['project_files'] = dom.toprettyxml(indent="\t")
-
         self.gen_file('cmsis/cpdsc.tmpl', ctx, 'project.cpdsc')
--- a/export/codered/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,60 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-from os.path import splitext, basename
-
-from tools.export.exporters import Exporter
-
-class CodeRed(Exporter):
-    NAME = 'CodeRed'
-    TOOLCHAIN = 'GCC_CR'
-
-    MBED_CONFIG_HEADER_SUPPORTED = True
-
-    TARGETS = [
-        'LPC1768',
-        'LPC4088',
-        'LPC4088_DM',
-        'LPC4330_M4',
-        'LPC1114',
-        'LPC11U35_401',
-        'LPC11U35_501',
-        'UBLOX_C027',
-        'ARCH_PRO',
-        'LPC1549',
-        'LPC11U68',
-        'LPCCAPPUCCINO',
-        'LPC824',
-        'LPC11U37H_401',
-    ]
-
-    def generate(self):
-        libraries = []
-        for lib in self.resources.libraries:
-            l, _ = splitext(basename(lib))
-            libraries.append(l[3:])
-
-        ctx = {
-            'name': self.project_name,
-            'include_paths': self.resources.inc_dirs,
-            'linker_script': self.resources.linker_script,
-            'object_files': self.resources.objects,
-            'libraries': libraries,
-            'symbols': self.toolchain.get_symbols()
-        }
-        ctx.update(self.flags)
-        self.gen_file('codered/%s_project.tmpl' % self.target.lower(), ctx, '.project')
-        self.gen_file('codered/%s_cproject.tmpl' % self.target.lower(), ctx, '.cproject')
--- a/export/codered/arch_pro_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,79 +0,0 @@
-{% extends "codered_cproject_cortexm3_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC1768&lt;/name&gt;&#13;
-&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/arch_pro_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/cproject_common.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1850 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?>
-
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-    <storageModule moduleId="org.eclipse.cdt.core.settings">
-        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
-                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
-                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
-                                <option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.{% block core %}{% endblock %}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c {{cxx_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
-                                <option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c {{c_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
-
-                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
-                                <option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c {{asm_flags|join(" ")}} {{common_flags|join(" ")}} -D__NEWLIB__  -DDEBUG -D__CODE_RED " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
-                                <option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.1663456123"
-                                        name="Linker script"
-                                        superClass="com.crt.advproject.link.cpp.script"
-                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-
-                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                   {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    {% for lib in libraries %}
-                                    <listOptionValue builtIn="false" value="{{lib}}"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
-                        </toolChain>
-                    </folderInfo>
-                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/{% block startup_file %}{% endblock %}" name="{{ self.startup_file() }}" rcbsApplicability="disable" resourcePath="src/{{ self.startup_file() }}" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
-                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
-                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
-                        </tool>
-                    </fileInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
-                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c {{cxx_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
-                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
-                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c {{c_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
-                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
-                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c {{asm_flags|join(" ")}} {{common_flags|join(" ")}} -D__NEWLIB__  -DNDEBUG -D__CODE_RED " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
-                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.{{ self.core() }}" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    <listOptionValue builtIn="false" value="mbed"/>
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
-                        </toolChain>
-                    </folderInfo>
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
-                                
-                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
-                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
-                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
-                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
-                        </toolChain>
-                    </folderInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-    </storageModule>
-    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
-    </storageModule>
-    <storageModule moduleId="com.crt.config">
-        <projectStorage>{% block cpu_config %}{% endblock %}</projectStorage>
-    </storageModule>
-</cproject>
-
--- a/export/codered/cproject_cortexm0_common.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{% extends "codered_cproject_common.tmpl" %}
-
-{% block core %}cm0{% endblock %}
--- a/export/codered/cproject_cortexm3_common.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{% extends "codered_cproject_common.tmpl" %}
-
-{% block core %}cm3{% endblock %}
--- a/export/codered/lpc1114_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,48 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC1114FN/102&lt;/name&gt;&#13;
-&lt;family&gt;LPC11xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11xx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc1114_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc11u35_401_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/401" property_count="5" version="70002"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC11U35/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/401" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC11U35/401&lt;/name&gt;&#13;
-&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc11u35_401_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc11u35_501_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/501" property_count="5" version="70002"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC11U35/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/501" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC11U35/501&lt;/name&gt;&#13;
-&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc11u35_501_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc11u37h_401_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37H/401" property_count="5" version="70002"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC11U37H/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37H/401" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC11U37H/401&lt;/name&gt;&#13;
-&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc11u37h_401_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc11u68_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,60 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}startup_LPC11U68.cpp{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11U6x_256K.cfx" property_3="NXP" property_4="LPC11U68" property_count="5" version="70200"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;&lt;info chip="LPC11U68" flash_driver="LPC11U6x_256K.cfx" match_id="0x0" name="LPC11U68" stub="crt_emu_cm3_gen"&gt;&#13;&lt;chip&gt;&#13;&lt;name&gt;&#13;LPC11U68&lt;/name&gt;&#13;
-&lt;family&gt;&#13;LPC11U6x&lt;/family&gt;&#13;
-&lt;vendor&gt;&#13;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram0_32" location="0x10000000" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram1_2" location="0x20000000" size="0x800"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram2USB_2" location="0x20004000" size="0x800"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART4" determined="infoFile" id="USART4" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x40060000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x4006c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x40070000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x40074000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x5000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x5000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0xa0004000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc11u68_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc1549_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,69 +0,0 @@
-{% extends "codered_cproject_cortexm3_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc15xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC15xx_256K.cfx" property_3="NXP" property_4="LPC1549" property_count="5" version="70200"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC1549" connectscript="LPC15RunBootRomConnect.scp" flash_driver="LPC15xx_256K.cfx" match_id="0x0" name="LPC1549" resetscript="LPC15RunBootRomReset.scp" stub="crt_emu_cm3_gen"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC1549&lt;/name&gt;&#13;
-&lt;family&gt;LPC15xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram0_16" location="0x2000000" size="0x4000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram1_16" location="0x2004000" size="0x4000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="Ram2_4" location="0x2008000" size="0x1000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC15_MPU" determined="infoFile" id="MPU" location="0xe000ed90"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC15_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC15_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC15_ITM" determined="infoFile" id="ITM" location="0xe0000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x1c000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x1c004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x1c00c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x1c010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x1c018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x1c01c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT2" determined="infoFile" id="SCT2" location="0x1c020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCT3" determined="infoFile" id="SCT3" location="0x1c024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC0" determined="infoFile" id="ADC0" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DAC" determined="infoFile" id="DAC" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ACMP" determined="infoFile" id="ACMP" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="INMUX" determined="infoFile" id="INMUX" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40028000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/&gt;&#13;
-&lt;peripheralInstance derived_from="QEI" determined="infoFile" id="QEI" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40074000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC1" determined="infoFile" id="ADC1" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x400a0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0x400a4000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x400a8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x400ac000"/&gt;&#13;
-&lt;peripheralInstance derived_from="RIT" determined="infoFile" id="RIT" location="0x400b4000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SCTIPU" determined="infoFile" id="SCTIPU" location="0x400b8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x400c0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="C-CAN0" determined="infoFile" id="C-CAN0" location="0x400f0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x400f8000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc1549_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc1768_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,79 +0,0 @@
-{% extends "codered_cproject_cortexm3_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC1768&lt;/name&gt;&#13;
-&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc1768_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc4088_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1922 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?>
-
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-    <storageModule moduleId="org.eclipse.cdt.core.settings">
-        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
-                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
-                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
-								<option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
-								<option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
-
-                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
-								<option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
-								<option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.1663456123"
-                                        name="Linker script"
-                                        superClass="com.crt.advproject.link.cpp.script"
-                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-
-                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                   {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    {% for lib in libraries %}
-                                    <listOptionValue builtIn="false" value="{{lib}}"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4" valueType="enumerated"/>
-
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
-                        </toolChain>
-                    </folderInfo>
-                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc176x.c" name="cr_startup_lpc176x.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc176x.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
-                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
-                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
-                        </tool>
-                    </fileInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
-                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
-                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
-                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
-                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
-                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    <listOptionValue builtIn="false" value="mbed"/>
-                                    <listOptionValue builtIn="false" value="capi"/>
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
-                        </toolChain>
-                    </folderInfo>
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
-                                
-                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
-                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
-                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
-                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
-                        </toolChain>
-                    </folderInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-    </storageModule>
-    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
-    </storageModule>
-    <storageModule moduleId="com.crt.config">
-		<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4088&lt;/name&gt;&#13;
-&lt;family&gt;LPC407x_8x&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;</projectStorage>
-    </storageModule>
-</cproject>
-
--- a/export/codered/lpc4088_dm_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1922 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?>
-
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-    <storageModule moduleId="org.eclipse.cdt.core.settings">
-        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
-                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
-                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
-								<option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
-								<option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
-
-                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
-								<option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
-								<option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm4" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.1663456123"
-                                        name="Linker script"
-                                        superClass="com.crt.advproject.link.cpp.script"
-                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-
-                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                   {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    {% for lib in libraries %}
-                                    <listOptionValue builtIn="false" value="{{lib}}"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4" valueType="enumerated"/>
-
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
-                        </toolChain>
-                    </folderInfo>
-                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc176x.c" name="cr_startup_lpc176x.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc176x.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
-                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
-                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
-                        </tool>
-                    </fileInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
-                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
-                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
-                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
-                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
-                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    <listOptionValue builtIn="false" value="mbed"/>
-                                    <listOptionValue builtIn="false" value="capi"/>
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
-                        </toolChain>
-                    </folderInfo>
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
-                                
-                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
-                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
-                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
-                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
-                        </toolChain>
-                    </folderInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-    </storageModule>
-    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
-    </storageModule>
-    <storageModule moduleId="com.crt.config">
-		<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4088&lt;/name&gt;&#13;
-&lt;family&gt;LPC407x_8x&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;</projectStorage>
-    </storageModule>
-</cproject>
-
--- a/export/codered/lpc4088_dm_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc4088_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc4330_m4_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1924 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?>
-
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-    <storageModule moduleId="org.eclipse.cdt.core.settings">
-        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
-                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
-                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
-                                <option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
-                                <option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-
-                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
-                                <option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
-                                <option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.1663456123"
-                                        name="Linker script"
-                                        superClass="com.crt.advproject.link.cpp.script"
-                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-
-                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                   {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    {% for lib in libraries %}
-                                    <listOptionValue builtIn="false" value="{{lib}}"/>
-                                    {% endfor %}
-                                </option>
-
-                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
-                        </toolChain>
-                    </folderInfo>
-                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc43xx.c" name="cr_startup_lpc43xx.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc43xx.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
-                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
-                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
-                        </tool>
-                    </fileInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
-            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
-                <externalSettings/>
-                <extensions>
-                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-                </extensions>
-            </storageModule>
-            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
-                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-
-                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
-                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
-                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
-                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
-                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
-                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
-                                  {% for s in symbols %}
-                                    <listOptionValue builtIn="false" value="{{s}}"/>
-                                  {% endfor %}
-                                </option>
-                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
-                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
-                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
-                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
-                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED " valueType="string"/>
-                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
-                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
-                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
-                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
-                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
-                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
-                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
-                                    <listOptionValue builtIn="false" value="--gc-sections"/>
-                                </option>
-                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
-                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-                                    <listOptionValue builtIn="false" value="mbed"/>
-                                    <listOptionValue builtIn="false" value="capi"/>
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-                                    {% for path in object_files %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
-                                </inputType>
-                            </tool>
-                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
-                        </toolChain>
-                    </folderInfo>
-                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
-                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
-                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
-                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
-                                
-                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-                                    {% for path in include_paths %}
-                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-                                    {% endfor %}
-                                </option>
-                                
-                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
-                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
-                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
-                            </tool>
-                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
-                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
-                        </toolChain>
-                    </folderInfo>
-                    <sourceEntries>
-                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
-                    </sourceEntries>
-                </configuration>
-            </storageModule>
-            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-            <storageModule moduleId="scannerConfiguration">
-                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="false" filePath=""/>
-                        <parser enabled="false"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="com.crt.advproject.specsFile">
-                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="makefileGenerator">
-                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                    <buildOutputProvider>
-                        <openAction enabled="true" filePath=""/>
-                        <parser enabled="true"/>
-                    </buildOutputProvider>
-                    <scannerInfoProvider id="specsFile">
-                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                        <parser enabled="true"/>
-                    </scannerInfoProvider>
-                </profile>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
-                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="false" filePath=""/>
-                            <parser enabled="false"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="com.crt.advproject.specsFile">
-                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="makefileGenerator">
-                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
-                        <buildOutputProvider>
-                            <openAction enabled="true" filePath=""/>
-                            <parser enabled="true"/>
-                        </buildOutputProvider>
-                        <scannerInfoProvider id="specsFile">
-                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
-                            <parser enabled="true"/>
-                        </scannerInfoProvider>
-                    </profile>
-                </scannerConfigBuildInfo>
-            </storageModule>
-        </cconfiguration>
-    </storageModule>
-    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
-        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
-    </storageModule>
-    <storageModule moduleId="com.crt.config">
-        <projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC4330" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC4330" package="LPC43_lqfp100.xml"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC4330&lt;/name&gt;&#13;
-&lt;family&gt;LPC43xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC4x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC43_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;</projectStorage>
-    </storageModule>
-</cproject>
--- a/export/codered/lpc4330_m4_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpc824_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,53 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}startup_LPC824_CR.cpp{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;
-&lt;Properties property_0="" property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/&gt;
-&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"&gt;&lt;chip&gt;&lt;name&gt;LPC824&lt;/name&gt;
-&lt;family&gt;LPC82x&lt;/family&gt;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;
-&lt;reset board="None" core="Real" sys="Real"/&gt;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;
-&lt;memory id="RAM" type="RAM"/&gt;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;
-&lt;memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/&gt;
-&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40000000"/&gt;
-&lt;peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x40004000"/&gt;
-&lt;peripheralInstance derived_from="WKT" determined="infoFile" id="WKT" location="0x40008000"/&gt;
-&lt;peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x4000c000"/&gt;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40020000"/&gt;
-&lt;peripheralInstance derived_from="CMP" determined="infoFile" id="CMP" location="0x40024000"/&gt;
-&lt;peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/&gt;
-&lt;peripheralInstance derived_from="INPUTMUX" determined="infoFile" id="INPUTMUX" location="0x4002c000"/&gt;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x40040000"/&gt;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;
-&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/&gt;
-&lt;peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40054000"/&gt;
-&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40058000"/&gt;
-&lt;peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4005c000"/&gt;
-&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40064000"/&gt;
-&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40068000"/&gt;
-&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x4006c000"/&gt;
-&lt;peripheralInstance derived_from="I2C2" determined="infoFile" id="I2C2" location="0x40070000"/&gt;
-&lt;peripheralInstance derived_from="I2C3" determined="infoFile" id="I2C3" location="0x40074000"/&gt;
-&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/&gt;
-&lt;peripheralInstance derived_from="SCT" determined="infoFile" id="SCT" location="0x50004000"/&gt;
-&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50008000"/&gt;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/&gt;
-&lt;peripheralInstance derived_from="PIN-INT" determined="infoFile" id="PIN-INT" location="0xa0004000"/&gt;
-&lt;/chip&gt;
-&lt;processor&gt;&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;
-&lt;family&gt;Cortex-M&lt;/family&gt;
-&lt;/processor&gt;
-&lt;link href="LPC82x_peripheral.xme" show="embed" type="simple"/&gt;
-&lt;/info&gt;
-&lt;/infoList&gt;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpc824_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/lpccappuccino_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-{% extends "codered_cproject_cortexm0_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37/501" property_count="5" version="70002"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC11U37/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37/501" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC11U37/501&lt;/name&gt;&#13;
-&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
-&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
-&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
-&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/lpccappuccino_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/codered/project_common.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,84 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-    <name>{{name}}</name>
-    <comment>This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Code-Red</comment>
-    <projects>
-    </projects>
-    <buildSpec>
-        <buildCommand>
-            <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-            <triggers>clean,full,incremental,</triggers>
-            <arguments>
-                <dictionary>
-                    <key>?name?</key>
-                    <value></value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.append_environment</key>
-                    <value>true</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
-                    <value>all</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.buildArguments</key>
-                    <value></value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.buildCommand</key>
-                    <value>make</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.buildLocation</key>
-                    <value>${workspace_loc:/{{name}}/Debug}</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
-                    <value>clean</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.contents</key>
-                    <value>org.eclipse.cdt.make.core.activeConfigSettings</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.enableAutoBuild</key>
-                    <value>false</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.enableCleanBuild</key>
-                    <value>true</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.enableFullBuild</key>
-                    <value>true</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.fullBuildTarget</key>
-                    <value>all</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.stopOnError</key>
-                    <value>true</value>
-                </dictionary>
-                <dictionary>
-                    <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
-                    <value>true</value>
-                </dictionary>
-            </arguments>
-        </buildCommand>
-        <buildCommand>
-            <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-            <triggers>full,incremental,</triggers>
-            <arguments>
-            </arguments>
-        </buildCommand>
-    </buildSpec>
-    <natures>
-        <nature>org.eclipse.cdt.core.cnature</nature>
-        <nature>org.eclipse.cdt.core.ccnature</nature>
-        <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-        <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-    </natures>
-</projectDescription>
-
--- a/export/codered/ublox_c027_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,79 +0,0 @@
-{% extends "codered_cproject_cortexm3_common.tmpl" %}
-
-{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
-
-{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
-&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&#13;
-&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
-&lt;chip&gt;&#13;
-&lt;name&gt;LPC1768&lt;/name&gt;&#13;
-&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
-&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
-&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
-&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
-&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
-&lt;memory id="RAM" type="RAM"/&gt;&#13;
-&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
-&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
-&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
-&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
-&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
-&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
-&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
-&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
-&lt;/chip&gt;&#13;
-&lt;processor&gt;&#13;
-&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
-&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
-&lt;/processor&gt;&#13;
-&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
-&lt;/info&gt;&#13;
-&lt;/infoList&gt;&#13;
-&lt;/TargetConfig&gt;{% endblock %}
--- a/export/codered/ublox_c027_project.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1 +0,0 @@
-{% extends "codered_project_common.tmpl" %}
--- a/export/coide/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/coide/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -30,7 +30,6 @@
         'ARCH_PRO',
         'ARCH_MAX',
         'UBLOX_C027',
-        'NUCLEO_L011K4',
         'NUCLEO_L053R8',
         'NUCLEO_L152RE',
         'NUCLEO_F030R8',
@@ -39,18 +38,14 @@
         'NUCLEO_F072RB',
         'NUCLEO_F091RC',
         'NUCLEO_F103RB',
-        'NUCLEO_F207ZG',
         'NUCLEO_F302R8',
         'NUCLEO_F303K8',
         'NUCLEO_F303RE',
         'NUCLEO_F334R8',
-        'NUCLEO_F303ZE',
         'NUCLEO_F401RE',
         'NUCLEO_F410RB',
         'NUCLEO_F411RE',
-        'NUCLEO_F429ZI',
         'NUCLEO_F446RE',
-        'NUCLEO_F446ZE',
         'DISCO_L053C8',
         'DISCO_F051R8',
         'DISCO_F100RB',
@@ -59,7 +54,6 @@
         'DISCO_F401VC',
         'DISCO_F407VG',
         'DISCO_F429ZI',
-        'DISCO_F469NI',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
         'MOTE_L152RC',
--- a/export/e2studio/rz_a1h_cproject.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/e2studio/rz_a1h_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -76,6 +76,9 @@
                                     <listOptionValue builtIn="false" value="{{s}}"/>
                                   {% endfor %}
 								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files.1531644276" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files" valueType="includeFiles">
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/mbed_config.h}&quot;"/>
+								</option>
 								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.247734571" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input"/>
 							</tool>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.248936164" name="Cross ARM C++ Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler">
@@ -92,6 +95,9 @@
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.noexceptions.73762833" name="Do not use exceptions (-fno-exceptions)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.noexceptions" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nortti.1541205451" name="Do not use RTTI (-fno-rtti)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nortti" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std.2072412260" name="Language standard" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std.default" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files.127898117" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files" valueType="includeFiles">
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/mbed_config.h}&quot;"/>
+								</option>
 								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.input.2029463372" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.input"/>
 							</tool>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.1882430856" name="Cross ARM C Linker" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker">
--- a/export/embitz/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/embitz/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -16,14 +16,22 @@
 """
 from os.path import splitext, basename
 from tools.targets import TARGET_MAP
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, filter_supported
+
+
+POST_BINARY_WHITELIST = set([
+    "TEENSY3_1Code.binary_hook",
+    "LPCTargetCode.lpc_patch",
+    "LPC4088Code.binary_hook"
+])
+
 
 class EmBitz(Exporter):
     NAME = 'EmBitz'
     TOOLCHAIN = 'GCC_ARM'
 
-    TARGETS = [target for target, obj in TARGET_MAP.iteritems()
-               if "GCC_ARM" in obj.supported_toolchains]
+
+    TARGETS = filter_supported("GCC_ARM", POST_BINARY_WHITELIST)
 
     MBED_CONFIG_HEADER_SUPPORTED = True
 
--- a/export/exporters.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/exporters.py	Thu Jun 22 11:12:28 2017 -0500
@@ -60,7 +60,8 @@
         jinja_loader = FileSystemLoader(os.path.dirname(os.path.abspath(__file__)))
         self.jinja_environment = Environment(loader=jinja_loader)
         self.resources = resources
-        self.generated_files = [join(self.TEMPLATE_DIR,"GettingStarted.html")]
+        self.generated_files = [join(self.TEMPLATE_DIR, "GettingStarted.html"),
+                                join(self.TEMPLATE_DIR, ".mbed")]
         self.builder_files_dict = {}
         self.add_config()
 
@@ -176,3 +177,20 @@
     def generate(self):
         """Generate an IDE/tool specific project file"""
         raise NotImplemented("Implement a generate function in Exporter child class")
+
+
+def filter_supported(compiler, whitelist):
+    """Generate a list of supported targets for a given compiler and post-binary hook
+    white-list."""
+    def supported_p(obj):
+        """Internal inner function used for filtering"""
+        if compiler not in obj.supported_toolchains:
+            return False
+        if not hasattr(obj, "post_binary_hook"):
+            return True
+        if obj.post_binary_hook['function'] in whitelist:
+            return True
+        else:
+            return False
+    return list(target for target, obj in TARGET_MAP.iteritems()
+                if supported_p(obj))
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/.cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,414 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+<!-- Generated by the GNU ARM Eclipse exporter from an mBed project. -->
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		{% for cfg_key in options %}
+		{% set opts = options[cfg_key] %}
+		<cconfiguration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}" moduleId="org.eclipse.cdt.core.settings" name="{{opts['name']}}">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.{{opts['parent_id']}}" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}" name="{{opts['name']}}" parent="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['parent_id']}}">
+					<folderInfo id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}." name="/" resourcePath="">
+						<toolChain id="ilg.gnuarmeclipse.managedbuild.cross.toolchain.elf.{{opts['id']}}.{{u.id}}" name="Cross ARM GCC" superClass="ilg.gnuarmeclipse.managedbuild.cross.toolchain.elf.{{opts['parent_id']}}">
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family.{{u.id}}" name="ARM family" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.mcpu.{{opts['common']['arm.target.family']}}" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.arch.{{opts['common']['arm.target.arch']}}" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.{{u.id}}" name="Instruction set" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.{{opts['common']['arm.target.instructionset']}}" valueType="enumerated"/>
+							{% if opts['common']['arm.target.thumbinterwork'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.thumbinterwork.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.thumbinterwork" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['arm.target.endianness'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.endianness.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.endianness" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.endianness.{{opts['common']['arm.target.endianness']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['arm.target.fpu.abi'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.{{u.id}}" name="Float ABI" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.{{opts['common']['arm.target.fpu.abi']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['arm.target.fpu.unit'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.{{u.id}}" name="FPU Type" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.{{opts['common']['arm.target.fpu.unit']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['arm.target.unalignedaccess'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.unalignedaccess.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.unalignedaccess" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.unalignedaccess.{{opts['common']['arm.target.unalignedaccess']}}" valueType="enumerated"/>
+							{% endif %}
+
+							{% if opts['common']['optimization.level'] != '' %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level" value="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.{{opts['common']['optimization.level']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['optimization.messagelength'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength.{{u.id}}" name="Message length (-fmessage-length=0)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.signedchar'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar.{{u.id}}" name="'char' is signed (-fsigned-char)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.functionsections'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections.{{u.id}}" name="Function sections (-ffunction-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.datasections'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections.{{u.id}}" name="Data sections (-fdata-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.nocommon'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nocommon.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nocommon" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.noinlinefunctions'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.noinlinefunctions.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.noinlinefunctions" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.freestanding'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.freestanding.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.freestanding" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.nobuiltin'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nobuiltin.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nobuiltin" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.spconstant'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.spconstant.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.spconstant" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.PIC'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.PIC.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.PIC" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.nomoveloopinvariants'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nomoveloopinvariants.{{u.id}}" name="Disable loop invariant move (-fno-move-loop-invariants)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.nomoveloopinvariants" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['optimization.other'] != '' %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.other.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.other" value="{{opts['common']['optimization.other']}}" valueType="string"/>
+							{% endif %}
+
+							{% if opts['common']['warnings.syntaxonly'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.syntaxonly.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.syntaxonly" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.pedantic'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pedantic.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pedantic" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.pedanticerrors'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pedanticerrors.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pedanticerrors" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.nowarn'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.nowarn.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.nowarn" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.unused'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.unused.{{u.id}}" name="Warn on various unused elements (-Wunused)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.unused" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.uninitialized'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.uninitialized.{{u.id}}" name="Warn on uninitialized variables (-Wuninitialised)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.uninitialized" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.allwarn'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn.{{u.id}}" name="Enable all common warnings (-Wall)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.extrawarn'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.extrawarn.{{u.id}}" name="Enable extra warnings (-Wextra)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.extrawarn" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.missingdeclaration'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.missingdeclaration.{{u.id}}" name="Warn on undeclared global function (-Wmissing-declaration)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.missingdeclaration" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.conversion'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.conversion.{{u.id}}" name="Warn on implicit conversions (-Wconversion)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.conversion" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.pointerarith'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pointerarith.{{u.id}}" name="Warn if pointer arithmetic (-Wpointer-arith)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.pointerarith" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.padded'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.padded.{{u.id}}" name="Warn if padding is included (-Wpadded)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.padded" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.shadow'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.shadow.{{u.id}}" name="Warn if shadowed variable (-Wshadow)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.shadow" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.logicalop'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.logicalop.{{u.id}}" name="Warn if suspicious logical ops (-Wlogical-op)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.logicalop" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.agreggatereturn'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.agreggatereturn.{{u.id}}" name="Warn if struct is returned (-Wagreggate-return)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.agreggatereturn" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.floatequal'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.floatequal.{{u.id}}" name="Warn if floats are compared as equal (-Wfloat-equal)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.floatequal" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['warnings.toerrors'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.toerrors.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.toerrors" value="true" valueType="boolean"/>
+							{% endif %}
+							
+							{% if opts['common']['warnings.other'] != '' %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.other.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.other" value="{{opts['common']['warnings.other']}}" valueType="string"/>
+							{% endif %}
+
+							{% if opts['common']['debugging.level'] != 'none' %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.{{u.id}}" name="Debug level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.{{opts['common']['debugging.level']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['debugging.format'] != '' %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.{{u.id}}" name="Debug format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.{{opts['common']['debugging.format']}}"  valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['debugging.prof'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof" value="true" valueType="boolean"/>
+							{% endif %}
+							{% if opts['common']['debugging.gprof'] %}
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof" value="true" valueType="boolean"/>
+							{% endif %}
+
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name" value="GNU Tools for ARM Embedded Processors" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix.{{u.id}}" name="Prefix" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix" value="arm-none-eabi-" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.c.{{u.id}}" name="C compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.c" value="gcc" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp.{{u.id}}" name="C++ compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp" value="g++" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar.{{u.id}}" name="Archiver" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar" value="ar" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy.{{u.id}}" name="Hex/Bin converter" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy" value="objcopy" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump.{{u.id}}" name="Listing generator" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump" value="objdump" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.size.{{u.id}}" name="Size command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.size" value="size" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.make.{{u.id}}" name="Build command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.make" value="make" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm.{{u.id}}" name="Remove command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm" value="rm" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash.{{u.id}}" name="Create flash image" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash" value="true" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize.{{u.id}}" name="Print size" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize" value="true" valueType="boolean"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform.{{u.id}}" isAbstract="false" osList="all" superClass="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform"/>
+							<builder buildPath="${workspace_loc:/{{name}}}/BUILD/{{opts['name']}}" cleanBuildTarget="mbedclean" id="ilg.gnuarmeclipse.managedbuild.cross.builder.{{u.id}}" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnuarmeclipse.managedbuild.cross.builder"/>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.{{u.id}}" name="Cross ARM GNU Assembler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler">
+								{% if opts['as']['usepreprocessor'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor.{{u.id}}" name="Use preprocessor" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['as']['nostdinc'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.nostdinc.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.nostdinc" value="true" valueType="boolean"/>
+								{% endif %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.paths.{{u.id}}" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.paths" valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									{% for s in opts['as']['defines'] %}
+									<listOptionValue builtIn="false" value="{{s}}"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.files.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
+									{% for file in opts['common']['include_files'] %}
+									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									{% endfor %}
+								</option>
+								{% if opts['as']['otherwarnings'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.otherwarnings.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.otherwarnings" value="{{opts['as']['otherwarnings']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['as']['verbose'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.verbose.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.verbose" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['as']['other'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.other.{{u.id}}" name="Other assembler flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.other" value="{{opts['as']['other']}}" valueType="string"/>
+								{% endif %}
+								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input"/>
+							</tool>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.{{opts['uid']['tool_c_compiler']}}" name="Cross ARM C Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler">
+								{% if opts['c']['nostdinc'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.nostdinc.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.nostdinc" value="true" valueType="boolean"/>
+								{% endif %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths.{{u.id}}" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths" useByScannerDiscovery="false" valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									{% for s in opts['c']['defines'] %}
+									<listOptionValue builtIn="false" value="{{s}}"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files.{{u.id}}" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
+									{% for file in opts['common']['include_files'] %}
+									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									{% endfor %}
+								</option>
+								{% if opts['c']['compiler.std'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std" value="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.{{opts['c']['compiler.std']}}" valueType="enumerated"/>
+								{% endif %}
+								{% if opts['c']['otheroptimizations'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.otheroptimizations.{{u.id}}" name="Other optimization flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.otheroptimizations" useByScannerDiscovery="true" value="{{opts['c']['otheroptimizations']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['c']['warnings.missingprototypes'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.missingprototypes.{{u.id}}" name="Warn if a global function has no prototype (-Wmissing-prototypes)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.missingprototypes" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['warnings.strictprototypes'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.strictprototypes.{{u.id}}" name="Warn if a function has no arg type (-Wstrict-prototypes)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.strictprototypes" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['warnings.badfunctioncast'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.badfunctioncast.{{u.id}}" name="Warn if wrong cast  (-Wbad-function-cast)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.warning.badfunctioncast" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['otherwarnings'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.otherwarnings.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.otherwarnings" value="{{opts['c']['otherwarnings']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['c']['verbose'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.verbose.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.verbose" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['other'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other" value="{{opts['c']['other']}}" valueType="string"/>
+								{% endif %}
+								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.{{opts['uid']['tool_c_compiler_input']}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input"/>
+							</tool>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.{{opts['uid']['tool_cpp_compiler']}}" name="Cross ARM C++ Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler">
+								{% if opts['cpp']['nostdinc'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nostdinc.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nostdinc" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['nostdincpp'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nostdincpp.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nostdincpp" value="true" valueType="boolean"/>
+								{% endif %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.paths.{{u.id}}" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.paths" useByScannerDiscovery="false" valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									{% for s in opts['cpp']['defines'] %}
+									<listOptionValue builtIn="false" value="{{s}}"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files.{{u.id}}" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
+									{% for file in opts['common']['include_files'] %}
+									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									{% endfor %}
+								</option>
+								{% if opts['cpp']['compiler.std'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std" value="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std.{{opts['cpp']['compiler.std']}}" valueType="enumerated"/>
+								{% endif %}
+
+								{% if opts['cpp']['optimization.noexceptions'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.noexceptions.{{u.id}}" name="Do not use exceptions (-fno-exceptions)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.noexceptions" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['optimization.nortti'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nortti.{{u.id}}" name="Do not use RTTI (-fno-rtti)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nortti" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['optimization.nousecxaatexit'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nousecxaatexit.{{u.id}}" name="Do not use _cxa_atexit() (-fno-use-cxa-atexit)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nousecxaatexit" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['optimization.nothreadsafestatics'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nothreadsafestatics.{{u.id}}" name="Do not use thread-safe statics (-fno-threadsafe-statics)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.nothreadsafestatics" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['otheroptimizations'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.otheroptimizations.{{u.id}}" name="Other optimization flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.otheroptimizations" useByScannerDiscovery="true" value="{{opts['cpp']['otheroptimizations']}}" valueType="string"/>
+								{% endif %}
+
+								{% if opts['cpp']['warnabi'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warnabi.{{u.id}}" name="Warn on ABI violations (-Wabi)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warnabi" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warnings.ctordtorprivacy'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.ctordtorprivacy.{{u.id}}" name="Warn on class privacy (-Wctor-dtor-privacy)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.ctordtorprivacy" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warnings.noexcept'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.noexcept.{{u.id}}" name="Warn on no-except expressions (-Wnoexcept)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.noexcept" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warnings.nonvirtualdtor'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.nonvirtualdtor.{{u.id}}" name="Warn on virtual destructors (-Wnon-virtual-dtor)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.nonvirtualdtor" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warnings.strictnullsentinel'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.strictnullsentinel.{{u.id}}" name="Warn on uncast NULL (-Wstrict-null-sentinel)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.strictnullsentinel" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warnings.signpromo'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.signpromo.{{u.id}}" name="Warn on sign promotion (-Wsign-promo)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warning.signpromo" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['warneffc'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warneffc.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.warneffc" value="true" valueType="boolean"/>
+								{% endif %}								
+								{% if opts['cpp']['otherwarnings'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.otherwarnings.{{u.id}}" name="Other warning flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.otherwarnings" useByScannerDiscovery="true" value="{{opts['cpp']['otherwarnings']}}" valueType="string"/>
+								{% endif %}
+
+								{% if opts['cpp']['verbose'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.verbose.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.verbose" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['other'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.other.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.other" value="{{opts['cpp']['other']}}" valueType="string"/>
+								{% endif %}
+								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.input.{{opts['uid']['tool_cpp_compiler_input']}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.input"/>
+							</tool>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker.{{u.id}}" name="Cross ARM C++ Linker" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker">
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.scriptfile.{{u.id}}" name="Script files (-T)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.scriptfile" valueType="stringList">
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{opts['ld']['script']}}&quot;"/>
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.paths.{{u.id}}" name="Library search path (-L)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.paths" valueType="libPaths">
+									{% for path in opts['ld']['library_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.libs.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.libs" valueType="libs">
+									{% for lib in opts['ld']['user_libraries'] %}
+									<listOptionValue builtIn="false" value="{{lib}}"/>
+									{% endfor %}
+									{% for lib in opts['ld']['system_libraries'] %}
+									<listOptionValue builtIn="false" value="{{lib}}"/>
+									{% endfor %}
+								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.otherobjs.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.otherobjs" valueType="userObjs">
+									{% for path in opts['ld']['object_files'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								{% if opts['ld']['gcsections'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.gcsections.{{u.id}}" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
+								{% endif %}
+
+								{% if opts['ld']['nostart'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nostart.{{u.id}}" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nostart" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nodeflibs'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nodeflibs.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nodeflibs" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nostdlibs'] %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nostdlibs.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.nostdlibs" value="true" valueType="boolean"/>
+								{% endif %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.flags.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.flags" valueType="stringList">
+									{% for opt in opts['ld']['flags'] %}
+									<listOptionValue builtIn="false" value="{{opt}}"/>
+									{% endfor %}
+								</option>
+
+								{% if opts['ld']['other'] != '' %}
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.other.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.other" value="{{opts['ld']['other']}}" valueType="string"/>
+								{% endif %}
+								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker.input.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.archiver.{{u.id}}" name="Cross ARM GNU Archiver" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.archiver"/>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.createflash.{{u.id}}" name="Cross ARM GNU Create Flash Image" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.createflash">
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createflash.choice.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createflash.choice" value="ilg.gnuarmeclipse.managedbuild.cross.option.createflash.choice.binary" valueType="enumerated"/>
+							</tool>
+
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.createlisting.{{u.id}}" name="Cross ARM GNU Create Listing" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.createlisting">
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.source.{{u.id}}" name="Display source (--source|-S)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.source" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.allheaders.{{u.id}}" name="Display all headers (--all-headers|-x)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.allheaders" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.demangle.{{u.id}}" name="Demangle names (--demangle|-C)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.demangle" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.linenumbers.{{u.id}}" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.linenumbers" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide.{{u.id}}" name="Wide lines (--wide|-w)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize.{{u.id}}" name="Cross ARM GNU Print Size" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize">
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.{{u.id}}" name="Size format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="{{opts['common']['excluded_folders']}}" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		{% endfor %}
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="{{name}}.ilg.gnuarmeclipse.managedbuild.cross.target.elf.{{u.id}}" name="Executable" projectType="ilg.gnuarmeclipse.managedbuild.cross.target.elf"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		{% for cfg_key in options %}
+		{% set opts = options[cfg_key] %}	
+		<scannerConfigBuildInfo instanceId="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}};ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}.;ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.{{opts['uid']['tool_cpp_compiler']}};ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.input.{{opts['uid']['tool_cpp_compiler_input']}}">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		{% endfor %}
+		{% for cfg_key in options %}
+		{% set opts = options[cfg_key] %}	
+		<scannerConfigBuildInfo instanceId="ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}};ilg.gnuarmeclipse.managedbuild.cross.config.elf.{{opts['id']}}.{{opts['uid']['config']}}.;ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.{{opts['uid']['tool_c_compiler']}};ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.{{opts['uid']['tool_c_compiler_input']}}">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		{% endfor %}
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope"/>
+</cproject>
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/.project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Generated by the GNU ARM Eclipse exporter from an mBed project. -->
+<projectDescription>
+	<name>{{name}}</name>
+	<comment>This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-GNU-ARM-Eclipse</comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/NOTES.md	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,488 @@
+# GNU ARM Eclipse
+
+The [GNU ARM Eclipse](http://gnuarmeclipse.github.io) is an open source project that includes a family of Eclipse plug-ins and tools for multi-platform embedded ARM development, based on GNU toolchains. The project is hosted on [GitHub](https://github.com/gnuarmeclipse).
+
+This exporter aims to create managed GNU ARM Eclipse projects, ready to build, and with as many options properly identified and set in the Eclipse C/C++ Build -> Settings page.
+
+## Build plug-in configuration options
+
+All options are prefixed by `ilg.gnuarmeclipse.managedbuild.cross.option.`.
+
+### Target Processor 
+
+- `arm.target.family` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.mcpu.cortex-m3** '-mcpu=cortex-m3'
+    - cortex-m0 '-mcpu=%s'
+    - cortex-m0-small-multiply '-mcpu=%s'
+    - cortex-m0plus '-mcpu=%s'
+    - cortex-m0plus-small-multiply '-mcpu=%s'
+    - cortex-m1 '-mcpu=%s'
+    - cortex-m1-small-multiply '-mcpu=%s'
+    - cortex-m4 '-mcpu=%s'
+    - cortex-m7 '-mcpu=%s'
+
+- `arm.target.architecture` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.arch.none** ''
+    - armv6-m '-march=%s'
+    - armv7-m '-march=%s'
+
+- `arm.target.instructionset` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.thumb** '-mthumb'
+    - arm '-marm'
+    
+- `arm.target.thumbinterwork` bool
+    - true `-mthumb-interwork`
+
+- `arm.target.endianness` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.endianness.default**
+    - little `-mlittle-endian`
+    - big `-mbig-endian`
+
+- `arm.target.fpu.abi` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.default**
+    - soft '-mfloat-abi=soft'
+    - softfp '-mfloat-abi=softfp'
+    - hard '-mfloat-abi=hard'
+
+- `arm.target.fpu.unit` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.default**
+    - fpv4spd16 '-mfpu=fpv4-sp-d16'
+    - fpv5d16 '-mfpu=fpv5-d16'
+    - fpv5spd16 '-mfpu=fpv5-sp-d16'
+    - ...
+
+- `arm.target.unalignedaccess`
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.unalignedaccess.default**
+    - enabled '-munaligned-access'
+    - disabled '-mno-unaligned-access'
+
+- `target.other` string
+
+### Optimization
+
+- `optimization.level` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.more** '-O2'
+    - none '-O0'
+    - optimize '-O1'
+    - most '-O3'
+    - size '-Os'
+    - debug '-Og'
+
+- `optimization.messagelength` bool
+    - **false** ''
+    - true '-fmessage-length=0'
+
+- `optimization.signedchar` bool
+    - **false**
+    - true '-fsigned-char'
+
+- `optimization.functionsections` bool
+    - **false**
+    - true '-ffunction-sections'
+
+- `optimization.datasections` bool
+    - **false**
+    - true '-fdata-sections'
+
+- `optimization.nocommon` bool
+    - **false**
+    - true '-fno-common'
+
+- `optimization.noinlinefunctions` bool
+    - **false** ''
+    - true '-fno-inline-functions'
+
+- `optimization.freestanding` bool
+    - **false** ''
+    - true '-ffreestanding'
+
+- `optimization.nobuiltin` bool
+    - **false** ''
+    - true '-fno-builtin'
+
+- `optimization.spconstant` bool
+    - **false** ''
+    - true '-fsingle-precision-constant'
+
+- `optimization.PIC` bool
+    - **false** ''
+    - true '-fPIC'
+
+- `optimization.lto` bool
+    - **false** ''
+    - true '-flto'
+
+- `optimization.nomoveloopinvariants` bool
+    - **false** ''
+    - true '-fno-move-loop-invariants'
+
+- `optimization.other` string
+
+- `` bool
+    - **false** ''
+    - true ''
+
+### Warnings
+
+- `warnings.syntaxonly` bool
+    - **false** ''
+    - true '-fsyntax-only'
+
+- `warnings.pedantic` bool
+    - **false** ''
+    - true '-pedantic'
+
+- `warnings.pedanticerrors` bool
+    - **false** ''
+    - true '-pedantic-errors'
+
+- `warnings.nowarn` bool
+    - **false** ''
+    - true '-w'
+
+- `warnings.unused` bool
+    - **false** ''
+    - true '-Wunused'
+
+- `warnings.uninitialized` bool
+    - **false** ''
+    - true '-Wuninitialized'
+
+- `warnings.allwarn` bool
+    - **false** ''
+    - true '-Wall'
+
+- `warnings.extrawarn` bool
+    - **false** ''
+    - true '-Wextra'
+
+- `warnings.missingdeclaration` bool
+    - **false** ''
+    - true '-Wmissing-declarations'
+
+- `warnings.conversion` bool
+    - **false** ''
+    - true '-Wconversion'
+
+- `warnings.pointerarith` bool
+    - **false** ''
+    - true '-Wpointer-arith'
+
+- `warnings.padded` bool
+    - **false** ''
+    - true '-Wpadded'
+
+- `warnings.shadow` bool
+    - **false** ''
+    - true '-Wshadow'
+
+- `warnings.logicalop` bool
+    - **false** ''
+    - true '-Wlogical-op'
+
+- `warnings.agreggatereturn` bool
+    - **false** ''
+    - true '-Waggregate-return'
+
+- `warnings.floatequal` bool
+    - **false** ''
+    - true '-Wfloat-equal'
+
+- `warnings.toerrors` bool
+    - **false** ''
+    - true '-Werror'
+
+- `warnings.other` string
+
+### Debugging
+
+- `debugging.level` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.default** '-g'
+    - none ''
+    - minimal '-g1'
+    - max '-g3'
+
+- `debugging.format` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.default** ''
+    - gdb '-ggdb'
+    - stabs '-gstabs'
+    - stabsplus '-gstabs+'
+    - dwarf2 '-gdwarf-2'
+    - dwarf3 '-gdwarf-3'
+    - dwarf4 '-gdwarf-4'
+    - dwarf5 '-gdwarf-5'
+
+- `debugging.prof` bool
+    - **false** ''
+    - true '-p'
+
+- `debugging.gprof` bool
+    - **false** ''
+    - true '-pg'
+
+- `debugging.other` string
+
+
+### Compiler common options
+
+- `verbose` bool
+    - **false** ''
+    - true '-v'
+
+- `savetemps` bool
+    - **false** ''
+    - true '--save-temps'
+
+- `nostdinc` bool
+    - **false** ''
+    - true '-nostdinc'
+
+- `asmlisting` bool
+    - **false** ''
+    - true '-Wa,-adhlns="$@.lst"'
+
+- `preprocessor.preprocessonly` bool
+    - **false** ''
+    - true '-E'
+
+- `dirs.include.files`
+    - '-include%s'
+
+- `compiler.other` string
+
+### Linker common options
+
+- `mapfilename` string
+    - '-Wl,-Map,"${BuildArtifactFileBaseName}.map"'
+
+- `linker.scriptfile`
+    - '-T %s'
+
+- `cref` bool
+    - **false** ''
+    - true '-Xlinker --cref'
+
+- `printmap` bool
+    - **false** ''
+    - true '-Xlinker --print-map'
+
+- `linker.nostart` bool
+    - **false** ''
+    - true '-nostartfiles'
+
+- `linker.nodeflibs` bool
+    - **false** ''
+    - true '-nodefaultlibs'
+
+- `linker.nostdlibs` bool
+    - **false** ''
+    - true '-nostdlib'
+
+- `linker.gcsections` bool
+    - **false** ''
+    - true '-Xlinker --gc-sections'
+
+- `linker.printgcsections` bool
+    - **false** ''
+    - true '-Xlinker --print-gc-sections'
+
+- `linker.strip` bool
+    - **false** ''
+    - true '-s'
+
+- `linker.other` string
+
+- `linker.usenewlibnano` bool
+    - **false** ''
+    - true '--specs=nano.specs'
+
+- `linker.useprintffloat` bool
+    - **false** ''
+    - true '-u \_printf\_float'
+
+- `linker.usescanffloat` bool
+    - **false** ''
+    - true '-u \_scanf\_float'
+
+
+### Cross ARM GNU Assembler
+
+#### Preprocessor
+
+- `nostdinc` bool
+    - **false** ''
+    - true '-nostdinc'
+
+#### Includes
+
+#### Warnings
+
+#### Miscellaneous
+
+- `verbose` bool
+    - **false** ''
+    - true '-v'
+
+- `assembler.other` string
+
+### Cross ARM GNU C Compiler
+
+#### Preprocessor
+
+- `nostdinc` bool
+    - **false** ''
+    - true '-nostdinc'
+
+#### Includes
+
+#### Optimization
+
+- `c.compiler.std` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.default** ''
+    - ansi '-ansi'
+    - c90 '-std=c90' (c89)
+    - gnu90 '-std=gnu90' (gnu89)
+    - c99 '-std=c99' (c9x)
+    - gnu99 '-std=gnu99' (gnu9x)
+    - c11 '-std=c11' (c1x)
+    - gnu11 '-std=gnu11' (gnu1x)
+
+#### Warnings
+
+- `c.compiler.warning.missingprototypes` bool
+    - **false** ''
+    - true '-Wmissing-prototypes'
+
+- `c.compiler.warning.strictprototypes` bool
+    - **false** ''
+    - true '-Wstrict-prototypes'
+
+- `c.compiler.warning.badfunctioncast` bool
+    - **false** ''
+    - true '-Wbad-function-cast'
+
+#### Miscellaneous
+
+- `verbose` bool
+    - **false** ''
+    - true '-v'
+
+- `c.compiler.other` string
+
+### Cross ARM GNU C++ Compiler
+
+#### Preprocessor
+
+- `nostdinc` bool
+    - **false** ''
+    - true '-nostdinc'
+
+- `nostdincpp` bool
+    - **false** ''
+    - true '-nostdinc++'
+
+#### Includes
+
+#### Optimization
+
+- `cpp.compiler.std` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.std.default** ''
+    - ansi (-ansi)
+    - cpp98 '-std=c++98' (c++03)
+    - gnucpp98 '-std=gnu++98' (gnu++03)
+    - cpp0x '-std=c++0x'
+    - gnucpp0x '-std=gnu++0x'
+    - cpp11 '-std=c++11'
+    - gnucpp11 '-std=gnu++11'
+    - cpp1y '-std=c++1y'
+    - gnucpp1y '-std=gnu++1y'
+    - cpp14 '-std=c++14'
+    - gnucpp1 4'-std=gnu++14'
+    - cpp1z '-std=c++1z'
+    - gnucpp1z '-std=gnu++1z'
+
+- `cpp.compiler.abiversion` enumerated
+    - **ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.abiversion.0** '-fabi-version=0'
+    - default ''
+    - 1 '-fabi-version=1'
+    - 2 '-fabi-version=2'
+    - 3 '-fabi-version=3'
+    - 4 '-fabi-version=4'
+    - 5 '-fabi-version=5'
+    - 6 '-fabi-version=6'
+
+- `cpp.compiler.noexceptions` bool
+    - **false** ''
+    - true '-fno-exceptions'
+
+- `cpp.compiler.nortti` bool
+    - **false** ''
+    - true '-fno-rtti'
+
+- `cpp.compiler.nousecxaatexit` bool
+    - **false** ''
+    - true '-fno-use-cxa-atexit'
+
+- `cpp.compiler.nothreadsafestatics` bool
+    - **false** ''
+    - true '-fno-threadsafe-statics'
+
+
+#### Warnings
+
+- `cpp.compiler.warnabi` bool
+    - **false** '-Wabi'
+
+- `cpp.compiler.warning.ctordtorprivacy` bool
+    - **false** '-Wctor-dtor-privacy'
+
+- `cpp.compiler.warning.noexcept` bool
+    - **false** '-Wnoexcept'
+
+- `cpp.compiler.warning.nonvirtualdtor` bool
+    - **false** '-Wnon-virtual-dtor'
+
+- `cpp.compiler.warning.strictnullsentinel` bool
+    - **false** '-Wstrict-null-sentinel'
+
+- `cpp.compiler.warning.signpromo` bool
+    - **false** '-Wsign-promo'
+
+- `cpp.compiler.warneffc` bool
+    - **false** ''
+    - true '-Weffc++'
+
+#### Miscellaneous
+
+- `verbose` bool
+    - **false** ''
+    - true '-v'
+
+- `cpp.compiler.other` string
+
+### Cross ARM GNU C++ Linker
+
+#### General
+
+- `cpp.linker.nostart`
+    - **false** ''
+    - true '-nostartfiles'
+
+- `cpp.linker.nodeflibs`
+    - **false** ''
+    - true '-nodefaultlibs'
+
+- `cpp.linker.nostdlibs`
+    - **false** ''
+    - true '-nostdlib'
+
+#### Libraries
+
+#### Miscellaneous
+
+
+## Template
+
+- `` bool
+    - **false** ''
+    - true ''
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1058 @@
+"""
+mbed SDK
+Copyright (c) 2011-2017 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Title: GNU ARM Eclipse (http://gnuarmeclipse.github.io) exporter.
+
+Description: Creates a managed build project that can be imported by 
+the GNU ARM Eclipse plug-ins.
+
+Author: Liviu Ionescu <ilg@livius.net>
+"""
+
+import os
+import copy
+import tempfile
+import shutil
+import copy
+
+from subprocess import call, Popen, PIPE
+from os.path import splitext, basename, relpath, dirname, exists, join, dirname
+from random import randint
+from json import load
+
+from tools.export.exporters import Exporter, filter_supported
+from tools.options import list_profiles
+from tools.targets import TARGET_MAP
+from tools.utils import NotSupportedException
+from tools.build_api import prepare_toolchain
+
+# =============================================================================
+
+
+class UID:
+    """
+    Helper class, used to generate unique ids required by .cproject symbols.
+    """
+    @property
+    def id(self):
+        return "%0.9u" % randint(0, 999999999)
+
+# Global UID generator instance.
+# Passed to the template engine, and referred as {{u.id}}.
+# Each invocation generates a new number.
+u = UID()
+
+# =============================================================================
+
+
+POST_BINARY_WHITELIST = set([
+    "TEENSY3_1Code.binary_hook",
+    "MCU_NRF51Code.binary_hook",
+    "LPCTargetCode.lpc_patch",
+    "LPC4088Code.binary_hook"
+])
+
+class GNUARMEclipse(Exporter):
+    NAME = 'GNU ARM Eclipse'
+    TOOLCHAIN = 'GCC_ARM'
+
+    TARGETS = filter_supported("GCC_ARM", POST_BINARY_WHITELIST)
+
+    # override
+    @property
+    def flags(self):
+        """Returns a dictionary of toolchain flags.
+        Keys of the dictionary are:
+        cxx_flags    - c++ flags
+        c_flags      - c flags
+        ld_flags     - linker flags
+        asm_flags    - assembler flags
+        common_flags - common options
+
+        The difference from the parent function is that it does not
+        add macro definitions, since they are passed separately.
+        """
+
+        config_header = self.toolchain.get_config_header()
+        flags = {key + "_flags": copy.deepcopy(value) for key, value
+                 in self.toolchain.flags.iteritems()}
+        if config_header:
+            config_header = relpath(config_header,
+                                    self.resources.file_basepath[config_header])
+            flags['c_flags'] += self.toolchain.get_config_option(config_header)
+            flags['cxx_flags'] += self.toolchain.get_config_option(
+                config_header)
+        return flags
+
+    def toolchain_flags(self, toolchain):
+        """Returns a dictionary of toolchain flags.
+        Keys of the dictionary are:
+        cxx_flags    - c++ flags
+        c_flags      - c flags
+        ld_flags     - linker flags
+        asm_flags    - assembler flags
+        common_flags - common options
+
+        The difference from the above is that it takes a parameter.
+        """
+
+        # Note: use the config options from the currently selected toolchain.
+        config_header = self.toolchain.get_config_header()
+
+        flags = {key + "_flags": copy.deepcopy(value) for key, value
+                 in toolchain.flags.iteritems()}
+        if config_header:
+            config_header = relpath(config_header,
+                                    self.resources.file_basepath[config_header])
+            header_options = self.toolchain.get_config_option(config_header)
+            flags['c_flags'] += header_options
+            flags['cxx_flags'] += header_options
+        return flags
+
+    # override
+    def generate(self):
+        """
+        Generate the .project and .cproject files.
+        """
+        if not self.resources.linker_script:
+            raise NotSupportedException("No linker script found.")
+
+        print
+        print 'Create a GNU ARM Eclipse C++ managed project'
+        print 'Project name: {0}'.format(self.project_name)
+        print 'Target: {0}'.format(self.toolchain.target.name)
+        print 'Toolchain: {0}'.format(self.TOOLCHAIN)
+
+        self.resources.win_to_unix()
+
+        # TODO: use some logger to display additional info if verbose
+
+        libraries = []
+        # print 'libraries'
+        # print self.resources.libraries
+        for lib in self.resources.libraries:
+            l, _ = splitext(basename(lib))
+            libraries.append(l[3:])
+
+        self.system_libraries = [
+            'stdc++', 'supc++', 'm', 'c', 'gcc', 'nosys'
+        ]
+
+        # Read in all profiles, we'll extract compiler options.
+        profiles = self.get_all_profiles()
+
+        profile_ids = [s.lower() for s in profiles]
+        profile_ids.sort()
+
+        # TODO: get the list from existing .cproject
+        build_folders = [s.capitalize() for s in profile_ids]
+        build_folders.append('BUILD')
+        # print build_folders
+
+        objects = [self.filter_dot(s) for s in self.resources.objects]
+        for bf in build_folders:
+            objects = [o for o in objects if not o.startswith(bf + '/')]
+        # print 'objects'
+        # print objects
+
+        self.compute_exclusions()
+
+        self.include_path = [
+            self.filter_dot(s) for s in self.resources.inc_dirs]
+        print 'Include folders: {0}'.format(len(self.include_path))
+
+        self.as_defines = self.toolchain.get_symbols(True)
+        self.c_defines = self.toolchain.get_symbols()
+        self.cpp_defines = self.c_defines
+        print 'Symbols: {0}'.format(len(self.c_defines))
+
+        self.ld_script = self.filter_dot(
+            self.resources.linker_script)
+        print 'Linker script: {0}'.format(self.ld_script)
+
+        self.options = {}
+        for id in profile_ids:
+
+            # There are 4 categories of options, a category common too
+            # all tools and a specific category for each of the tools.
+            opts = {}
+            opts['common'] = {}
+            opts['as'] = {}
+            opts['c'] = {}
+            opts['cpp'] = {}
+            opts['ld'] = {}
+
+            opts['id'] = id
+            opts['name'] = opts['id'].capitalize()
+
+            print
+            print 'Build configuration: {0}'.format(opts['name'])
+
+            profile = profiles[id]
+
+            # A small hack, do not bother with src_path again,
+            # pass an empty string to avoid crashing.
+            src_paths = ['']
+            target_name = self.toolchain.target.name
+            toolchain = prepare_toolchain(
+                src_paths, "", target_name, self.TOOLCHAIN, build_profile=[profile])
+
+            # Hack to fill in build_dir
+            toolchain.build_dir = self.toolchain.build_dir
+
+            flags = self.toolchain_flags(toolchain)
+
+            print 'Common flags:', ' '.join(flags['common_flags'])
+            print 'C++ flags:', ' '.join(flags['cxx_flags'])
+            print 'C flags:', ' '.join(flags['c_flags'])
+            print 'ASM flags:', ' '.join(flags['asm_flags'])
+            print 'Linker flags:', ' '.join(flags['ld_flags'])
+
+            # Most GNU ARM Eclipse options have a parent,
+            # either debug or release.
+            if '-O0' in flags['common_flags'] or '-Og' in flags['common_flags']:
+                opts['parent_id'] = 'debug'
+            else:
+                opts['parent_id'] = 'release'
+
+            self.process_options(opts, flags)
+
+            opts['as']['defines'] = self.as_defines
+            opts['c']['defines'] = self.c_defines
+            opts['cpp']['defines'] = self.cpp_defines
+
+            opts['common']['include_paths'] = self.include_path
+            opts['common']['excluded_folders'] = '|'.join(
+                self.excluded_folders)
+
+            opts['ld']['library_paths'] = [
+                self.filter_dot(s) for s in self.resources.lib_dirs]
+
+            opts['ld']['object_files'] = objects
+            opts['ld']['user_libraries'] = libraries
+            opts['ld']['system_libraries'] = self.system_libraries
+            opts['ld']['script'] = join(id.capitalize(),
+                                        "linker-script-%s.ld" % id)
+            opts['cpp_cmd'] = " ".join(toolchain.preproc)
+
+            # Unique IDs used in multiple places.
+            # Those used only once are implemented with {{u.id}}.
+            uid = {}
+            uid['config'] = u.id
+            uid['tool_c_compiler'] = u.id
+            uid['tool_c_compiler_input'] = u.id
+            uid['tool_cpp_compiler'] = u.id
+            uid['tool_cpp_compiler_input'] = u.id
+
+            opts['uid'] = uid
+
+            self.options[id] = opts
+
+        jinja_ctx = {
+            'name': self.project_name,
+            'ld_script': self.ld_script,
+
+            # Compiler & linker command line options
+            'options': self.options,
+
+            # Must be an object with an `id` property, which
+            # will be called repeatedly, to generate multiple UIDs.
+            'u': u,
+        }
+
+        self.gen_file('gnuarmeclipse/.project.tmpl', jinja_ctx,
+                      '.project', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('gnuarmeclipse/.cproject.tmpl', jinja_ctx,
+                      '.cproject', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('gnuarmeclipse/makefile.targets.tmpl', jinja_ctx,
+                      'makefile.targets', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('gnuarmeclipse/mbedignore.tmpl', jinja_ctx, '.mbedignore')
+
+        print
+        print 'Done. Import the \'{0}\' project in Eclipse.'.format(self.project_name)
+
+    # override
+    @staticmethod
+    def build(project_name, log_name="build_log.txt", cleanup=True):
+        """
+        Headless build an Eclipse project.
+
+        The following steps are performed:
+        - a temporary workspace is created, 
+        - the project is imported,
+        - a clean build of all configurations is performed and 
+        - the temporary workspace is removed.
+
+        The build results are in the Debug & Release folders.
+
+        All executables (eclipse & toolchain) must be in the PATH.
+
+        The general method to start a headless Eclipse build is:
+
+        $ eclipse \
+        --launcher.suppressErrors \
+        -nosplash \
+        -application org.eclipse.cdt.managedbuilder.core.headlessbuild \
+        -data /path/to/workspace \
+        -import /path/to/project \
+        -cleanBuild "project[/configuration] | all"
+        """
+
+        # TODO: possibly use the log file.
+
+        # Create a temporary folder for the workspace.
+        tmp_folder = tempfile.mkdtemp()
+
+        cmd = [
+            'eclipse',
+            '--launcher.suppressErrors',
+            '-nosplash',
+            '-application org.eclipse.cdt.managedbuilder.core.headlessbuild',
+            '-data', tmp_folder,
+            '-import', os.getcwd(),
+            '-cleanBuild', project_name
+        ]
+
+        p = Popen(' '.join(cmd), shell=True, stdout=PIPE, stderr=PIPE)
+        out, err = p.communicate()
+        ret_code = p.returncode
+        stdout_string = "=" * 10 + "STDOUT" + "=" * 10 + "\n"
+        err_string = "=" * 10 + "STDERR" + "=" * 10 + "\n"
+        err_string += err
+
+        ret_string = "SUCCESS\n"
+        if ret_code != 0:
+            ret_string += "FAILURE\n"
+
+        print "%s\n%s\n%s\n%s" % (stdout_string, out, err_string, ret_string)
+
+        if log_name:
+            # Write the output to the log file
+            with open(log_name, 'w+') as f:
+                f.write(stdout_string)
+                f.write(out)
+                f.write(err_string)
+                f.write(ret_string)
+
+        # Cleanup the exported and built files
+        if cleanup:
+            if exists(log_name):
+                os.remove(log_name)
+            os.remove('.project')
+            os.remove('.cproject')
+            if exists('Debug'):
+                shutil.rmtree('Debug')
+            if exists('Release'):
+                shutil.rmtree('Release')
+            if exists('makefile.targets'):
+                os.remove('makefile.targets')
+
+        # Always remove the temporary folder.
+        if exists(tmp_folder):
+            shutil.rmtree(tmp_folder)
+
+        if ret_code == 0:
+            # Return Success
+            return 0
+
+        # Seems like something went wrong.
+        return -1
+
+   # -------------------------------------------------------------------------
+
+    @staticmethod
+    def get_all_profiles():
+        tools_path = dirname(dirname(dirname(__file__)))
+        file_names = [join(tools_path, "profiles", fn) for fn in os.listdir(
+            join(tools_path, "profiles")) if fn.endswith(".json")]
+
+        # print file_names
+
+        profile_names = [basename(fn).replace(".json", "")
+                         for fn in file_names]
+        # print profile_names
+
+        profiles = {}
+
+        for fn in file_names:
+            content = load(open(fn))
+            profile_name = basename(fn).replace(".json", "")
+            profiles[profile_name] = content
+
+        return profiles
+
+    # -------------------------------------------------------------------------
+    # Process source files/folders exclusions.
+
+    def compute_exclusions(self):
+        """
+        With the project root as the only source folder known to CDT,
+        based on the list of source files, compute the folders to not
+        be included in the build.
+
+        The steps are:
+        - get the list of source folders, as dirname(source_file)
+        - compute the top folders (subfolders of the project folder)
+        - iterate all subfolders and add them to a tree, with all 
+        nodes markes as 'not used'
+        - iterate the source folders and mark them as 'used' in the
+        tree, including all intermediate nodes
+        - recurse the tree and collect all unused folders; descend
+        the hierarchy only for used nodes
+        """
+        source_folders = [self.filter_dot(s) for s in set(dirname(
+            src) for src in self.resources.c_sources + self.resources.cpp_sources + self.resources.s_sources)]
+        if '.' in source_folders:
+            source_folders.remove('.')
+
+        # print 'source folders'
+        # print source_folders
+
+        # Source folders were converted before and are guaranteed to
+        # use the POSIX separator.
+        top_folders = [f for f in set(s.split('/')[0]
+                                      for s in source_folders)]
+        # print 'top folders'
+        # print top_folders
+
+        self.source_tree = {}
+        for top_folder in top_folders:
+            for root, dirs, files in os.walk(top_folder, topdown=True):
+                # print root, dirs, files
+
+                # Paths returned by os.walk() must be split with os.dep
+                # to accomodate Windows weirdness.
+                parts = root.split(os.sep)
+
+                # Ignore paths that include parts starting with dot.
+                skip = False
+                for part in parts:
+                    if part.startswith('.'):
+                        skip = True
+                        break
+                if skip:
+                    continue
+
+                # Further process only leaf paths, (that do not have
+                # sub-folders).
+                if len(dirs) == 0:
+                    # The path is reconstructed using POSIX separators.
+                    self.add_source_folder_to_tree('/'.join(parts))
+
+        for folder in source_folders:
+            self.add_source_folder_to_tree(folder, True)
+
+        # print
+        # print self.source_tree
+        # self.dump_paths(self.source_tree)
+        # self.dump_tree(self.source_tree)
+
+        # print 'excludings'
+        self.excluded_folders = ['BUILD']
+        self.recurse_excludings(self.source_tree)
+
+        print 'Source folders: {0}, with {1} exclusions'.format(len(source_folders), len(self.excluded_folders))
+
+    def add_source_folder_to_tree(self, path, is_used=False):
+        """
+        Decompose a path in an array of folder names and create the tree.
+        On the second pass the nodes should be already there; mark them
+        as used.
+        """
+        # print path, is_used
+
+        # All paths arriving here are guaranteed to use the POSIX
+        # separators, os.walk() paths were also explicitly converted.
+        parts = path.split('/')
+        # print parts
+        node = self.source_tree
+        prev = None
+        for part in parts:
+            if part not in node.keys():
+                new_node = {}
+                new_node['name'] = part
+                new_node['children'] = {}
+                if prev != None:
+                    new_node['parent'] = prev
+                node[part] = new_node
+            node[part]['is_used'] = is_used
+            prev = node[part]
+            node = node[part]['children']
+
+    def recurse_excludings(self, nodes):
+        """
+        Recurse the tree and collect all unused folders; descend
+        the hierarchy only for used nodes.
+        """
+        for k in nodes.keys():
+            node = nodes[k]
+            if node['is_used'] == False:
+                parts = []
+                cnode = node
+                while True:
+                    parts.insert(0, cnode['name'])
+                    if 'parent' not in cnode:
+                        break
+                    cnode = cnode['parent']
+
+                # Compose a POSIX path.
+                path = '/'.join(parts)
+                # print path
+                self.excluded_folders.append(path)
+            else:
+                self.recurse_excludings(node['children'])
+
+    # -------------------------------------------------------------------------
+
+    @staticmethod
+    def filter_dot(str):
+        """
+        Remove the './' prefix, if present.
+        This function assumes that resources.win_to_unix()
+        replaced all windows backslashes with slashes.
+        """
+        if str == None:
+            return None
+        if str[:2] == './':
+            return str[2:]
+        return str
+
+    # -------------------------------------------------------------------------
+
+    def dump_tree(self, nodes, depth=0):
+        for k in nodes.keys():
+            node = nodes[k]
+            parent_name = node['parent'][
+                'name'] if 'parent' in node.keys() else ''
+            print '  ' * depth, node['name'], node['is_used'], parent_name
+            if len(node['children'].keys()) != 0:
+                self.dump_tree(node['children'], depth + 1)
+
+    def dump_paths(self, nodes, depth=0):
+        for k in nodes.keys():
+            node = nodes[k]
+            parts = []
+            while True:
+                parts.insert(0, node['name'])
+                if 'parent' not in node:
+                    break
+                node = node['parent']
+            path = '/'.join(parts)
+            print path, nodes[k]['is_used']
+            self.dump_paths(nodes[k]['children'], depth + 1)
+
+    # -------------------------------------------------------------------------
+
+    def process_options(self, opts, flags_in):
+        """
+        CDT managed projects store lots of build options in separate
+        variables, with separate IDs in the .cproject file.
+        When the CDT build is started, all these options are brought
+        together to compose the compiler and linker command lines.
+
+        Here the process is reversed, from the compiler and linker
+        command lines, the options are identified and various flags are
+        set to control the template generation process.
+
+        Once identified, the options are removed from the command lines.
+
+        The options that were not identified are options that do not 
+        have CDT equivalents and will be passed in the 'Other options' 
+        categories.
+
+        Although this process does not have a very complicated logic,
+        given the large number of explicit configuration options
+        used by the GNU ARM Eclipse managed build plug-in, it is tedious...
+        """
+
+        # Make a copy of the flags, to be one by one removed after processing.
+        flags = copy.deepcopy(flags_in)
+
+        if False:
+            print
+            print 'common_flags', flags['common_flags']
+            print 'asm_flags', flags['asm_flags']
+            print 'c_flags', flags['c_flags']
+            print 'cxx_flags', flags['cxx_flags']
+            print 'ld_flags', flags['ld_flags']
+
+        # Initialise the 'last resort' options where all unrecognised
+        # options will be collected.
+        opts['as']['other'] = ''
+        opts['c']['other'] = ''
+        opts['cpp']['other'] = ''
+        opts['ld']['other'] = ''
+
+        MCPUS = {
+            'Cortex-M0': {'mcpu': 'cortex-m0', 'fpu_unit': None},
+            'Cortex-M0+': {'mcpu': 'cortex-m0plus', 'fpu_unit': None},
+            'Cortex-M1': {'mcpu': 'cortex-m1', 'fpu_unit': None},
+            'Cortex-M3': {'mcpu': 'cortex-m3', 'fpu_unit': None},
+            'Cortex-M4': {'mcpu': 'cortex-m4', 'fpu_unit': None},
+            'Cortex-M4F': {'mcpu': 'cortex-m4', 'fpu_unit': 'fpv4spd16'},
+            'Cortex-M7': {'mcpu': 'cortex-m7', 'fpu_unit': None},
+            'Cortex-M7F': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv4spd16'},
+            'Cortex-M7FD': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv5d16'},
+            'Cortex-A9': {'mcpu': 'cortex-a9', 'fpu_unit': 'vfpv3'}
+        }
+
+        # Remove options that are supplied by CDT
+        self.remove_option(flags['common_flags'], '-c')
+        self.remove_option(flags['common_flags'], '-MMD')
+
+        # As 'plan B', get the CPU from the target definition.
+        core = self.toolchain.target.core
+
+        opts['common']['arm.target.family'] = None
+
+        # cortex-m0, cortex-m0-small-multiply, cortex-m0plus,
+        # cortex-m0plus-small-multiply, cortex-m1, cortex-m1-small-multiply,
+        # cortex-m3, cortex-m4, cortex-m7.
+        str = self.find_options(flags['common_flags'], '-mcpu=')
+        if str != None:
+            opts['common']['arm.target.family'] = str[len('-mcpu='):]
+            self.remove_option(flags['common_flags'], str)
+            self.remove_option(flags['ld_flags'], str)
+        else:
+            if core not in MCPUS:
+                raise NotSupportedException(
+                    'Target core {0} not supported.'.format(core))
+            opts['common']['arm.target.family'] = MCPUS[core]['mcpu']
+
+        opts['common']['arm.target.arch'] = 'none'
+        str = self.find_options(flags['common_flags'], '-march=')
+        arch = str[len('-march='):]
+        archs = {'armv6-m': 'armv6-m', 'armv7-m': 'armv7-m', 'armv7-a': 'armv7-a'}
+        if arch in archs:
+            opts['common']['arm.target.arch'] = archs[arch]
+            self.remove_option(flags['common_flags'], str)
+
+        opts['common']['arm.target.instructionset'] = 'thumb'
+        if '-mthumb' in flags['common_flags']:
+            self.remove_option(flags['common_flags'], '-mthumb')
+            self.remove_option(flags['ld_flags'], '-mthumb')
+        elif '-marm' in flags['common_flags']:
+            opts['common']['arm.target.instructionset'] = 'arm'
+            self.remove_option(flags['common_flags'], '-marm')
+            self.remove_option(flags['ld_flags'], '-marm')
+
+        opts['common']['arm.target.thumbinterwork'] = False
+        if '-mthumb-interwork' in flags['common_flags']:
+            opts['common']['arm.target.thumbinterwork'] = True
+            self.remove_option(flags['common_flags'], '-mthumb-interwork')
+
+        opts['common']['arm.target.endianness'] = None
+        if '-mlittle-endian' in flags['common_flags']:
+            opts['common']['arm.target.endianness'] = 'little'
+            self.remove_option(flags['common_flags'], '-mlittle-endian')
+        elif '-mbig-endian' in flags['common_flags']:
+            opts['common']['arm.target.endianness'] = 'big'
+            self.remove_option(flags['common_flags'], '-mbig-endian')
+
+        opts['common']['arm.target.fpu.unit'] = None
+        # default, fpv4spd16, fpv5d16, fpv5spd16
+        str = self.find_options(flags['common_flags'], '-mfpu=')
+        if str != None:
+            fpu = str[len('-mfpu='):]
+            fpus = {
+                'fpv4-sp-d16': 'fpv4spd16',
+                'fpv5-d16': 'fpv5d16',
+                'fpv5-sp-d16': 'fpv5spd16'
+            }
+            if fpu in fpus:
+                opts['common']['arm.target.fpu.unit'] = fpus[fpu]
+
+                self.remove_option(flags['common_flags'], str)
+                self.remove_option(flags['ld_flags'], str)
+        if opts['common']['arm.target.fpu.unit'] == None:
+            if core not in MCPUS:
+                raise NotSupportedException(
+                    'Target core {0} not supported.'.format(core))
+            if MCPUS[core]['fpu_unit']:
+                opts['common'][
+                    'arm.target.fpu.unit'] = MCPUS[core]['fpu_unit']
+
+        # soft, softfp, hard.
+        str = self.find_options(flags['common_flags'], '-mfloat-abi=')
+        if str != None:
+            opts['common']['arm.target.fpu.abi'] = str[
+                len('-mfloat-abi='):]
+            self.remove_option(flags['common_flags'], str)
+            self.remove_option(flags['ld_flags'], str)
+
+        opts['common']['arm.target.unalignedaccess'] = None
+        if '-munaligned-access' in flags['common_flags']:
+            opts['common']['arm.target.unalignedaccess'] = 'enabled'
+            self.remove_option(flags['common_flags'], '-munaligned-access')
+        elif '-mno-unaligned-access' in flags['common_flags']:
+            opts['common']['arm.target.unalignedaccess'] = 'disabled'
+            self.remove_option(flags['common_flags'], '-mno-unaligned-access')
+
+        # Default optimisation level for Release.
+        opts['common']['optimization.level'] = '-Os'
+
+        # If the project defines an optimisation level, it is used
+        # only for the Release configuration, the Debug one used '-Og'.
+        str = self.find_options(flags['common_flags'], '-O')
+        if str != None:
+            levels = {
+                '-O0': 'none', '-O1': 'optimize', '-O2': 'more',
+                '-O3': 'most', '-Os': 'size', '-Og': 'debug'
+            }
+            if str in levels:
+                opts['common']['optimization.level'] = levels[str]
+                self.remove_option(flags['common_flags'], str)
+
+        include_files = []
+        for all_flags in [flags['common_flags'], flags['c_flags'], flags['cxx_flags']]:
+            while '-include' in all_flags:
+                ix = all_flags.index('-include')
+                str = all_flags[ix + 1]
+                if str not in include_files:
+                    include_files.append(str)
+                self.remove_option(all_flags, '-include')
+                self.remove_option(all_flags, str)
+
+        opts['common']['include_files'] = include_files
+
+        if '-ansi' in flags['c_flags']:
+            opts['c']['compiler.std'] = '-ansi'
+            self.remove_option(flags['c_flags'], str)
+        else:
+            str = self.find_options(flags['c_flags'], '-std')
+            std = str[len('-std='):]
+            c_std = {
+                'c90': 'c90', 'c89': 'c90', 'gnu90': 'gnu90', 'gnu89': 'gnu90',
+                'c99': 'c99', 'c9x': 'c99', 'gnu99': 'gnu99', 'gnu9x': 'gnu98',
+                'c11': 'c11', 'c1x': 'c11', 'gnu11': 'gnu11', 'gnu1x': 'gnu11'
+            }
+            if std in c_std:
+                opts['c']['compiler.std'] = c_std[std]
+                self.remove_option(flags['c_flags'], str)
+
+        if '-ansi' in flags['cxx_flags']:
+            opts['cpp']['compiler.std'] = '-ansi'
+            self.remove_option(flags['cxx_flags'], str)
+        else:
+            str = self.find_options(flags['cxx_flags'], '-std')
+            std = str[len('-std='):]
+            cpp_std = {
+                'c++98': 'cpp98', 'c++03': 'cpp98',
+                'gnu++98': 'gnucpp98', 'gnu++03': 'gnucpp98',
+                'c++0x': 'cpp0x', 'gnu++0x': 'gnucpp0x',
+                'c++11': 'cpp11', 'gnu++11': 'gnucpp11',
+                'c++1y': 'cpp1y', 'gnu++1y': 'gnucpp1y',
+                'c++14': 'cpp14', 'gnu++14': 'gnucpp14',
+                'c++1z': 'cpp1z', 'gnu++1z': 'gnucpp1z',
+            }
+            if std in cpp_std:
+                opts['cpp']['compiler.std'] = cpp_std[std]
+                self.remove_option(flags['cxx_flags'], str)
+
+        # Common optimisation options.
+        optimization_options = {
+            '-fmessage-length=0': 'optimization.messagelength',
+            '-fsigned-char': 'optimization.signedchar',
+            '-ffunction-sections': 'optimization.functionsections',
+            '-fdata-sections': 'optimization.datasections',
+            '-fno-common': 'optimization.nocommon',
+            '-fno-inline-functions': 'optimization.noinlinefunctions',
+            '-ffreestanding': 'optimization.freestanding',
+            '-fno-builtin': 'optimization.nobuiltin',
+            '-fsingle-precision-constant': 'optimization.spconstant',
+            '-fPIC': 'optimization.PIC',
+            '-fno-move-loop-invariants': 'optimization.nomoveloopinvariants',
+        }
+
+        for option in optimization_options:
+            opts['common'][optimization_options[option]] = False
+            if option in flags['common_flags']:
+                opts['common'][optimization_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        # Common warning options.
+        warning_options = {
+            '-fsyntax-only': 'warnings.syntaxonly',
+            '-pedantic': 'warnings.pedantic',
+            '-pedantic-errors': 'warnings.pedanticerrors',
+            '-w': 'warnings.nowarn',
+            '-Wunused': 'warnings.unused',
+            '-Wuninitialized': 'warnings.uninitialized',
+            '-Wall': 'warnings.allwarn',
+            '-Wextra': 'warnings.extrawarn',
+            '-Wmissing-declarations': 'warnings.missingdeclaration',
+            '-Wconversion': 'warnings.conversion',
+            '-Wpointer-arith': 'warnings.pointerarith',
+            '-Wpadded': 'warnings.padded',
+            '-Wshadow': 'warnings.shadow',
+            '-Wlogical-op': 'warnings.logicalop',
+            '-Waggregate-return': 'warnings.agreggatereturn',
+            '-Wfloat-equal': 'warnings.floatequal',
+            '-Werror': 'warnings.toerrors',
+        }
+
+        for option in warning_options:
+            opts['common'][warning_options[option]] = False
+            if option in flags['common_flags']:
+                opts['common'][warning_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        # Common debug options.
+        debug_levels = {
+            '-g': 'default',
+            '-g1': 'minimal',
+            '-g3': 'max',
+        }
+        opts['common']['debugging.level'] = 'none'
+        for option in debug_levels:
+            if option in flags['common_flags']:
+                opts['common'][
+                    'debugging.level'] = debug_levels[option]
+                self.remove_option(flags['common_flags'], option)
+
+        debug_formats = {
+            '-ggdb': 'gdb',
+            '-gstabs': 'stabs',
+            '-gstabs+': 'stabsplus',
+            '-gdwarf-2': 'dwarf2',
+            '-gdwarf-3': 'dwarf3',
+            '-gdwarf-4': 'dwarf4',
+            '-gdwarf-5': 'dwarf5',
+        }
+
+        opts['common']['debugging.format'] = ''
+        for option in debug_levels:
+            if option in flags['common_flags']:
+                opts['common'][
+                    'debugging.format'] = debug_formats[option]
+                self.remove_option(flags['common_flags'], option)
+
+        opts['common']['debugging.prof'] = False
+        if '-p' in flags['common_flags']:
+            opts['common']['debugging.prof'] = True
+            self.remove_option(flags['common_flags'], '-p')
+
+        opts['common']['debugging.gprof'] = False
+        if '-pg' in flags['common_flags']:
+            opts['common']['debugging.gprof'] = True
+            self.remove_option(flags['common_flags'], '-gp')
+
+        # Assembler options.
+        opts['as']['usepreprocessor'] = False
+        while '-x' in flags['asm_flags']:
+            ix = flags['asm_flags'].index('-x')
+            str = flags['asm_flags'][ix + 1]
+
+            if str == 'assembler-with-cpp':
+                opts['as']['usepreprocessor'] = True
+            else:
+                # Collect all other assembler options.
+                opts['as']['other'] += ' -x ' + str
+
+            self.remove_option(flags['asm_flags'], '-x')
+            self.remove_option(flags['asm_flags'], 'assembler-with-cpp')
+
+        opts['as']['nostdinc'] = False
+        if '-nostdinc' in flags['asm_flags']:
+            opts['as']['nostdinc'] = True
+            self.remove_option(flags['asm_flags'], '-nostdinc')
+
+        opts['as']['verbose'] = False
+        if '-v' in flags['asm_flags']:
+            opts['as']['verbose'] = True
+            self.remove_option(flags['asm_flags'], '-v')
+
+        # C options.
+        opts['c']['nostdinc'] = False
+        if '-nostdinc' in flags['c_flags']:
+            opts['c']['nostdinc'] = True
+            self.remove_option(flags['c_flags'], '-nostdinc')
+
+        opts['c']['verbose'] = False
+        if '-v' in flags['c_flags']:
+            opts['c']['verbose'] = True
+            self.remove_option(flags['c_flags'], '-v')
+
+        warning_options = {
+            '-Wmissing-prototypes': 'warnings.missingprototypes',
+            '-Wstrict-prototypes': 'warnings.strictprototypes',
+            '-Wbad-function-cast': 'warnings.badfunctioncast',
+        }
+
+        for option in warning_options:
+            opts['c'][warning_options[option]] = False
+            if option in flags['common_flags']:
+                opts['c'][warning_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        # C++ options.
+        opts['cpp']['nostdinc'] = False
+        if '-nostdinc' in flags['cxx_flags']:
+            opts['cpp']['nostdinc'] = True
+            self.remove_option(flags['cxx_flags'], '-nostdinc')
+
+        opts['cpp']['nostdincpp'] = False
+        if '-nostdinc++' in flags['cxx_flags']:
+            opts['cpp']['nostdincpp'] = True
+            self.remove_option(flags['cxx_flags'], '-nostdinc++')
+
+        optimization_options = {
+            '-fno-exceptions': 'optimization.noexceptions',
+            '-fno-rtti': 'optimization.nortti',
+            '-fno-use-cxa-atexit': 'optimization.nousecxaatexit',
+            '-fno-threadsafe-statics': 'optimization.nothreadsafestatics',
+        }
+
+        for option in optimization_options:
+            opts['cpp'][optimization_options[option]] = False
+            if option in flags['cxx_flags']:
+                opts['cpp'][optimization_options[option]] = True
+                self.remove_option(flags['cxx_flags'], option)
+            if option in flags['common_flags']:
+                opts['cpp'][optimization_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        warning_options = {
+            '-Wabi': 'warnabi',
+            '-Wctor-dtor-privacy': 'warnings.ctordtorprivacy',
+            '-Wnoexcept': 'warnings.noexcept',
+            '-Wnon-virtual-dtor': 'warnings.nonvirtualdtor',
+            '-Wstrict-null-sentinel': 'warnings.strictnullsentinel',
+            '-Wsign-promo': 'warnings.signpromo',
+            '-Weffc++': 'warneffc',
+        }
+
+        for option in warning_options:
+            opts['cpp'][warning_options[option]] = False
+            if option in flags['cxx_flags']:
+                opts['cpp'][warning_options[option]] = True
+                self.remove_option(flags['cxx_flags'], option)
+            if option in flags['common_flags']:
+                opts['cpp'][warning_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        opts['cpp']['verbose'] = False
+        if '-v' in flags['cxx_flags']:
+            opts['cpp']['verbose'] = True
+            self.remove_option(flags['cxx_flags'], '-v')
+
+        # Linker options.
+        linker_options = {
+            '-nostartfiles': 'nostart',
+            '-nodefaultlibs': 'nodeflibs',
+            '-nostdlib': 'nostdlibs',
+        }
+
+        for option in linker_options:
+            opts['ld'][linker_options[option]] = False
+            if option in flags['ld_flags']:
+                opts['ld'][linker_options[option]] = True
+                self.remove_option(flags['ld_flags'], option)
+
+        opts['ld']['gcsections'] = False
+        if '-Wl,--gc-sections' in flags['ld_flags']:
+            opts['ld']['gcsections'] = True
+            self.remove_option(flags['ld_flags'], '-Wl,--gc-sections')
+
+        opts['ld']['flags'] = []
+        to_remove = []
+        for opt in flags['ld_flags']:
+            if opt.startswith('-Wl,--wrap,'):
+                opts['ld']['flags'].append(
+                    '--wrap=' + opt[len('-Wl,--wrap,'):])
+                to_remove.append(opt)
+        for opt in to_remove:
+            self.remove_option(flags['ld_flags'], opt)
+
+        # Other tool remaining options are separated by category.
+        opts['as']['otherwarnings'] = self.find_options(
+            flags['asm_flags'], '-W')
+
+        opts['c']['otherwarnings'] = self.find_options(
+            flags['c_flags'], '-W')
+        opts['c']['otheroptimizations'] = self.find_options(flags[
+            'c_flags'], '-f')
+
+        opts['cpp']['otherwarnings'] = self.find_options(
+            flags['cxx_flags'], '-W')
+        opts['cpp']['otheroptimizations'] = self.find_options(
+            flags['cxx_flags'], '-f')
+
+        # Other common remaining options are separated by category.
+        opts['common']['optimization.other'] = self.find_options(
+            flags['common_flags'], '-f')
+        opts['common']['warnings.other'] = self.find_options(
+            flags['common_flags'], '-W')
+
+        # Remaining common flags are added to each tool.
+        opts['as']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + \
+            ' '.join(flags['asm_flags'])
+        opts['c']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + ' '.join(flags['c_flags'])
+        opts['cpp']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + \
+            ' '.join(flags['cxx_flags'])
+        opts['ld']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + ' '.join(flags['ld_flags'])
+
+        if len(self.system_libraries) > 0:
+            opts['ld']['other'] += ' -Wl,--start-group '
+            opts['ld'][
+                'other'] += ' '.join('-l' + s for s in self.system_libraries)
+            opts['ld']['other'] += ' -Wl,--end-group '
+
+        # Strip all 'other' flags, since they might have leading spaces.
+        opts['as']['other'] = opts['as']['other'].strip()
+        opts['c']['other'] = opts['c']['other'].strip()
+        opts['cpp']['other'] = opts['cpp']['other'].strip()
+        opts['ld']['other'] = opts['ld']['other'].strip()
+
+        if False:
+            print
+            print opts
+
+            print
+            print 'common_flags', flags['common_flags']
+            print 'asm_flags', flags['asm_flags']
+            print 'c_flags', flags['c_flags']
+            print 'cxx_flags', flags['cxx_flags']
+            print 'ld_flags', flags['ld_flags']
+
+    @staticmethod
+    def find_options(lst, option):
+        tmp = [str for str in lst if str.startswith(option)]
+        if len(tmp) > 0:
+            return tmp[0]
+        else:
+            return None
+
+    @staticmethod
+    def find_options(lst, prefix):
+        other = ''
+        opts = [str for str in lst if str.startswith(prefix)]
+        if len(opts) > 0:
+            for opt in opts:
+                other += ' ' + opt
+                GNUARMEclipse.remove_option(lst, opt)
+        return other.strip()
+
+    @staticmethod
+    def remove_option(lst, option):
+        if option in lst:
+            lst.remove(option)
+
+# =============================================================================
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/makefile.targets.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,13 @@
+# DO NOT REMOVE! Generated by the GNU ARM Eclipse exporter from an mBed project.
+
+mbedclean:
+	$(RM) $(OBJS)
+	$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS)
+	$(RM) $(SECONDARY_FLASH)$(SECONDARY_SIZE) {{name}}.* linker-script-*.ld
+	-@echo ' '
+
+{% for config, data in options.iteritems() %}
+linker-script-{{config}}.ld: ../{{ld_script}}
+	{{data.cpp_cmd}} {{data.ld.other}} $< -o $@
+{{name}}.elf: linker-script-{{config}}.ld
+{% endfor %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/gnuarmeclipse/mbedignore.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,3 @@
+{%- for config in options.values() -%}
+{{config.name}}/*
+{% endfor -%}
--- a/export/iar/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/iar/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -10,6 +10,7 @@
 from tools.export.exporters import Exporter, TargetNotSupportedException
 import json
 from tools.export.cmsis import DeviceCMSIS
+from tools.utils import NotSupportedException
 from multiprocessing import cpu_count
 
 class IAR(Exporter):
@@ -18,8 +19,7 @@
 
     #iar_definitions.json location
     def_loc = os.path.join(
-        os.path.dirname(os.path.abspath(__file__)), '..', '..', '..',
-        'tools','export', 'iar', 'iar_definitions.json')
+        os.path.dirname(os.path.abspath(__file__)), 'iar_definitions.json')
 
     #create a dictionary of the definitions
     with open(def_loc, 'r') as f:
@@ -78,6 +78,9 @@
             "FPU2": 0,
             "NrRegs": 0,
             "NEON": '',
+            "CExtraOptionsCheck": 0,
+            "CExtraOptions": "",
+            "CMSISDAPJtagSpeedList": 0,
         }
 
         iar_defaults.update(device_info)
@@ -97,6 +100,8 @@
 
     def generate(self):
         """Generate the .eww, .ewd, and .ewp files"""
+        if not self.resources.linker_script:
+            raise NotSupportedException("No linker script found.")
         srcs = self.resources.headers + self.resources.s_sources + \
                self.resources.c_sources + self.resources.cpp_sources + \
                self.resources.objects + self.resources.libraries
@@ -108,7 +113,7 @@
         template = ["--vla", "--no_static_destruction"]
         # Flag invalid if set in template
         # Optimizations are also set in template
-        invalid_flag = lambda x: x in template or re.match("-O(\d|time|n)", x)
+        invalid_flag = lambda x: x in template or re.match("-O(\d|time|n|hz?)", x)
         flags['c_flags'] = [flag for flag in c_flags if not invalid_flag(flag)]
 
         try:
--- a/export/iar/ewd.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/iar/ewd.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -57,11 +57,11 @@
         </option>
         <option>
           <name>CExtraOptionsCheck</name>
-          <state>0</state>
+          <state>{{device.CExtraOptionsCheck}}</state>
         </option>
         <option>
           <name>CExtraOptions</name>
-          <state></state>
+          <state>{{device.CExtraOptions}}</state>
         </option>
         <option>
           <name>CFpuProcessor</name>
@@ -348,7 +348,7 @@
         </option>
         <option>
           <name>CMSISDAPInterfaceRadio</name>
-          <state>0</state>
+          <state>1</state>
         </option>
         <option>
           <name>CMSISDAPInterfaceCmdLine</name>
@@ -365,7 +365,7 @@
         <option>
           <name>CMSISDAPJtagSpeedList</name>
           <version>0</version>
-          <state>0</state>
+          <state>{{device.CMSISDAPJtagSpeedList}}</state>
         </option>
         <option>
           <name>CMSISDAPBreakpointRadio</name>
--- a/export/iar/iar_definitions.json	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/iar/iar_definitions.json	Thu Jun 22 11:12:28 2017 -0500
@@ -42,7 +42,10 @@
         "OGChipSelectEditMenu": "STM32F072RB\tST STM32F072RB"
     },
     "nRF51822_xxAA": {
-        "OGChipSelectEditMenu": "nRF51822-QFAA\tNordicSemi nRF51822-QFAA"
+        "OGChipSelectEditMenu": "nRF51822-QFAA\tNordicSemi nRF51822-QFAA",
+        "CExtraOptionsCheck": 1,
+        "CExtraOptions": "--drv_vector_table_base=0x0",
+        "CMSISDAPJtagSpeedList": 10
     },
     "EFM32GG990F1024": {
         "OGChipSelectEditMenu": "EFM32GG990F1024\tSiliconLaboratories EFM32GG990F1024"
@@ -71,6 +74,9 @@
     "STM32F446RE": {
         "OGChipSelectEditMenu": "STM32F446RE\tST STM32F446RE"
     },
+    "STM32L072CZ": {
+        "OGChipSelectEditMenu": "STM32L072CZ\tST STM32L072CZ"
+    },
     "STM32L073RZ": {
         "OGChipSelectEditMenu": "STM32L073RZ\tST STM32L073RZ"
     },
@@ -163,9 +169,24 @@
         "OGChipSelectEditMenu": "STM32F407VG\tST STM32F407VG"
     },
     "nRF52832_xxAA":{
-        "OGChipSelectEditMenu": "nRF52832-xxAA\tNordicSemi nRF52832-xxAA"
+        "OGChipSelectEditMenu": "nRF52832-xxAA\tNordicSemi nRF52832-xxAA",
+        "CExtraOptionsCheck": 1,
+        "CExtraOptions": "--drv_vector_table_base=0x0",
+        "CMSISDAPJtagSpeedList": 10
     },
     "NCS36510":{
         "OGChipSelectEditMenu": "NCS36510\tONSemiconductor NCS36510"
+    },
+    "NUC472HI8AE": {
+        "OGChipSelectEditMenu": "NUC400AE series\tNuvoton NUC400AE series (NUC442AE,NUC472AE)"
+    },
+    "M453VG6AE": {
+        "OGChipSelectEditMenu": "M451AE series\tNuvoton M451AE series (M451AE,M452AE,M453AE,M451MAE)"
+    },
+    "nRF52840_xxAA":{
+        "OGChipSelectEditMenu": "nRF52840_xxAA\tNordicSemi nRF52840_xxAA",
+        "CExtraOptionsCheck": 1,
+        "CExtraOptions": "--drv_vector_table_base=0x0",
+        "CMSISDAPJtagSpeedList": 10
     }
 }
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,60 @@
+"""
+mbed SDK
+Copyright (c) 2011-2016 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+from os.path import splitext, basename
+
+from tools.export.exporters import Exporter
+
+class LPCXpresso(Exporter):
+    NAME = 'LPCXpresso'
+    TOOLCHAIN = 'GCC_ARM'
+
+    MBED_CONFIG_HEADER_SUPPORTED = True
+
+    TARGETS = [
+        'LPC1768',
+        'LPC4088',
+        'LPC4088_DM',
+        'LPC4330_M4',
+        'LPC1114',
+        'LPC11U35_401',
+        'LPC11U35_501',
+        'UBLOX_C027',
+        'ARCH_PRO',
+        'LPC1549',
+        'LPC11U68',
+        'LPCCAPPUCCINO',
+        'LPC824',
+        'LPC11U37H_401',
+    ]
+
+    def generate(self):
+        libraries = []
+        for lib in self.resources.libraries:
+            l, _ = splitext(basename(lib))
+            libraries.append(l[3:])
+
+        ctx = {
+            'name': self.project_name,
+            'include_paths': self.resources.inc_dirs,
+            'linker_script': self.resources.linker_script,
+            'object_files': self.resources.objects,
+            'libraries': libraries,
+            'symbols': self.toolchain.get_symbols()
+        }
+        ctx.update(self.flags)
+        self.gen_file('lpcxpresso/%s_project.tmpl' % self.target.lower(), ctx, '.project')
+        self.gen_file('lpcxpresso/%s_cproject.tmpl' % self.target.lower(), ctx, '.cproject')
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/arch_pro_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,79 @@
+{% extends "lpcxpresso/cproject_cortexm3_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1768&lt;/name&gt;&#13;
+&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/arch_pro_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/cproject_common.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1850 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+    <storageModule moduleId="org.eclipse.cdt.core.settings">
+        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
+                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
+                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
+                                <option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.{% block core %}{% endblock %}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c {{cxx_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
+                                <option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c {{c_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
+
+                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
+                                <option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c {{asm_flags|join(" ")}} {{common_flags|join(" ")}} -D__NEWLIB__  -DDEBUG -D__CODE_RED " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
+                                <option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.1663456123"
+                                        name="Linker script"
+                                        superClass="com.crt.advproject.link.cpp.script"
+                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+
+                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                   {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    {% for lib in libraries %}
+                                    <listOptionValue builtIn="false" value="{{lib}}"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
+                        </toolChain>
+                    </folderInfo>
+                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/{% block startup_file %}{% endblock %}" name="{{ self.startup_file() }}" rcbsApplicability="disable" resourcePath="src/{{ self.startup_file() }}" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
+                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
+                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
+                        </tool>
+                    </fileInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
+                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c {{cxx_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
+                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
+                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c {{c_flags|join(" ")}} {{common_flags|join(" ")}}" valueType="string"/>
+                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
+                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c {{asm_flags|join(" ")}} {{common_flags|join(" ")}} -D__NEWLIB__  -DNDEBUG -D__CODE_RED " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
+                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.{{ self.core() }}" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    <listOptionValue builtIn="false" value="mbed"/>
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
+                        </toolChain>
+                    </folderInfo>
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
+                                
+                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
+                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
+                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
+                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
+                        </toolChain>
+                    </folderInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+    </storageModule>
+    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
+    </storageModule>
+    <storageModule moduleId="com.crt.config">
+        <projectStorage>{% block cpu_config %}{% endblock %}</projectStorage>
+    </storageModule>
+</cproject>
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/cproject_cortexm0_common.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,3 @@
+{% extends "lpcxpresso/cproject_common.tmpl" %}
+
+{% block core %}cm0{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/cproject_cortexm3_common.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,3 @@
+{% extends "lpcxpresso/cproject_common.tmpl" %}
+
+{% block core %}cm3{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1114_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,48 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1114FN/102&lt;/name&gt;&#13;
+&lt;family&gt;LPC11xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11xx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1114_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u35_401_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,51 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/401" property_count="5" version="70002"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC11U35/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/401" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC11U35/401&lt;/name&gt;&#13;
+&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u35_401_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u35_501_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,51 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/501" property_count="5" version="70002"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC11U35/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/501" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC11U35/501&lt;/name&gt;&#13;
+&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u35_501_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u37h_401_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,51 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37H/401" property_count="5" version="70002"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC11U37H/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37H/401" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC11U37H/401&lt;/name&gt;&#13;
+&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u37h_401_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u68_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,60 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}startup_LPC11U68.cpp{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11U6x_256K.cfx" property_3="NXP" property_4="LPC11U68" property_count="5" version="70200"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;&lt;info chip="LPC11U68" flash_driver="LPC11U6x_256K.cfx" match_id="0x0" name="LPC11U68" stub="crt_emu_cm3_gen"&gt;&#13;&lt;chip&gt;&#13;&lt;name&gt;&#13;LPC11U68&lt;/name&gt;&#13;
+&lt;family&gt;&#13;LPC11U6x&lt;/family&gt;&#13;
+&lt;vendor&gt;&#13;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram0_32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram1_2" location="0x20000000" size="0x800"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram2USB_2" location="0x20004000" size="0x800"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART4" determined="infoFile" id="USART4" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x40060000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x4006c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x40070000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x40074000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x5000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x5000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0xa0004000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc11u68_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1549_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,69 @@
+{% extends "lpcxpresso/cproject_cortexm3_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc15xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC15xx_256K.cfx" property_3="NXP" property_4="LPC1549" property_count="5" version="70200"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1549" connectscript="LPC15RunBootRomConnect.scp" flash_driver="LPC15xx_256K.cfx" match_id="0x0" name="LPC1549" resetscript="LPC15RunBootRomReset.scp" stub="crt_emu_cm3_gen"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1549&lt;/name&gt;&#13;
+&lt;family&gt;LPC15xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram0_16" location="0x2000000" size="0x4000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram1_16" location="0x2004000" size="0x4000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="Ram2_4" location="0x2008000" size="0x1000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC15_MPU" determined="infoFile" id="MPU" location="0xe000ed90"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC15_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC15_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC15_ITM" determined="infoFile" id="ITM" location="0xe0000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x1c000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x1c004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x1c00c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x1c010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x1c018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x1c01c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT2" determined="infoFile" id="SCT2" location="0x1c020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCT3" determined="infoFile" id="SCT3" location="0x1c024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC0" determined="infoFile" id="ADC0" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DAC" determined="infoFile" id="DAC" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ACMP" determined="infoFile" id="ACMP" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="INMUX" determined="infoFile" id="INMUX" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40028000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/&gt;&#13;
+&lt;peripheralInstance derived_from="QEI" determined="infoFile" id="QEI" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40074000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC1" determined="infoFile" id="ADC1" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x400a0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0x400a4000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x400a8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x400ac000"/&gt;&#13;
+&lt;peripheralInstance derived_from="RIT" determined="infoFile" id="RIT" location="0x400b4000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SCTIPU" determined="infoFile" id="SCTIPU" location="0x400b8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x400c0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="C-CAN0" determined="infoFile" id="C-CAN0" location="0x400f0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x400f8000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1549_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1768_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,79 @@
+{% extends "lpcxpresso/cproject_cortexm3_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1768&lt;/name&gt;&#13;
+&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc1768_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4088_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1922 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+    <storageModule moduleId="org.eclipse.cdt.core.settings">
+        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
+                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
+                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
+								<option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
+								<option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
+
+                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
+								<option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
+								<option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.1663456123"
+                                        name="Linker script"
+                                        superClass="com.crt.advproject.link.cpp.script"
+                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+
+                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                   {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    {% for lib in libraries %}
+                                    <listOptionValue builtIn="false" value="{{lib}}"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4" valueType="enumerated"/>
+
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
+                        </toolChain>
+                    </folderInfo>
+                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc176x.c" name="cr_startup_lpc176x.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc176x.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
+                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
+                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
+                        </tool>
+                    </fileInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
+                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
+                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
+                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
+                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
+                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    <listOptionValue builtIn="false" value="mbed"/>
+                                    <listOptionValue builtIn="false" value="capi"/>
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
+                        </toolChain>
+                    </folderInfo>
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
+                                
+                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
+                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
+                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
+                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
+                        </toolChain>
+                    </folderInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+    </storageModule>
+    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
+    </storageModule>
+    <storageModule moduleId="com.crt.config">
+		<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4088&lt;/name&gt;&#13;
+&lt;family&gt;LPC407x_8x&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;</projectStorage>
+    </storageModule>
+</cproject>
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4088_dm_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1922 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+    <storageModule moduleId="org.eclipse.cdt.core.settings">
+        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
+                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
+                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
+								<option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
+								<option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
+
+                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
+								<option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
+								<option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm4" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.1663456123"
+                                        name="Linker script"
+                                        superClass="com.crt.advproject.link.cpp.script"
+                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+
+                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                   {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    {% for lib in libraries %}
+                                    <listOptionValue builtIn="false" value="{{lib}}"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4" valueType="enumerated"/>
+
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
+                        </toolChain>
+                    </folderInfo>
+                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc176x.c" name="cr_startup_lpc176x.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc176x.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
+                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
+                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
+                        </tool>
+                    </fileInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
+                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
+                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions " valueType="string"/>
+                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
+                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED {% for s in symbols %}-D{{s}} {% endfor %} " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
+                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    <listOptionValue builtIn="false" value="mbed"/>
+                                    <listOptionValue builtIn="false" value="capi"/>
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
+                        </toolChain>
+                    </folderInfo>
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
+                                
+                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
+                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
+                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
+                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
+                        </toolChain>
+                    </folderInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+    </storageModule>
+    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
+    </storageModule>
+    <storageModule moduleId="com.crt.config">
+		<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4088&lt;/name&gt;&#13;
+&lt;family&gt;LPC407x_8x&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;</projectStorage>
+    </storageModule>
+</cproject>
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4088_dm_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4088_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4330_m4_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1924 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+    <storageModule moduleId="org.eclipse.cdt.core.settings">
+        <cconfiguration id="com.crt.advproject.config.exe.debug.2019491857">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.2019491857" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.2019491857" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; # checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;  ">
+                    <folderInfo id="com.crt.advproject.config.exe.debug.2019491857." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.debug.305863439" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.1056224942" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Debug}" id="com.crt.advproject.builder.exe.debug.921640983" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
+                            <tool id="com.crt.advproject.cpp.exe.debug.88038757" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug">
+                                <option id="com.crt.advproject.cpp.arch.91244724" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.509442564" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.347637870" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1100343989" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.1011871574" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
+                                <option id="com.crt.advproject.gcc.arch.1733119111" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.570577864" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.784082637" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.1824535269" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.1521041525" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+
+                                <option id="gnu.c.compiler.option.include.paths.1293117680" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
+                                <option id="com.crt.advproject.gas.arch.1079400011" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
+                                <option id="com.crt.advproject.link.cpp.arch.93048844" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1932742266" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.1663456123"
+                                        name="Linker script"
+                                        superClass="com.crt.advproject.link.cpp.script"
+                                        value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1404088829" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.851870479" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1647176917" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.286729066" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+
+                                <option id="gnu.cpp.link.option.paths.504050220" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                   {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.libs.1301785862" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    {% for lib in libraries %}
+                                    <listOptionValue builtIn="false" value="{{lib}}"/>
+                                    {% endfor %}
+                                </option>
+
+                                <option id="gnu.cpp.link.option.userobjs.433052051" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.debug.1712095989" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug"/>
+                        </toolChain>
+                    </folderInfo>
+                    <fileInfo id="com.crt.advproject.config.exe.debug.2019491857.src/cr_startup_lpc43xx.c" name="cr_startup_lpc43xx.c" rcbsApplicability="disable" resourcePath="src/cr_startup_lpc43xx.c" toolsToInvoke="com.crt.advproject.gcc.exe.debug.529082641.1914238712">
+                        <tool id="com.crt.advproject.gcc.exe.debug.529082641.1914238712" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.529082641">
+                            <option id="gnu.c.compiler.option.optimization.flags.316755676" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                            <inputType id="com.crt.advproject.compiler.input.627153917" superClass="com.crt.advproject.compiler.input"/>
+                        </tool>
+                    </fileInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+        <cconfiguration id="com.crt.advproject.config.exe.release.1977230950">
+            <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.1977230950" moduleId="org.eclipse.cdt.core.settings" name="Release">
+                <externalSettings/>
+                <extensions>
+                    <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+                    <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                    <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+                </extensions>
+            </storageModule>
+            <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+                <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.1977230950" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;; arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; #checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;;">
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950." name="/" resourcePath="">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.756613197" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.1775167776" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <builder buildPath="${workspace_loc:/{{name}}/Release}" id="com.crt.advproject.builder.exe.release.600748344" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.822772966" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release">
+                                <option id="com.crt.advproject.cpp.arch.2116463586" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.cpp.thumb.189747400" name="Thumb mode" superClass="com.crt.advproject.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.compiler.option.preprocessor.def.874410253" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.cpp.compiler.option.other.other.1338090461" name="Other flags" superClass="gnu.cpp.compiler.option.other.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+                                <option id="gnu.cpp.compiler.option.optimization.flags.475225500" name="Other optimization flags" superClass="gnu.cpp.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+
+                                <option id="gnu.cpp.compiler.option.include.paths.17539784" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1172589171" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.563782464" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
+                                <option id="com.crt.advproject.gcc.arch.538870649" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gcc.thumb.486202735" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.gcc.hdrlib.966879133" name="Use headers for C library" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlib" valueType="enumerated"/>
+                                <option id="gnu.c.compiler.option.preprocessor.def.symbols.740543529" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+                                    <listOptionValue builtIn="false" value="__NEWLIB__"/>
+                                    <listOptionValue builtIn="false" value="__CODE_RED"/>
+                                    <listOptionValue builtIn="false" value="CPP_USE_HEAP"/>
+                                  {% for s in symbols %}
+                                    <listOptionValue builtIn="false" value="{{s}}"/>
+                                  {% endfor %}
+                                </option>
+                                <option id="gnu.c.compiler.option.misc.other.2015545820" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti" valueType="string"/>
+                                <option id="gnu.c.compiler.option.optimization.flags.675461365" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" value="-Os" valueType="string"/>
+                                <inputType id="com.crt.advproject.compiler.input.1938378962" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.579950187" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
+                                <option id="com.crt.advproject.gas.arch.1401271875" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.gas.thumb.1024544278" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
+                                <option id="gnu.both.asm.option.flags.crt.637466836" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DNDEBUG -D__CODE_RED " valueType="string"/>
+                                <option id="com.crt.advproject.gas.hdrlib.492600365" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
+                                <inputType id="com.crt.advproject.assembler.input.812068162" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.1927521706" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release">
+                                <option id="com.crt.advproject.link.cpp.arch.1449152453" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" value="com.crt.advproject.link.cpp.target.cm3" valueType="enumerated"/>
+                                <option id="com.crt.advproject.link.cpp.thumb.1116035810" name="Thumb mode" superClass="com.crt.advproject.link.cpp.thumb" value="true" valueType="boolean"/>
+                                <option id="com.crt.advproject.link.cpp.script.653073282" name="Linker script" superClass="com.crt.advproject.link.cpp.script" value="&quot;${workspace_loc:/${ProjName}/{{linker_script}}}&quot;" valueType="string"/>
+                                <option id="com.crt.advproject.link.cpp.manage.1855989551" name="Manage linker script" superClass="com.crt.advproject.link.cpp.manage" value="false" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.nostdlibs.1541555749" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" value="true" valueType="boolean"/>
+                                <option id="gnu.cpp.link.option.other.1799120411" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" valueType="stringList">
+                                    <listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                </option>
+                                <option id="com.crt.advproject.link.cpp.hdrlib.259007915" name="Use C library" superClass="com.crt.advproject.link.cpp.hdrlib" value="com.crt.advproject.cpp.link.hdrlib.newlib.semihost" valueType="enumerated"/>
+                                <option id="gnu.cpp.link.option.libs.6254811" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+                                    <listOptionValue builtIn="false" value="mbed"/>
+                                    <listOptionValue builtIn="false" value="capi"/>
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.paths.813959094" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <option id="gnu.cpp.link.option.userobjs.1313579148" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+                                    {% for path in object_files %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.486207182" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+                                    <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+                                    <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+                                </inputType>
+                            </tool>
+                            <tool id="com.crt.advproject.link.exe.release.1417379956" name="MCU Linker" superClass="com.crt.advproject.link.exe.release"/>
+                        </toolChain>
+                    </folderInfo>
+                    <folderInfo id="com.crt.advproject.config.exe.release.1977230950.180082224" name="/" resourcePath="mbed">
+                        <toolChain id="com.crt.advproject.toolchain.exe.release.1962091265" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
+                            <targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
+                            <tool id="com.crt.advproject.cpp.exe.release.930589045" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.822772966">
+                                
+                                <option id="gnu.cpp.compiler.option.include.paths.1413630517" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+                                    {% for path in include_paths %}
+                                        <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
+                                    {% endfor %}
+                                </option>
+                                
+                                <inputType id="com.crt.advproject.compiler.cpp.input.1706370613" superClass="com.crt.advproject.compiler.cpp.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gcc.exe.release.536058616" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.563782464">
+                                <inputType id="com.crt.advproject.compiler.input.1565281352" superClass="com.crt.advproject.compiler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.gas.exe.release.607817423" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.579950187">
+                                <inputType id="com.crt.advproject.assembler.input.21606274" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+                            </tool>
+                            <tool id="com.crt.advproject.link.cpp.exe.release.941965043" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.1927521706"/>
+                            <tool id="com.crt.advproject.link.exe.release.1836661645" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1417379956"/>
+                        </toolChain>
+                    </folderInfo>
+                    <sourceEntries>
+                        <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+                    </sourceEntries>
+                </configuration>
+            </storageModule>
+            <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+            <storageModule moduleId="scannerConfiguration">
+                <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="false" filePath=""/>
+                        <parser enabled="false"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="com.crt.advproject.specsFile">
+                        <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="makefileGenerator">
+                        <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                    <buildOutputProvider>
+                        <openAction enabled="true" filePath=""/>
+                        <parser enabled="true"/>
+                    </buildOutputProvider>
+                    <scannerInfoProvider id="specsFile">
+                        <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                        <parser enabled="true"/>
+                    </scannerInfoProvider>
+                </profile>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gcc.exe.release.536058616;com.crt.advproject.compiler.input.1565281352">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gas.exe.release.579950187;com.crt.advproject.assembler.input.812068162">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.gcc.exe.release.563782464;com.crt.advproject.compiler.input.1938378962">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.gas.exe.release.607817423;com.crt.advproject.assembler.input.21606274">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfile"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.;com.crt.advproject.cpp.exe.release.822772966;com.crt.advproject.compiler.cpp.input.1172589171">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+                <scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.1977230950;com.crt.advproject.config.exe.release.1977230950.180082224;com.crt.advproject.cpp.exe.release.930589045;com.crt.advproject.compiler.cpp.input.1706370613">
+                    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.crt.advproject.GCCManagedMakePerProjectProfileCPP"/>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-c++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file} " command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="com.crt.advproject.GASManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="false" filePath=""/>
+                            <parser enabled="false"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="com.crt.advproject.specsFile">
+                            <runAction arguments="-x assembler-with-cpp -E -P -v -dD ${plugin_state_location}/${specs_file}" command="arm-none-eabi-gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="makefileGenerator">
+                            <runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                    <profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+                        <buildOutputProvider>
+                            <openAction enabled="true" filePath=""/>
+                            <parser enabled="true"/>
+                        </buildOutputProvider>
+                        <scannerInfoProvider id="specsFile">
+                            <runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+                            <parser enabled="true"/>
+                        </scannerInfoProvider>
+                    </profile>
+                </scannerConfigBuildInfo>
+            </storageModule>
+        </cconfiguration>
+    </storageModule>
+    <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+        <project id="{{name}}.com.crt.advproject.projecttype.exe.609645090" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
+    </storageModule>
+    <storageModule moduleId="com.crt.config">
+        <projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC4330" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC4330" package="LPC43_lqfp100.xml"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC4330&lt;/name&gt;&#13;
+&lt;family&gt;LPC43xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC4x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC43_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;</projectStorage>
+    </storageModule>
+</cproject>
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc4330_m4_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc824_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,53 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}startup_LPC824_CR.cpp{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;
+&lt;Properties property_0="" property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/&gt;
+&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"&gt;&lt;chip&gt;&lt;name&gt;LPC824&lt;/name&gt;
+&lt;family&gt;LPC82x&lt;/family&gt;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;
+&lt;reset board="None" core="Real" sys="Real"/&gt;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;
+&lt;memory id="RAM" type="RAM"/&gt;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;
+&lt;memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/&gt;
+&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40000000"/&gt;
+&lt;peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x40004000"/&gt;
+&lt;peripheralInstance derived_from="WKT" determined="infoFile" id="WKT" location="0x40008000"/&gt;
+&lt;peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x4000c000"/&gt;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40020000"/&gt;
+&lt;peripheralInstance derived_from="CMP" determined="infoFile" id="CMP" location="0x40024000"/&gt;
+&lt;peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/&gt;
+&lt;peripheralInstance derived_from="INPUTMUX" determined="infoFile" id="INPUTMUX" location="0x4002c000"/&gt;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x40040000"/&gt;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;
+&lt;peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/&gt;
+&lt;peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40054000"/&gt;
+&lt;peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40058000"/&gt;
+&lt;peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4005c000"/&gt;
+&lt;peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40064000"/&gt;
+&lt;peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40068000"/&gt;
+&lt;peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x4006c000"/&gt;
+&lt;peripheralInstance derived_from="I2C2" determined="infoFile" id="I2C2" location="0x40070000"/&gt;
+&lt;peripheralInstance derived_from="I2C3" determined="infoFile" id="I2C3" location="0x40074000"/&gt;
+&lt;peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/&gt;
+&lt;peripheralInstance derived_from="SCT" determined="infoFile" id="SCT" location="0x50004000"/&gt;
+&lt;peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50008000"/&gt;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/&gt;
+&lt;peripheralInstance derived_from="PIN-INT" determined="infoFile" id="PIN-INT" location="0xa0004000"/&gt;
+&lt;/chip&gt;
+&lt;processor&gt;&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;
+&lt;family&gt;Cortex-M&lt;/family&gt;
+&lt;/processor&gt;
+&lt;link href="LPC82x_peripheral.xme" show="embed" type="simple"/&gt;
+&lt;/info&gt;
+&lt;/infoList&gt;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpc824_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpccappuccino_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,51 @@
+{% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc11xx.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37/501" property_count="5" version="70002"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC11U37/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37/501" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC11U37/501&lt;/name&gt;&#13;
+&lt;family&gt;LPC11Uxx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
+&lt;peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
+&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
+&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/lpccappuccino_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/project_common.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,84 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+    <name>{{name}}</name>
+    <comment>This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Code-Red</comment>
+    <projects>
+    </projects>
+    <buildSpec>
+        <buildCommand>
+            <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+            <triggers>clean,full,incremental,</triggers>
+            <arguments>
+                <dictionary>
+                    <key>?name?</key>
+                    <value></value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.append_environment</key>
+                    <value>true</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+                    <value>all</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.buildArguments</key>
+                    <value></value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.buildCommand</key>
+                    <value>make</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.buildLocation</key>
+                    <value>${workspace_loc:/{{name}}/Debug}</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+                    <value>clean</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.contents</key>
+                    <value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+                    <value>false</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+                    <value>true</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.enableFullBuild</key>
+                    <value>true</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+                    <value>all</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.stopOnError</key>
+                    <value>true</value>
+                </dictionary>
+                <dictionary>
+                    <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+                    <value>true</value>
+                </dictionary>
+            </arguments>
+        </buildCommand>
+        <buildCommand>
+            <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+            <triggers>full,incremental,</triggers>
+            <arguments>
+            </arguments>
+        </buildCommand>
+    </buildSpec>
+    <natures>
+        <nature>org.eclipse.cdt.core.cnature</nature>
+        <nature>org.eclipse.cdt.core.ccnature</nature>
+        <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+        <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+    </natures>
+</projectDescription>
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/ublox_c027_cproject.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,79 @@
+{% extends "lpcxpresso/cproject_cortexm3_common.tmpl" %}
+
+{% block startup_file %}cr_startup_lpc176x.c{% endblock %}
+
+{% block cpu_config %}&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
+&lt;TargetConfig&gt;&#13;
+&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1768&lt;/name&gt;&#13;
+&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
+&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
+&lt;memory id="RAM" type="RAM"/&gt;&#13;
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
+&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
+&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
+&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
+&lt;/chip&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
+&lt;/processor&gt;&#13;
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
+&lt;/info&gt;&#13;
+&lt;/infoList&gt;&#13;
+&lt;/TargetConfig&gt;{% endblock %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/lpcxpresso/ublox_c027_project.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+{% extends "lpcxpresso/project_common.tmpl" %}
--- a/export/makefile/Makefile.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/makefile/Makefile.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -67,6 +67,9 @@
 CPP     = {{cppc_cmd}}
 LD      = {{ld_cmd}}
 ELF2BIN = {{elf2bin_cmd}}
+{% if pp_cmd -%}
+PREPROC = {{pp_cmd}}
+{%- endif %}
 {% if hex_files %}
 SREC_CAT = srec_cat
 {%- endif %}
@@ -119,8 +122,13 @@
 	+@echo "Compile: $(notdir $<)"
 	@$(CPP) $(CXX_FLAGS) $(INCLUDE_PATHS) -o $@ $<
 
+{% if pp_cmd %}
+$(PROJECT).link_script{{link_script_ext}}: $(LINKER_SCRIPT)
+	@$(PREPROC) $< -o $@
+{% endif %}
+
 {% block target_project_elf %}
-$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(LINKER_SCRIPT)
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) {% if pp_cmd -%} $(PROJECT).link_script{{link_script_ext}} {% else%} $(LINKER_SCRIPT) {% endif %}
 	+@echo "link: $(notdir $@)"
 	@$(LD) $(LD_FLAGS) {{link_script_option}} $(filter %{{link_script_ext}}, $^) $(LIBRARY_PATHS) --output $@ $(filter %.o, $^) $(LIBRARIES) $(LD_SYS_LIBS)
 {% endblock %}
--- a/export/makefile/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/makefile/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -21,7 +21,7 @@
 from subprocess import check_output, CalledProcessError, Popen, PIPE
 import shutil
 from jinja2.exceptions import TemplateNotFound
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, filter_supported
 from tools.utils import NotSupportedException
 from tools.targets import TARGET_MAP
 
@@ -35,6 +35,13 @@
 
     MBED_CONFIG_HEADER_SUPPORTED = True
 
+    POST_BINARY_WHITELIST = set([
+        "MCU_NRF51Code.binary_hook",
+        "TEENSY3_1Code.binary_hook",
+        "LPCTargetCode.lpc_patch",
+        "LPC4088Code.binary_hook"
+    ])
+
     def generate(self):
         """Generate the makefile
 
@@ -78,15 +85,21 @@
             'asm_cmd': " ".join(["\'" + part + "\'" for part
                                 in ([basename(self.toolchain.asm[0])] +
                                     self.toolchain.asm[1:])]),
-            'ld_cmd': " ".join(["\'" + part + "\'" for part
-                                in ([basename(self.toolchain.ld[0])] +
-                                    self.toolchain.ld[1:])]),
+            'ld_cmd': "\'" + basename(self.toolchain.ld[0]) + "\'",
             'elf2bin_cmd': "\'" + basename(self.toolchain.elf2bin) + "\'",
             'link_script_ext': self.toolchain.LINKER_EXT,
             'link_script_option': self.LINK_SCRIPT_OPTION,
             'user_library_flag': self.USER_LIBRARY_FLAG,
         }
 
+        if hasattr(self.toolchain, "preproc"):
+            ctx['pp_cmd'] = " ".join(["\'" + part + "\'" for part
+                                      in ([basename(self.toolchain.preproc[0])] +
+                                          self.toolchain.preproc[1:] + 
+                                          self.toolchain.ld[1:])])
+        else:
+            ctx['pp_cmd'] = None
+
         for key in ['include_paths', 'library_paths', 'linker_script',
                     'hex_files']:
             if isinstance(ctx[key], list):
@@ -98,7 +111,7 @@
         for key in ['include_paths', 'library_paths', 'hex_files',
                     'to_be_compiled']:
             ctx[key] = sorted(ctx[key])
-        ctx.update(self.flags)
+        ctx.update(self.format_flags())
 
         for templatefile in \
             ['makefile/%s_%s.tmpl' % (self.TEMPLATE,
@@ -115,6 +128,17 @@
         else:
             raise NotSupportedException("This make tool is in development")
 
+    def format_flags(self):
+        """Format toolchain flags for Makefile"""
+        flags = {}
+        for k, v in self.flags.iteritems():
+            if k in ['asm_flags', 'c_flags', 'cxx_flags']:
+                flags[k] = map(lambda x: x.replace('"', '\\"'), v)
+            else:
+                flags[k] = v
+
+        return flags
+
     @staticmethod
     def build(project_name, log_name="build_log.txt", cleanup=True):
         """ Build Make project """
@@ -162,8 +186,7 @@
 
 class GccArm(Makefile):
     """GCC ARM specific makefile target"""
-    TARGETS = [target for target, obj in TARGET_MAP.iteritems()
-               if "GCC_ARM" in obj.supported_toolchains]
+    TARGETS = filter_supported("GCC_ARM", Makefile.POST_BINARY_WHITELIST)
     NAME = 'Make-GCC-ARM'
     TEMPLATE = 'make-gcc-arm'
     TOOLCHAIN = "GCC_ARM"
@@ -181,8 +204,7 @@
 
 class Armc5(Makefile):
     """ARM Compiler 5 specific makefile target"""
-    TARGETS = [target for target, obj in TARGET_MAP.iteritems()
-               if "ARM" in obj.supported_toolchains]
+    TARGETS = filter_supported("ARM", Makefile.POST_BINARY_WHITELIST)
     NAME = 'Make-ARMc5'
     TEMPLATE = 'make-armc5'
     TOOLCHAIN = "ARM"
@@ -200,8 +222,7 @@
 
 class IAR(Makefile):
     """IAR specific makefile target"""
-    TARGETS = [target for target, obj in TARGET_MAP.iteritems()
-               if "IAR" in obj.supported_toolchains]
+    TARGETS = filter_supported("IAR", Makefile.POST_BINARY_WHITELIST)
     NAME = 'Make-IAR'
     TEMPLATE = 'make-iar'
     TOOLCHAIN = "IAR"
--- a/export/makefile/make-gcc-arm_nxp.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,11 +0,0 @@
-{% extends "makefile/make-gcc-arm.tmpl" %}
-
-{% block target_project_elf %}
-{{ super() }}
-	@echo ""
-	@echo "*****"
-	@echo "***** You must modify vector checksum value in *.bin and *.hex files."
-	@echo "*****"
-	@echo ""
-{% endblock %}
-
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/qtcreator/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,68 @@
+"""
+mbed SDK
+Copyright (c) 2014-2017 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+from os.path import splitext, basename
+from tools.targets import TARGET_MAP
+from tools.export.exporters import Exporter, filter_supported
+from tools.export.makefile import GccArm
+
+class QtCreator(GccArm):
+    NAME = 'QtCreator'
+    TOOLCHAIN = 'GCC_ARM'
+
+    TARGETS = filter_supported("GCC_ARM", set())
+
+    MBED_CONFIG_HEADER_SUPPORTED = True
+
+    def generate(self):
+        self.resources.win_to_unix()
+
+        defines         = [] # list of tuples ('D'/'U', [key, value]) (value is optional)
+        forced_includes = [] # list of strings
+        sources         = [] # list of strings
+        include_paths   = [] # list of strings
+
+        next_is_include = False
+        for f in self.flags['c_flags'] + self.flags['cxx_flags']:
+            f=f.strip()
+            if next_is_include:
+                forced_includes.append(f)
+                next_is_include = False
+                continue
+            if f.startswith('-D'):
+                defines.append(('D', f[2:].split('=', 1)))
+            elif f.startswith('-U'):
+                defines.append(('U', [f[2:]]))
+            elif f == "-include":
+                next_is_include = True
+
+        for r_type in ['headers', 'c_sources', 's_sources', 'cpp_sources']:
+            sources.extend(getattr(self.resources, r_type))
+
+        include_paths = self.resources.inc_dirs
+
+        ctx = {
+            'defines': defines,
+            'forced_includes': forced_includes,
+            'sources': sources,
+            'include_paths': self.resources.inc_dirs
+            }
+
+        for ext in ['creator', 'files', 'includes', 'config']:
+            self.gen_file('qtcreator/%s.tmpl' % ext, ctx, "%s.%s" % (self.project_name, ext))
+
+        # finally, generate the Makefile
+        super(QtCreator, self).generate()
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/qtcreator/config.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,6 @@
+{%  for d in defines -%}
+{% if d[0] == 'D' %}#define {% else %}#undef{% endif %} {{ d[1]|join(' ')}}
+{%  endfor %}
+{%  for i in forced_includes -%}
+#include "{{i}}"
+{%  endfor %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/qtcreator/creator.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,1 @@
+[General]
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/qtcreator/files.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,3 @@
+{% for s in sources -%}
+{{s}}
+{% endfor %}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/qtcreator/includes.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,3 @@
+{% for i in include_paths -%}
+{{i}}
+{% endfor %}
--- a/export/sw4stm32/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/sw4stm32/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -25,46 +25,48 @@
     TOOLCHAIN = 'GCC_ARM'
 
     BOARDS = {
-        'B96B_F446VE':      {'name': 'B96B-F446VE',           'mcuId': 'STM32F446VETx'},
-        'DISCO_F051R8':     {'name': 'STM32F0DISCOVERY',      'mcuId': 'STM32F051R8Tx'},
-        'DISCO_F303VC':     {'name': 'STM32F3DISCOVERY',      'mcuId': 'STM32F303VCTx'},
-        'DISCO_F334C8':     {'name': 'STM32F3348DISCOVERY',   'mcuId': 'STM32F334C8Tx'},
-        'DISCO_F401VC':     {'name': 'STM32F401C-DISCO',      'mcuId': 'STM32F401VCTx'},
-        'DISCO_F407VG':     {'name': 'STM32F4DISCOVERY',      'mcuId': 'STM32F407VGTx'},
-        'DISCO_F429ZI':     {'name': 'STM32F429I-DISCO',      'mcuId': 'STM32F429ZITx'},
-        'DISCO_F469NI':     {'name': 'DISCO-F469NI',          'mcuId': 'STM32F469NIHx'},
-        'DISCO_F746NG':     {'name': 'STM32F746G-DISCO',      'mcuId': 'STM32F746NGHx'},
-        'DISCO_F769NI':     {'name': 'DISCO-F769NI',          'mcuId': 'STM32F769NIHx'},
-        'DISCO_L053C8':     {'name': 'STM32L0538DISCOVERY',   'mcuId': 'STM32L053C8Tx'},
-        'DISCO_L476VG':     {'name': 'STM32L476G-DISCO',      'mcuId': 'STM32L476VGTx'},
-        'NUCLEO_F030R8':    {'name': 'NUCLEO-F030R8',         'mcuId': 'STM32F030R8Tx'},
-        'NUCLEO_F031K6':    {'name': 'NUCLEO-F031K6',         'mcuId': 'STM32F031K6Tx'},
-        'NUCLEO_F042K6':    {'name': 'NUCLEO-F042K6',         'mcuId': 'STM32F042K6Tx'},
-        'NUCLEO_F070RB':    {'name': 'NUCLEO-F070RB',         'mcuId': 'STM32F070RBTx'},
-        'NUCLEO_F072RB':    {'name': 'NUCLEO-F072RB',         'mcuId': 'STM32F072RBTx'},
-        'NUCLEO_F091RC':    {'name': 'NUCLEO-F091RC',         'mcuId': 'STM32F091RCTx'},
-        'NUCLEO_F103RB':    {'name': 'NUCLEO-F103RB',         'mcuId': 'STM32F103RBTx'},
-        'NUCLEO_F207ZG':    {'name': 'NUCLEO-F207ZG',         'mcuId': 'STM32F207ZGTx'},
-        'NUCLEO_F302R8':    {'name': 'NUCLEO-F302R8',         'mcuId': 'STM32F302R8Tx'},
-        'NUCLEO_F303K8':    {'name': 'NUCLEO-F303K8',         'mcuId': 'STM32F303K8Tx'},
-        'NUCLEO_F303RE':    {'name': 'NUCLEO-F303RE',         'mcuId': 'STM32F303RETx'},
-        'NUCLEO_F303ZE':    {'name': 'NUCLEO-F303ZE',         'mcuId': 'STM32F303ZETx'},
-        'NUCLEO_F334R8':    {'name': 'NUCLEO-F334R8',         'mcuId': 'STM32F334R8Tx'},
-        'NUCLEO_F401RE':    {'name': 'NUCLEO-F401RE',         'mcuId': 'STM32F401RETx'},
-        'NUCLEO_F410RB':    {'name': 'NUCLEO-F410RB',         'mcuId': 'STM32F410RBTx'},
-        'NUCLEO_F411RE':    {'name': 'NUCLEO-F411RE',         'mcuId': 'STM32F411RETx'},
-        'NUCLEO_F429ZI':    {'name': 'NUCLEO-F429ZI',         'mcuId': 'STM32F429ZITx'},
-        'NUCLEO_F446RE':    {'name': 'NUCLEO-F446RE',         'mcuId': 'STM32F446RETx'},
-        'NUCLEO_F446ZE':    {'name': 'NUCLEO-F446ZE',         'mcuId': 'STM32F446ZETx'},
-        'NUCLEO_F746ZG':    {'name': 'NUCLEO-F746ZG',         'mcuId': 'STM32F746ZGTx'},
-        'NUCLEO_F767ZI':    {'name': 'NUCLEO-F767ZI',         'mcuId': 'STM32F767ZITx'},
-        'NUCLEO_L011K4':    {'name': 'NUCLEO-L011K4',         'mcuId': 'STM32L011K4Tx'},
-        'NUCLEO_L031K6':    {'name': 'NUCLEO-L031K6',         'mcuId': 'STM32L031K6Tx'},
-        'NUCLEO_L053R8':    {'name': 'NUCLEO-L053R8',         'mcuId': 'STM32L053R8Tx'},
-        'NUCLEO_L073RZ':    {'name': 'NUCLEO-L073RZ',         'mcuId': 'STM32L073RZTx'},
-        'NUCLEO_L152RE':    {'name': 'NUCLEO-L152RE',         'mcuId': 'STM32L152RETx'},
-        'NUCLEO_L432KC':    {'name': 'NUCLEO-L432KC',         'mcuId': 'STM32L432KCUx'},
-        'NUCLEO_L476RG':    {'name': 'NUCLEO-L476RG',         'mcuId': 'STM32L476RGTx'},
+        'B96B_F446VE':             {'name': 'B96B-F446VE',           'mcuId': 'STM32F446VETx'},
+        'DISCO_F051R8':            {'name': 'STM32F0DISCOVERY',      'mcuId': 'STM32F051R8Tx'},
+        'DISCO_F303VC':            {'name': 'STM32F3DISCOVERY',      'mcuId': 'STM32F303VCTx'},
+        'DISCO_F334C8':            {'name': 'STM32F3348DISCOVERY',   'mcuId': 'STM32F334C8Tx'},
+        'DISCO_F401VC':            {'name': 'STM32F401C-DISCO',      'mcuId': 'STM32F401VCTx'},
+        'DISCO_F407VG':            {'name': 'STM32F4DISCOVERY',      'mcuId': 'STM32F407VGTx'},
+        'DISCO_F429ZI':            {'name': 'STM32F429I-DISCO',      'mcuId': 'STM32F429ZITx'},
+        'DISCO_F469NI':            {'name': 'DISCO-F469NI',          'mcuId': 'STM32F469NIHx'},
+        'DISCO_F746NG':            {'name': 'STM32F746G-DISCO',      'mcuId': 'STM32F746NGHx'},
+        'DISCO_F769NI':            {'name': 'DISCO-F769NI',          'mcuId': 'STM32F769NIHx'},
+        'DISCO_L053C8':            {'name': 'STM32L0538DISCOVERY',   'mcuId': 'STM32L053C8Tx'},
+        'DISCO_L072CZ_LRWAN1':     {'name': 'DISCO-L072CZ-LRWAN1',   'mcuId': 'STM32L072CZTx'},
+        'DISCO_L475VG_IOT01A':     {'name': 'STM32L475G-DISCO',      'mcuId': 'STM32L475VGTx'},
+        'DISCO_L476VG':            {'name': 'STM32L476G-DISCO',      'mcuId': 'STM32L476VGTx'},
+        'NUCLEO_F030R8':           {'name': 'NUCLEO-F030R8',         'mcuId': 'STM32F030R8Tx'},
+        'NUCLEO_F031K6':           {'name': 'NUCLEO-F031K6',         'mcuId': 'STM32F031K6Tx'},
+        'NUCLEO_F042K6':           {'name': 'NUCLEO-F042K6',         'mcuId': 'STM32F042K6Tx'},
+        'NUCLEO_F070RB':           {'name': 'NUCLEO-F070RB',         'mcuId': 'STM32F070RBTx'},
+        'NUCLEO_F072RB':           {'name': 'NUCLEO-F072RB',         'mcuId': 'STM32F072RBTx'},
+        'NUCLEO_F091RC':           {'name': 'NUCLEO-F091RC',         'mcuId': 'STM32F091RCTx'},
+        'NUCLEO_F103RB':           {'name': 'NUCLEO-F103RB',         'mcuId': 'STM32F103RBTx'},
+        'NUCLEO_F207ZG':           {'name': 'NUCLEO-F207ZG',         'mcuId': 'STM32F207ZGTx'},
+        'NUCLEO_F302R8':           {'name': 'NUCLEO-F302R8',         'mcuId': 'STM32F302R8Tx'},
+        'NUCLEO_F303K8':           {'name': 'NUCLEO-F303K8',         'mcuId': 'STM32F303K8Tx'},
+        'NUCLEO_F303RE':           {'name': 'NUCLEO-F303RE',         'mcuId': 'STM32F303RETx'},
+        'NUCLEO_F303ZE':           {'name': 'NUCLEO-F303ZE',         'mcuId': 'STM32F303ZETx'},
+        'NUCLEO_F334R8':           {'name': 'NUCLEO-F334R8',         'mcuId': 'STM32F334R8Tx'},
+        'NUCLEO_F401RE':           {'name': 'NUCLEO-F401RE',         'mcuId': 'STM32F401RETx'},
+        'NUCLEO_F410RB':           {'name': 'NUCLEO-F410RB',         'mcuId': 'STM32F410RBTx'},
+        'NUCLEO_F411RE':           {'name': 'NUCLEO-F411RE',         'mcuId': 'STM32F411RETx'},
+        'NUCLEO_F429ZI':           {'name': 'NUCLEO-F429ZI',         'mcuId': 'STM32F429ZITx'},
+        'NUCLEO_F446RE':           {'name': 'NUCLEO-F446RE',         'mcuId': 'STM32F446RETx'},
+        'NUCLEO_F446ZE':           {'name': 'NUCLEO-F446ZE',         'mcuId': 'STM32F446ZETx'},
+        'NUCLEO_F746ZG':           {'name': 'NUCLEO-F746ZG',         'mcuId': 'STM32F746ZGTx'},
+        'NUCLEO_F767ZI':           {'name': 'NUCLEO-F767ZI',         'mcuId': 'STM32F767ZITx'},
+        'NUCLEO_L011K4':           {'name': 'NUCLEO-L011K4',         'mcuId': 'STM32L011K4Tx'},
+        'NUCLEO_L031K6':           {'name': 'NUCLEO-L031K6',         'mcuId': 'STM32L031K6Tx'},
+        'NUCLEO_L053R8':           {'name': 'NUCLEO-L053R8',         'mcuId': 'STM32L053R8Tx'},
+        'NUCLEO_L073RZ':           {'name': 'NUCLEO-L073RZ',         'mcuId': 'STM32L073RZTx'},
+        'NUCLEO_L152RE':           {'name': 'NUCLEO-L152RE',         'mcuId': 'STM32L152RETx'},
+        'NUCLEO_L432KC':           {'name': 'NUCLEO-L432KC',         'mcuId': 'STM32L432KCUx'},
+        'NUCLEO_L476RG':           {'name': 'NUCLEO-L476RG',         'mcuId': 'STM32L476RGTx'},
     }
 
     TARGETS = BOARDS.keys()
--- a/export/uvision/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/uvision/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -9,7 +9,7 @@
 
 from tools.arm_pack_manager import Cache
 from tools.targets import TARGET_MAP
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, filter_supported
 from tools.export.cmsis import DeviceCMSIS
 
 cache_d = False
@@ -119,13 +119,19 @@
     """
     NAME = 'uvision5'
     TOOLCHAIN = 'ARM'
-    TARGETS = []
-    for target, obj in TARGET_MAP.iteritems():
-        if not ("ARM" in obj.supported_toolchains and hasattr(obj, "device_name")):
-            continue
-        if not DeviceCMSIS.check_supported(target):
-            continue
-        TARGETS.append(target)
+
+    POST_BINARY_WHITELIST = set([
+        "MCU_NRF51Code.binary_hook",
+        "TEENSY3_1Code.binary_hook",
+        "LPCTargetCode.lpc_patch",
+        "LPC4088Code.binary_hook",
+        "MTSCode.combine_bins_mts_dot",
+        "MTSCode.combine_bins_mts_dragonfly",
+        "NCS36510TargetCode.ncs36510_addfib"
+    ])
+    TARGETS = [tgt for tgt in filter_supported("ARM", POST_BINARY_WHITELIST)
+               if DeviceCMSIS.check_supported(tgt)]
+
     #File associations within .uvprojx file
     file_types = {'.cpp': 8, '.c': 1, '.s': 2,
                   '.obj': 3, '.o': 3, '.lib': 4,
@@ -166,7 +172,7 @@
         # Flag is invalid if set in template
         # Optimizations are also set in the template
         invalid_flag = lambda x: x in template or re.match("-O(\d|time)", x) 
-        flags['c_flags'] = [flag for flag in c_flags if not invalid_flag(flag)]
+        flags['c_flags'] = [flag.replace('"','\\"') for flag in c_flags if not invalid_flag(flag)]
         flags['c_flags'] = " ".join(flags['c_flags'])
         return flags
 
@@ -178,6 +184,16 @@
                                     key=lambda (_, __, name): name.lower())
         return grouped
 
+    @staticmethod
+    def format_fpu(core):
+        """Generate a core's FPU string"""
+        if core.endswith("FD"):
+            return "FPU3(DFPU)"
+        elif core.endswith("F"):
+            return "FPU2"
+        else:
+            return ""
+
     def generate(self):
         """Generate the .uvproj file"""
         cache = Cache(True, False)
@@ -197,10 +213,15 @@
             'include_paths': '; '.join(self.resources.inc_dirs).encode('utf-8'),
             'device': DeviceUvision(self.target),
         }
-        ctx['cputype'] = ctx['device'].core.rstrip("FD")
-        # Turn on FPU optimizations if the core has an FPU
-        ctx['fpu_setting'] = 1 if 'f' not in ctx['device'].core.lower() \
-                                  or 'd' in ctx['device'].core.lower() else 2
+        core = ctx['device'].core
+        ctx['cputype'] = core.rstrip("FD")
+        if core.endswith("FD"):
+            ctx['fpu_setting'] = 3
+        elif core.endswith("F"):
+            ctx['fpu_setting'] = 2
+        else:
+            ctx['fpu_setting'] = 1
+        ctx['fputype'] = self.format_fpu(core)
         ctx.update(self.format_flags())
         self.gen_file('uvision/uvision.tmpl', ctx, self.project_name+".uvprojx")
         self.gen_file('uvision/uvision_debug.tmpl', ctx, self.project_name + ".uvoptx")
--- a/export/uvision/uvision.tmpl	Wed Feb 15 13:53:18 2017 -0600
+++ b/export/uvision/uvision.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -16,7 +16,7 @@
           <Vendor>{{device.dvendor}}</Vendor>
           <PackID>{{device.pack_id}}</PackID>
           <PackURL>{{device.pack_url}}</PackURL>
-          <Cpu>CPUTYPE("{{cputype}}")</Cpu>
+          <Cpu>CPUTYPE("{{cputype}}") {{fputype}}</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>{{device.flash_dll}}</FlashDriverDll>
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/vscode/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,95 @@
+# mbed SDK
+# Copyright (c) 2011-2016 ARM Limited
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from os.path import join, exists, realpath, relpath, basename, isfile, splitext
+from os import makedirs, listdir
+import json
+
+from tools.export.makefile import Makefile, GccArm, Armc5, IAR
+
+class VSCode(Makefile):
+    """Generic VSCode project. Intended to be subclassed by classes that
+    specify a type of Makefile.
+    """
+    def generate(self):
+        """Generate Makefile and VSCode launch and task files
+        """
+        super(VSCode, self).generate()
+        ctx = {
+            'name': self.project_name,
+            'elf_location': join('BUILD', self.project_name)+'.elf',
+            'c_symbols': self.toolchain.get_symbols(),
+            'asm_symbols': self.toolchain.get_symbols(True),
+            'target': self.target,
+            'include_paths': self.resources.inc_dirs,
+            'load_exe': str(self.LOAD_EXE).lower()
+        }
+
+        if not exists(join(self.export_dir, '.vscode')):
+            makedirs(join(self.export_dir, '.vscode'))
+
+        self.gen_file('vscode/tasks.tmpl', ctx,
+                      join('.vscode', 'tasks.json'))
+        self.gen_file('vscode/launch.tmpl', ctx,
+                      join('.vscode', 'launch.json'))
+        self.gen_file('vscode/settings.tmpl', ctx,
+                      join('.vscode', 'settings.json'))
+
+        # So.... I want all .h and .hpp files in self.resources.inc_dirs
+        all_directories = []
+
+        for directory in self.resources.inc_dirs:
+            if not directory:
+                continue
+
+            if directory == ".":
+                all_directories.append("${workspaceRoot}/*")
+            else:
+                all_directories.append(directory.replace("./", "${workspaceRoot}/") + "/*")
+
+        cpp_props = {
+            "configurations": [
+                {
+                    "name": "Windows",
+                    "includePath": [x.replace("/", "\\") for x in all_directories]
+                },
+                {
+                    "name": "Mac",
+                    "includePath": all_directories
+                },
+                {
+                    "name": "Linux",
+                    "includePath": all_directories
+                }
+            ]
+        }
+
+        with open(join(self.export_dir, '.vscode', 'c_cpp_properties.json'), 'w') as outfile:
+            json.dump(cpp_props, outfile, indent=4, separators=(',', ': '))
+
+
+class VSCodeGcc(VSCode, GccArm):
+    LOAD_EXE = True
+    NAME = "VSCode-GCC-ARM"
+
+class VSCodeArmc5(VSCode, Armc5):
+    LOAD_EXE = True
+    NAME = "VSCode-Armc5"
+
+class VSCodeIAR(VSCode, IAR):
+    LOAD_EXE = True
+    NAME = "VSCode-IAR"
+
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/vscode/launch.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,64 @@
+{
+    "version": "0.2.0",
+    "configurations": [
+        {
+            "name": "C++ Launch",
+            "type": "cppdbg",
+            "request": "launch",
+            "program": "${workspaceRoot}/BUILD/${workspaceRootFolderName}.elf",
+            "args": [],
+            "stopAtEntry": true,
+            "cwd": "${workspaceRoot}",
+            "environment": [],
+            "externalConsole": false,
+            "debugServerArgs": "",
+            "serverLaunchTimeout": 20000,
+            "filterStderr": true,
+            "filterStdout": false,
+            "serverStarted": "GDB\\ server\\ started",
+            "preLaunchTask": "make",
+            "setupCommands": [
+                { "text": "-target-select remote localhost:3333", "description": "connect to target", "ignoreFailures": false },
+                { "text": "-file-exec-and-symbols ${workspaceRoot}/BUILD/${workspaceRootFolderName}.elf", "description": "load file", "ignoreFailures": false},
+                { "text": "-interpreter-exec console \"monitor endian little\"", "ignoreFailures": false },
+                { "text": "-interpreter-exec console \"monitor reset\"", "ignoreFailures": false },
+                { "text": "-interpreter-exec console \"monitor halt\"", "ignoreFailures": false },
+                { "text": "-interpreter-exec console \"monitor arm semihosting enable\"", "ignoreFailures": false },
+                { "text": "-target-download", "description": "flash target", "ignoreFailures": false }
+            ],
+            "logging": {
+                "moduleLoad": true,
+                "trace": true,
+                "engineLogging": true,
+                "programOutput": true,
+                "exceptions": true
+            },
+            "linux": {
+                "MIMode": "gdb",
+                "MIDebuggerPath": "/usr/bin/arm-none-eabi-gdb",
+                "debugServerPath": "pyocd-gdbserver"
+            },
+            "osx": {
+                "MIMode": "gdb",
+                "MIDebuggerPath": "/usr/local/bin/arm-none-eabi-gdb",
+                "debugServerPath": "pyocd-gdbserver"
+            },
+            "windows": {
+                "preLaunchTask": "make.exe",
+                "MIMode": "gdb",
+                "MIDebuggerPath": "C:\\Program Files (x86)\\GNU Tools ARM Embedded\\4.9 2015q3\\bin\\arm-none-eabi-gdb.exe",
+                "debugServerPath": "pyocd-gdbserver.exe",
+                "setupCommands": [
+                    { "text": "-environment-cd ${workspaceRoot}\\BUILD" },
+                    { "text": "-target-select remote localhost:3333", "description": "connect to target", "ignoreFailures": false },
+                    { "text": "-file-exec-and-symbols ${workspaceRootFolderName}.elf", "description": "load file", "ignoreFailures": false},
+                    { "text": "-interpreter-exec console \"monitor endian little\"", "ignoreFailures": false },
+                    { "text": "-interpreter-exec console \"monitor reset\"", "ignoreFailures": false },
+                    { "text": "-interpreter-exec console \"monitor halt\"", "ignoreFailures": false },
+                    { "text": "-interpreter-exec console \"monitor arm semihosting enable\"", "ignoreFailures": false },
+                    { "text": "-target-download", "description": "flash target", "ignoreFailures": false }
+                ]
+            }
+        }
+    ]
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/vscode/settings.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,5 @@
+// Place your settings in this file to overwrite default and user settings.
+{
+    "C_Cpp.addWorkspaceRootToIncludePath": false,
+    "C_Cpp.intelliSenseEngine": "Tag Parser"
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/vscode/tasks.tmpl	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,30 @@
+{
+    // See https://go.microsoft.com/fwlink/?LinkId=733558
+    // for the documentation about the tasks.json format
+    "version": "0.1.0",
+    "name": "make",
+    "isShellCommand": true,
+    "showOutput": "always",
+    "problemMatcher": {
+        "owner": "cpp",
+        "fileLocation": ["relative", "${workspaceRoot}/mbed-os"],
+        "pattern": {
+            "regexp": "^(.*):(\\d+):(\\d+):\\s+(warning|error):\\s+(.*)$",
+            "file": 1,
+            "line": 2,
+            "column": 3,
+            "severity": 4,
+            "message": 5
+        }
+    },
+    "args": ["-j"],
+    "linux": {
+        "command": "make"
+    },
+    "osx": {
+        "command": "make"
+    },
+    "windows": {
+        "command": "make.exe"
+    }
+}
--- a/export_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,348 +0,0 @@
-#!/usr/bin/env python
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-import sys
-from os.path import join, abspath, dirname, exists
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-
-from shutil import move
-
-from tools.paths import *
-from tools.utils import mkdir, cmd
-from tools.export import export, setup_user_prj
-
-
-USR_PRJ_NAME = "usr_prj"
-USER_PRJ = join(EXPORT_WORKSPACE, USR_PRJ_NAME)
-USER_SRC = join(USER_PRJ, "src")
-
-
-def setup_test_user_prj():
-    if exists(USER_PRJ):
-        print 'Test user project already generated...'
-        return
-
-    setup_user_prj(USER_PRJ, join(TEST_DIR, "rtos", "mbed", "basic"), [join(ROOT, "rtos"), join(LIB_DIR, "tests", "mbed", "env")])
-
-    # FAKE BUILD URL
-    open(join(USER_SRC, "mbed.bld"), 'w').write("http://mbed.org/users/mbed_official/code/mbed/builds/976df7c37ad5\n")
-
-
-def fake_build_url_resolver(url):
-    # FAKE BUILD URL: Ignore the URL, always return the path to the mbed library
-    return {'path':MBED_LIBRARIES, 'name':'mbed'}
-
-
-def test_export(toolchain, target, expected_error=None):
-    if toolchain is None and target is None:
-        base_dir = join(EXPORT_TMP, "zip")
-    else:
-        base_dir = join(EXPORT_TMP, toolchain, target)
-    temp_dir = join(base_dir, "temp")
-    mkdir(temp_dir)
-
-    zip_path, report = export(USER_PRJ, USR_PRJ_NAME, toolchain, target, base_dir, temp_dir, False, None, fake_build_url_resolver)
-
-    if report['success']:
-        move(zip_path, join(EXPORT_DIR, "export_%s_%s.zip" % (toolchain, target)))
-        print "[OK]"
-    else:
-        if expected_error is None:
-            print '[ERRROR] %s' % report['errormsg']
-        else:
-            if (zip_path is None) and (expected_error in report['errormsg']):
-                print '[OK]'
-            else:
-                print '[ERROR]'
-                print '    zip:', zip_path
-                print '    msg:', report['errormsg']
-
-
-if __name__ == '__main__':
-    setup_test_user_prj()
-
-    for toolchain, target in [
-            ('zip', 'LPC1768'),
-
-            ('emblocks', 'LPC1768'),
-            ('emblocks', 'LPC1549'),
-            ('emblocks', 'LPC1114'),
-            ('emblocks', 'LPC11U35_401'),
-            ('emblocks', 'LPC11U35_501'),
-            ('emblocks', 'LPCCAPPUCCINO'),
-            ('emblocks', 'LPC2368'),
-            ('emblocks', 'STM32F407'),
-            ('emblocks', 'DISCO_F100RB'),
-            ('emblocks', 'DISCO_F051R8'),
-            ('emblocks', 'DISCO_F407VG'),
-            ('emblocks', 'DISCO_F303VC'),
-            ('emblocks', 'NRF51822'),
-            ('emblocks', 'NUCLEO_F401RE'),
-            ('emblocks', 'NUCLEO_F410RB'),
-            ('emblocks', 'NUCLEO_F411RE'),
-            ('emblocks', 'MTS_MDOT_F405RG'),
-            ('emblocks', 'MTS_MDOT_F411RE'),
-
-            ('coide', 'KL05Z'),
-            ('coide', 'KL25Z'),
-            ('coide', 'LPC1768'),
-            ('coide', 'ARCH_PRO'),
-            ('coide', 'DISCO_F407VG'),
-            ('coide', 'NUCLEO_F401RE'),
-            ('coide', 'NUCLEO_F410RB'),
-            ('coide', 'NUCLEO_F411RE'),
-            ('coide', 'DISCO_F429ZI'),
-            ('coide', 'NUCLEO_F429ZI'),
-            #('coide', 'DISCO_F469NI'), removed because template not available
-            ('coide', 'NUCLEO_F334R8'),
-            ('coide', 'NUCLEO_F303ZE'),
-            ('coide', 'MTS_MDOT_F405RG'),
-            ('coide', 'MTS_MDOT_F411RE'),
-
-            ('uvision', 'LPC1768'),
-            ('uvision', 'LPC11U24'),
-            ('uvision', 'LPC11U35_401'),
-            ('uvision', 'LPC11U35_501'),
-            ('uvision', 'KL25Z'),
-            ('uvision', 'LPC1347'),
-            ('uvision', 'LPC1114'),
-            ('uvision', 'LPC4088'),
-            ('uvision', 'LPC4088_DM'),
-            ('uvision', 'LPC4337'),
-            ('uvision', 'LPC824'),
-            ('uvision', 'SSCI824'),
-            ('uvision', 'HRM1017'),
-
-            ('uvision', 'B96B_F446VE'),
-            ('uvision', 'NUCLEO_F030R8'),
-            ('uvision', 'NUCLEO_F031K6'),
-            ('uvision', 'NUCLEO_F042K6'),
-            ('uvision', 'NUCLEO_F070RB'),
-            ('uvision', 'NUCLEO_F072RB'),
-            ('uvision', 'NUCLEO_F091RC'),
-            ('uvision', 'NUCLEO_F103RB'),
-            ('uvision', 'NUCLEO_F302R8'),
-            ('uvision', 'NUCLEO_F303K8'),
-            ('uvision', 'NUCLEO_F303RE'),
-            ('uvision', 'NUCLEO_F334R8'),
-            ('uvision', 'NUCLEO_F303ZE'),
-            ('uvision', 'NUCLEO_F401RE'),
-            ('uvision', 'NUCLEO_F410RB'),
-            ('uvision', 'NUCLEO_F411RE'),
-            ('uvision', 'NUCLEO_F412ZG'),
-            ('uvision', 'NUCLEO_F429ZI'),
-            ('uvision', 'NUCLEO_F446RE'),
-            ('uvision', 'NUCLEO_F446ZE'),
-            ('uvision', 'NUCLEO_L011K4'),
-            ('uvision', 'NUCLEO_L031K6'),
-            ('uvision', 'NUCLEO_L053R8'),
-            ('uvision', 'NUCLEO_L073RZ'),
-            ('uvision', 'NUCLEO_L152RE'),
-            ('uvision', 'NUCLEO_L432KC'),
-            ('uvision', 'NUCLEO_L476RG'),
-            ('uvision', 'MTS_MDOT_F405RG'),
-            ('uvision', 'MAXWSNENV'),
-            ('uvision', 'MAX32600MBED'),
-            ('uvision', 'MAX32620HSP'),
-            ('uvision', 'DISCO_F051R8'),
-            ('uvision', 'DISCO_F103RB'),
-            ('uvision', 'DISCO_F303VC'),
-            ('uvision', 'DISCO_L053C8'),
-            ('uvision', 'DISCO_F334C8'),
-            ('uvision', 'DISCO_F407VG'),
-            ('uvision', 'DISCO_F429ZI'),
-            ('uvision', 'DISCO_F746NG'),
-            ('uvision', 'DISCO_F469NI'),
-            ('uvision', 'DISCO_L476VG'),
-            ('uvision', 'MOTE_L152RC'),
-            ('uvision', 'ARM_BEETLE_SOC'),
-
-            ('lpcxpresso', 'LPC1768'),
-            ('lpcxpresso', 'LPC4088'),
-            ('lpcxpresso', 'LPC4088_DM'),
-            ('lpcxpresso', 'LPC1114'),
-            ('lpcxpresso', 'LPC11U35_401'),
-            ('lpcxpresso', 'LPC11U35_501'),
-            ('lpcxpresso', 'LPCCAPPUCCINO'),
-            ('lpcxpresso', 'LPC1549'),
-            ('lpcxpresso', 'LPC11U68'),
-
-            # Linux path: /home/emimon01/bin/gcc-arm/bin/
-            # Windows path: C:/arm-none-eabi-gcc-4_7/bin/
-            ('gcc_arm', 'LPC1768'),
-            ('gcc_arm', 'LPC4088_DM'),
-            ('gcc_arm', 'LPC1549'),
-            ('gcc_arm', 'LPC1114'),
-            ('gcc_arm', 'LPC11U35_401'),
-            ('gcc_arm', 'LPC11U35_501'),
-            ('gcc_arm', 'LPCCAPPUCCINO'),
-            ('gcc_arm', 'LPC2368'),
-            ('gcc_arm', 'LPC2460'),
-            ('gcc_arm', 'LPC824'),
-            ('gcc_arm', 'SSCI824'),
-
-            ('gcc_arm', 'B96B_F446VE'),
-            ('gcc_arm', 'STM32F407'),
-            ('gcc_arm', 'DISCO_F100RB'),
-            ('gcc_arm', 'DISCO_F051R8'),
-            ('gcc_arm', 'DISCO_F407VG'),
-            ('gcc_arm', 'DISCO_F303VC'),
-            ('gcc_arm', 'DISCO_L053C8'),
-            ('gcc_arm', 'DISCO_F334C8'),
-            ('gcc_arm', 'DISCO_L053C8'),
-            ('gcc_arm', 'DISCO_F429ZI'),
-            ('gcc_arm', 'DISCO_F746NG'),
-            ('gcc_arm', 'NUCLEO_F031K6'),
-            ('gcc_arm', 'NUCLEO_F042K6'),
-            ('gcc_arm', 'NRF51822'),
-            ('gcc_arm', 'RBLAB_BLENANO'),
-            ('gcc_arm', 'HRM1017'),
-            ('gcc_arm', 'NUCLEO_F401RE'),
-            ('gcc_arm', 'NUCLEO_F410RB'),
-            ('gcc_arm', 'NUCLEO_F411RE'),
-            ('gcc_arm', 'NUCLEO_F429ZI'),
-            ('gcc_arm', 'NUCLEO_F446RE'),
-            ('gcc_arm', 'NUCLEO_F446ZE'),
-            ('gcc_arm', 'NUCLEO_F303ZE'),
-            ('gcc_arm', 'ELMO_F411RE'),
-            ('gcc_arm', 'DISCO_F469NI'),
-            ('gcc_arm', 'NUCLEO_F334R8'),
-            ('gcc_arm', 'NUCLEO_L011K4'),
-            ('gcc_arm', 'NUCLEO_L031K6'),
-            ('gcc_arm', 'NUCLEO_L432KC'),
-            ('gcc_arm', 'MAX32600MBED'),
-            ('gcc_arm', 'MTS_MDOT_F405RG'),
-            ('gcc_arm', 'MTS_MDOT_F411RE'),
-            ('gcc_arm', 'RZ_A1H'),
-            ('gcc_arm', 'MAXWSNENV'),
-            ('gcc_arm', 'MAX32600MBED'),
-            ('gcc_arm', 'MAX32620HSP'),
-            ('gcc_arm', 'ARCH_BLE'),
-            ('gcc_arm', 'ARCH_MAX'),
-            ('gcc_arm', 'ARCH_PRO'),
-            ('gcc_arm', 'DELTA_DFCM_NNN40'),
-            ('gcc_arm', 'K20D50M'),
-            ('gcc_arm', 'K22F'),
-            ('gcc_arm', 'K64F'),
-            ('gcc_arm', 'KL05Z'),
-            ('gcc_arm', 'KL25Z'),
-            ('gcc_arm', 'KL43Z'),
-            ('gcc_arm', 'KL46Z'),
-            ('gcc_arm', 'EFM32GG_STK3700'),
-            ('gcc_arm', 'EFM32LG_STK3600'),
-            ('gcc_arm', 'EFM32WG_STK3800'),
-            ('gcc_arm', 'EFM32ZG_STK3200'),
-            ('gcc_arm', 'EFM32HG_STK3400'),
-            ('gcc_arm', 'EFM32PG_STK3401'),
-
-            ('ds5_5', 'LPC1768'),
-            ('ds5_5', 'LPC11U24'),
-            ('ds5_5', 'RZ_A1H'),
-
-            ('iar', 'LPC1768'),
-            ('iar', 'LPC4088_DM'),
-            ('iar', 'LPC1347'),
-
-            ('iar', 'B96B_F446VE'),
-            ('iar', 'NUCLEO_F030R8'),
-            ('iar', 'NUCLEO_F031K6'),
-            ('iar', 'NUCLEO_F042K6'),
-            ('iar', 'NUCLEO_F070RB'),
-            ('iar', 'NUCLEO_F072RB'),
-            ('iar', 'NUCLEO_F091RC'),
-            ('iar', 'NUCLEO_F302R8'),
-            ('iar', 'NUCLEO_F303K8'),
-            ('iar', 'NUCLEO_F303RE'),
-            ('iar', 'NUCLEO_F334R8'),
-            ('iar', 'NUCLEO_F303ZE'),
-            ('iar', 'NUCLEO_F401RE'),
-            ('iar', 'NUCLEO_F410RB'),
-            ('iar', 'NUCLEO_F411RE'),
-            ('iar', 'NUCLEO_F429ZI'),
-            ('iar', 'NUCLEO_F446RE'),
-            ('iar', 'NUCLEO_F446ZE'),
-            ('iar', 'NUCLEO_L011K4'),
-            ('iar', 'NUCLEO_L031K6'),
-            ('iar', 'NUCLEO_L053R8'),
-            ('iar', 'NUCLEO_L073RZ'),
-            ('iar', 'NUCLEO_L152RE'),
-            ('iar', 'NUCLEO_L432KC'),
-            ('iar', 'NUCLEO_L476RG'),
-            ('iar', 'DISCO_L053C8'),
-            ('iar', 'DISCO_F334C8'),
-            ('iar', 'DISCO_F429ZI'),
-            ('iar', 'DISCO_F469NI'),
-            ('iar', 'DISCO_F746NG'),
-            ('iar', 'DISCO_L476VG'),
-            ('iar', 'STM32F407'),
-            ('iar', 'MTS_MDOT_F405RG'),
-            ('iar', 'MTS_MDOT_F411RE'),
-            ('iar', 'MAXWSNENV'),
-            ('iar', 'MAX32600MBED'),
-            ('iar', 'MAX32620HSP'),
-            ('iar', 'MOTE_L152RC'),
-            ('iar', 'RZ_A1H'),
-
-            # ('sw4stm32', 'DISCO_F051R8'),
-            # ('sw4stm32', 'DISCO_F100RB'),
-            ('sw4stm32', 'DISCO_F303VC'),
-            ('sw4stm32', 'DISCO_F334C8'),
-            # ('sw4stm32', 'DISCO_F401VC'),
-            ('sw4stm32', 'DISCO_F407VG'),
-            ('sw4stm32', 'DISCO_F429ZI'),
-            ('sw4stm32', 'DISCO_F469NI'),
-            ('sw4stm32', 'DISCO_F746NG'),
-            ('sw4stm32', 'DISCO_L053C8'),
-            ('sw4stm32', 'DISCO_L476VG'),
-            ('sw4stm32', 'NUCLEO_F030R8'),
-            ('sw4stm32', 'NUCLEO_F031K6'),
-            ('sw4stm32', 'NUCLEO_F042K6'),
-            ('sw4stm32', 'NUCLEO_F070RB'),
-            ('sw4stm32', 'NUCLEO_F072RB'),
-            ('sw4stm32', 'NUCLEO_F091RC'),
-            ('sw4stm32', 'NUCLEO_F103RB'),
-            ('sw4stm32', 'NUCLEO_F302R8'),
-            ('sw4stm32', 'NUCLEO_F303K8'),
-            ('sw4stm32', 'NUCLEO_F303RE'),
-            ('sw4stm32', 'NUCLEO_F334R8'),
-            ('sw4stm32', 'NUCLEO_F401RE'),
-            ('sw4stm32', 'NUCLEO_F410RB'),
-            ('sw4stm32', 'NUCLEO_F411RE'),
-            ('sw4stm32', 'NUCLEO_F429ZI'),
-            ('sw4stm32', 'NUCLEO_F446RE'),
-            ('sw4stm32', 'NUCLEO_F446ZE'),
-            ('sw4stm32', 'NUCLEO_L011K4'),
-            ('sw4stm32', 'NUCLEO_L053R8'),
-            ('sw4stm32', 'NUCLEO_L073RZ'),
-            ('sw4stm32', 'NUCLEO_L152RE'),
-            ('sw4stm32', 'NUCLEO_L432KC'),
-            ('sw4stm32', 'NUCLEO_L476RG'),
-            ('sw4stm32', 'NUCLEO_F031K6'),
-            ('sw4stm32', 'NUCLEO_F042K6'),
-            ('sw4stm32', 'NUCLEO_F303ZE'),
-            ('sw4stm32', 'NUCLEO_F410RB'),
-
-            ('e2studio', 'RZ_A1H'),
-            # Removed following item to avoid script error
-            #(None, None),
-        ]:
-        print '\n=== Exporting to "%s::%s" ===' % (toolchain, target)
-        test_export(toolchain, target)
-
-    print "\n=== Test error messages ==="
-    test_export('lpcxpresso', 'LPC11U24', expected_error='lpcxpresso')
--- a/latest_targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ b/latest_targets.json	Thu Jun 22 11:12:28 2017 -0500
@@ -10,7 +10,8 @@
         "features": [],
         "detect_code": [],
         "public": false,
-        "default_lib": "std"
+        "default_lib": "std",
+        "bootloader_supported": false
     },
     "Super_Target": {
         "inherits": ["Target"],
@@ -55,6 +56,7 @@
         "inherits": ["LPCTarget"],
         "core": "Cortex-M0",
         "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "LPC11C24FBD48/301"
@@ -64,6 +66,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
@@ -75,6 +78,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "detect_code": ["1040"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
@@ -84,7 +88,7 @@
     },
     "OC_MBUINO": {
         "inherits": ["LPC11U24"],
-        "macros": ["TARGET_LPC11U24"],
+        "macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "extra_labels": ["NXP", "LPC11UXX"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2"]
@@ -93,6 +97,7 @@
         "inherits": ["LPCTarget"],
         "core": "Cortex-M0",
         "extra_labels": ["NXP", "LPC11UXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "LPC11U24FHI33/301"
@@ -102,6 +107,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
 	"default_lib": "small",
@@ -109,7 +115,7 @@
     },
     "MICRONFCBOARD": {
         "inherits": ["LPC11U34_421"],
-        "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
+        "macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
         "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
         "release_versions": ["2"],
         "device_name": "LPC11U34FBD48/311"
@@ -119,6 +125,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
@@ -130,6 +137,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
@@ -141,27 +149,21 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "device_name": "LPC11U35FHI33/501"
     },
     "XADOW_M0": {
-        "inherits": ["LPCTarget"],
-        "core": "Cortex-M0",
-        "default_toolchain": "uARM",
-        "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
-        "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
-        "default_lib": "small",
-        "release_versions": ["2"],
-        "device_name": "LPC11U35FHI33/501"
+        "inherits": ["LPC11U35_501"]
     },
     "LPC11U35_Y5_MBUG": {
         "inherits": ["LPCTarget"],
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
@@ -172,6 +174,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "default_lib": "small",
         "device_name": "LPC11U37FBD64/501"
@@ -186,6 +189,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "inherits": ["LPCTarget"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
@@ -255,10 +259,22 @@
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M3",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "extra_labels": ["NXP", "LPC176X"],
+        "extra_labels": ["NXP", "LPC176X", "FLASH_CMSIS_ALGO"],
+        "config": {
+            "modem_is_on_board": {
+                "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD" 
+            },
+            "modem_data_connection_type": {
+                "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD_UART" 
+            }
+        },
         "macros": ["TARGET_LPC1768"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
         "features": ["LWIP"],
         "device_name": "LPC1768"
@@ -267,26 +283,12 @@
         "inherits": ["LPCTarget"],
         "core": "Cortex-M3",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
+        "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768", "FLASH_CMSIS_ALGO"],
         "macros": ["TARGET_LPC1768"],
         "detect_code": ["1010"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "device_name": "LPC1768"
     },
-    "LPC2368": {
-        "inherits": ["LPCTarget"],
-        "core": "ARM7TDMI-S",
-        "extra_labels": ["NXP", "LPC23XX"],
-        "supported_toolchains": ["GCC_ARM", "GCC_CR"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
-    },
-    "LPC2460": {
-        "inherits": ["LPCTarget"],
-        "core": "ARM7TDMI-S",
-        "extra_labels": ["NXP", "LPC2460"],
-        "supported_toolchains": ["GCC_ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
-    },
     "LPC810": {
         "inherits": ["LPCTarget"],
         "core": "Cortex-M0+",
@@ -346,6 +348,7 @@
             "function": "LPC4088Code.binary_hook"
         },
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "features": ["LWIP"],
         "device_name": "LPC4088FBD144"
     },
     "LPC4088": {
@@ -392,6 +395,7 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["NXP", "LPC11UXX"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
         "inherits": ["LPCTarget"],
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
@@ -448,14 +452,15 @@
     "KL46Z": {
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M0+",
-        "extra_labels": ["Freescale", "KLXX"],
+        "extra_labels": ["Freescale", "KLXX", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0220"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "MKL46Z256xxx4"
+        "device_name": "MKL46Z256xxx4",
+        "bootloader_supported": true
     },
     "K20D50M": {
         "inherits": ["Target"],
@@ -539,10 +544,16 @@
         "is_disk_virtual": true,
         "inherits": ["Target"],
         "detect_code": ["0218"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "release_versions": ["2", "5"],
         "device_name": "MKL82Z128xxx7"
     },
+    "USENSE": {
+        "inherits": ["KL82Z"],
+        "device_has_add": ["LOWPOWERTIMER"],
+        "extra_labels_remove": ["FRDM"],
+        "supported_form_factors": []
+    },
     "KW24D": {
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M4",
@@ -565,10 +576,27 @@
         "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0201"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "MKW41Z512xxx4"
     },
+    "MCU_K24F1M": {
+        "core": "Cortex-M4F",
+        "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
+        "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K24F", "KPSDK_MCUS", "KPSDK_CODE"],
+        "is_disk_virtual": true,
+        "public": false,
+        "macros": ["CPU_MK24FN1M0VDC12", "FSL_RTOS_MBED"],
+        "inherits": ["Target"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "device_name": "MK24FN1M0xxx12"
+    },
+    "RO359B": {
+        "supported_form_factors": ["ARDUINO"],
+        "inherits": ["MCU_K24F1M"],
+        "detect_code": ["1022"],
+        "release_versions": ["2", "5"]
+    },
     "K64F": {
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M4F",
@@ -578,10 +606,11 @@
         "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0240"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
         "features": ["LWIP", "STORAGE"],
         "release_versions": ["2", "5"],
-        "device_name": "MK64FN1M0xxx12"
+        "device_name": "MK64FN1M0xxx12",
+        "bootloader_supported": true
     },
     "MTS_GAMBIT": {
         "inherits": ["Target"],
@@ -590,7 +619,7 @@
         "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
         "is_disk_virtual": true,
         "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
-        "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "device_name": "MK64FN1M0xxx12"
     },
     "HEXIWEAR": {
@@ -602,7 +631,7 @@
         "is_disk_virtual": true,
         "default_toolchain": "ARM",
         "detect_code": ["0214"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "default_lib": "std",
         "release_versions": ["2", "5"],
         "device_name": "MK64FN1M0xxx12"
@@ -619,7 +648,7 @@
         "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "MK66FN2M0xxx18"
+        "device_name": "MK66FN2M0xxx18"
     },
     "K82F": {
         "supported_form_factors": ["ARDUINO"],
@@ -630,9 +659,14 @@
         "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0217"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "release_versions": ["2", "5"],
-        "device_name" : "MK82FN256xxx15"
+        "device_name": "MK82FN256xxx15"
+    },
+    "UBRIDGE": {
+        "inherits": ["K82F"],
+        "extra_labels_remove": ["FRDM"],
+        "supported_form_factors": []
     },
     "NUCLEO_F030R8": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -642,7 +676,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0725"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
@@ -656,7 +690,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0791"],
-        "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
@@ -670,7 +704,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0785"],
-        "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
@@ -684,7 +718,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0755"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F070RB"
@@ -697,7 +731,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0730"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F072RB"
@@ -710,7 +744,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "detect_code": ["0750"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F091RC"
@@ -734,13 +768,20 @@
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
         "inherits": ["Target"],
         "detect_code": ["0835"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F207ZG"
+        "device_name": "STM32F207ZG"
     },
     "NUCLEO_F302R8": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -881,30 +922,46 @@
         "inherits": ["Target"],
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
-        "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"],
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
+        "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "FLASH_CMSIS_ALGO"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "progen": {"target": "nucleo-f429zi"},
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "detect_code": ["0796"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F429ZI"
+        "device_name": "STM32F429ZI",
+        "bootloader_supported": true
     },
     "NUCLEO_F439ZI": {
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["Target"],
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
-        "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI"],
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
+        "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI", "FLASH_CMSIS_ALGO"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "progen": {"target": "nucleo-f439zi"},
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "detect_code": ["0797"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F439ZI"
+        "device_name" : "STM32F439ZI",
+        "bootloader_supported": true
     },
     "NUCLEO_F446RE": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -914,7 +971,7 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0777"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F446RE"
@@ -927,10 +984,10 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0778"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2",  "USB_STM_HAL", "USBHOST_OTHER"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USB_STM_HAL", "USBHOST_OTHER"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F446ZE"
+        "device_name": "STM32F446ZE"
     },
     "B96B_F446VE": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -951,6 +1008,13 @@
         "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "default_toolchain": "ARM",
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0816"],
@@ -965,6 +1029,13 @@
         "extra_labels": ["STM", "STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "default_toolchain": "ARM",
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0819"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
@@ -978,13 +1049,20 @@
         "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "default_toolchain": "ARM",
+        "config": {
+            "d11_configuration": {
+                "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
+                "value": "PA_7",
+                "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            }
+        },
         "supported_form_factors": ["ARDUINO"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
         "detect_code": ["0818"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F767ZI"
+        "device_name": "STM32F767ZI"
     },
     "NUCLEO_L011K4": {
         "inherits": ["Target"],
@@ -994,20 +1072,20 @@
         "default_toolchain": "uARM",
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0780"],
-        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "STM32L011K4"
     },
     "NUCLEO_L031K6": {
         "inherits": ["Target"],
-        "core": "Cortex-M0",
+        "core": "Cortex-M0+",
         "extra_labels": ["STM", "STM32L0", "STM32L031K6"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "default_toolchain": "uARM",
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0790"],
-        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "STM32L031K6"
@@ -1020,7 +1098,7 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0715"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "STM32L053R8"
@@ -1033,7 +1111,7 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0760"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L073RZ"
     },
@@ -1058,9 +1136,9 @@
         "inherits": ["Target"],
         "detect_code": ["0770"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "CAN", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "CAN", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32L432KC"
+        "device_name": "STM32L432KC"
     },
     "NUCLEO_L476RG": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -1071,9 +1149,10 @@
         "inherits": ["Target"],
         "detect_code": ["0765"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2","USBHOST_OTHER"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "STM32L476RG"
+        "device_name": "STM32L476RG",
+        "bootloader_supported": true
     },
     "NUCLEO_L486RG": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -1084,7 +1163,7 @@
         "inherits": ["Target"],
         "detect_code": ["0827"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2","USBHOST_OTHER"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L486RG"
     },
@@ -1107,7 +1186,6 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
         "program_cycle_s": 2,
         "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
-        "macros": ["LSI_VALUE=32000"],
         "inherits": ["Target"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
@@ -1120,7 +1198,7 @@
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
         "supported_toolchains": ["GCC_ARM"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "device_name": "STM32F051R8"
     },
@@ -1170,10 +1248,10 @@
         "inherits": ["Target"],
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
-        "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
+        "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx", "FLASH_CMSIS_ALGO"],
         "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F429ZI"
     },
@@ -1197,11 +1275,24 @@
         "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "macros": ["RTC_LSI=1"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "STM32L053C8"
     },
+    "DISCO_L072CZ_LRWAN1": {
+        "inherits": ["Target"],
+        "core": "Cortex-M0+",
+        "default_toolchain": "ARM",
+        "extra_labels": ["STM", "STM32L0", "STM32L072CZ", "STM32L072xx"],
+        "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
+        "supported_form_factors": ["ARDUINO", "MORPHO"],
+        "macros": ["RTC_LSI=1"],
+        "detect_code": ["0833"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "release_versions": ["2", "5"],
+        "device_name": "STM32L072CZ"
+    },
     "DISCO_F746NG": {
         "inherits": ["Target"],
         "core": "Cortex-M7F",
@@ -1230,6 +1321,19 @@
         "release_versions": ["2", "5"],
         "device_name": "STM32F769NI"
     },
+    "DISCO_L475VG_IOT01A": {
+        "inherits": ["Target"],
+        "core": "Cortex-M4F",
+        "extra_labels": ["STM", "STM32L4", "STM32L475xG", "STM32L475VG"],
+        "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
+        "default_toolchain": "ARM",
+        "supported_form_factors": ["ARDUINO"],
+        "detect_code": ["0764"],
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "release_versions": ["2", "5"],
+        "device_name": "STM32L475VG"
+    },
     "DISCO_L476VG": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
@@ -1238,7 +1342,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "detect_code": ["0820"],
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L476VG"
     },
@@ -1262,7 +1366,7 @@
         "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
         "post_binary_hook": {
             "function": "MTSCode.combine_bins_mts_dot",
-            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
+            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
         },
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
@@ -1273,10 +1377,22 @@
         "core": "Cortex-M4F",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
+        "config": {
+            "modem_is_on_board": {
+                "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD" 
+            },
+            "modem_data_connection_type": {
+                "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD_UART" 
+            }
+        },
         "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2", "RTC_LSI=1"],
         "post_binary_hook": {
             "function": "MTSCode.combine_bins_mts_dragonfly",
-            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
+            "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
         },
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
@@ -1288,10 +1404,10 @@
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
-        "progen": {"target": "xdot-l151cc"},
         "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "default_lib": "std",
-        "release_versions": ["5"]
+        "release_versions": ["5"],
+        "device_name": "STM32L151CC"
     },
     "MOTE_L152RC": {
         "inherits": ["Target"],
@@ -1321,13 +1437,47 @@
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
-        "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
+        "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI", "FLASH_CMSIS_ALGO"],
         "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "CAN", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "CAN", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["5"],
-        "device_name": "STM32F439ZI"
+        "device_name": "STM32F439ZI",
+        "bootloader_supported": true
+    },
+    "UBLOX_C030": {
+        "supported_form_factors": ["ARDUINO"],
+        "core": "Cortex-M4F",
+        "default_toolchain": "ARM",
+        "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
+        "extra_labels": ["STM", "STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG"],
+        "config": {
+            "modem_is_on_board": {
+                "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD" 
+            },
+            "modem_data_connection_type": {
+                "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
+                "value": 1,
+                "macro_name": "MODEM_ON_BOARD_UART" 
+            }
+        },
+        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "RTC_LSI=1", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
+        "inherits": ["Target"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "RTC", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "features": ["LWIP"],
+        "public": false,
+        "device_name": "STM32F437VG"
+    },
+    "UBLOX_C030_U201": {
+        "inherits": ["UBLOX_C030"],
+        "release_versions": ["5"]
+    },
+    "UBLOX_C030_N211": {
+        "inherits": ["UBLOX_C030"],
+        "release_versions": ["5"]
     },
     "NZ32_SC151": {
         "inherits": ["Target"],
@@ -1345,7 +1495,7 @@
         "inherits": ["Target"],
         "core": "Cortex-M0",
         "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
-        "macros": ["NRF51", "TARGET_NRF51822"],
+        "macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "MERGE_BOOTLOADER": false,
         "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
         "OUTPUT_EXT": "hex",
@@ -1757,7 +1907,7 @@
         "core": "Cortex-M0",
         "supported_toolchains": ["ARM"],
         "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
-        "macros": ["CMSDK_CM0"],
+        "macros": ["CMSDK_CM0", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
         "release_versions": ["2"]
     },
@@ -1819,6 +1969,15 @@
         "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
         "release_versions": ["2"]
     },
+     "ARM_CM3DS_MPS2": {
+        "inherits": ["ARM_IOTSS_Target"],
+        "core": "Cortex-M3",
+        "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
+        "extra_labels": ["ARM_SSG", "CM3DS_MPS2"],
+        "macros": ["CMSDK_CM3DS"],
+        "device_has": ["ETHERNET","INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SPI", "RTC"],
+        "release_versions": ["2", "5"]
+    },
     "ARM_BEETLE_SOC": {
         "inherits": ["ARM_IOTSS_Target"],
         "core": "Cortex-M3",
@@ -1839,7 +1998,7 @@
         "inherits": ["Target"],
         "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "features": ["LWIP"],
-        "release_versions": ["2", "5"]
+        "release_versions": ["2"]
     },
     "VK_RZ_A1H": {
         "inherits": ["Target"],
@@ -1851,7 +2010,7 @@
         "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "features": ["LWIP"],
         "default_lib": "std",
-        "release_versions": ["2", "5"]
+        "release_versions": ["2"]
     },
     "MAXWSNENV": {
         "inherits": ["Target"],
@@ -1915,18 +2074,19 @@
     },
     "EFM32GG990F1024": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32GG", "1024K"],
+        "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
         "core": "Cortex-M3",
         "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
         "device_name": "EFM32GG990F1024",
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFM32GG_STK3700": {
         "inherits": ["EFM32GG990F1024"],
         "progen": {"target": "efm32gg-stk"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -1968,17 +2128,18 @@
     },
     "EFM32LG990F256": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32LG", "256K"],
+        "extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
         "core": "Cortex-M3",
         "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
         "device_name": "EFM32LG990F256",
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFM32LG_STK3600": {
         "inherits": ["EFM32LG990F256"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "device_name": "EFM32LG990F256",
         "config": {
@@ -2021,18 +2182,19 @@
     },
     "EFM32WG990F256": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32WG", "256K"],
+        "extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
         "core": "Cortex-M4F",
         "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
         "device_name": "EFM32WG990F256",
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFM32WG_STK3800": {
         "inherits": ["EFM32WG990F256"],
         "progen": {"target": "efm32wg-stk"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2074,7 +2236,7 @@
     },
     "EFM32ZG222F32": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32ZG", "32K"],
+        "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
         "core": "Cortex-M0+",
         "default_toolchain": "uARM",
         "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
@@ -2128,7 +2290,7 @@
     },
     "EFM32HG322F64": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32HG", "64K"],
+        "extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
         "core": "Cortex-M0+",
         "default_toolchain": "uARM",
         "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
@@ -2182,17 +2344,18 @@
     },
     "EFM32PG1B100F256GM32": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFM32PG", "256K"],
+        "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
         "core": "Cortex-M4F",
         "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
         "device_name": "EFM32PG1B100F256GM32",
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFM32PG_STK3401": {
         "inherits": ["EFM32PG1B100F256GM32"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2234,26 +2397,28 @@
     },
     "EFR32MG1P132F256GM48": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
+        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
         "core": "Cortex-M4F",
         "macros": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
         "device_name": "EFR32MG1P132F256GM48",
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFR32MG1P233F256GM48": {
         "inherits": ["EFM32"],
-        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
+        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
         "core": "Cortex-M4F",
         "macros": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
         "release_versions": ["2", "5"],
-        "public": false
+        "public": false,
+        "bootloader_supported": true
     },
     "EFR32MG1_BRD4150": {
         "inherits": ["EFR32MG1P132F256GM48"],
-        "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "RF_SUBGHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2294,9 +2459,108 @@
         },
         "public": false
     },
-    "THUNDERBOARD_SENSE": {
+    "TB_SENSE_1": {
         "inherits": ["EFR32MG1P233F256GM48"],
-        "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "forced_reset_timeout": 5,
+        "config": {
+            "hf_clock_src": {
+                "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
+                "value": "HFXO",
+                "macro_name": "CORE_CLOCK_SOURCE"
+            },
+            "hfxo_clock_freq": {
+                "help": "Value: External crystal frequency in hertz",
+                "value": "38400000",
+                "macro_name": "HFXO_FREQUENCY"
+            },
+            "lf_clock_src": {
+                "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
+                "value": "LFXO",
+                "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
+            },
+            "lfxo_clock_freq": {
+                "help": "Value: External crystal frequency in hertz",
+                "value": "32768",
+                "macro_name": "LFXO_FREQUENCY"
+            },
+            "hfrco_clock_freq": {
+                "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
+                "value": "32000000",
+                "macro_name": "HFRCO_FREQUENCY"
+            },
+            "hfrco_band_select": {
+                "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
+                "value": "cmuHFRCOFreq_32M0Hz",
+                "macro_name": "HFRCO_FREQUENCY_ENUM"
+            }
+        }
+    },
+    "EFM32PG12B500F1024GL125": {
+        "inherits": ["EFM32"],
+        "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
+        "core": "Cortex-M4F",
+        "macros": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
+        "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
+        "release_versions": ["2", "5"],
+        "public": false,
+        "bootloader_supported": true
+    },
+    "EFM32PG12_STK3402": {
+        "inherits": ["EFM32PG12B500F1024GL125"],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "forced_reset_timeout": 2,
+        "config": {
+            "hf_clock_src": {
+                "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
+                "value": "HFXO",
+                "macro_name": "CORE_CLOCK_SOURCE"
+            },
+            "hfxo_clock_freq": {
+                "help": "Value: External crystal frequency in hertz",
+                "value": "40000000",
+                "macro_name": "HFXO_FREQUENCY"
+            },
+            "lf_clock_src": {
+                "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
+                "value": "LFXO",
+                "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
+            },
+            "lfxo_clock_freq": {
+                "help": "Value: External crystal frequency in hertz",
+                "value": "32768",
+                "macro_name": "LFXO_FREQUENCY"
+            },
+            "hfrco_clock_freq": {
+                "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
+                "value": "32000000",
+                "macro_name": "HFRCO_FREQUENCY"
+            },
+            "hfrco_band_select": {
+                "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
+                "value": "cmuHFRCOFreq_32M0Hz",
+                "macro_name": "HFRCO_FREQUENCY_ENUM"
+            },
+            "board_controller_enable": {
+                "help": "Pin to pull high for enabling the USB serial port",
+                "value": "PA5",
+                "macro_name": "EFM_BC_EN"
+            }
+        }
+    },
+	"EFR32MG12P332F1024GL125": {
+        "inherits": ["EFM32"],
+        "extra_labels_add": ["EFR32MG12", "1024K", "SL_RAIL", "SL_CRYPTO"],
+        "core": "Cortex-M4F",
+        "macros": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
+        "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
+        "release_versions": ["2", "5"],
+        "public": false,
+        "bootloader_supported": true
+    },
+	"TB_SENSE_12": {
+        "inherits": ["EFR32MG12P332F1024GL125"],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "forced_reset_timeout": 5,
         "config": {
             "hf_clock_src": {
@@ -2335,27 +2599,30 @@
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M0",
         "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
-        "supported_toolchains": ["uARM", "ARM"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
-        "release_versions": ["2"]
+        "release_versions": ["2", "5"]
     },
     "WIZWIKI_W7500P": {
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M0",
         "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
-        "supported_toolchains": ["uARM", "ARM"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
-        "release_versions": ["2"]
+        "release_versions": ["2", "5"]
     },
     "WIZWIKI_W7500ECO": {
         "inherits": ["Target"],
         "core": "Cortex-M0",
         "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
-        "supported_toolchains": ["uARM", "ARM"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
         "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
-        "release_versions": ["2"]
+        "release_versions": ["2", "5"]
     },
     "SAMR21G18A": {
         "inherits": ["Target"],
@@ -2375,7 +2642,7 @@
         "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
         "release_versions": ["2"],
-        "device_name" : "ATSAMD21J18A"
+        "device_name": "ATSAMD21J18A"
     },
     "SAMD21G18A": {
         "inherits": ["Target"],
@@ -2417,10 +2684,12 @@
             "BLE_STACK_SUPPORT_REQD",
             "SOFTDEVICE_PRESENT",
             "S130",
-            "TARGET_MCU_NRF51822"
+            "TARGET_MCU_NRF51822",
+            "CMSIS_VECTAB_VIRTUAL",
+            "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""
         ],
         "MERGE_BOOTLOADER": false,
-        "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
+        "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5", "SDK11"],
         "OUTPUT_EXT": "hex",
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
@@ -2475,8 +2744,8 @@
     "MCU_NRF52": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
-        "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
-        "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
+        "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5", "SDK11", "NRF52_COMMON"],
         "OUTPUT_EXT": "hex",
         "is_disk_virtual": true,
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
@@ -2540,8 +2809,64 @@
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
+        "config": {
+            "lf_clock_rc_calib_timer_interval": {
+                "value": 16,
+                "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL"
+            },
+            "lf_clock_rc_calib_mode_config": {
+                "value": 0,
+                "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG"
+            }
+        },
         "device_name": "nRF52832_xxAA"
     },
+    "MCU_NRF52840": {
+        "inherits": ["Target"],
+        "core": "Cortex-M4F",
+        "macros": ["TARGET_NRF52840", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S140", "NRF_SD_BLE_API_VERSION=5", "NRF52840_XXAA", "NRF_DFU_SETTINGS_VERSION=1", "NRF_SD_BLE_API_VERSION=5", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "extra_labels": ["NORDIC", "MCU_NRF52840", "NRF5", "SDK13", "NRF52_COMMON"],
+        "OUTPUT_EXT": "hex",
+        "is_disk_virtual": true,
+        "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
+        "public": false,
+        "detect_code": ["1101"],
+        "program_cycle_s": 6,
+        "MERGE_SOFT_DEVICE": true,
+        "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
+            {
+                "boot": "",
+                "name": "s140_nrf52840_5.0.0-1.alpha_softdevice.hex",
+                "offset": 135168
+            }
+        ],
+        "bootloader_select_index": 0,
+        "post_binary_hook": {
+            "function": "MCU_NRF51Code.binary_hook",
+            "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
+        },
+        "MERGE_BOOTLOADER": false,
+        "features": ["BLE"],
+        "config": {
+            "lf_clock_src": {
+                "value": "NRF_LF_SRC_XTAL",
+                "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
+            },
+            "uart_hwfc": {
+                "help": "Value: 1 for enable, 0 for disable",
+                "value": 1,
+                "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
+            }
+        }
+    },
+    "NRF52840_DK": {
+        "supported_form_factors": ["ARDUINO"],
+        "inherits": ["MCU_NRF52840"],
+        "macros_add": ["BOARD_PCA10056", "CONFIG_GPIO_AS_PINRESET", "SWI_DISABLE0", "NRF52_ERRATA_20"],
+        "device_has": ["FLASH", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "TRNG"],
+        "release_versions": ["2", "5"],
+        "device_name": "nRF52840_xxAA"
+    },
     "BLUEPILL_F103C8": {
         "core": "Cortex-M3",
         "default_toolchain": "GCC_ARM",
@@ -2553,14 +2878,15 @@
     "NUMAKER_PFM_NUC472": {
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
-        "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
+        "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["5"],
-        "device_name": "NUC472HI8AE"
+        "device_name": "NUC472HI8AE",
+        "bootloader_supported": true
     },
     "NCS36510": {
         "inherits": ["Target"],
@@ -2595,20 +2921,21 @@
         "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
         "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
-        "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG"],
+        "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG", "SPISLAVE"],
         "release_versions": ["2", "5"]
     },
     "NUMAKER_PFM_M453": {
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
-        "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
+        "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "progen": {"target": "numaker-pfm-m453"},
-        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "M453VG6AE"
+        "device_name": "M453VG6AE",
+        "bootloader_supported": true
     },
     "HI2110": {
         "inherits": ["Target"],
@@ -2616,7 +2943,7 @@
         "default_toolchain": "GCC_ARM",
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
         "extra_labels": ["ublox"],
-        "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
+        "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "public": false,
         "target_overrides": {
             "*": {
@@ -2635,5 +2962,22 @@
     "SARA_NBIOT_EVK": {
         "inherits": ["SARA_NBIOT"],
         "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
+    },
+    "REALTEK_RTL8195AM": {
+        "supported_form_factors": ["ARDUINO"],
+        "core": "Cortex-M3",
+        "default_toolchain": "GCC_ARM",
+        "inherits": ["Target"],
+        "detect_code": ["4600"],
+        "extra_labels": ["Realtek", "AMEBA", "RTL8195A"],
+        "macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS"],
+        "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "TRNG", "EMAC"],
+        "features": ["LWIP"],
+        "post_binary_hook": {
+            "function": "RTL8195ACode.binary_hook",
+            "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
+        },
+        "release_versions": ["5"]
     }
 }
--- a/libraries.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/libraries.py	Thu Jun 22 11:12:28 2017 -0500
@@ -14,11 +14,10 @@
 See the License for the specific language governing permissions and
 limitations under the License.
 """
-from tools.paths import MBED_RTX, RTOS, RTOS_LIBRARIES, MBED_LIBRARIES,\
-    MBED_RPC, RPC_LIBRARY, USB, USB_LIBRARIES, USB_HOST,\
-    USB_HOST_LIBRARIES, FAT_FS, DSP_ABSTRACTION, DSP_CMSIS, DSP_LIBRARIES,\
-    SD_FS, FS_LIBRARY, ETH_SOURCES, LWIP_SOURCES, ETH_LIBRARY, UBLOX_SOURCES,\
-    UBLOX_LIBRARY, CELLULAR_SOURCES, CELLULAR_USB_SOURCES, CPPUTEST_SRC,\
+from tools.paths import MBED_LIBRARIES,\
+    MBED_RPC, RPC_LIBRARY, USB, USB_LIBRARIES, \
+    DSP_ABSTRACTION, DSP_CMSIS, DSP_LIBRARIES,\
+    CPPUTEST_SRC,\
     CPPUTEST_PLATFORM_SRC, CPPUTEST_TESTRUNNER_SCR, CPPUTEST_LIBRARY,\
     CPPUTEST_INC, CPPUTEST_PLATFORM_INC, CPPUTEST_TESTRUNNER_INC,\
     CPPUTEST_INC_EXT
@@ -27,20 +26,6 @@
 
 
 LIBRARIES = [
-    # RTOS libraries
-    {
-        "id": "rtx",
-        "source_dir": MBED_RTX,
-        "build_dir": RTOS_LIBRARIES,
-        "dependencies": [MBED_LIBRARIES],
-    },
-    {
-        "id": "rtos",
-        "source_dir": RTOS,
-        "build_dir": RTOS_LIBRARIES,
-        "dependencies": [MBED_LIBRARIES, MBED_RTX],
-    },
-
     # RPC
     {
         "id": "rpc",
@@ -57,14 +42,6 @@
         "dependencies": [MBED_LIBRARIES],
     },
 
-    # USB Host libraries
-    {
-        "id": "usb_host",
-        "source_dir": USB_HOST,
-        "build_dir": USB_HOST_LIBRARIES,
-        "dependencies": [MBED_LIBRARIES, FAT_FS, MBED_RTX, RTOS_LIBRARIES],
-    },
-
     # DSP libraries
     {
         "id": "dsp",
@@ -73,30 +50,6 @@
         "dependencies": [MBED_LIBRARIES]
     },
 
-    # File system libraries
-    {
-        "id": "fat",
-        "source_dir": [FAT_FS, SD_FS],
-        "build_dir": FS_LIBRARY,
-        "dependencies": [MBED_LIBRARIES]
-    },
-
-    # Network libraries
-    {
-        "id": "eth",
-        "source_dir": [ETH_SOURCES, LWIP_SOURCES],
-        "build_dir": ETH_LIBRARY,
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES]
-    },
-
-    {
-        "id": "ublox",
-        "source_dir": [UBLOX_SOURCES, CELLULAR_SOURCES, CELLULAR_USB_SOURCES,
-                       LWIP_SOURCES],
-        "build_dir": UBLOX_LIBRARY,
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES],
-    },
-
     # Unit Testing library
     {
         "id": "cpputest",
--- a/make.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/make.py	Thu Jun 22 11:12:28 2017 -0500
@@ -23,6 +23,7 @@
 from time import sleep
 from shutil import copy
 from os.path import join, abspath, dirname
+from json import load, dump
 
 # Be sure that the tools directory is in the search path
 ROOT = abspath(join(dirname(__file__), ".."))
@@ -32,13 +33,9 @@
 from tools.utils import NotSupportedException
 from tools.paths import BUILD_DIR
 from tools.paths import MBED_LIBRARIES
-from tools.paths import RTOS_LIBRARIES
 from tools.paths import RPC_LIBRARY
-from tools.paths import ETH_LIBRARY
-from tools.paths import USB_HOST_LIBRARIES, USB_LIBRARIES
+from tools.paths import USB_LIBRARIES
 from tools.paths import DSP_LIBRARIES
-from tools.paths import FS_LIBRARY
-from tools.paths import UBLOX_LIBRARY
 from tools.tests import TESTS, Test, TEST_MAP
 from tools.tests import TEST_MBED_LIB
 from tools.tests import test_known, test_name_known
@@ -47,6 +44,9 @@
 from tools.options import extract_profile
 from tools.build_api import build_project
 from tools.build_api import mcu_toolchain_matrix
+from tools.build_api import mcu_toolchain_list
+from tools.build_api import mcu_target_list
+from tools.build_api import merge_build_data
 from utils import argparse_filestring_type
 from utils import argparse_many
 from utils import argparse_dir_not_parent
@@ -91,9 +91,11 @@
                       help="Add a macro definition")
 
     group.add_argument("-S", "--supported-toolchains",
-                      action="store_true",
                       dest="supported_toolchains",
                       default=False,
+                      const="matrix",
+                      choices=["matrix", "toolchains", "targets"],
+                      nargs="?",
                       help="Displays supported matrix of MCUs and toolchains")
 
     parser.add_argument('-f', '--filter',
@@ -130,26 +132,11 @@
                       default=False, help="List available tests in order and exit")
 
     # Ideally, all the tests with a single "main" thread can be run with, or
-    # without the rtos, eth, usb_host, usb, dsp, fat, ublox
-    parser.add_argument("--rtos",
-                      action="store_true", dest="rtos",
-                      default=False, help="Link with RTOS library")
-
+    # without the usb, dsp
     parser.add_argument("--rpc",
                       action="store_true", dest="rpc",
                       default=False, help="Link with RPC library")
 
-    parser.add_argument("--eth",
-                      action="store_true", dest="eth",
-                      default=False,
-                      help="Link with Ethernet library")
-
-    parser.add_argument("--usb_host",
-                      action="store_true",
-                      dest="usb_host",
-                      default=False,
-                      help="Link with USB Host library")
-
     parser.add_argument("--usb",
                       action="store_true",
                       dest="usb",
@@ -162,24 +149,17 @@
                       default=False,
                       help="Link with DSP library")
 
-    parser.add_argument("--fat",
-                      action="store_true",
-                      dest="fat",
-                      default=False,
-                      help="Link with FS ad SD card file system library")
-
-    parser.add_argument("--ublox",
-                      action="store_true",
-                      dest="ublox",
-                      default=False,
-                      help="Link with U-Blox library")
-
     parser.add_argument("--testlib",
                       action="store_true",
                       dest="testlib",
                       default=False,
                       help="Link with mbed test library")
 
+    parser.add_argument("--build-data",
+                        dest="build_data",
+                        default=None,
+                        help="Dump build_data to this file")
+
     # Specify a different linker script
     parser.add_argument("-l", "--linker", dest="linker_script",
                       type=argparse_filestring_type,
@@ -189,7 +169,16 @@
 
     # Only prints matrix of supported toolchains
     if options.supported_toolchains:
-        print mcu_toolchain_matrix(platform_filter=options.general_filter_regex)
+        if options.supported_toolchains == "matrix":
+            print mcu_toolchain_matrix(platform_filter=options.general_filter_regex)
+        elif options.supported_toolchains == "toolchains":
+            toolchain_list = mcu_toolchain_list()
+            # Only print the lines that matter
+            for line in toolchain_list.split("\n"):
+                if not "mbed" in line:
+                    print line
+        elif options.supported_toolchains == "targets":
+            print mcu_target_list()
         exit(0)
 
     # Print available tests in order and exit
@@ -243,6 +232,7 @@
                            %(toolchain,search_path))
 
     # Test
+    build_data_blob = {} if options.build_data else None
     for test_no in p:
         test = Test(test_no)
         if options.automated is not None:    test.automated = options.automated
@@ -257,14 +247,9 @@
             sys.exit()
 
         # Linking with extra libraries
-        if options.rtos:     test.dependencies.append(RTOS_LIBRARIES)
         if options.rpc:      test.dependencies.append(RPC_LIBRARY)
-        if options.eth:      test.dependencies.append(ETH_LIBRARY)
-        if options.usb_host: test.dependencies.append(USB_HOST_LIBRARIES)
         if options.usb:      test.dependencies.append(USB_LIBRARIES)
         if options.dsp:      test.dependencies.append(DSP_LIBRARIES)
-        if options.fat:      test.dependencies.append(FS_LIBRARY)
-        if options.ublox:    test.dependencies.append(UBLOX_LIBRARY)
         if options.testlib:  test.dependencies.append(TEST_MBED_LIB)
 
         build_dir = join(BUILD_DIR, "test", mcu, toolchain, test.id)
@@ -277,11 +262,12 @@
 
         try:
             bin_file = build_project(test.source_dir, build_dir, mcu, toolchain,
-                                     test.dependencies,
+                                     set(test.dependencies),
                                      linker_script=options.linker_script,
                                      clean=options.clean,
                                      verbose=options.verbose,
                                      notify=notify,
+                                     report=build_data_blob,
                                      silent=options.silent,
                                      macros=options.macros,
                                      jobs=options.jobs,
@@ -327,8 +313,8 @@
 
         except KeyboardInterrupt, e:
             print "\n[CTRL+c] exit"
-        except NotSupportedException, e:
-            print "\nNot supported for selected target"
+        except NotSupportedException as e:
+            print "\nCould not compile for %s: %s" % (mcu, str(e))
         except Exception,e:
             if options.verbose:
                 import traceback
@@ -337,3 +323,5 @@
                 print "[ERROR] %s" % str(e)
             
             sys.exit(1)
+    if options.build_data:
+        merge_build_data(options.build_data, build_data_blob, "application")
--- a/memap.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/memap.py	Thu Jun 22 11:12:28 2017 -0500
@@ -121,7 +121,10 @@
             else:
                 module_name = data[0] + '/' + data[1]
 
-            return [module_name, object_name]
+            if self.detailed_misc:
+                return [module_name + '/' + object_name, object_name]
+            else:
+                return [module_name, object_name]
             
         elif self.detailed_misc:           
             rex_obj_name = r'^.+\/(.+\.o\)*)$'
@@ -538,7 +541,7 @@
 
         return output
 
-    toolchains = ["ARM", "ARM_STD", "ARM_MICRO", "GCC_ARM", "IAR"]
+    toolchains = ["ARM", "ARM_STD", "ARM_MICRO", "GCC_ARM", "GCC_CR", "IAR"]
 
     def compute_report(self):
         for k in self.sections:
@@ -593,7 +596,7 @@
                    toolchain == "ARM_MICRO":
                     self.search_objects(os.path.abspath(mapfile))
                     self.parse_map_file_armcc(file_input)
-                elif toolchain == "GCC_ARM":
+                elif toolchain == "GCC_ARM" or toolchain == "GCC_CR":
                     self.parse_map_file_gcc(file_input)
                 elif toolchain == "IAR":
                     self.search_objects(os.path.abspath(mapfile))
--- a/misc/Doxyfile	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1512 +0,0 @@
-# Doxyfile 1.6.1
-
-# This file describes the settings to be used by the documentation system
-# doxygen (www.doxygen.org) for a project
-#
-# All text after a hash (#) is considered a comment and will be ignored
-# The format is:
-#       TAG = value [value, ...]
-# For lists items can also be appended using:
-#       TAG += value [value, ...]
-# Values that contain spaces should be placed between quotes (" ")
-
-#---------------------------------------------------------------------------
-# Project related configuration options
-#---------------------------------------------------------------------------
-
-# This tag specifies the encoding used for all characters in the config file
-# that follow. The default is UTF-8 which is also the encoding used for all
-# text before the first occurrence of this tag. Doxygen uses libiconv (or the
-# iconv built into libc) for the transcoding. See
-# http://www.gnu.org/software/libiconv for the list of possible encodings.
-
-DOXYFILE_ENCODING      = UTF-8
-
-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
-# by quotes) that should identify the project.
-
-PROJECT_NAME           =
-
-# The PROJECT_NUMBER tag can be used to enter a project or revision number.
-# This could be handy for archiving the generated documentation or
-# if some version control system is used.
-
-PROJECT_NUMBER         =
-
-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
-# base path where the generated documentation will be put.
-# If a relative path is entered, it will be relative to the location
-# where doxygen was started. If left blank the current directory will be used.
-
-OUTPUT_DIRECTORY       = doxy
-
-# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
-# 4096 sub-directories (in 2 levels) under the output directory of each output
-# format and will distribute the generated files over these directories.
-# Enabling this option can be useful when feeding doxygen a huge amount of
-# source files, where putting all generated files in the same directory would
-# otherwise cause performance problems for the file system.
-
-CREATE_SUBDIRS         = NO
-
-# The OUTPUT_LANGUAGE tag is used to specify the language in which all
-# documentation generated by doxygen is written. Doxygen will use this
-# information to generate all constant output in the proper language.
-# The default language is English, other supported languages are:
-# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
-# Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German,
-# Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English
-# messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian,
-# Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrilic, Slovak,
-# Slovene, Spanish, Swedish, Ukrainian, and Vietnamese.
-
-OUTPUT_LANGUAGE        = English
-
-# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
-# include brief member descriptions after the members that are listed in
-# the file and class documentation (similar to JavaDoc).
-# Set to NO to disable this.
-
-BRIEF_MEMBER_DESC      = YES
-
-# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
-# the brief description of a member or function before the detailed description.
-# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
-# brief descriptions will be completely suppressed.
-
-REPEAT_BRIEF           = YES
-
-# This tag implements a quasi-intelligent brief description abbreviator
-# that is used to form the text in various listings. Each string
-# in this list, if found as the leading text of the brief description, will be
-# stripped from the text and the result after processing the whole list, is
-# used as the annotated text. Otherwise, the brief description is used as-is.
-# If left blank, the following values are used ("$name" is automatically
-# replaced with the name of the entity): "The $name class" "The $name widget"
-# "The $name file" "is" "provides" "specifies" "contains"
-# "represents" "a" "an" "the"
-
-ABBREVIATE_BRIEF       =
-
-# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
-# Doxygen will generate a detailed section even if there is only a brief
-# description.
-
-ALWAYS_DETAILED_SEC    = YES
-
-# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
-# inherited members of a class in the documentation of that class as if those
-# members were ordinary class members. Constructors, destructors and assignment
-# operators of the base classes will not be shown.
-
-INLINE_INHERITED_MEMB  = YES
-
-# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
-# path before files name in the file list and in the header files. If set
-# to NO the shortest path that makes the file name unique will be used.
-
-FULL_PATH_NAMES        = NO
-
-# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
-# can be used to strip a user-defined part of the path. Stripping is
-# only done if one of the specified strings matches the left-hand part of
-# the path. The tag can be used to show relative paths in the file list.
-# If left blank the directory from which doxygen is run is used as the
-# path to strip.
-
-STRIP_FROM_PATH        =
-
-# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
-# the path mentioned in the documentation of a class, which tells
-# the reader which header file to include in order to use a class.
-# If left blank only the name of the header file containing the class
-# definition is used. Otherwise one should specify the include paths that
-# are normally passed to the compiler using the -I flag.
-
-STRIP_FROM_INC_PATH    =
-
-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
-# (but less readable) file names. This can be useful is your file systems
-# doesn't support long names like on DOS, Mac, or CD-ROM.
-
-SHORT_NAMES            = NO
-
-# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
-# will interpret the first line (until the first dot) of a JavaDoc-style
-# comment as the brief description. If set to NO, the JavaDoc
-# comments will behave just like regular Qt-style comments
-# (thus requiring an explicit @brief command for a brief description.)
-
-JAVADOC_AUTOBRIEF      = YES
-
-# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
-# interpret the first line (until the first dot) of a Qt-style
-# comment as the brief description. If set to NO, the comments
-# will behave just like regular Qt-style comments (thus requiring
-# an explicit \brief command for a brief description.)
-
-QT_AUTOBRIEF           = NO
-
-# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
-# treat a multi-line C++ special comment block (i.e. a block of //! or ///
-# comments) as a brief description. This used to be the default behaviour.
-# The new default is to treat a multi-line C++ comment block as a detailed
-# description. Set this tag to YES if you prefer the old behaviour instead.
-
-MULTILINE_CPP_IS_BRIEF = NO
-
-# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
-# member inherits the documentation from any documented member that it
-# re-implements.
-
-INHERIT_DOCS           = YES
-
-# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
-# a new page for each member. If set to NO, the documentation of a member will
-# be part of the file/class/namespace that contains it.
-
-SEPARATE_MEMBER_PAGES  = NO
-
-# The TAB_SIZE tag can be used to set the number of spaces in a tab.
-# Doxygen uses this value to replace tabs by spaces in code fragments.
-
-TAB_SIZE               = 4
-
-# This tag can be used to specify a number of aliases that acts
-# as commands in the documentation. An alias has the form "name=value".
-# For example adding "sideeffect=\par Side Effects:\n" will allow you to
-# put the command \sideeffect (or @sideeffect) in the documentation, which
-# will result in a user-defined paragraph with heading "Side Effects:".
-# You can put \n's in the value part of an alias to insert newlines.
-
-ALIASES                =
-
-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
-# sources only. Doxygen will then generate output that is more tailored for C.
-# For instance, some of the names that are used will be different. The list
-# of all members will be omitted, etc.
-
-OPTIMIZE_OUTPUT_FOR_C  = YES
-
-# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
-# sources only. Doxygen will then generate output that is more tailored for
-# Java. For instance, namespaces will be presented as packages, qualified
-# scopes will look different, etc.
-
-OPTIMIZE_OUTPUT_JAVA   = NO
-
-# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
-# sources only. Doxygen will then generate output that is more tailored for
-# Fortran.
-
-OPTIMIZE_FOR_FORTRAN   = NO
-
-# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
-# sources. Doxygen will then generate output that is tailored for
-# VHDL.
-
-OPTIMIZE_OUTPUT_VHDL   = NO
-
-# Doxygen selects the parser to use depending on the extension of the files it parses.
-# With this tag you can assign which parser to use for a given extension.
-# Doxygen has a built-in mapping, but you can override or extend it using this tag.
-# The format is ext=language, where ext is a file extension, and language is one of
-# the parsers supported by doxygen: IDL, Java, Javascript, C#, C, C++, D, PHP,
-# Objective-C, Python, Fortran, VHDL, C, C++. For instance to make doxygen treat
-# .inc files as Fortran files (default is PHP), and .f files as C (default is Fortran),
-# use: inc=Fortran f=C. Note that for custom extensions you also need to set FILE_PATTERNS otherwise the files are not read by doxygen.
-
-EXTENSION_MAPPING      =
-
-# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
-# to include (a tag file for) the STL sources as input, then you should
-# set this tag to YES in order to let doxygen match functions declarations and
-# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
-# func(std::string) {}). This also make the inheritance and collaboration
-# diagrams that involve STL classes more complete and accurate.
-
-BUILTIN_STL_SUPPORT    = NO
-
-# If you use Microsoft's C++/CLI language, you should set this option to YES to
-# enable parsing support.
-
-CPP_CLI_SUPPORT        = NO
-
-# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
-# Doxygen will parse them like normal C++ but will assume all classes use public
-# instead of private inheritance when no explicit protection keyword is present.
-
-SIP_SUPPORT            = NO
-
-# For Microsoft's IDL there are propget and propput attributes to indicate getter
-# and setter methods for a property. Setting this option to YES (the default)
-# will make doxygen to replace the get and set methods by a property in the
-# documentation. This will only work if the methods are indeed getting or
-# setting a simple type. If this is not the case, or you want to show the
-# methods anyway, you should set this option to NO.
-
-IDL_PROPERTY_SUPPORT   = YES
-
-# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
-# tag is set to YES, then doxygen will reuse the documentation of the first
-# member in the group (if any) for the other members of the group. By default
-# all members of a group must be documented explicitly.
-
-DISTRIBUTE_GROUP_DOC   = NO
-
-# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
-# the same type (for instance a group of public functions) to be put as a
-# subgroup of that type (e.g. under the Public Functions section). Set it to
-# NO to prevent subgrouping. Alternatively, this can be done per class using
-# the \nosubgrouping command.
-
-SUBGROUPING            = YES
-
-# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
-# is documented as struct, union, or enum with the name of the typedef. So
-# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
-# with name TypeT. When disabled the typedef will appear as a member of a file,
-# namespace, or class. And the struct will be named TypeS. This can typically
-# be useful for C code in case the coding convention dictates that all compound
-# types are typedef'ed and only the typedef is referenced, never the tag name.
-
-TYPEDEF_HIDES_STRUCT   = NO
-
-# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to
-# determine which symbols to keep in memory and which to flush to disk.
-# When the cache is full, less often used symbols will be written to disk.
-# For small to medium size projects (<1000 input files) the default value is
-# probably good enough. For larger projects a too small cache size can cause
-# doxygen to be busy swapping symbols to and from disk most of the time
-# causing a significant performance penality.
-# If the system has enough physical memory increasing the cache will improve the
-# performance by keeping more symbols in memory. Note that the value works on
-# a logarithmic scale so increasing the size by one will rougly double the
-# memory usage. The cache size is given by this formula:
-# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0,
-# corresponding to a cache size of 2^16 = 65536 symbols
-
-SYMBOL_CACHE_SIZE      = 0
-
-#---------------------------------------------------------------------------
-# Build related configuration options
-#---------------------------------------------------------------------------
-
-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
-# documentation are documented, even if no documentation was available.
-# Private class members and static file members will be hidden unless
-# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
-
-EXTRACT_ALL            = NO
-
-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
-# will be included in the documentation.
-
-EXTRACT_PRIVATE        = NO
-
-# If the EXTRACT_STATIC tag is set to YES all static members of a file
-# will be included in the documentation.
-
-EXTRACT_STATIC         = YES
-
-# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
-# defined locally in source files will be included in the documentation.
-# If set to NO only classes defined in header files are included.
-
-EXTRACT_LOCAL_CLASSES  = NO
-
-# This flag is only useful for Objective-C code. When set to YES local
-# methods, which are defined in the implementation section but not in
-# the interface are included in the documentation.
-# If set to NO (the default) only methods in the interface are included.
-
-EXTRACT_LOCAL_METHODS  = NO
-
-# If this flag is set to YES, the members of anonymous namespaces will be
-# extracted and appear in the documentation as a namespace called
-# 'anonymous_namespace{file}', where file will be replaced with the base
-# name of the file that contains the anonymous namespace. By default
-# anonymous namespace are hidden.
-
-EXTRACT_ANON_NSPACES   = YES
-
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
-# undocumented members of documented classes, files or namespaces.
-# If set to NO (the default) these members will be included in the
-# various overviews, but no documentation section is generated.
-# This option has no effect if EXTRACT_ALL is enabled.
-
-HIDE_UNDOC_MEMBERS     = YES
-
-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
-# undocumented classes that are normally visible in the class hierarchy.
-# If set to NO (the default) these classes will be included in the various
-# overviews. This option has no effect if EXTRACT_ALL is enabled.
-
-HIDE_UNDOC_CLASSES     = YES
-
-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
-# friend (class|struct|union) declarations.
-# If set to NO (the default) these declarations will be included in the
-# documentation.
-
-HIDE_FRIEND_COMPOUNDS  = NO
-
-# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
-# documentation blocks found inside the body of a function.
-# If set to NO (the default) these blocks will be appended to the
-# function's detailed documentation block.
-
-HIDE_IN_BODY_DOCS      = NO
-
-# The INTERNAL_DOCS tag determines if documentation
-# that is typed after a \internal command is included. If the tag is set
-# to NO (the default) then the documentation will be excluded.
-# Set it to YES to include the internal documentation.
-
-INTERNAL_DOCS          = NO
-
-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
-# file names in lower-case letters. If set to YES upper-case letters are also
-# allowed. This is useful if you have classes or files whose names only differ
-# in case and if your file system supports case sensitive file names. Windows
-# and Mac users are advised to set this option to NO.
-
-CASE_SENSE_NAMES       = YES
-
-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
-# will show members with their full class and namespace scopes in the
-# documentation. If set to YES the scope will be hidden.
-
-HIDE_SCOPE_NAMES       = YES
-
-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
-# will put a list of the files that are included by a file in the documentation
-# of that file.
-
-SHOW_INCLUDE_FILES     = YES
-
-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
-# is inserted in the documentation for inline members.
-
-INLINE_INFO            =  NO
-
-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
-# will sort the (detailed) documentation of file and class members
-# alphabetically by member name. If set to NO the members will appear in
-# declaration order.
-
-SORT_MEMBER_DOCS       = YES
-
-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
-# brief documentation of file, namespace and class members alphabetically
-# by member name. If set to NO (the default) the members will appear in
-# declaration order.
-
-SORT_BRIEF_DOCS        = NO
-
-# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the (brief and detailed) documentation of class members so that constructors and destructors are listed first. If set to NO (the default) the constructors will appear in the respective orders defined by SORT_MEMBER_DOCS and SORT_BRIEF_DOCS. This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO.
-
-SORT_MEMBERS_CTORS_1ST = NO
-
-# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
-# hierarchy of group names into alphabetical order. If set to NO (the default)
-# the group names will appear in their defined order.
-
-SORT_GROUP_NAMES       = NO
-
-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
-# sorted by fully-qualified names, including namespaces. If set to
-# NO (the default), the class list will be sorted only by class name,
-# not including the namespace part.
-# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
-# Note: This option applies only to the class list, not to the
-# alphabetical list.
-
-SORT_BY_SCOPE_NAME     = NO
-
-# The GENERATE_TODOLIST tag can be used to enable (YES) or
-# disable (NO) the todo list. This list is created by putting \todo
-# commands in the documentation.
-
-GENERATE_TODOLIST      = NO
-
-# The GENERATE_TESTLIST tag can be used to enable (YES) or
-# disable (NO) the test list. This list is created by putting \test
-# commands in the documentation.
-
-GENERATE_TESTLIST      = NO
-
-# The GENERATE_BUGLIST tag can be used to enable (YES) or
-# disable (NO) the bug list. This list is created by putting \bug
-# commands in the documentation.
-
-GENERATE_BUGLIST       = NO
-
-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
-# disable (NO) the deprecated list. This list is created by putting
-# \deprecated commands in the documentation.
-
-GENERATE_DEPRECATEDLIST= NO
-
-# The ENABLED_SECTIONS tag can be used to enable conditional
-# documentation sections, marked by \if sectionname ... \endif.
-
-ENABLED_SECTIONS       =
-
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
-# the initial value of a variable or define consists of for it to appear in
-# the documentation. If the initializer consists of more lines than specified
-# here it will be hidden. Use a value of 0 to hide initializers completely.
-# The appearance of the initializer of individual variables and defines in the
-# documentation can be controlled using \showinitializer or \hideinitializer
-# command in the documentation regardless of this setting.
-
-MAX_INITIALIZER_LINES  = 30
-
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
-# at the bottom of the documentation of classes and structs. If set to YES the
-# list will mention the files that were used to generate the documentation.
-
-SHOW_USED_FILES        = NO
-
-# If the sources in your project are distributed over multiple directories
-# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
-# in the documentation. The default is NO.
-
-SHOW_DIRECTORIES       = NO
-
-# Set the SHOW_FILES tag to NO to disable the generation of the Files page.
-# This will remove the Files entry from the Quick Index and from the
-# Folder Tree View (if specified). The default is YES.
-
-SHOW_FILES             = YES
-
-# Set the SHOW_NAMESPACES tag to NO to disable the generation of the
-# Namespaces page.
-# This will remove the Namespaces entry from the Quick Index
-# and from the Folder Tree View (if specified). The default is YES.
-
-SHOW_NAMESPACES        = YES
-
-# The FILE_VERSION_FILTER tag can be used to specify a program or script that
-# doxygen should invoke to get the current version for each file (typically from
-# the version control system). Doxygen will invoke the program by executing (via
-# popen()) the command <command> <input-file>, where <command> is the value of
-# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
-# provided by doxygen. Whatever the program writes to standard output
-# is used as the file version. See the manual for examples.
-
-FILE_VERSION_FILTER    =
-
-# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed by
-# doxygen. The layout file controls the global structure of the generated output files
-# in an output format independent way. The create the layout file that represents
-# doxygen's defaults, run doxygen with the -l option. You can optionally specify a
-# file name after the option, if omitted DoxygenLayout.xml will be used as the name
-# of the layout file.
-
-LAYOUT_FILE            =
-
-#---------------------------------------------------------------------------
-# configuration options related to warning and progress messages
-#---------------------------------------------------------------------------
-
-# The QUIET tag can be used to turn on/off the messages that are generated
-# by doxygen. Possible values are YES and NO. If left blank NO is used.
-
-QUIET                  = YES
-
-# The WARNINGS tag can be used to turn on/off the warning messages that are
-# generated by doxygen. Possible values are YES and NO. If left blank
-# NO is used.
-
-WARNINGS               = YES
-
-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
-# automatically be disabled.
-
-WARN_IF_UNDOCUMENTED   = YES
-
-# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
-# potential errors in the documentation, such as not documenting some
-# parameters in a documented function, or documenting parameters that
-# don't exist or using markup commands wrongly.
-
-WARN_IF_DOC_ERROR      = YES
-
-# This WARN_NO_PARAMDOC option can be abled to get warnings for
-# functions that are documented, but have no documentation for their parameters
-# or return value. If set to NO (the default) doxygen will only warn about
-# wrong or incomplete parameter documentation, but not about the absence of
-# documentation.
-
-WARN_NO_PARAMDOC       = NO
-
-# The WARN_FORMAT tag determines the format of the warning messages that
-# doxygen can produce. The string should contain the $file, $line, and $text
-# tags, which will be replaced by the file and line number from which the
-# warning originated and the warning text. Optionally the format may contain
-# $version, which will be replaced by the version of the file (if it could
-# be obtained via FILE_VERSION_FILTER)
-
-WARN_FORMAT            = "$file:$line: $text"
-
-# The WARN_LOGFILE tag can be used to specify a file to which warning
-# and error messages should be written. If left blank the output is written
-# to stderr.
-
-WARN_LOGFILE           =
-
-#---------------------------------------------------------------------------
-# configuration options related to the input files
-#---------------------------------------------------------------------------
-
-# The INPUT tag can be used to specify the files and/or directories that contain
-# documented source files. You may enter file names like "myfile.cpp" or
-# directories like "/usr/src/myproject". Separate the files or directories
-# with spaces.
-
-INPUT                  = $(DOX_INPUT_DIR)
-
-# This tag can be used to specify the character encoding of the source files
-# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
-# also the default input encoding. Doxygen uses libiconv (or the iconv built
-# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for
-# the list of possible encodings.
-
-INPUT_ENCODING         = UTF-8
-
-# If the value of the INPUT tag contains directories, you can use the
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank the following patterns are tested:
-# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
-# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
-
-FILE_PATTERNS          =
-
-# The RECURSIVE tag can be used to turn specify whether or not subdirectories
-# should be searched for input files as well. Possible values are YES and NO.
-# If left blank NO is used.
-
-RECURSIVE              = YES
-
-# The EXCLUDE tag can be used to specify files and/or directories that should
-# excluded from the INPUT source files. This way you can easily exclude a
-# subdirectory from a directory tree whose root is specified with the INPUT tag.
-
-EXCLUDE                =
-
-# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
-# directories that are symbolic links (a Unix filesystem feature) are excluded
-# from the input.
-
-EXCLUDE_SYMLINKS       = YES
-
-# If the value of the INPUT tag contains directories, you can use the
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
-# certain files from those directories. Note that the wildcards are matched
-# against the file with absolute path, so to exclude all test directories
-# for example use the pattern */test/*
-
-EXCLUDE_PATTERNS       = */TARGET_*/*
-
-# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
-# (namespaces, classes, functions, etc.) that should be excluded from the
-# output. The symbol name can be a fully qualified name, a word, or if the
-# wildcard * is used, a substring. Examples: ANamespace, AClass,
-# AClass::ANamespace, ANamespace::*Test
-
-EXCLUDE_SYMBOLS        =
-
-# The EXAMPLE_PATH tag can be used to specify one or more files or
-# directories that contain example code fragments that are included (see
-# the \include command).
-
-EXAMPLE_PATH           =
-
-# If the value of the EXAMPLE_PATH tag contains directories, you can use the
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank all files are included.
-
-EXAMPLE_PATTERNS       =
-
-# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
-# searched for input files to be used with the \include or \dontinclude
-# commands irrespective of the value of the RECURSIVE tag.
-# Possible values are YES and NO. If left blank NO is used.
-
-EXAMPLE_RECURSIVE      = NO
-
-# The IMAGE_PATH tag can be used to specify one or more files or
-# directories that contain image that are included in the documentation (see
-# the \image command).
-
-IMAGE_PATH             = 
-
-# The INPUT_FILTER tag can be used to specify a program that doxygen should
-# invoke to filter for each input file. Doxygen will invoke the filter program
-# by executing (via popen()) the command <filter> <input-file>, where <filter>
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
-# input file. Doxygen will then use the output that the filter program writes
-# to standard output.
-# If FILTER_PATTERNS is specified, this tag will be
-# ignored.
-
-INPUT_FILTER           =
-
-# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
-# basis.
-# Doxygen will compare the file name with each pattern and apply the
-# filter if there is a match.
-# The filters are a list of the form:
-# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
-# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
-# is applied to all files.
-
-FILTER_PATTERNS        =
-
-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
-# INPUT_FILTER) will be used to filter the input files when producing source
-# files to browse (i.e. when SOURCE_BROWSER is set to YES).
-
-FILTER_SOURCE_FILES    = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to source browsing
-#---------------------------------------------------------------------------
-
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will
-# be generated. Documented entities will be cross-referenced with these sources.
-# Note: To get rid of all source code in the generated output, make sure also
-# VERBATIM_HEADERS is set to NO.
-
-SOURCE_BROWSER         = YES
-
-# Setting the INLINE_SOURCES tag to YES will include the body
-# of functions and classes directly in the documentation.
-
-INLINE_SOURCES         = NO
-
-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
-# doxygen to hide any special comment blocks from generated source code
-# fragments. Normal C and C++ comments will always remain visible.
-
-STRIP_CODE_COMMENTS    = NO
-
-# If the REFERENCED_BY_RELATION tag is set to YES
-# then for each documented function all documented
-# functions referencing it will be listed.
-
-REFERENCED_BY_RELATION = NO
-
-# If the REFERENCES_RELATION tag is set to YES
-# then for each documented function all documented entities
-# called/used by that function will be listed.
-
-REFERENCES_RELATION    = NO
-
-# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
-# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
-# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
-# link to the source code.
-# Otherwise they will link to the documentation.
-
-REFERENCES_LINK_SOURCE = NO
-
-# If the USE_HTAGS tag is set to YES then the references to source code
-# will point to the HTML generated by the htags(1) tool instead of doxygen
-# built-in source browser. The htags tool is part of GNU's global source
-# tagging system (see http://www.gnu.org/software/global/global.html). You
-# will need version 4.8.6 or higher.
-
-USE_HTAGS              = NO
-
-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
-# will generate a verbatim copy of the header file for each class for
-# which an include is specified. Set to NO to disable this.
-
-VERBATIM_HEADERS       = YES
-
-#---------------------------------------------------------------------------
-# configuration options related to the alphabetical class index
-#---------------------------------------------------------------------------
-
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
-# of all compounds will be generated. Enable this if the project
-# contains a lot of classes, structs, unions or interfaces.
-
-ALPHABETICAL_INDEX     = NO
-
-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
-# in which this list will be split (can be a number in the range [1..20])
-
-COLS_IN_ALPHA_INDEX    = 5
-
-# In case all classes in a project start with a common prefix, all
-# classes will be put under the same header in the alphabetical index.
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
-# should be ignored while generating the index headers.
-
-IGNORE_PREFIX          =
-
-#---------------------------------------------------------------------------
-# configuration options related to the HTML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
-# generate HTML output.
-
-GENERATE_HTML          = YES
-
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `html' will be used as the default path.
-
-HTML_OUTPUT            = html
-
-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
-# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
-# doxygen will generate files with .html extension.
-
-HTML_FILE_EXTENSION    = .html
-
-# The HTML_HEADER tag can be used to specify a personal HTML header for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard header.
-
-
-# The HTML_FOOTER tag can be used to specify a personal HTML footer for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard footer.
-
-
-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
-# style sheet that is used by each HTML page. It can be used to
-# fine-tune the look of the HTML output. If the tag is left blank doxygen
-# will generate a default style sheet. Note that doxygen will try to copy
-# the style sheet file to the HTML output directory, so don't put your own
-# stylesheet in the HTML output directory as well, or it will be erased!
-
-HTML_STYLESHEET        =
-
-# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
-# files or namespaces will be aligned in HTML using tables. If set to
-# NO a bullet list will be used.
-
-HTML_ALIGN_MEMBERS     = YES
-
-# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
-# documentation will contain sections that can be hidden and shown after the
-# page has loaded. For this to work a browser that supports
-# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
-# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
-
-HTML_DYNAMIC_SECTIONS  = NO
-
-# If the GENERATE_DOCSET tag is set to YES, additional index files
-# will be generated that can be used as input for Apple's Xcode 3
-# integrated development environment, introduced with OSX 10.5 (Leopard).
-# To create a documentation set, doxygen will generate a Makefile in the
-# HTML output directory. Running make will produce the docset in that
-# directory and running "make install" will install the docset in
-# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find
-# it at startup.
-# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html for more information.
-
-GENERATE_DOCSET        = NO
-
-# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
-# feed. A documentation feed provides an umbrella under which multiple
-# documentation sets from a single provider (such as a company or product suite)
-# can be grouped.
-
-DOCSET_FEEDNAME        = "Doxygen generated docs"
-
-# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
-# should uniquely identify the documentation set bundle. This should be a
-# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen
-# will append .docset to the name.
-
-DOCSET_BUNDLE_ID       = org.doxygen.Project
-
-# If the GENERATE_HTMLHELP tag is set to YES, additional index files
-# will be generated that can be used as input for tools like the
-# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)
-# of the generated HTML documentation.
-
-GENERATE_HTMLHELP      = NO
-
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
-# be used to specify the file name of the resulting .chm file. You
-# can add a path in front of the file if the result should not be
-# written to the html output directory.
-
-CHM_FILE               =
-
-# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
-# be used to specify the location (absolute path including file name) of
-# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
-# the HTML help compiler on the generated index.hhp.
-
-HHC_LOCATION           =
-
-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
-# controls if a separate .chi index file is generated (YES) or that
-# it should be included in the master .chm file (NO).
-
-GENERATE_CHI           = NO
-
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING
-# is used to encode HtmlHelp index (hhk), content (hhc) and project file
-# content.
-
-CHM_INDEX_ENCODING     =
-
-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
-# controls whether a binary table of contents is generated (YES) or a
-# normal table of contents (NO) in the .chm file.
-
-BINARY_TOC             = NO
-
-# The TOC_EXPAND flag can be set to YES to add extra items for group members
-# to the contents of the HTML help documentation and to the tree view.
-
-TOC_EXPAND             = NO
-
-# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and QHP_VIRTUAL_FOLDER
-# are set, an additional index file will be generated that can be used as input for
-# Qt's qhelpgenerator to generate a Qt Compressed Help (.qch) of the generated
-# HTML documentation.
-
-GENERATE_QHP           = NO
-
-# If the QHG_LOCATION tag is specified, the QCH_FILE tag can
-# be used to specify the file name of the resulting .qch file.
-# The path specified is relative to the HTML output folder.
-
-QCH_FILE               =
-
-# The QHP_NAMESPACE tag specifies the namespace to use when generating
-# Qt Help Project output. For more information please see
-# http://doc.trolltech.com/qthelpproject.html#namespace
-
-QHP_NAMESPACE          =
-
-# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating
-# Qt Help Project output. For more information please see
-# http://doc.trolltech.com/qthelpproject.html#virtual-folders
-
-QHP_VIRTUAL_FOLDER     = doc
-
-# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to add.
-# For more information please see
-# http://doc.trolltech.com/qthelpproject.html#custom-filters
-
-QHP_CUST_FILTER_NAME   =
-
-# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the custom filter to add.For more information please see
-# <a href="http://doc.trolltech.com/qthelpproject.html#custom-filters">Qt Help Project / Custom Filters</a>.
-
-QHP_CUST_FILTER_ATTRS  =
-
-# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this project's
-# filter section matches.
-# <a href="http://doc.trolltech.com/qthelpproject.html#filter-attributes">Qt Help Project / Filter Attributes</a>.
-
-QHP_SECT_FILTER_ATTRS  =
-
-# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can
-# be used to specify the location of Qt's qhelpgenerator.
-# If non-empty doxygen will try to run qhelpgenerator on the generated
-# .qhp file.
-
-QHG_LOCATION           =
-
-# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
-# top of each HTML page. The value NO (the default) enables the index and
-# the value YES disables it.
-
-DISABLE_INDEX          =  YES
-
-# This tag can be used to set the number of enum values (range [1..20])
-# that doxygen will group on one line in the generated HTML documentation.
-
-ENUM_VALUES_PER_LINE   = 4
-
-# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
-# structure should be generated to display hierarchical information.
-# If the tag value is set to YES, a side panel will be generated
-# containing a tree-like index structure (just like the one that
-# is generated for HTML Help). For this to work a browser that supports
-# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser).
-# Windows users are probably better off using the HTML help feature.
-
-GENERATE_TREEVIEW      = NO
-
-# By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories,
-# and Class Hierarchy pages using a tree view instead of an ordered list.
-
-USE_INLINE_TREES       = YES
-
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
-# used to set the initial width (in pixels) of the frame in which the tree
-# is shown.
-
-TREEVIEW_WIDTH         = 250
-
-# Use this tag to change the font size of Latex formulas included
-# as images in the HTML documentation. The default is 10. Note that
-# when you change the font size after a successful doxygen run you need
-# to manually remove any form_*.png images from the HTML output directory
-# to force them to be regenerated.
-
-FORMULA_FONTSIZE       = 10
-
-# When the SEARCHENGINE tag is enable doxygen will generate a search box for the HTML output. The underlying search engine uses javascript
-# and DHTML and should work on any modern browser. Note that when using HTML help (GENERATE_HTMLHELP) or Qt help (GENERATE_QHP)
-# there is already a search function so this one should typically
-# be disabled.
-
-SEARCHENGINE           = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the LaTeX output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
-# generate Latex output.
-
-GENERATE_LATEX         = NO
-
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `latex' will be used as the default path.
-
-LATEX_OUTPUT           = latex
-
-# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
-# invoked. If left blank `latex' will be used as the default command name.
-
-LATEX_CMD_NAME         = latex
-
-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
-# generate index for LaTeX. If left blank `makeindex' will be used as the
-# default command name.
-
-MAKEINDEX_CMD_NAME     = makeindex
-
-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
-# LaTeX documents. This may be useful for small projects and may help to
-# save some trees in general.
-
-COMPACT_LATEX          = NO
-
-# The PAPER_TYPE tag can be used to set the paper type that is used
-# by the printer. Possible values are: a4, a4wide, letter, legal and
-# executive. If left blank a4wide will be used.
-
-PAPER_TYPE             = a4wide
-
-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
-# packages that should be included in the LaTeX output.
-
-EXTRA_PACKAGES         =
-
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
-# the generated latex document. The header should contain everything until
-# the first chapter. If it is left blank doxygen will generate a
-# standard header. Notice: only use this tag if you know what you are doing!
-
-LATEX_HEADER           =
-
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will
-# contain links (just like the HTML output) instead of page references
-# This makes the output suitable for online browsing using a pdf viewer.
-
-PDF_HYPERLINKS         = YES
-
-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
-# plain latex in the generated Makefile. Set this option to YES to get a
-# higher quality PDF documentation.
-
-USE_PDFLATEX           = YES
-
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
-# command to the generated LaTeX files. This will instruct LaTeX to keep
-# running if errors occur, instead of asking the user for help.
-# This option is also used when generating formulas in HTML.
-
-LATEX_BATCHMODE        = NO
-
-# If LATEX_HIDE_INDICES is set to YES then doxygen will not
-# include the index chapters (such as File Index, Compound Index, etc.)
-# in the output.
-
-LATEX_HIDE_INDICES     = NO
-
-# If LATEX_SOURCE_CODE is set to YES then doxygen will include source code with syntax highlighting in the LaTeX output. Note that which sources are shown also depends on other settings such as SOURCE_BROWSER.
-
-LATEX_SOURCE_CODE      = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the RTF output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
-# The RTF output is optimized for Word 97 and may not look very pretty with
-# other RTF readers or editors.
-
-GENERATE_RTF           = NO
-
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `rtf' will be used as the default path.
-
-RTF_OUTPUT             = rtf
-
-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
-# RTF documents. This may be useful for small projects and may help to
-# save some trees in general.
-
-COMPACT_RTF            = NO
-
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
-# will contain hyperlink fields. The RTF file will
-# contain links (just like the HTML output) instead of page references.
-# This makes the output suitable for online browsing using WORD or other
-# programs which support those fields.
-# Note: wordpad (write) and others do not support links.
-
-RTF_HYPERLINKS         = NO
-
-# Load stylesheet definitions from file. Syntax is similar to doxygen's
-# config file, i.e. a series of assignments. You only have to provide
-# replacements, missing definitions are set to their default value.
-
-RTF_STYLESHEET_FILE    =
-
-# Set optional variables used in the generation of an rtf document.
-# Syntax is similar to doxygen's config file.
-
-RTF_EXTENSIONS_FILE    =
-
-#---------------------------------------------------------------------------
-# configuration options related to the man page output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
-# generate man pages
-
-GENERATE_MAN           = NO
-
-# The MAN_OUTPUT tag is used to specify where the man pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `man' will be used as the default path.
-
-MAN_OUTPUT             = man
-
-# The MAN_EXTENSION tag determines the extension that is added to
-# the generated man pages (default is the subroutine's section .3)
-
-MAN_EXTENSION          = .3
-
-# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
-# then it will generate one additional man file for each entity
-# documented in the real man page(s). These additional files
-# only source the real man page, but without them the man command
-# would be unable to find the correct page. The default is NO.
-
-MAN_LINKS              = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the XML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_XML tag is set to YES Doxygen will
-# generate an XML file that captures the structure of
-# the code including all documentation.
-
-GENERATE_XML           = YES
-
-# The XML_OUTPUT tag is used to specify where the XML pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `xml' will be used as the default path.
-
-XML_OUTPUT             = xml
-
-# The XML_SCHEMA tag can be used to specify an XML schema,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
-
-XML_SCHEMA             =
-
-# The XML_DTD tag can be used to specify an XML DTD,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
-
-XML_DTD                =
-
-# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
-# dump the program listings (including syntax highlighting
-# and cross-referencing information) to the XML output. Note that
-# enabling this will significantly increase the size of the XML output.
-
-XML_PROGRAMLISTING     = YES
-
-#---------------------------------------------------------------------------
-# configuration options for the AutoGen Definitions output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
-# generate an AutoGen Definitions (see autogen.sf.net) file
-# that captures the structure of the code including all
-# documentation. Note that this feature is still experimental
-# and incomplete at the moment.
-
-GENERATE_AUTOGEN_DEF   = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the Perl module output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_PERLMOD tag is set to YES Doxygen will
-# generate a Perl module file that captures the structure of
-# the code including all documentation. Note that this
-# feature is still experimental and incomplete at the
-# moment.
-
-GENERATE_PERLMOD       = NO
-
-# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
-# the necessary Makefile rules, Perl scripts and LaTeX code to be able
-# to generate PDF and DVI output from the Perl module output.
-
-PERLMOD_LATEX          = NO
-
-# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
-# nicely formatted so it can be parsed by a human reader.
-# This is useful
-# if you want to understand what is going on.
-# On the other hand, if this
-# tag is set to NO the size of the Perl module output will be much smaller
-# and Perl will parse it just the same.
-
-PERLMOD_PRETTY         = YES
-
-# The names of the make variables in the generated doxyrules.make file
-# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
-# This is useful so different doxyrules.make files included by the same
-# Makefile don't overwrite each other's variables.
-
-PERLMOD_MAKEVAR_PREFIX =
-
-#---------------------------------------------------------------------------
-# Configuration options related to the preprocessor
-#---------------------------------------------------------------------------
-
-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
-# evaluate all C-preprocessor directives found in the sources and include
-# files.
-
-ENABLE_PREPROCESSING   = NO
-
-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
-# names in the source code. If set to NO (the default) only conditional
-# compilation will be performed. Macro expansion can be done in a controlled
-# way by setting EXPAND_ONLY_PREDEF to YES.
-
-MACRO_EXPANSION        = NO
-
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
-# then the macro expansion is limited to the macros specified with the
-# PREDEFINED and EXPAND_AS_DEFINED tags.
-
-EXPAND_ONLY_PREDEF     = NO
-
-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
-# in the INCLUDE_PATH (see below) will be search if a #include is found.
-
-SEARCH_INCLUDES        = NO
-
-# The INCLUDE_PATH tag can be used to specify one or more directories that
-# contain include files that are not input files but should be processed by
-# the preprocessor.
-
-INCLUDE_PATH           =
-
-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
-# patterns (like *.h and *.hpp) to filter out the header-files in the
-# directories. If left blank, the patterns specified with FILE_PATTERNS will
-# be used.
-
-INCLUDE_FILE_PATTERNS  =
-
-# The PREDEFINED tag can be used to specify one or more macro names that
-# are defined before the preprocessor is started (similar to the -D option of
-# gcc). The argument of the tag is a list of macros of the form: name
-# or name=definition (no spaces). If the definition and the = are
-# omitted =1 is assumed. To prevent a macro definition from being
-# undefined via #undef or recursively expanded use the := operator
-# instead of the = operator.
-
-PREDEFINED             = DOXYGEN_ONLY
-
-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
-# this tag can be used to specify a list of macro names that should be expanded.
-# The macro definition that is found in the sources will be used.
-# Use the PREDEFINED tag if you want to use a different macro definition.
-
-EXPAND_AS_DEFINED      =
-
-# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
-# doxygen's preprocessor will remove all function-like macros that are alone
-# on a line, have an all uppercase name, and do not end with a semicolon. Such
-# function macros are typically used for boiler-plate code, and will confuse
-# the parser if not removed.
-
-SKIP_FUNCTION_MACROS   = YES
-
-#---------------------------------------------------------------------------
-# Configuration::additions related to external references
-#---------------------------------------------------------------------------
-
-# The TAGFILES option can be used to specify one or more tagfiles.
-# Optionally an initial location of the external documentation
-# can be added for each tagfile. The format of a tag file without
-# this location is as follows:
-#
-# TAGFILES = file1 file2 ...
-# Adding location for the tag files is done as follows:
-#
-# TAGFILES = file1=loc1 "file2 = loc2" ...
-# where "loc1" and "loc2" can be relative or absolute paths or
-# URLs. If a location is present for each tag, the installdox tool
-# does not have to be run to correct the links.
-# Note that each tag file must have a unique name
-# (where the name does NOT include the path)
-# If a tag file is not located in the directory in which doxygen
-# is run, you must also specify the path to the tagfile here.
-
-TAGFILES               =
-
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create
-# a tag file that is based on the input files it reads.
-
-GENERATE_TAGFILE       =
-
-# If the ALLEXTERNALS tag is set to YES all external classes will be listed
-# in the class index. If set to NO only the inherited external classes
-# will be listed.
-
-ALLEXTERNALS           = NO
-
-# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
-# in the modules index. If set to NO, only the current project's groups will
-# be listed.
-
-EXTERNAL_GROUPS        = YES
-
-# The PERL_PATH should be the absolute path and name of the perl script
-# interpreter (i.e. the result of `which perl').
-
-PERL_PATH              = /usr/bin/perl
-
-#---------------------------------------------------------------------------
-# Configuration options related to the dot tool
-#---------------------------------------------------------------------------
-
-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
-# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
-# or super classes. Setting the tag to NO turns the diagrams off. Note that
-# this option is superseded by the HAVE_DOT option below. This is only a
-# fallback. It is recommended to install and use dot, since it yields more
-# powerful graphs.
-
-CLASS_DIAGRAMS         = NO
-
-# You can define message sequence charts within doxygen comments using the \msc
-# command. Doxygen will then run the mscgen tool (see
-# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
-# documentation. The MSCGEN_PATH tag allows you to specify the directory where
-# the mscgen tool resides. If left empty the tool is assumed to be found in the
-# default search path.
-
-MSCGEN_PATH            =
-
-# If set to YES, the inheritance and collaboration graphs will hide
-# inheritance and usage relations if the target is undocumented
-# or is not a class.
-
-HIDE_UNDOC_RELATIONS   = YES
-
-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
-# available from the path. This tool is part of Graphviz, a graph visualization
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section
-# have no effect if this option is set to NO (the default)
-
-HAVE_DOT               = NO
-
-# By default doxygen will write a font called FreeSans.ttf to the output
-# directory and reference it in all dot files that doxygen generates. This
-# font does not include all possible unicode characters however, so when you need
-# these (or just want a differently looking font) you can specify the font name
-# using DOT_FONTNAME. You need need to make sure dot is able to find the font,
-# which can be done by putting it in a standard location or by setting the
-# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory
-# containing the font.
-
-DOT_FONTNAME           = FreeSans
-
-# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs.
-# The default size is 10pt.
-
-DOT_FONTSIZE           = 10
-
-# By default doxygen will tell dot to use the output directory to look for the
-# FreeSans.ttf font (which doxygen will put there itself). If you specify a
-# different font using DOT_FONTNAME you can set the path where dot
-# can find it using this tag.
-
-DOT_FONTPATH           =
-
-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect inheritance relations. Setting this tag to YES will force the
-# the CLASS_DIAGRAMS tag to NO.
-
-CLASS_GRAPH            = YES
-
-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect implementation dependencies (inheritance, containment, and
-# class references variables) of the class with other documented classes.
-
-COLLABORATION_GRAPH    = YES
-
-# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for groups, showing the direct groups dependencies
-
-GROUP_GRAPHS           = YES
-
-# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
-# collaboration diagrams in a style similar to the OMG's Unified Modeling
-# Language.
-
-UML_LOOK               = NO
-
-# If set to YES, the inheritance and collaboration graphs will show the
-# relations between templates and their instances.
-
-TEMPLATE_RELATIONS     = NO
-
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
-# tags are set to YES then doxygen will generate a graph for each documented
-# file showing the direct and indirect include dependencies of the file with
-# other documented files.
-
-INCLUDE_GRAPH          = YES
-
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
-# documented header file showing the documented files that directly or
-# indirectly include this file.
-
-INCLUDED_BY_GRAPH      = YES
-
-# If the CALL_GRAPH and HAVE_DOT options are set to YES then
-# doxygen will generate a call dependency graph for every global function
-# or class method. Note that enabling this option will significantly increase
-# the time of a run. So in most cases it will be better to enable call graphs
-# for selected functions only using the \callgraph command.
-
-CALL_GRAPH             = NO
-
-# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
-# doxygen will generate a caller dependency graph for every global function
-# or class method. Note that enabling this option will significantly increase
-# the time of a run. So in most cases it will be better to enable caller
-# graphs for selected functions only using the \callergraph command.
-
-CALLER_GRAPH           = NO
-
-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
-# will graphical hierarchy of all classes instead of a textual one.
-
-GRAPHICAL_HIERARCHY    = YES
-
-# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
-# then doxygen will show the dependencies a directory has on other directories
-# in a graphical way. The dependency relations are determined by the #include
-# relations between the files in the directories.
-
-DIRECTORY_GRAPH        = YES
-
-# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
-# generated by dot. Possible values are png, jpg, or gif
-# If left blank png will be used.
-
-DOT_IMAGE_FORMAT       = png
-
-# The tag DOT_PATH can be used to specify the path where the dot tool can be
-# found. If left blank, it is assumed the dot tool can be found in the path.
-
-DOT_PATH               =
-
-# The DOTFILE_DIRS tag can be used to specify one or more directories that
-# contain dot files that are included in the documentation (see the
-# \dotfile command).
-
-DOTFILE_DIRS           =
-
-# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
-# nodes that will be shown in the graph. If the number of nodes in a graph
-# becomes larger than this value, doxygen will truncate the graph, which is
-# visualized by representing a node as a red box. Note that doxygen if the
-# number of direct children of the root node in a graph is already larger than
-# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note
-# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
-
-DOT_GRAPH_MAX_NODES    = 50
-
-# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
-# graphs generated by dot. A depth value of 3 means that only nodes reachable
-# from the root by following a path via at most 3 edges will be shown. Nodes
-# that lay further from the root node will be omitted. Note that setting this
-# option to 1 or 2 may greatly reduce the computation time needed for large
-# code bases. Also note that the size of a graph can be further restricted by
-# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
-
-MAX_DOT_GRAPH_DEPTH    = 0
-
-# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
-# background. This is disabled by default, because dot on Windows does not
-# seem to support this out of the box. Warning: Depending on the platform used,
-# enabling this option may lead to badly anti-aliased labels on the edges of
-# a graph (i.e. they become hard to read).
-
-DOT_TRANSPARENT        = NO
-
-# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
-# files in one run (i.e. multiple -o and -T options on the command line). This
-# makes dot run faster, but since only newer versions of dot (>1.8.10)
-# support this, this feature is disabled by default.
-
-DOT_MULTI_TARGETS      = YES
-
-# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
-# generate a legend page explaining the meaning of the various boxes and
-# arrows in the dot generated graphs.
-
-GENERATE_LEGEND        = YES
-
-# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
-# remove the intermediate dot files that are used to generate
-# the various graphs.
-
-DOT_CLEANUP            = YES
--- a/misc/docs_gen.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,47 +0,0 @@
-"""An api for generating documentation from the codebase
-"""
-
-from os.path import dirname, join
-from os import sep
-from re import compile
-
-import subprocess
-
-def generate_documentation(dirs, output_dir):
-    """Use doxygen to generate the documentation
-
-    Positional arguments:
-    dirs - the directories that doxygen should scan for documentation
-    output_dir - location of the documentation after the return of this function
-    """
-    print dirs
-    with open(join(dirname(__file__), "Doxyfile")) as doxyfile:
-        proc = subprocess.Popen(["doxygen", "-"], stdin=subprocess.PIPE)
-        proc.stdin.write(doxyfile.read())
-        proc.stdin.write("OUTPUT_DIRECTORY={}\n".format(output_dir))
-        proc.stdin.write("INPUT={}".format(" ".join(dirs)))
-        proc.stdin.close()
-        proc.wait()
-
-EXCLUDES = ["targets", "features/FEATURE", "features/mbedtls",
-           "features/nanostack", "features/storage"]
-
-def is_not_excluded(src):
-    return all(exclude not in src for exclude in EXCLUDES)
-
-if __name__ == "__main__":
-    import sys
-    from os.path import abspath, dirname, join
-    # Be sure that the tools directory is in the search path
-    ROOT = abspath(join(dirname(__file__), "..", ".."))
-    sys.path.insert(0, ROOT)
-
-    from tools.toolchains.gcc import GCC_ARM
-    from tools.targets import TARGET_MAP
-    toolchain = GCC_ARM(TARGET_MAP["Super_Target"])
-    resources = toolchain.scan_resources(".")
-    generate_documentation(filter(is_not_excluded,
-                                  sum(map(lambda x:x.headers,
-                                          resources.features.values()),
-                                      resources.headers)),
-                           join(dirname(dirname(__file__)), "mbed-docs"))
--- a/misc/find_c_includes.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,21 +0,0 @@
-#!/usr/bin/env python
-
-import os
-import re
-
-def main(path='.', pattern=r'#include\s+"([^"]*\.(?:c|cpp))"'):
-    pattern = re.compile(pattern)
-
-    for root, dirs, files in os.walk(path, followlinks=True):
-        for file in files:
-            with open(os.path.join(root, file)) as f:
-                for line in f.read().splitlines():
-                    m = re.search(pattern, line)
-                    if m:
-                        print os.path.relpath(os.path.join(root, m.group(1)))
-
-
-if __name__ == "__main__":
-    import sys
-    main(*sys.argv[1:])
-
--- a/misc/remove-device-h.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,216 +0,0 @@
-import json
-import os
-import stat
-import re
-from collections import OrderedDict
-from subprocess import Popen
-
-git_processes = []
-
-class MyJSONEncoder(json.JSONEncoder):
-    def __init__(self, *args, **kwargs):
-        super(MyJSONEncoder, self).__init__(*args, **kwargs)
-        self.current_indent = 0
-        self.current_indent_str = ""
-
-
-    def encode(self, o):
-        #Special Processing for lists
-        if isinstance(o, (list, tuple)):
-            primitives_only = True
-            for item in o:
-                if isinstance(item, (list, tuple, dict)):
-                    primitives_only = False
-                    break
-            output = []
-            if primitives_only:
-                for item in o:
-                    output.append(json.dumps(item))
-                return "[" + ", ".join(output) + "]"
-            else:
-                self.current_indent += self.indent
-                self.current_indent_str = " " * self.current_indent
-                for item in o:
-                    output.append(self.current_indent_str + self.encode(item))
-                self.current_indent -= self.indent
-                self.current_indent_str = " " * self.current_indent
-                return "[\n" + ",\n".join(output) + "\n" + self.current_indent_str + "]"
-        elif isinstance(o, dict):
-            primitives_only = True
-            for item in o.values():
-                if isinstance(item, (list, tuple, dict)):
-                    primitives_only = False
-                    break
-            output = []
-            if primitives_only and len(o) < 3:
-                for key, value in o.iteritems():
-                    output.append(json.dumps(key) + ": " + self.encode(value))
-                return "{" + ", ".join(output) + "}"
-            else:
-                self.current_indent += self.indent
-                self.current_indent_str = " " * self.current_indent
-                for key, value in o.iteritems():
-                    output.append(self.current_indent_str + json.dumps(key) + ": " + self.encode(value))
-                self.current_indent -= self.indent
-                self.current_indent_str = " " * self.current_indent
-                return "{\n" + ",\n".join(output) + "\n" + self.current_indent_str + "}"
-        else:
-            return json.dumps(o)
-
-def load(path):
-    with open(path, 'r') as f :
-        return json.load(f, object_pairs_hook=OrderedDict)
-
-def dump(path, obj):
-    with os.fdopen(os.open(path, os.O_WRONLY | os.O_CREAT, stat.S_IRUSR | stat.S_IWUSR), 'w') as f :
-        os.chmod(path, stat.S_IRUSR | stat.S_IWUSR)
-        f.write(MyJSONEncoder(indent=4).encode(obj))
-        f.write(u'\n')
-        f.truncate()
-
-def find(stem, path) :
-    for root, directories, files in os.walk(path, followlinks=True) :
-        [dir for dir in directories if dir[0] != '.']
-        if (stem_match(stem,os.path.basename(os.path.normpath(root))) and
-            "device.h" in files) :
-            return os.path.join(root, "device.h")
-
-def find_all_devices(path, verbose=False) :
-    for root, directories, files in os.walk(path, followlinks=True) :
-        [dir for dir in directories if dir[0] != '.']
-        if "device.h" in files :
-            if verbose : print("[VERBOSE] found a device.h file in {}".format(root))
-            yield os.path.join(root, "device.h")
-
-mbed_matcher = re.compile('mbed', re.IGNORECASE)
-def stem_match(stem, thing) :
-    return (stem in thing or
-            re.sub(mbed_matcher, '', stem) in thing)
-
-attr_matcher = re.compile('^#define\W+DEVICE_(\w+)\W+1.*$')
-def parse_attributes(path) :
-    with open(path) as input :
-        for line in input :
-            m = re.match(attr_matcher, line)
-            if m: yield m.group(1)
-
-remove_matcher = re.compile('^#define\W+DEVICE_(\w+)\W+[10].*$')
-def remove_attributes(path) :
-    with open(path) as input :
-        remainder = filter(lambda l: not re.match(remove_matcher, l), input)
-    with open(path,"wb") as output :
-        output.truncate(0)
-        output.write("// The 'provides' section in 'target.json' is now used"+
-                     " to create the device's hardware preprocessor switches.\n")
-        output.write("// Check the 'provides' section of the target description"+
-                     " in 'targets.json' for more details.\n")
-        output.writelines(remainder)
-
-def user_select(things, message) :
-    print(message)
-    for thing, number in zip(things, range(len(things))):
-        print("{} : {}".format(number, thing))
-    selection = None
-    while selection is None :
-        print("please select an integer [0..{}] or specify all".format(len(things) - 1))
-        try :
-            i = raw_input()
-            if i == "all" :
-                selection = "all"
-            else :
-                selection = int(i)
-                if (selection > len(things) or
-                    selection < 0) :
-                    print("selection {} out of range".format(selection))
-                    selection = None
-        except (ValueError, SyntaxError) :
-            print("selection not understood")
-    if selection == "all" :
-        return things
-    else :
-        return [things[selection]]
-
-target_matcher = re.compile("TARGET_")
-def strip_target(str) :
-    return re.sub(target_matcher, "", str)
-
-def add_to_targets(targets, device_file, verbose=False, remove=False) :
-    if verbose : print("[VERBOSE] trying target {}".format(device_file))
-    device = strip_target(os.path.basename(os.path.normpath(os.path.dirname(device_file))))
-    if not device :
-        print("[WARNING] device {} did not have an associated device.h".format(device))
-    else :
-        possible_matches = set([key for key in targets.keys() if stem_match(device, key)])
-        for key, value in targets.iteritems() :
-            for alt in value['extra_labels'] if 'extra_labels' in value else [] :
-                if stem_match(device, alt) : possible_matches.add(key)
-            for alt in value['extra_labels_add'] if 'extra_labels_add' in value else [] :
-                if stem_match(device, alt) : possible_matches.add(key)
-        possible_matches = list(possible_matches)
-        for match in possible_matches :
-            if device == match : possible_matches = [match]
-        if not possible_matches :
-            print("[WARNING] device {} did not have an associated entry in targets.json".format(device))
-            return None
-        elif len(possible_matches) > 1 :
-            message = ("possible matches for file {}".format(device_file))
-            target = user_select(possible_matches, message)
-        else :
-            target = possible_matches
-        attrs = list(parse_attributes(device_file))
-        if attrs :
-            for t in target :
-                targets[t]["device_has"] = sorted(list(set(targets[t].setdefault("device_has",[]) + attrs)))
-                if verbose : print("[VERBOSE] target {} now device_has {}".format(t, attrs))
-            if remove is True:
-                remove_attributes(device_file)
-
-if __name__ == '__main__' :
-    import argparse
-    parser = argparse.ArgumentParser(description='A helpful little script for converting' +
-                                     ' device.h files to parts of the targets.json file')
-    parser.add_argument('-a', '--all', action='store_true',
-                        help='find and convert all available device.h files in the'+
-                        ' directory tree starting at the current directory')
-    parser.add_argument('-f', '--file', nargs='+', help='specify an individual file to '+
-                        'convert from device.h format to a piece of targets.json')
-    parser.add_argument('-t', '--target', nargs='+', help='specify an individual target'+
-                        ' to convert from device.h format to a piece of targets.json')
-    parser.add_argument('-v', '--verbose', action='store_true',
-                        help="print out every target that is updated in the targets.json")
-    parser.add_argument('-r', '--rm', action='store_true',
-                        help="remove the used attributes from a device.h file")
-    args = parser.parse_args()
-    if not args.target and not args.file and not args.all :
-        print("[WARNING] no action specified; auto-formatting targets.json")
-
-    targets_file_name = os.path.join(os.curdir, "hal", "targets.json")
-    try :
-        targets = load(targets_file_name)
-    except OSError :
-        print("[ERROR] did not find targets.json where I expected it {}".format(targets_file_name))
-        exit(1)
-    except ValueError :
-        print("[ERROR] invalid json found in {}".format(targets_file_name))
-        exit(2)
-
-    if args.target :
-        for target in args.target :
-            device_file = find(target, os.curdir)
-            if device_file :
-                add_to_targets(targets, device_file, verbose=args.verbose, remove=args.rm)
-            else :
-                print("[WARNING] could not locate a device file for target {}".format(target))
-
-    if args.file :
-        for file in args.file :
-            add_to_targets(targets, file, verbose=args.verbose, remove=args.rm)
-
-    if args.all :
-        for file in find_all_devices(os.curdir, verbose=args.verbose) :
-            add_to_targets(targets, file, verbose=args.verbose, remove=args.rm)
-
-    dump(targets_file_name, targets)
-
-    for process in git_processes :
-        process.wait()
--- a/options.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/options.py	Thu Jun 22 11:12:28 2017 -0500
@@ -100,7 +100,7 @@
     """
     return [fn.replace(".json", "") for fn in listdir(join(dirname(__file__), "profiles")) if fn.endswith(".json")]
 
-def extract_profile(parser, options, toolchain, fallback="default"):
+def extract_profile(parser, options, toolchain, fallback="develop"):
     """Extract a Toolchain profile from parsed options
 
     Positional arguments:
@@ -108,16 +108,25 @@
     options - The parsed command line arguments
     toolchain - the toolchain that the profile should be extracted for
     """
-    profile = {'c': [], 'cxx': [], 'ld': [], 'common': [], 'asm': []}
+    profiles = []
     filenames = options.profile or [join(dirname(__file__), "profiles",
                                          fallback + ".json")]
     for filename in filenames:
         contents = load(open(filename))
-        try:
-            for key in profile.iterkeys():
-                profile[key] += contents[toolchain][key]
-        except KeyError:
+        if toolchain not in contents:
             args_error(parser, ("argument --profile: toolchain {} is not"
                                 " supported by profile {}").format(toolchain,
                                                                    filename))
-    return profile
+        profiles.append(contents)
+
+    return profiles
+
+def mcu_is_enabled(parser, mcu):
+    if "Cortex-A" in TARGET_MAP[mcu].core:
+        args_error(
+            parser,
+            ("%s Will be supported in mbed OS 5.6. "
+             "To use the %s, please checkout the mbed OS 5.4 release branch. "
+             "See https://developer.mbed.org/platforms/Renesas-GR-PEACH/#important-notice "
+             "for more information") % (mcu, mcu))
+    return True
--- a/patch.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,50 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-
-http://www.nxp.com/documents/user_manual/UM10360.pdf
-
-32.3.1.1 Criterion for Valid User Code
-The reserved Cortex-M3 exception vector location 7 (offset 0x1C in the vector table)
-should contain the 2's complement of the check-sum of table entries 0 through 6. This
-causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
-the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
-transferred to the user code.
-"""
-from struct import unpack, pack
-
-
-def patch(bin_path):
-    with open(bin_path, 'r+b') as bin:
-        # Read entries 0 through 6 (Little Endian 32bits words)
-        vector = [unpack('<I', bin.read(4))[0] for _ in range(7)]
-
-        # location 7 (offset 0x1C in the vector table) should contain the 2's
-        # complement of the check-sum of table entries 0 through 6
-        bin.seek(0x1C)
-        bin.write(pack('<I', (~sum(vector) + 1) & 0xFFFFFFFF))
-
-
-def is_patched(bin_path):
-    with open(bin_path, 'rb') as bin:
-        # The checksum of the first 8 table entries should be 0
-        return (sum([unpack('<I', bin.read(4))[0] for _ in range(8)]) & 0xFFFFFFFF) == 0
-
-
-if __name__ == '__main__':
-    bin_path = "C:/Users/emimon01/releases/emilmont/build/test/LPC1768/ARM/MBED_A1/basic.bin"
-    patch(bin_path)
-    assert is_patched(bin_path), "The file is not patched"
--- a/paths.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/paths.py	Thu Jun 22 11:12:28 2017 -0500
@@ -55,33 +55,6 @@
 
 RPC_LIBRARY = join(BUILD_DIR, "rpc")
 
-# mbed RTOS
-RTOS = join(ROOT, "rtos")
-MBED_RTX = join(RTOS, "rtx")
-
-RTOS_LIBRARIES = join(BUILD_DIR, "rtos")
-
-# TCP/IP
-NET = join(LIB_DIR, "net")
-
-ETH_SOURCES = join(NET, "eth")
-LWIP_SOURCES = join(NET, "lwip")
-VODAFONE_SOURCES = join(NET, "VodafoneUSBModem")
-CELLULAR_SOURCES = join(NET, "cellular", "CellularModem")
-CELLULAR_USB_SOURCES = join(NET, "cellular", "CellularUSBModem")
-UBLOX_SOURCES = join(NET, "cellular", "UbloxUSBModem")
-
-NET_LIBRARIES = join(BUILD_DIR, "net")
-ETH_LIBRARY = join(NET_LIBRARIES, "eth")
-VODAFONE_LIBRARY = join(NET_LIBRARIES, "VodafoneUSBModem")
-UBLOX_LIBRARY = join(NET_LIBRARIES, "UbloxUSBModem")
-
-# FS
-FS_PATH = join(LIB_DIR, "fs")
-FAT_FS = join(FS_PATH, "fat")
-SD_FS = join(FS_PATH, "sd")
-FS_LIBRARY = join(BUILD_DIR, "fat")
-
 # DSP
 DSP = join(LIB_DIR, "dsp")
 DSP_CMSIS = join(DSP, "cmsis_dsp")
@@ -92,10 +65,6 @@
 USB = join(LIB_DIR, "USBDevice")
 USB_LIBRARIES = join(BUILD_DIR, "usb")
 
-# USB Host
-USB_HOST = join(LIB_DIR, "USBHost")
-USB_HOST_LIBRARIES = join(BUILD_DIR, "usb_host")
-
 # Export
 EXPORT_DIR = join(BUILD_DIR, "export")
 EXPORT_WORKSPACE = join(EXPORT_DIR, "workspace")
--- a/profiles/debug.json	Wed Feb 15 13:53:18 2017 -0600
+++ b/profiles/debug.json	Thu Jun 22 11:12:28 2017 -0500
@@ -5,18 +5,21 @@
                    "-fmessage-length=0", "-fno-exceptions", "-fno-builtin",
                    "-ffunction-sections", "-fdata-sections", "-funsigned-char",
                    "-MMD", "-fno-delete-null-pointer-checks",
-                   "-fomit-frame-pointer", "-O0", "-g3"],
+                   "-fomit-frame-pointer", "-O0", "-g3", "-DMBED_DEBUG",
+                   "-DMBED_TRAP_ERRORS_ENABLED=1"],
         "asm": ["-x", "assembler-with-cpp"],
         "c": ["-std=gnu99"],
         "cxx": ["-std=gnu++98", "-fno-rtti", "-Wvla"],
         "ld": ["-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r",
-               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r",
-               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit"]
+               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r", "-Wl,--wrap,_memalign_r",
+               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
+               "-Wl,-n"]
     },
     "ARM": {
         "common": ["-c", "--gnu", "-Otime", "--split_sections",
                    "--apcs=interwork", "--brief_diagnostics", "--restrict",
-                   "--multibyte_chars", "-O0", "-g"],
+                   "--multibyte_chars", "-O0", "-g", "-DMBED_DEBUG",
+                   "-DMBED_TRAP_ERRORS_ENABLED=1"],
         "asm": [],
         "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
         "cxx": ["--cpp", "--no_rtti", "--no_vla"],
@@ -26,7 +29,8 @@
         "common": ["-c", "--gnu", "-Otime", "--split_sections",
                    "--apcs=interwork", "--brief_diagnostics", "--restrict",
                    "--multibyte_chars", "-O0", "-D__MICROLIB", "-g",
-                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD"],
+                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD", "-DMBED_DEBUG",
+                   "-DMBED_TRAP_ERRORS_ENABLED=1"],
         "asm": [],
         "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
         "cxx": ["--cpp", "--no_rtti", "--no_vla"],
@@ -35,7 +39,8 @@
     "IAR": {
         "common": [
             "--no_wrap_diagnostics",  "-e",
-            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-On", "-r"],
+            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-On", "-r", "-DMBED_DEBUG",
+            "-DMBED_TRAP_ERRORS_ENABLED=1"],
         "asm": [],
         "c": ["--vla"],
         "cxx": ["--guard_calls", "--no_static_destruction"],
--- a/profiles/default.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,44 +0,0 @@
-{
-    "GCC_ARM": {
-        "common": ["-c", "-Wall", "-Wextra",
-                   "-Wno-unused-parameter", "-Wno-missing-field-initializers",
-                   "-fmessage-length=0", "-fno-exceptions", "-fno-builtin",
-                   "-ffunction-sections", "-fdata-sections", "-funsigned-char",
-                   "-MMD", "-fno-delete-null-pointer-checks",
-                   "-fomit-frame-pointer", "-Os"],
-        "asm": ["-x", "assembler-with-cpp"],
-        "c": ["-std=gnu99"],
-        "cxx": ["-std=gnu++98", "-fno-rtti", "-Wvla"],
-        "ld": ["-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r",
-               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r",
-               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit"]
-    },
-    "ARM": {
-        "common": ["-c", "--gnu", "-Otime", "--split_sections",
-                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
-                   "--multibyte_chars", "-O3"],
-        "asm": [],
-        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
-        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": []
-    },
-    "uARM": {
-        "common": ["-c", "--gnu", "-Otime", "--split_sections",
-                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
-                   "--multibyte_chars", "-O3", "-D__MICROLIB",
-                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD"],
-        "asm": [],
-        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
-        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": ["--library_type=microlib"]
-    },
-    "IAR": {
-        "common": [
-            "--no_wrap_diagnostics", "-e",
-            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-Oh"],
-        "asm": [],
-        "c": ["--vla"],
-        "cxx": ["--guard_calls", "--no_static_destruction"],
-        "ld": ["--skip_dynamic_initialization", "--threaded_lib"]
-    }
-}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/profiles/develop.json	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,45 @@
+{
+    "GCC_ARM": {
+        "common": ["-c", "-Wall", "-Wextra",
+                   "-Wno-unused-parameter", "-Wno-missing-field-initializers",
+                   "-fmessage-length=0", "-fno-exceptions", "-fno-builtin",
+                   "-ffunction-sections", "-fdata-sections", "-funsigned-char",
+                   "-MMD", "-fno-delete-null-pointer-checks",
+                   "-fomit-frame-pointer", "-Os"],
+        "asm": ["-x", "assembler-with-cpp"],
+        "c": ["-std=gnu99"],
+        "cxx": ["-std=gnu++98", "-fno-rtti", "-Wvla"],
+        "ld": ["-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r",
+               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r", "-Wl,--wrap,_memalign_r",
+               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
+               "-Wl,-n"]
+    },
+    "ARM": {
+        "common": ["-c", "--gnu", "-Otime", "--split_sections",
+                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
+                   "--multibyte_chars", "-O3"],
+        "asm": [],
+        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
+        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
+        "ld": []
+    },
+    "uARM": {
+        "common": ["-c", "--gnu", "-Otime", "--split_sections",
+                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
+                   "--multibyte_chars", "-O3", "-D__MICROLIB",
+                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD"],
+        "asm": [],
+        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
+        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
+        "ld": ["--library_type=microlib"]
+    },
+    "IAR": {
+        "common": [
+            "--no_wrap_diagnostics", "-e",
+            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-Oh"],
+        "asm": [],
+        "c": ["--vla"],
+        "cxx": ["--guard_calls", "--no_static_destruction"],
+        "ld": ["--skip_dynamic_initialization", "--threaded_lib"]
+    }
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/profiles/release.json	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,45 @@
+{
+    "GCC_ARM": {
+        "common": ["-c", "-Wall", "-Wextra",
+                   "-Wno-unused-parameter", "-Wno-missing-field-initializers",
+                   "-fmessage-length=0", "-fno-exceptions", "-fno-builtin",
+                   "-ffunction-sections", "-fdata-sections", "-funsigned-char",
+                   "-MMD", "-fno-delete-null-pointer-checks",
+                   "-fomit-frame-pointer", "-Os", "-DNDEBUG"],
+        "asm": ["-x", "assembler-with-cpp"],
+        "c": ["-std=gnu99"],
+        "cxx": ["-std=gnu++98", "-fno-rtti", "-Wvla"],
+        "ld": ["-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r",
+               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r", "-Wl,--wrap,_memalign_r",
+               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
+               "-Wl,-n"]
+    },
+    "ARM": {
+        "common": ["-c", "--gnu", "-Ospace", "--split_sections",
+                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
+                   "--multibyte_chars", "-O3", "-DNDEBUG"],
+        "asm": [],
+        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
+        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
+        "ld": []
+    },
+    "uARM": {
+        "common": ["-c", "--gnu", "-Ospace", "--split_sections",
+                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
+                   "--multibyte_chars", "-O3", "-D__MICROLIB",
+                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD", "-DNDEBUG"],
+        "asm": [],
+        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
+        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
+        "ld": ["--library_type=microlib"]
+    },
+    "IAR": {
+        "common": [
+            "--no_wrap_diagnostics", "-e",
+            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-Ohz", "-DNDEBUG"],
+        "asm": [],
+        "c": ["--vla"],
+        "cxx": ["--guard_calls", "--no_static_destruction"],
+        "ld": ["--skip_dynamic_initialization", "--threaded_lib"]
+    }
+}
--- a/profiles/small.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,44 +0,0 @@
-{
-    "GCC_ARM": {
-        "common": ["-c", "-Wall", "-Wextra",
-                   "-Wno-unused-parameter", "-Wno-missing-field-initializers",
-                   "-fmessage-length=0", "-fno-exceptions", "-fno-builtin",
-                   "-ffunction-sections", "-fdata-sections", "-funsigned-char",
-                   "-MMD", "-fno-delete-null-pointer-checks",
-                   "-fomit-frame-pointer", "-Os", "-DNDEBUG"],
-        "asm": ["-x", "assembler-with-cpp"],
-        "c": ["-std=gnu99"],
-        "cxx": ["-std=gnu++98", "-fno-rtti", "-Wvla"],
-        "ld": ["-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r",
-               "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r",
-               "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit"]
-    },
-    "ARM": {
-        "common": ["-c", "--gnu", "-Ospace", "--split_sections",
-                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
-                   "--multibyte_chars", "-O3", "-DNDEBUG"],
-        "asm": [],
-        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
-        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": []
-    },
-    "uARM": {
-        "common": ["-c", "--gnu", "-Ospace", "--split_sections",
-                   "--apcs=interwork", "--brief_diagnostics", "--restrict",
-                   "--multibyte_chars", "-O3", "-D__MICROLIB",
-                   "--library_type=microlib", "-DMBED_RTOS_SINGLE_THREAD", "-DNDEBUG"],
-        "asm": [],
-        "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
-        "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": ["--library_type=microlib"]
-    },
-    "IAR": {
-        "common": [
-            "--no_wrap_diagnostics", "-e",
-            "--diag_suppress=Pa050,Pa084,Pa093,Pa082", "-Ohz", "-DNDEBUG"],
-        "asm": [],
-        "c": ["--vla"],
-        "cxx": ["--guard_calls", "--no_static_destruction"],
-        "ld": ["--skip_dynamic_initialization", "--threaded_lib"]
-    }
-}
--- a/project.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/project.py	Thu Jun 22 11:12:28 2017 -0500
@@ -12,7 +12,7 @@
 
 from tools.paths import EXPORT_DIR, MBED_HAL, MBED_LIBRARIES, MBED_TARGETS_PATH
 from tools.settings import BUILD_DIR
-from tools.export import EXPORTERS, mcu_ide_matrix
+from tools.export import EXPORTERS, mcu_ide_matrix, mcu_ide_list, export_project, get_exporter_toolchain
 from tools.tests import TESTS, TEST_MAP
 from tools.tests import test_known, test_name_known, Test
 from tools.targets import TARGET_NAMES
@@ -20,7 +20,6 @@
 from tools.utils import argparse_force_lowercase_type
 from tools.utils import argparse_force_uppercase_type
 from tools.utils import print_large_string
-from tools.project_api import export_project, get_exporter_toolchain
 from tools.options import extract_profile, list_profiles
 
 def setup_project(ide, target, program=None, source_dir=None, build=None, export_path=None):
@@ -67,7 +66,8 @@
 
 
 def export(target, ide, build=None, src=None, macros=None, project_id=None,
-           zip_proj=False, build_profile=None, export_path=None, silent=False):
+           zip_proj=False, build_profile=None, export_path=None, silent=False,
+           app_config=None):
     """Do an export of a project.
 
     Positional arguments:
@@ -91,7 +91,8 @@
 
     return export_project(src, project_dir, target, ide, name=name,
                           macros=macros, libraries_paths=lib, zip_proj=zip_name,
-                          build_profile=build_profile, silent=silent)
+                          build_profile=build_profile, silent=silent,
+                          app_config=app_config)
 
 
 def main():
@@ -146,9 +147,11 @@
                        help="list available programs in order and exit")
 
     group.add_argument("-S", "--list-matrix",
-                       action="store_true",
                        dest="supported_ides",
                        default=False,
+                       const="matrix",
+                       choices=["matrix", "ides"],
+                       nargs="?",
                        help="displays supported matrix of MCUs and IDEs")
 
     parser.add_argument("-E",
@@ -179,6 +182,9 @@
                         dest="update_packs",
                         action="store_true",
                         default=False)
+    parser.add_argument("--app-config",
+                        dest="app_config",
+                        default=None)
 
     options = parser.parse_args()
 
@@ -189,7 +195,10 @@
 
     # Only prints matrix of supported IDEs
     if options.supported_ides:
-        print_large_string(mcu_ide_matrix())
+        if options.supported_ides == "matrix":
+            print_large_string(mcu_ide_matrix())
+        elif options.supported_ides == "ides":
+            print mcu_ide_list()
         exit(0)
 
     # Only prints matrix of supported IDEs
@@ -241,7 +250,7 @@
     export(options.mcu, options.ide, build=options.build,
            src=options.source_dir, macros=options.macros,
            project_id=options.program, zip_proj=zip_proj,
-           build_profile=profile)
+           build_profile=profile, app_config=options.app_config)
 
 
 if __name__ == "__main__":
--- a/project_api.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,257 +0,0 @@
-""" The new way of doing exports """
-import sys
-from os.path import join, abspath, dirname, exists
-from os.path import basename, relpath, normpath, splitext
-from os import makedirs, walk
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-import copy
-from shutil import rmtree
-import zipfile
-
-from tools.build_api import prepare_toolchain
-from tools.build_api import scan_resources
-from tools.export import EXPORTERS
-from tools.toolchains import Resources
-
-
-def get_exporter_toolchain(ide):
-    """ Return the exporter class and the toolchain string as a tuple
-
-    Positional arguments:
-    ide - the ide name of an exporter
-    """
-    return EXPORTERS[ide], EXPORTERS[ide].TOOLCHAIN
-
-
-def rewrite_basepath(file_name, resources, export_path, loc):
-    """ Replace the basepath of filename with export_path
-
-    Positional arguments:
-    file_name - the absolute path to a file
-    resources - the resources object that the file came from
-    export_path - the final destination of the file after export
-    """
-    new_f = join(loc, relpath(file_name, resources.file_basepath[file_name]))
-    resources.file_basepath[join(export_path, new_f)] = export_path
-    return new_f
-
-
-def subtract_basepath(resources, export_path, loc=""):
-    """ Rewrite all of the basepaths with the export_path
-
-    Positional arguments:
-    resources - the resource object to rewrite the basepaths of
-    export_path - the final destination of the resources with respect to the
-      generated project files
-    """
-    keys = ['s_sources', 'c_sources', 'cpp_sources', 'hex_files',
-            'objects', 'libraries', 'inc_dirs', 'headers', 'linker_script',
-            'lib_dirs']
-    for key in keys:
-        vals = getattr(resources, key)
-        if isinstance(vals, set):
-            vals = list(vals)
-        if isinstance(vals, list):
-            new_vals = []
-            for val in vals:
-                new_vals.append(rewrite_basepath(val, resources, export_path,
-                                                 loc))
-            if isinstance(getattr(resources, key), set):
-                setattr(resources, key, set(new_vals))
-            else:
-                setattr(resources, key, new_vals)
-        elif vals:
-            setattr(resources, key, rewrite_basepath(vals, resources,
-                                                     export_path, loc))
-
-
-def generate_project_files(resources, export_path, target, name, toolchain, ide,
-                           macros=None):
-    """Generate the project files for a project
-
-    Positional arguments:
-    resources - a Resources object containing all of the files needed to build
-      this project
-    export_path - location to place project files
-    name - name of the project
-    toolchain - a toolchain class that corresponds to the toolchain used by the
-      IDE or makefile
-    ide - IDE name to export to
-
-    Optional arguments:
-    macros - additional macros that should be defined within the exported
-      project
-    """
-    exporter_cls, _ = get_exporter_toolchain(ide)
-    exporter = exporter_cls(target, export_path, name, toolchain,
-                            extra_symbols=macros, resources=resources)
-    exporter.generate()
-    files = exporter.generated_files
-    return files, exporter
-
-
-def zip_export(file_name, prefix, resources, project_files, inc_repos):
-    """Create a zip file from an exported project.
-
-    Positional Parameters:
-    file_name - the file name of the resulting zip file
-    prefix - a directory name that will prefix the entire zip file's contents
-    resources - a resources object with files that must be included in the zip
-    project_files - a list of extra files to be added to the root of the prefix
-      directory
-    """
-    with zipfile.ZipFile(file_name, "w") as zip_file:
-        for prj_file in project_files:
-            zip_file.write(prj_file, join(prefix, basename(prj_file)))
-        for loc, resource in resources.iteritems():
-            for res in [resource] + resource.features.values():
-                to_zip = (
-                    res.headers + res.s_sources + res.c_sources +\
-                    res.cpp_sources + res.libraries + res.hex_files + \
-                    [res.linker_script] + res.bin_files + res.objects + \
-                    res.json_files + res.lib_refs + res.lib_builds)
-                if inc_repos:
-                    for directory in res.repo_dirs:
-                        for root, _, files in walk(directory):
-                            for repo_file in files:
-                                source = join(root, repo_file)
-                                to_zip.append(source)
-                                res.file_basepath[source] = res.base_path
-                    to_zip += res.repo_files
-                for source in to_zip:
-                    if source:
-                        zip_file.write(
-                            source,
-                            join(prefix, loc,
-                                 relpath(source, res.file_basepath[source])))
-                for source in res.lib_builds:
-                    target_dir, _ = splitext(source)
-                    dest = join(prefix, loc,
-                                relpath(target_dir, res.file_basepath[source]),
-                                ".bld", "bldrc")
-                    zip_file.write(source, dest)
-
-
-
-def export_project(src_paths, export_path, target, ide, libraries_paths=None,
-                   linker_script=None, notify=None, verbose=False, name=None,
-                   inc_dirs=None, jobs=1, silent=False, extra_verbose=False,
-                   config=None, macros=None, zip_proj=None, inc_repos=False,
-                   build_profile=None):
-    """Generates a project file and creates a zip archive if specified
-
-    Positional Arguments:
-    src_paths - a list of paths from which to find source files
-    export_path - a path specifying the location of generated project files
-    target - the mbed board/mcu for which to generate the executable
-    ide - the ide for which to generate the project fields
-
-    Keyword Arguments:
-    libraries_paths - paths to additional libraries
-    linker_script - path to the linker script for the specified target
-    notify - function is passed all events, and expected to handle notification
-      of the user, emit the events to a log, etc.
-    verbose - assigns the notify function to toolchains print_notify_verbose
-    name - project name
-    inc_dirs - additional include directories
-    jobs - number of threads
-    silent - silent build - no output
-    extra_verbose - assigns the notify function to toolchains
-      print_notify_verbose
-    config - toolchain's config object
-    macros - User-defined macros
-    zip_proj - string name of the zip archive you wish to creat (exclude arg
-     if you do not wish to create an archive
-    """
-
-    # Convert src_path to a list if needed
-    if isinstance(src_paths, dict):
-        paths = sum(src_paths.values(), [])
-    elif isinstance(src_paths, list):
-        paths = src_paths[:]
-    else:
-        paths = [src_paths]
-
-    # Extend src_paths wit libraries_paths
-    if libraries_paths is not None:
-        paths.extend(libraries_paths)
-
-    if not isinstance(src_paths, dict):
-        src_paths = {"": paths}
-
-    # Export Directory
-    if not exists(export_path):
-        makedirs(export_path)
-
-    _, toolchain_name = get_exporter_toolchain(ide)
-
-    # Pass all params to the unified prepare_resources()
-    toolchain = prepare_toolchain(paths, target, toolchain_name, macros=macros,
-                                  jobs=jobs, notify=notify, silent=silent,
-                                  verbose=verbose, extra_verbose=extra_verbose,
-                                  config=config, build_profile=build_profile)
-    # The first path will give the name to the library
-    if name is None:
-        name = basename(normpath(abspath(src_paths[0])))
-
-    # Call unified scan_resources
-    resource_dict = {loc: scan_resources(path, toolchain, inc_dirs=inc_dirs)
-                     for loc, path in src_paths.iteritems()}
-    resources = Resources()
-    toolchain.build_dir = export_path
-    config_header = toolchain.get_config_header()
-    resources.headers.append(config_header)
-    resources.file_basepath[config_header] = dirname(config_header)
-
-    if zip_proj:
-        subtract_basepath(resources, export_path)
-        for loc, res in resource_dict.iteritems():
-            temp = copy.deepcopy(res)
-            subtract_basepath(temp, export_path, loc)
-            resources.add(temp)
-    else:
-        for _, res in resource_dict.iteritems():
-            resources.add(res)
-
-    # Change linker script if specified
-    if linker_script is not None:
-        resources.linker_script = linker_script
-
-    files, exporter = generate_project_files(resources, export_path,
-                                             target, name, toolchain, ide,
-                                             macros=macros)
-    files.append(config_header)
-    if zip_proj:
-        if isinstance(zip_proj, basestring):
-            zip_export(join(export_path, zip_proj), name, resource_dict, files, inc_repos)
-        else:
-            zip_export(zip_proj, name, resource_dict, files, inc_repos)
-
-    return exporter
-
-
-def print_results(successes, failures, skips=None):
-    """ Print out the results of an export process
-
-    Positional arguments:
-    successes - The list of exports that succeeded
-    failures - The list of exports that failed
-
-    Keyword arguments:
-    skips - The list of exports that were skipped
-    """
-    print
-    if successes:
-        print "Successful: "
-        for success in successes:
-            print "  * %s" % success
-    if failures:
-        print "Failed: "
-        for failure in failures:
-            print "  * %s" % failure
-    if skips:
-        print "Skipped: "
-        for skip in skips:
-            print "  * %s" % skip
-
--- a/size.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,121 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-import sys
-from os.path import join, abspath, dirname, exists, splitext
-from subprocess import Popen, PIPE
-import csv
-from collections import defaultdict
-
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-
-from tools.paths import BUILD_DIR, TOOLS_DATA
-from tools.settings import GCC_ARM_PATH
-from tools.tests import TEST_MAP
-from tools.build_api import build_mbed_libs, build_project
-
-SIZE = join(GCC_ARM_PATH, 'arm-none-eabi-size')
-
-def get_size(path):
-    out = Popen([SIZE, path], stdout=PIPE).communicate()[0]
-    return map(int, out.splitlines()[1].split()[:4])
-
-def get_percentage(before, after):
-    if before == 0:
-        return 0 if after == 0 else 100.0
-    return float(after - before) / float(before) * 100.0
-
-def human_size(val):
-    if val>1024:
-        return "%.0fKb" % (float(val)/1024.0)
-    return "%d" % val
-
-def print_diff(name, before, after):
-    print "%s: (%s -> %s) %.2f%%" % (name, human_size(before) , human_size(after) , get_percentage(before , after))
-
-BENCHMARKS = [
-    ("BENCHMARK_1", "CENV"),
-    ("BENCHMARK_2", "PRINTF"),
-    ("BENCHMARK_3", "FP"),
-    ("BENCHMARK_4", "MBED"),
-    ("BENCHMARK_5", "ALL"),
-]
-BENCHMARK_DATA_PATH = join(TOOLS_DATA, 'benchmarks.csv')
-
-
-def benchmarks():
-    # CSV Data
-    csv_data = csv.writer(open(BENCHMARK_DATA_PATH, 'wb'))
-    csv_data.writerow(['Toolchain', "Target", "Benchmark", "code", "data", "bss", "flash"])
-
-    # Build
-    for toolchain in ['ARM', 'uARM', 'GCC_CR', 'GCC_ARM']:
-        for mcu in ["LPC1768", "LPC11U24"]:
-            # Build Libraries
-            build_mbed_libs(mcu, toolchain)
-
-            # Build benchmarks
-            build_dir = join(BUILD_DIR, "benchmarks", mcu, toolchain)
-            for test_id, title in BENCHMARKS:
-                # Build Benchmark
-                try:
-                    test = TEST_MAP[test_id]
-                    path = build_project(test.source_dir, join(build_dir, test_id),
-                                 mcu, toolchain, test.dependencies)
-                    base, ext = splitext(path)
-                    # Check Size
-                    code, data, bss, flash = get_size(base+'.elf')
-                    csv_data.writerow([toolchain, mcu, title, code, data, bss, flash])
-                except Exception, e:
-                    print "Unable to build %s for toolchain %s targeting %s" % (test_id, toolchain, mcu)
-                    print e
-
-
-def compare(t1, t2, target):
-    if not exists(BENCHMARK_DATA_PATH):
-        benchmarks()
-    else:
-        print "Loading: %s" % BENCHMARK_DATA_PATH
-
-    data = csv.reader(open(BENCHMARK_DATA_PATH, 'rb'))
-
-    benchmarks_data = defaultdict(dict)
-    for (toolchain, mcu, name, code, data, bss, flash) in data:
-        if target == mcu:
-            for t in [t1, t2]:
-                if toolchain == t:
-                    benchmarks_data[name][t] = map(int, (code, data, bss, flash))
-
-    print "%s vs %s for %s" % (t1, t2, target)
-    for name, data in benchmarks_data.iteritems():
-        try:
-            # Check Size
-            code_a, data_a, bss_a, flash_a = data[t1]
-            code_u, data_u, bss_u, flash_u = data[t2]
-
-            print "\n=== %s ===" % name
-            print_diff("code", code_a , code_u)
-            print_diff("data", data_a , data_u)
-            print_diff("bss", bss_a , bss_u)
-            print_diff("flash", flash_a , flash_u)
-        except Exception, e:
-            print "No data for benchmark %s" % (name)
-            print e
-
-
-if __name__ == '__main__':
-    compare("GCC_CR", "LPC1768")
--- a/synch.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,344 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2013 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-
-One repository to update them all
-On mbed.org the mbed SDK is split up in multiple repositories, this script takes
-care of updating them all.
-"""
-import sys
-from copy import copy
-from os import walk, remove, makedirs, getcwd, rmdir, listdir
-from os.path import join, abspath, dirname, relpath, exists, isfile, normpath, isdir
-from shutil import copyfile
-from optparse import OptionParser
-import re
-import string
-
-ROOT = abspath(join(dirname(__file__), ".."))
-sys.path.insert(0, ROOT)
-
-from tools.settings import MBED_ORG_PATH, MBED_ORG_USER, BUILD_DIR
-from tools.paths import *
-from tools.utils import run_cmd
-
-MBED_URL = "mbed.org"
-MBED_USER = "mbed_official"
-
-changed = []
-push_remote = True
-quiet = False
-commit_msg = ''
-
-# Code that does have a mirror in the mbed SDK
-# Tuple data: (repo_name, list_of_code_dirs, [team])
-# team is optional - if not specified, the code is published under mbed_official
-OFFICIAL_CODE = {"mbed-dev" : ["cmsis", "drivers", "hal", "platform", "targets", "mbed.h"]}
-
-
-# A list of regular expressions that will be checked against each directory
-# name and skipped if they match.
-IGNORE_DIRS = (
-)
-
-IGNORE_FILES = (
-    'COPYING',
-    '\.md',
-    "\.lib",
-    "\.bld"
-)
-
-def ignore_path(name, reg_exps):
-    for r in reg_exps:
-        if re.search(r, name):
-            return True
-    return False
-
-class MbedRepository:
-    @staticmethod
-    def run_and_print(command, cwd):
-        stdout, _, _ = run_cmd(command, work_dir=cwd, redirect=True)
-        print(stdout)
-
-    def __init__(self, name):
-        self.name = name
-        self.path = join(MBED_ORG_PATH, name)
-        self.url = "http://" + MBED_URL + "/users/" + MBED_ORG_USER + "/code/%s/"
-
-        if not exists(self.path):
-            # Checkout code
-            if not exists(MBED_ORG_PATH):
-                makedirs(MBED_ORG_PATH)
-
-            self.run_and_print(['hg', 'clone', self.url % name], cwd=MBED_ORG_PATH)
-
-        else:
-            # Update
-            self.run_and_print(['hg', 'pull'], cwd=self.path)
-            self.run_and_print(['hg', 'update'], cwd=self.path)
-
-    def publish(self):
-        # The maintainer has to evaluate the changes first and explicitly accept them
-        self.run_and_print(['hg', 'addremove'], cwd=self.path)
-        stdout, _, _ = run_cmd(['hg', 'status'], work_dir=self.path)
-        if stdout == '':
-            print "No changes"
-            return False
-        print stdout
-        if quiet:
-            commit = 'Y'
-        else:
-            commit = raw_input(push_remote and "Do you want to commit and push? Y/N: " or "Do you want to commit? Y/N: ")
-        if commit == 'Y':
-            args = ['hg', 'commit', '-u', MBED_ORG_USER]
-            
-            
-            # NOTE commit_msg should always come from the relevant mbed 2 release text
-            if commit_msg:
-                args = args + ['-m', commit_msg]
-            self.run_and_print(args, cwd=self.path)
-            if push_remote:
-                self.run_and_print(['hg', 'push'], cwd=self.path)
-        return True
-
-# Check if a file is a text file or a binary file
-# Taken from http://code.activestate.com/recipes/173220/
-text_characters = "".join(map(chr, range(32, 127)) + list("\n\r\t\b"))
-_null_trans = string.maketrans("", "")
-def is_text_file(filename):
-    block_size = 1024
-    def istext(s):
-        if "\0" in s:
-            return 0
-
-        if not s:  # Empty files are considered text
-            return 1
-
-        # Get the non-text characters (maps a character to itself then
-        # use the 'remove' option to get rid of the text characters.)
-        t = s.translate(_null_trans, text_characters)
-
-        # If more than 30% non-text characters, then
-        # this is considered a binary file
-        if float(len(t))/len(s) > 0.30:
-            return 0
-        return 1
-    with open(filename) as f:
-        res = istext(f.read(block_size))
-    return res
-
-# Return the line ending type for the given file ('cr' or 'crlf')
-def get_line_endings(f):
-  examine_size = 1024
-  try:
-    tf = open(f, "rb")
-    lines, ncrlf = tf.readlines(examine_size), 0
-    tf.close()
-    for l in lines:
-      if l.endswith("\r\n"):
-        ncrlf = ncrlf + 1
-    return 'crlf' if ncrlf > len(lines) >> 1 else 'cr'
-  except:
-    return 'cr'
-
-# Copy file to destination, but preserve destination line endings if possible
-# This prevents very annoying issues with huge diffs that appear because of
-# differences in line endings
-def copy_with_line_endings(sdk_file, repo_file):
-    if not isfile(repo_file):
-        copyfile(sdk_file, repo_file)
-        return
-    is_text = is_text_file(repo_file)
-    if is_text:
-        sdk_le = get_line_endings(sdk_file)
-        repo_le = get_line_endings(repo_file)
-    if not is_text or sdk_le == repo_le:
-        copyfile(sdk_file, repo_file)
-    else:
-        print "Converting line endings in '%s' to '%s'" % (abspath(repo_file), repo_le)
-        f = open(sdk_file, "rb")
-        data = f.read()
-        f.close()
-        f = open(repo_file, "wb")
-        data = data.replace("\r\n", "\n") if repo_le == 'cr' else data.replace('\n','\r\n')
-        f.write(data)
-        f.close()
-
-def visit_files(path, visit):
-    for root, dirs, files in walk(path):    
-        # Ignore hidden directories
-        for d in copy(dirs):
-            full = join(root, d)
-            if d.startswith('.'):
-                dirs.remove(d)
-            if ignore_path(full, IGNORE_DIRS):
-                print "Skipping '%s'" % full
-                dirs.remove(d)
-
-        for file in files:
-            if ignore_path(file, IGNORE_FILES):
-                continue
-
-            visit(join(root, file))
-
-def visit_dirs(path, visit):
-
-    for root, dirs, files in walk(path, topdown=False):            
-        for d in dirs:
-            full = join(root, d)
-            
-            # We don't want to remove the .hg directory
-            if not '.hg' in full:
-                visit(full)
-
-
-def update_repo(repo_name, sdk_paths, lib=False):
-    repo = MbedRepository(repo_name)
-    
-    # copy files from mbed SDK to mbed_official repository
-    def visit_mbed_sdk(sdk_file):
-
-        # Source files structure is different for the compiled binary lib 
-        # compared to the mbed-dev sources
-        if lib:
-            repo_file = join(repo.path, relpath(sdk_file, sdk_path))            
-        else:
-            repo_file = join(repo.path, sdk_file)
-        repo_dir = dirname(repo_file)
-        if not exists(repo_dir):
-            print("CREATING: %s" % repo_dir)
-            makedirs(repo_dir)
-
-        copy_with_line_endings(sdk_file, repo_file)
-
-    # Go through each path specified in the mbed structure 
-    for sdk_path in sdk_paths:
-
-        if isfile(sdk_path):
-            # Single file so just copy directly across
-            visit_mbed_sdk(sdk_path)
-        else:    
-            visit_files(sdk_path, visit_mbed_sdk)
-
-    def sdk_remove(repo_path):
-        
-        print("REMOVING: %s" % repo_path)
-        
-        # Check if this is an empty directory or a file before determining how to 
-        # delete it. As this function should only be called with a directory list
-        # after being called with a file list, the directory should automatically
-        # be either valid or empty .
-        if isfile(repo_path):
-            remove(repo_path)
-        elif isdir(repo_path) and not listdir(repo_path):
-            rmdir(repo_path)
-        else:
-            print("ERROR: %s is not empty, please remove manually." % repo_path)
-            print listdir(repo_path)
-            exit(1)
-
-    # remove repository files that do not exist in the mbed SDK
-    def visit_lib_repo(repo_path):
-        for sdk_path in sdk_paths:
-            sdk_file = join(sdk_path, relpath(repo_path, repo.path))
-            if not exists(sdk_file):
-                sdk_remove(repo_path)
-
-    # remove repository files that do not exist in the mbed SDK source
-    def visit_repo(repo_path):
-
-        # work out equivalent sdk path from repo file
-        sdk_path = join(getcwd(), relpath(repo_path, repo.path))
-
-        if not exists(sdk_path):
-            sdk_remove(repo_path)
-
-    # Go through each path specified in the mbed structure
-    # Check if there are any files in any of those paths that are no longer part of the SDK
-
-    if lib:
-        visit_files(repo.path, visit_lib_repo)
-        # Now do the same for directories that may need to be removed. This needs to be done
-        # bottom up to ensure any lower nested directories can be deleted first
-        visit_dirs(repo.path, visit_lib_repo)
-        
-    else:
-        visit_files(repo.path, visit_repo)
-
-        # Now do the same for directories that may need to be removed. This needs to be done
-        # bottom up to ensure any lower nested directories can be deleted first
-        visit_dirs(repo.path, visit_repo)
-    
-    if repo.publish():
-        changed.append(repo_name)
-
-
-def update_code(repositories):
-    for repo_name in repositories.keys():
-        sdk_dirs = repositories[repo_name]
-        print '\n=== Updating "%s" ===' % repo_name
-        update_repo(repo_name, sdk_dirs)
-
-
-def update_mbed():
-    update_repo("mbed", [join(BUILD_DIR, "mbed")], lib=True)
-
-def do_sync(options):
-    global push_remote, quiet, commit_msg, changed
-
-    push_remote = not options.nopush
-    quiet = options.quiet
-    commit_msg = options.msg
-    changed = []
-
-    if options.code:
-        update_code(OFFICIAL_CODE)
-
-    if options.mbed:
-        update_mbed()
-
-    if changed:
-        print "Repositories with changes:", changed
-
-    return changed
-
-if __name__ == '__main__':
-    parser = OptionParser()
-
-    parser.add_option("-c", "--code",
-                  action="store_true",  default=False,
-                  help="Update the mbed_official code")
-
-    parser.add_option("-m", "--mbed",
-                  action="store_true",  default=False,
-                  help="Release a build of the mbed library")
-
-    parser.add_option("-n", "--nopush",
-                  action="store_true", default=False,
-                  help="Commit the changes locally only, don't push them")
-
-    parser.add_option("", "--commit_message",
-                  action="store", type="string", default='', dest='msg',
-                  help="Commit message to use for all the commits")
-
-    parser.add_option("-q", "--quiet",
-                  action="store_true", default=False,
-                  help="Don't ask for confirmation before commiting or pushing")
-
-    (options, args) = parser.parse_args()
-
-    do_sync(options)
-
--- a/targets.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,538 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import os
-import binascii
-import struct
-import shutil
-import inspect
-import sys
-from copy import copy
-from collections import namedtuple
-from tools.patch import patch
-from tools.paths import TOOLS_BOOTLOADERS
-from tools.utils import json_file_to_dict
-
-__all__ = ["target", "TARGETS", "TARGET_MAP", "TARGET_NAMES", "CORE_LABELS",
-           "HookError", "generate_py_target", "Target",
-           "CUMULATIVE_ATTRIBUTES", "get_resolution_order"]
-
-CORE_LABELS = {
-    "ARM7TDMI-S": ["ARM7", "LIKE_CORTEX_ARM7"],
-    "Cortex-M0" : ["M0", "CORTEX_M", "LIKE_CORTEX_M0"],
-    "Cortex-M0+": ["M0P", "CORTEX_M", "LIKE_CORTEX_M0"],
-    "Cortex-M1" : ["M1", "CORTEX_M", "LIKE_CORTEX_M1"],
-    "Cortex-M3" : ["M3", "CORTEX_M", "LIKE_CORTEX_M3"],
-    "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
-    "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
-    "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-M7FD" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9"]
-}
-
-################################################################################
-# Generic Target class that reads and interprets the data in targets.json
-
-class HookError(Exception):
-    """ A simple class that represents all the exceptions associated with
-    hooking
-    """
-    pass
-
-CACHES = {}
-def cached(func):
-    """A simple decorator used for automatically caching data returned by a
-    function
-    """
-    def wrapper(*args, **kwargs):
-        """The wrapped function itself"""
-        if not CACHES.has_key((func.__name__, args)):
-            CACHES[(func.__name__, args)] = func(*args, **kwargs)
-        return CACHES[(func.__name__, args)]
-    return wrapper
-
-
-# Cumulative attributes can have values appended to them, so they
-# need to be computed differently than regular attributes
-CUMULATIVE_ATTRIBUTES = ['extra_labels', 'macros', 'device_has', 'features']
-
-
-def get_resolution_order(json_data, target_name, order, level=0):
-    """ Return the order in which target descriptions are searched for
-    attributes. This mimics the Python 2.2 method resolution order, which
-    is what the old targets.py module used. For more details, check
-    http://makina-corpus.com/blog/metier/2014/python-tutorial-understanding-python-mro-class-search-path
-    The resolution order contains (name, level) tuples, where "name" is the
-    name of the class and "level" is the level in the inheritance hierarchy
-    (the target itself is at level 0, its first parent at level 1, its
-    parent's parent at level 2 and so on)
-    """
-    # the resolution order can't contain duplicate target names
-    if target_name not in [l[0] for l in order]:
-        order.append((target_name, level))
-    parents = json_data[target_name].get("inherits", [])
-    for par in parents:
-        order = get_resolution_order(json_data, par, order, level + 1)
-    return order
-
-
-def target(name, json_data):
-    """Construct a target object"""
-    resolution_order = get_resolution_order(json_data, name, [])
-    resolution_order_names = [tgt for tgt, _ in resolution_order]
-    return Target(name=name,
-                  json_data={key: value for key, value in json_data.items()
-                             if key in resolution_order_names},
-                  resolution_order=resolution_order,
-                  resolution_order_names=resolution_order_names)
-
-def generate_py_target(new_targets, name):
-    """Add one or more new target(s) represented as a Python dictionary
-    in 'new_targets'. It is an error to add a target with a name that
-    already exists.
-    """
-    base_targets = Target.get_json_target_data()
-    for new_target in new_targets.keys():
-        if new_target in base_targets:
-            raise Exception("Attempt to add target '%s' that already exists"
-                            % new_target)
-    total_data = {}
-    total_data.update(new_targets)
-    total_data.update(base_targets)
-    return target(name, total_data)
-
-class Target(namedtuple("Target", "name json_data resolution_order resolution_order_names")):
-    """An object to represent a Target (MCU/Board)"""
-
-    # Default location of the 'targets.json' file
-    __targets_json_location_default = os.path.join(
-        os.path.dirname(os.path.abspath(__file__)), 'latest_targets.json')
-
-    # Current/new location of the 'targets.json' file
-    __targets_json_location = None
-
-    @staticmethod
-    @cached
-    def get_json_target_data():
-        """Load the description of JSON target data"""
-        return json_file_to_dict(Target.__targets_json_location or
-                                 Target.__targets_json_location_default)
-
-    @staticmethod
-    def set_targets_json_location(location=None):
-        """Set the location of the targets.json file"""
-        Target.__targets_json_location = (location or
-                                          Target.__targets_json_location_default)
-        # Invalidate caches, since the location of the JSON file changed
-        CACHES.clear()
-
-    @staticmethod
-    @cached
-    def get_module_data():
-        """Get the members of this module using Python's "inspect" module"""
-        return dict([(m[0], m[1]) for m in
-                     inspect.getmembers(sys.modules[__name__])])
-
-    @staticmethod
-    def __add_paths_to_progen(data):
-        """Modify the exporter specification ("progen") by changing all
-        "template" keys to full paths
-        """
-        out = {}
-        for key, val in data.items():
-            if isinstance(val, dict):
-                out[key] = Target.__add_paths_to_progen(val)
-            elif key == "template":
-                out[key] = [os.path.join(os.path.dirname(__file__), 'export', v)
-                            for v in val]
-            else:
-                out[key] = val
-        return out
-
-    def __getattr_cumulative(self, attrname):
-        """Look for the attribute in the class and its parents, as defined by
-        the resolution order
-        """
-        tdata = self.json_data
-        # For a cumulative attribute, figure out when it was defined the
-        # last time (in attribute resolution order) then follow the "_add"
-        # and "_remove" data fields
-        for idx, tgt in enumerate(self.resolution_order):
-            # the attribute was defined at this level in the resolution
-            # order
-            if attrname in tdata[tgt[0]]:
-                def_idx = idx
-                break
-        else:
-            raise AttributeError("Attribute '%s' not found in target '%s'"
-                                 % (attrname, self.name))
-        # Get the starting value of the attribute
-        starting_value = (tdata[self.resolution_order[def_idx][0]][attrname]
-                          or [])[:]
-        # Traverse the resolution list in high inheritance to low
-        # inheritance level, left to right order to figure out all the
-        # other classes that change the definition by adding or removing
-        # elements
-        for idx in xrange(self.resolution_order[def_idx][1] - 1, -1, -1):
-            same_level_targets = [tar[0] for tar in self.resolution_order
-                                  if tar[1] == idx]
-            for tar in same_level_targets:
-                data = tdata[tar]
-                # Do we have anything to add ?
-                if data.has_key(attrname + "_add"):
-                    starting_value.extend(data[attrname + "_add"])
-                # Do we have anything to remove ?
-                if data.has_key(attrname + "_remove"):
-                    # Macros can be defined either without a value (MACRO)
-                    # or with a value (MACRO=10). When removing, we specify
-                    # only the name of the macro, without the value. So we
-                    # need to create a mapping between the macro name and
-                    # its value. This will work for extra_labels and other
-                    # type of arrays as well, since they fall into the
-                    # "macros without a value" category (simple definitions
-                    # without a value).
-                    name_def_map = {}
-                    for crtv in starting_value:
-                        if crtv.find('=') != -1:
-                            temp = crtv.split('=')
-                            if len(temp) != 2:
-                                raise ValueError(
-                                    "Invalid macro definition '%s'" % crtv)
-                            name_def_map[temp[0]] = crtv
-                        else:
-                            name_def_map[crtv] = crtv
-                    for element in data[attrname + "_remove"]:
-                        if element not in name_def_map:
-                            raise ValueError(
-                                ("Unable to remove '%s' in '%s.%s' since "
-                                 % (element, self.name, attrname)) +
-                                "it doesn't exist")
-                        starting_value.remove(name_def_map[element])
-        return starting_value
-
-    def __getattr_helper(self, attrname):
-        """Compute the value of a given target attribute"""
-        if attrname in CUMULATIVE_ATTRIBUTES:
-            return self.__getattr_cumulative(attrname)
-        else:
-            tdata = self.json_data
-            starting_value = None
-            for tgt in self.resolution_order:
-                data = tdata[tgt[0]]
-                if data.has_key(attrname):
-                    starting_value = data[attrname]
-                    break
-            else: # Attribute not found
-                raise AttributeError(
-                    "Attribute '%s' not found in target '%s'"
-                    % (attrname, self.name))
-            # 'progen' needs the full path to the template (the path in JSON is
-            # relative to tools/export)
-            if attrname == "progen":
-                return self.__add_paths_to_progen(starting_value)
-            else:
-                return starting_value
-
-    def __getattr__(self, attrname):
-        """ Return the value of an attribute. This function only computes the
-        attribute's value once, then adds it to the instance attributes (in
-        __dict__), so the next time it is returned directly
-        """
-        result = self.__getattr_helper(attrname)
-        self.__dict__[attrname] = result
-        return result
-
-    @staticmethod
-    @cached
-    def get_target(target_name):
-        """ Return the target instance starting from the target name """
-        return target(target_name, Target.get_json_target_data())
-
-
-    @property
-    def program_cycle_s(self):
-        """Special override for program_cycle_s as it's default value depends
-        upon is_disk_virtual
-        """
-        try:
-            return self.__getattr__("program_cycle_s")
-        except AttributeError:
-            return 4 if self.is_disk_virtual else 1.5
-
-    @property
-    def labels(self):
-        """Get all possible labels for this target"""
-        names = copy(self.resolution_order_names)
-        if "Target" in names:
-            names.remove("Target")
-        labels = (names + CORE_LABELS[self.core] + self.extra_labels)
-        # Automatically define UVISOR_UNSUPPORTED if the target doesn't
-        # specifically define UVISOR_SUPPORTED
-        if "UVISOR_SUPPORTED" not in labels:
-            labels.append("UVISOR_UNSUPPORTED")
-        return labels
-
-    def init_hooks(self, hook, toolchain_name):
-        """Initialize the post-build hooks for a toolchain. For now, this
-        function only allows "post binary" hooks (hooks that are executed
-        after the binary image is extracted from the executable file)
-        """
-
-        # If there's no hook, simply return
-        try:
-            hook_data = self.post_binary_hook
-        except AttributeError:
-            return
-        # A hook was found. The hook's name is in the format
-        # "classname.functionname"
-        temp = hook_data["function"].split(".")
-        if len(temp) != 2:
-            raise HookError(
-                ("Invalid format for hook '%s' in target '%s'"
-                 % (hook_data["function"], self.name)) +
-                " (must be 'class_name.function_name')")
-        class_name, function_name = temp[0], temp[1]
-        # "class_name" must refer to a class in this file, so check if the
-        # class exists
-        mdata = self.get_module_data()
-        if not mdata.has_key(class_name) or \
-           not inspect.isclass(mdata[class_name]):
-            raise HookError(
-                ("Class '%s' required by '%s' in target '%s'"
-                 % (class_name, hook_data["function"], self.name)) +
-                " not found in targets.py")
-        # "function_name" must refer to a static function inside class
-        # "class_name"
-        cls = mdata[class_name]
-        if (not hasattr(cls, function_name)) or \
-           (not inspect.isfunction(getattr(cls, function_name))):
-            raise HookError(
-                ("Static function '%s' " % function_name) +
-                ("required by '%s' " % hook_data["function"]) +
-                ("in target '%s' " % self.name) +
-                ("not found in class '%s'" %  class_name))
-        # Check if the hook specification also has target restrictions
-        toolchain_restrictions = hook_data.get("toolchains", [])
-        if toolchain_restrictions and \
-           (toolchain_name not in toolchain_restrictions):
-            return
-        # Finally, hook the requested function
-        hook.hook_add_binary("post", getattr(cls, function_name))
-
-################################################################################
-# Target specific code goes in this section
-# This code can be invoked from the target description using the
-# "post_binary_hook" key
-
-class LPCTargetCode(object):
-    """General LPC Target patching code"""
-    @staticmethod
-    def lpc_patch(t_self, resources, elf, binf):
-        """Patch an elf file"""
-        t_self.debug("LPC Patch: %s" % os.path.split(binf)[1])
-        patch(binf)
-
-class LPC4088Code(object):
-    """Code specific to the LPC4088"""
-    @staticmethod
-    def binary_hook(t_self, resources, elf, binf):
-        """Hook to be run after an elf file is built"""
-        if not os.path.isdir(binf):
-            # Regular binary file, nothing to do
-            LPCTargetCode.lpc_patch(t_self, resources, elf, binf)
-            return
-        outbin = open(binf + ".temp", "wb")
-        partf = open(os.path.join(binf, "ER_IROM1"), "rb")
-        # Pad the fist part (internal flash) with 0xFF to 512k
-        data = partf.read()
-        outbin.write(data)
-        outbin.write('\xFF' * (512*1024 - len(data)))
-        partf.close()
-        # Read and append the second part (external flash) in chunks of fixed
-        # size
-        chunksize = 128 * 1024
-        partf = open(os.path.join(binf, "ER_IROM2"), "rb")
-        while True:
-            data = partf.read(chunksize)
-            outbin.write(data)
-            if len(data) < chunksize:
-                break
-        partf.close()
-        outbin.close()
-        # Remove the directory with the binary parts and rename the temporary
-        # file to 'binf'
-        shutil.rmtree(binf, True)
-        os.rename(binf + '.temp', binf)
-        t_self.debug("Generated custom binary file (internal flash + SPIFI)")
-        LPCTargetCode.lpc_patch(t_self, resources, elf, binf)
-
-class TEENSY3_1Code(object):
-    """Hooks for the TEENSY3.1"""
-    @staticmethod
-    def binary_hook(t_self, resources, elf, binf):
-        """Hook that is run after elf is generated"""
-        from intelhex import IntelHex
-        binh = IntelHex()
-        binh.loadbin(binf, offset=0)
-
-        with open(binf.replace(".bin", ".hex"), "w") as file_desc:
-            binh.tofile(file_desc, format='hex')
-
-class MTSCode(object):
-    """Generic MTS code"""
-    @staticmethod
-    def _combine_bins_helper(target_name, binf):
-        """combine bins with the bootloader for a particular target"""
-        loader = os.path.join(TOOLS_BOOTLOADERS, target_name, "bootloader.bin")
-        target = binf + ".tmp"
-        if not os.path.exists(loader):
-            print "Can't find bootloader binary: " + loader
-            return
-        outbin = open(target, 'w+b')
-        part = open(loader, 'rb')
-        data = part.read()
-        outbin.write(data)
-        outbin.write('\xFF' * (64*1024 - len(data)))
-        part.close()
-        part = open(binf, 'rb')
-        data = part.read()
-        outbin.write(data)
-        part.close()
-        outbin.seek(0, 0)
-        data = outbin.read()
-        outbin.seek(0, 1)
-        crc = struct.pack('<I', binascii.crc32(data) & 0xFFFFFFFF)
-        outbin.write(crc)
-        outbin.close()
-        os.remove(binf)
-        os.rename(target, binf)
-
-    @staticmethod
-    def combine_bins_mts_dot(t_self, resources, elf, binf):
-        """A hook for the MTS MDOT"""
-        MTSCode._combine_bins_helper("MTS_MDOT_F411RE", binf)
-
-    @staticmethod
-    def combine_bins_mts_dragonfly(t_self, resources, elf, binf):
-        """A hoof for the MTS Dragonfly"""
-        MTSCode._combine_bins_helper("MTS_DRAGONFLY_F411RE", binf)
-
-class MCU_NRF51Code(object):
-    """NRF51 Hooks"""
-    @staticmethod
-    def binary_hook(t_self, resources, _, binf):
-        """Hook that merges the soft device with the bin file"""
-        # Scan to find the actual paths of soft device
-        sdf = None
-        for softdevice_and_offset_entry\
-            in t_self.target.EXPECTED_SOFTDEVICES_WITH_OFFSETS:
-            for hexf in resources.hex_files:
-                if hexf.find(softdevice_and_offset_entry['name']) != -1:
-                    t_self.debug("SoftDevice file found %s."
-                                 % softdevice_and_offset_entry['name'])
-                    sdf = hexf
-
-                if sdf is not None:
-                    break
-            if sdf is not None:
-                break
-
-        if sdf is None:
-            t_self.debug("Hex file not found. Aborting.")
-            return
-
-        # Look for bootloader file that matches this soft device or bootloader
-        # override image
-        blf = None
-        if t_self.target.MERGE_BOOTLOADER is True:
-            for hexf in resources.hex_files:
-                if hexf.find(t_self.target.OVERRIDE_BOOTLOADER_FILENAME) != -1:
-                    t_self.debug("Bootloader file found %s."
-                                 % t_self.target.OVERRIDE_BOOTLOADER_FILENAME)
-                    blf = hexf
-                    break
-                elif hexf.find(softdevice_and_offset_entry['boot']) != -1:
-                    t_self.debug("Bootloader file found %s."
-                                 % softdevice_and_offset_entry['boot'])
-                    blf = hexf
-                    break
-
-        # Merge user code with softdevice
-        from intelhex import IntelHex
-        binh = IntelHex()
-        binh.loadbin(binf, offset=softdevice_and_offset_entry['offset'])
-
-        if t_self.target.MERGE_SOFT_DEVICE is True:
-            t_self.debug("Merge SoftDevice file %s"
-                         % softdevice_and_offset_entry['name'])
-            sdh = IntelHex(sdf)
-            binh.merge(sdh)
-
-        if t_self.target.MERGE_BOOTLOADER is True and blf is not None:
-            t_self.debug("Merge BootLoader file %s" % blf)
-            blh = IntelHex(blf)
-            binh.merge(blh)
-
-        with open(binf.replace(".bin", ".hex"), "w") as fileout:
-            binh.tofile(fileout, format='hex')
-
-class NCS36510TargetCode:
-    @staticmethod
-    def ncs36510_addfib(t_self, resources, elf, binf):
-        from tools.add_fib import add_fib_at_start
-        print("binf ", binf)
-        add_fib_at_start(binf[:-4])
-################################################################################
-
-# Instantiate all public targets
-TARGETS = [Target.get_target(name) for name, value
-           in Target.get_json_target_data().items()
-           if value.get("public", True)]
-
-# Map each target name to its unique instance
-TARGET_MAP = dict([(t.name, t) for t in TARGETS])
-
-TARGET_NAMES = TARGET_MAP.keys()
-
-# Some targets with different name have the same exporters
-EXPORT_MAP = {}
-
-# Detection APIs
-def get_target_detect_codes():
-    """ Returns dictionary mapping detect_code -> platform_name
-    """
-    result = {}
-    for tgt in TARGETS:
-        for detect_code in tgt.detect_code:
-            result[detect_code] = tgt.name
-    return result
-
-def set_targets_json_location(location=None):
-    """Sets the location of the JSON file that contains the targets"""
-    # First instruct Target about the new location
-    Target.set_targets_json_location(location)
-    # Then re-initialize TARGETS, TARGET_MAP and TARGET_NAMES. The
-    # re-initialization does not create new variables, it keeps the old ones
-    # instead. This ensures compatibility with code that does
-    # "from tools.targets import TARGET_NAMES"
-    TARGETS[:] = [Target.get_target(tgt) for tgt, obj
-                  in Target.get_json_target_data().items()
-                  if obj.get("public", True)]
-    TARGET_MAP.clear()
-    TARGET_MAP.update(dict([(tgt.name, tgt) for tgt in TARGETS]))
-    TARGET_NAMES[:] = TARGET_MAP.keys()
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/LPC.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,50 @@
+"""
+mbed SDK
+Copyright (c) 2011-2013 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
+http://www.nxp.com/documents/user_manual/UM10360.pdf
+
+32.3.1.1 Criterion for Valid User Code
+The reserved Cortex-M3 exception vector location 7 (offset 0x1C in the vector table)
+should contain the 2's complement of the check-sum of table entries 0 through 6. This
+causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
+the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
+transferred to the user code.
+"""
+from struct import unpack, pack
+
+
+def patch(bin_path):
+    with open(bin_path, 'r+b') as bin:
+        # Read entries 0 through 6 (Little Endian 32bits words)
+        vector = [unpack('<I', bin.read(4))[0] for _ in range(7)]
+
+        # location 7 (offset 0x1C in the vector table) should contain the 2's
+        # complement of the check-sum of table entries 0 through 6
+        bin.seek(0x1C)
+        bin.write(pack('<I', (~sum(vector) + 1) & 0xFFFFFFFF))
+
+
+def is_patched(bin_path):
+    with open(bin_path, 'rb') as bin:
+        # The checksum of the first 8 table entries should be 0
+        return (sum([unpack('<I', bin.read(4))[0] for _ in range(8)]) & 0xFFFFFFFF) == 0
+
+
+if __name__ == '__main__':
+    bin_path = "C:/Users/emimon01/releases/emilmont/build/test/LPC1768/ARM/MBED_A1/basic.bin"
+    patch(bin_path)
+    assert is_patched(bin_path), "The file is not patched"
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/NCS.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,215 @@
+"""
+@copyright (c) 2012 ON Semiconductor. All rights reserved.
+ON Semiconductor is supplying this software for use with ON Semiconductor
+processor based microcontrollers only.
+THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
+INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+"""
+
+from __future__ import absolute_import
+from __future__ import print_function
+
+import itertools
+import binascii
+import intelhex
+from tools.config import Config
+
+FIB_BASE = 0x2000
+FLASH_BASE = 0x3000
+FW_REV = 0x01000100
+TRIM_BASE = 0x2800
+
+def ranges(i):
+    for _, b in itertools.groupby(enumerate(i), lambda x_y: x_y[1] - x_y[0]):
+        b = list(b)
+        yield b[0][1], b[-1][1]
+
+
+def add_fib_at_start(arginput):
+    input_file = arginput + ".bin"
+    file_name_hex = arginput + "_fib.hex"
+    file_name_bin = arginput + ".bin"
+
+    # Read in hex file
+    input_hex_file = intelhex.IntelHex()
+    input_hex_file.padding = 0x00
+    input_hex_file.loadbin(input_file, offset=FLASH_BASE)
+
+    output_hex_file = intelhex.IntelHex()
+    output_hex_file.padding = 0x00
+
+    # Get the starting and ending address
+    addresses = input_hex_file.addresses()
+    addresses.sort()
+    start_end_pairs = list(ranges(addresses))
+    regions = len(start_end_pairs)
+
+    if regions == 1:
+        start, end = start_end_pairs[0]
+    else:
+        start = min(min(start_end_pairs))
+        end = max(max(start_end_pairs))
+
+    assert start >= FLASH_BASE, ("Error - start 0x%x less than begining of user\
+    flash area" %start)
+    # Compute checksum over the range (don't include data at location of crc)
+    size = end - start + 1
+    data = input_hex_file.tobinarray(start=start, size=size)
+    crc32 = binascii.crc32(data) & 0xFFFFFFFF
+
+    fw_rev = FW_REV
+
+    checksum = (start + size + crc32 + fw_rev) & 0xFFFFFFFF
+
+    print("Writing FIB: base 0x%08X, size 0x%08X, crc32 0x%08X, fw rev 0x%08X,\
+    checksum 0x%08X" % (start, size, crc32, fw_rev, checksum))
+
+#expected initial values used by daplink to validate that it is a valid bin
+#file added as dummy values in this file because the fib area preceeds the
+#application area the bootloader will ignore these dummy values
+#  00 is stack pointer (RAM address)
+#  04 is Reset vector  (FLASH address)
+#  08 NMI_Handler      (FLASH address)
+#  0C HardFault_Handler(FLASH address)
+#  10 dummy
+    dummy_sp = 0x3FFFFC00
+    dummy_reset_vector = 0x00003625
+    dummy_nmi_handler = 0x00003761
+    dummy_hardfault_handler = 0x00003691
+    dummy_blank = 0x00000000
+
+#expected fib structure
+#typedef struct fib{
+    #uint32_t base;     /**< Base offset of firmware, indicating what flash the
+    #                        firmware is in. (will never be 0x11111111) */
+    #uint32_t size;     /**< Size of the firmware */
+    #uint32_t crc;      /**< CRC32 for firmware correctness check */
+    #uint32_t rev;      /**< Revision number */
+    #uint32_t checksum; /**< Check-sum of information block */
+#}fib_t, *fib_pt;
+
+    fib_start = FIB_BASE
+    dummy_fib_size = 20
+    fib_size = 20
+    trim_size = 24
+    user_code_start = FLASH_BASE
+    trim_area_start = TRIM_BASE
+
+    # Write FIB to the file in little endian
+    output_hex_file[fib_start + 0] = (dummy_sp >> 0) & 0xFF
+    output_hex_file[fib_start + 1] = (dummy_sp >> 8) & 0xFF
+    output_hex_file[fib_start + 2] = (dummy_sp >> 16) & 0xFF
+    output_hex_file[fib_start + 3] = (dummy_sp >> 24) & 0xFF
+
+    output_hex_file[fib_start + 4] = (dummy_reset_vector >> 0) & 0xFF
+    output_hex_file[fib_start + 5] = (dummy_reset_vector >> 8) & 0xFF
+    output_hex_file[fib_start + 6] = (dummy_reset_vector >> 16) & 0xFF
+    output_hex_file[fib_start + 7] = (dummy_reset_vector >> 24) & 0xFF
+
+    output_hex_file[fib_start + 8] = (dummy_nmi_handler >> 0) & 0xFF
+    output_hex_file[fib_start + 9] = (dummy_nmi_handler >> 8) & 0xFF
+    output_hex_file[fib_start + 10] = (dummy_nmi_handler >> 16) & 0xFF
+    output_hex_file[fib_start + 11] = (dummy_nmi_handler >> 24) & 0xFF
+
+    output_hex_file[fib_start + 12] = (dummy_hardfault_handler >> 0) & 0xFF
+    output_hex_file[fib_start + 13] = (dummy_hardfault_handler >> 8) & 0xFF
+    output_hex_file[fib_start + 14] = (dummy_hardfault_handler >> 16) & 0xFF
+    output_hex_file[fib_start + 15] = (dummy_hardfault_handler >> 24) & 0xFF
+
+    output_hex_file[fib_start + 16] = (dummy_blank >> 0) & 0xFF
+    output_hex_file[fib_start + 17] = (dummy_blank >> 8) & 0xFF
+    output_hex_file[fib_start + 18] = (dummy_blank >> 16) & 0xFF
+    output_hex_file[fib_start + 19] = (dummy_blank >> 24) & 0xFF
+
+    # Write FIB to the file in little endian
+    output_hex_file[fib_start + 20] = (start >> 0) & 0xFF
+    output_hex_file[fib_start + 21] = (start >> 8) & 0xFF
+    output_hex_file[fib_start + 22] = (start >> 16) & 0xFF
+    output_hex_file[fib_start + 23] = (start >> 24) & 0xFF
+
+    output_hex_file[fib_start + 24] = (size >> 0) & 0xFF
+    output_hex_file[fib_start + 25] = (size >> 8) & 0xFF
+    output_hex_file[fib_start + 26] = (size >> 16) & 0xFF
+    output_hex_file[fib_start + 27] = (size >> 24) & 0xFF
+
+    output_hex_file[fib_start + 28] = (crc32 >> 0) & 0xFF
+    output_hex_file[fib_start + 29] = (crc32 >> 8) & 0xFF
+    output_hex_file[fib_start + 30] = (crc32 >> 16) & 0xFF
+    output_hex_file[fib_start + 31] = (crc32 >> 24) & 0xFF
+
+    output_hex_file[fib_start + 32] = (fw_rev >> 0) & 0xFF
+    output_hex_file[fib_start + 33] = (fw_rev >> 8) & 0xFF
+    output_hex_file[fib_start + 34] = (fw_rev >> 16) & 0xFF
+    output_hex_file[fib_start + 35] = (fw_rev >> 24) & 0xFF
+
+    output_hex_file[fib_start + 36] = (checksum >> 0) & 0xFF
+    output_hex_file[fib_start + 37] = (checksum >> 8) & 0xFF
+    output_hex_file[fib_start + 38] = (checksum >> 16) & 0xFF
+    output_hex_file[fib_start + 39] = (checksum >> 24) & 0xFF
+
+    #pad the rest of the file
+    for i in range(fib_start + dummy_fib_size + fib_size, trim_area_start):
+        output_hex_file[i] = 0xFF
+
+    # Read in configuration data from the config parameter in targets.json
+    configData = Config('NCS36510')
+    paramData = configData.get_target_config_data()
+    for v in paramData.values():
+        if (v.name == "target.mac-addr-high"):
+            mac_addr_high = int(v.value, 16)
+        elif (v.name == "target.mac-addr-low"):
+            mac_addr_low = int(v.value,16)
+        elif (v.name == "target.32KHz-clk-trim"):
+            clk_32k_trim = int(v.value,16)
+        elif (v.name == "target.32MHz-clk-trim"):
+            clk_32m_trim = int(v.value,16)
+        elif (v.name == "target.rssi-trim"):
+            rssi = int(v.value,16)
+        elif (v.name == "target.txtune-trim"):
+            txtune = int(v.value,16)
+        else:
+            print("Not a valid param")
+
+    output_hex_file[trim_area_start + 0] = mac_addr_low & 0xFF
+    output_hex_file[trim_area_start + 1] = (mac_addr_low >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 2] = (mac_addr_low >> 16) & 0xFF
+    output_hex_file[trim_area_start + 3] = (mac_addr_low >> 24) & 0xFF
+    
+    output_hex_file[trim_area_start + 4] = mac_addr_high & 0xFF
+    output_hex_file[trim_area_start + 5] = (mac_addr_high >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 6] = (mac_addr_high >> 16) & 0xFF
+    output_hex_file[trim_area_start + 7] = (mac_addr_high >> 24) & 0xFF
+
+    output_hex_file[trim_area_start + 8] = clk_32k_trim & 0xFF
+    output_hex_file[trim_area_start + 9] = (clk_32k_trim >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 10] = (clk_32k_trim >> 16) & 0xFF
+    output_hex_file[trim_area_start + 11] = (clk_32k_trim >> 24) & 0xFF
+
+    output_hex_file[trim_area_start + 12] = clk_32m_trim & 0xFF
+    output_hex_file[trim_area_start + 13] = (clk_32m_trim >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 14] = (clk_32m_trim >> 16) & 0xFF
+    output_hex_file[trim_area_start + 15] = (clk_32m_trim >> 24) & 0xFF
+
+    output_hex_file[trim_area_start + 16] = rssi & 0xFF
+    output_hex_file[trim_area_start + 17] = (rssi >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 18] = (rssi >> 16) & 0xFF
+    output_hex_file[trim_area_start + 19] = (rssi >> 24) & 0xFF
+
+    output_hex_file[trim_area_start + 20] = txtune & 0xFF
+    output_hex_file[trim_area_start + 21] = (txtune >> 8)  & 0xFF
+    output_hex_file[trim_area_start + 22] = (txtune >> 16) & 0xFF
+    output_hex_file[trim_area_start + 23] = (txtune >> 24) & 0xFF
+    
+    # pad the rest of the area with 0xFF
+    for i in range(trim_area_start + trim_size, user_code_start):
+        output_hex_file[i] = 0xFF
+
+    #merge two hex files
+    output_hex_file.merge(input_hex_file, overlap='error')
+
+    # Write out file(s)
+    output_hex_file.tofile(file_name_hex, 'hex')
+    output_hex_file.tofile(file_name_bin, 'bin')
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/REALTEK_RTL8195AM.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,141 @@
+"""
+mbed REALTEK_RTL8195AM elf2bin script
+Copyright (c) 2011-2016 Realtek Semiconductor Corp.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+LIBRARIES BUILD
+"""
+
+import sys, array, struct, os, re, subprocess
+import hashlib
+
+from tools.paths import TOOLS_BOOTLOADERS
+from datetime import datetime
+
+# Constant Variables
+RAM2_RSVD = 0x3131373835393138
+
+def write_fixed_width_string(value, width, output):
+    # cut string to list & reverse
+    line = [value[i:i+2] for i in range(0, len(value), 2)]
+    output.write("".join([chr(long(b, 16)) for b in line]))
+
+def write_fixed_width_value(value, width, output):
+    # convert to string
+    line = format(value, '0%dx' % (width))
+    if len(line) > width:
+        print "[ERROR] value 0x%s cannot fit width %d" % (line, width)
+        sys.exit(-1)
+    # cut string to list & reverse
+    line = [line[i:i+2] for i in range(0, len(line), 2)]
+    line.reverse()
+    # convert to write buffer
+    output.write("".join([chr(long(b, 16)) for b in line]))
+
+def append_image_file(image, output):
+    input = open(image, "rb")
+    output.write(input.read())
+    input.close()
+
+def prepend(image, image_prepend, toolchain, info):
+    output = open(image_prepend, "wb")  
+    write_fixed_width_value(info['size'], 8, output)
+    write_fixed_width_value(info['addr'], 8, output)
+    write_fixed_width_value(RAM2_RSVD, 16, output)
+    with open(image, "rb") as input:
+        if toolchain == "IAR":
+            input.seek(info['addr'])
+        output.write(input.read(info['size']))
+    output.close()
+
+def parse_section(toolchain, elf, section):
+    info = {'addr':None, 'size':0};
+    if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]:
+        print "[ERROR] unsupported toolchain " + toolchain
+        sys.exit(-1)
+    
+    mapfile = elf.rsplit(".", 1)[0] + ".map"
+    
+    with open(mapfile, 'r') as infile:
+        # Search area to parse
+        for line in infile:
+            if toolchain == "GCC_ARM":
+                # .image2.table   0x[00000000]30000000       0x18
+                #                 0x[00000000]30000000       __image2_start__ = .
+                #                 0x[00000000]30000000       __image2_entry_func__ = .
+                match = re.match(r'^' + section + \
+                        r'\s+0x0{,8}(?P<addr>[0-9A-Fa-f]{8})\s+0x(?P<size>[0-9A-Fa-f]+).*$', line)
+            elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]:
+                # Memory Map of the image
+                #   Load Region LR_DRAM (Base: 0x30000000, Size: 0x00006a74, Max: 0x00200000, ABSOLUTE)
+                #     Execution Region IMAGE2_TABLE (Base: 0x30000000, Size: 0x00000018, Max: 0xffffffff, ABSOLUTE, FIXED)
+                #     Base Addr    Size         Type   Attr      Idx    E Section Name        Object
+                #     0x30000000   0x00000004   Data   RO         5257    .image2.ram.data    rtl8195a_init.o
+                match = re.match(r'^.*Region\s+' + section + \
+                        r'\s+\(Base: 0x(?P<addr>[0-9A-Fa-f]{8}),\s+Size: 0x(?P<size>[0-9A-Fa-f]+), .*\)$', line)
+            elif toolchain == "IAR":
+                #   Section                 Kind        Address     Size  Object
+                #   -------                 ----        -------     ----  ------
+                # "A3":                                           0x8470
+                #   IMAGE2                           0x10006000   0x5d18  <Block>
+                #     .ram_image2.text               0x10006000   0x5bbc  <Block>
+                #       .rodata             const    0x10006000     0x14  retarget.o [17]
+                match = re.match(r'^\s+' + section + \
+                        r'\s+0x(?P<addr>[0-9A-Fa-f]{8})\s+0x(?P<size>[0-9A-Fa-f]+)\s+.*<Block>$', line)
+            if match:
+                info['addr'] = int(match.group("addr"), 16)
+                try:
+                    info['size'] = int(match.group("size"), 16)
+                except IndexError:
+                    print "[WARNING] cannot find the size of section " + section
+                return info
+
+    print "[ERROR] cannot find the address of section " + section    
+    return info
+
+# ----------------------------
+#       main function
+# ----------------------------
+def rtl8195a_elf2bin(toolchain, image_elf, image_bin):
+    if toolchain == "GCC_ARM":
+        img2_sections = [".image2.table", ".text", ".data"]
+    elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]:
+        img2_sections = [".image2.table", ".text", ".data"]
+    elif toolchain == "IAR":
+        # actually it's block
+        img2_sections = ["IMAGE2"]
+    else:
+        print("[error] unsupported toolchain") + toolchain
+        return
+    ram2_info = {'addr':None, 'size':0}
+    image_name = os.path.splitext(image_elf)[0]
+
+    ram1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin")
+    ram2_prepend_bin = image_name + '-ram_2_prepend.bin'
+    
+    old_bin = image_name + '.bin'
+    for section in img2_sections:
+        section_info = parse_section(toolchain, image_elf, section)
+        if ram2_info['addr'] is None or ram2_info['addr'] > section_info['addr']:
+            ram2_info['addr'] = section_info['addr']
+        ram2_info['size'] = ram2_info['size'] + section_info['size']
+
+    prepend(old_bin, ram2_prepend_bin, toolchain, ram2_info)
+    # write output file
+    output = open(image_bin, "wb")
+    append_image_file(ram1_prepend_bin, output)
+    append_image_file(ram2_prepend_bin, output)
+    output.close()
+    # post built done
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -0,0 +1,545 @@
+"""
+mbed SDK
+Copyright (c) 2011-2016 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+
+import os
+import binascii
+import struct
+import shutil
+import inspect
+import sys
+from copy import copy
+from collections import namedtuple
+from tools.targets.LPC import patch
+from tools.paths import TOOLS_BOOTLOADERS
+from tools.utils import json_file_to_dict
+
+__all__ = ["target", "TARGETS", "TARGET_MAP", "TARGET_NAMES", "CORE_LABELS",
+           "HookError", "generate_py_target", "Target",
+           "CUMULATIVE_ATTRIBUTES", "get_resolution_order"]
+
+CORE_LABELS = {
+    "Cortex-M0" : ["M0", "CORTEX_M", "LIKE_CORTEX_M0"],
+    "Cortex-M0+": ["M0P", "CORTEX_M", "LIKE_CORTEX_M0"],
+    "Cortex-M1" : ["M1", "CORTEX_M", "LIKE_CORTEX_M1"],
+    "Cortex-M3" : ["M3", "CORTEX_M", "LIKE_CORTEX_M3"],
+    "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
+    "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
+    "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
+    "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
+    "Cortex-M7FD" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
+    "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9"]
+}
+
+################################################################################
+# Generic Target class that reads and interprets the data in targets.json
+
+class HookError(Exception):
+    """ A simple class that represents all the exceptions associated with
+    hooking
+    """
+    pass
+
+CACHES = {}
+def cached(func):
+    """A simple decorator used for automatically caching data returned by a
+    function
+    """
+    def wrapper(*args, **kwargs):
+        """The wrapped function itself"""
+        if not CACHES.has_key((func.__name__, args)):
+            CACHES[(func.__name__, args)] = func(*args, **kwargs)
+        return CACHES[(func.__name__, args)]
+    return wrapper
+
+
+# Cumulative attributes can have values appended to them, so they
+# need to be computed differently than regular attributes
+CUMULATIVE_ATTRIBUTES = ['extra_labels', 'macros', 'device_has', 'features']
+
+
+def get_resolution_order(json_data, target_name, order, level=0):
+    """ Return the order in which target descriptions are searched for
+    attributes. This mimics the Python 2.2 method resolution order, which
+    is what the old targets.py module used. For more details, check
+    http://makina-corpus.com/blog/metier/2014/python-tutorial-understanding-python-mro-class-search-path
+    The resolution order contains (name, level) tuples, where "name" is the
+    name of the class and "level" is the level in the inheritance hierarchy
+    (the target itself is at level 0, its first parent at level 1, its
+    parent's parent at level 2 and so on)
+    """
+    # the resolution order can't contain duplicate target names
+    if target_name not in [l[0] for l in order]:
+        order.append((target_name, level))
+    parents = json_data[target_name].get("inherits", [])
+    for par in parents:
+        order = get_resolution_order(json_data, par, order, level + 1)
+    return order
+
+
+def target(name, json_data):
+    """Construct a target object"""
+    resolution_order = get_resolution_order(json_data, name, [])
+    resolution_order_names = [tgt for tgt, _ in resolution_order]
+    return Target(name=name,
+                  json_data={key: value for key, value in json_data.items()
+                             if key in resolution_order_names},
+                  resolution_order=resolution_order,
+                  resolution_order_names=resolution_order_names)
+
+def generate_py_target(new_targets, name):
+    """Add one or more new target(s) represented as a Python dictionary
+    in 'new_targets'. It is an error to add a target with a name that
+    already exists.
+    """
+    base_targets = Target.get_json_target_data()
+    for new_target in new_targets.keys():
+        if new_target in base_targets:
+            raise Exception("Attempt to add target '%s' that already exists"
+                            % new_target)
+    total_data = {}
+    total_data.update(new_targets)
+    total_data.update(base_targets)
+    return target(name, total_data)
+
+class Target(namedtuple("Target", "name json_data resolution_order resolution_order_names")):
+    """An object to represent a Target (MCU/Board)"""
+
+    # Default location of the 'targets.json' file
+    __targets_json_location_default = os.path.join(
+        os.path.dirname(os.path.abspath(__file__)), '..', 'latest_targets.json')
+
+    # Current/new location of the 'targets.json' file
+    __targets_json_location = None
+
+    @staticmethod
+    @cached
+    def get_json_target_data():
+        """Load the description of JSON target data"""
+        return json_file_to_dict(Target.__targets_json_location or
+                                 Target.__targets_json_location_default)
+
+    @staticmethod
+    def set_targets_json_location(location=None):
+        """Set the location of the targets.json file"""
+        Target.__targets_json_location = (location or
+                                          Target.__targets_json_location_default)
+        # Invalidate caches, since the location of the JSON file changed
+        CACHES.clear()
+
+    @staticmethod
+    @cached
+    def get_module_data():
+        """Get the members of this module using Python's "inspect" module"""
+        return dict([(m[0], m[1]) for m in
+                     inspect.getmembers(sys.modules[__name__])])
+
+    @staticmethod
+    def __add_paths_to_progen(data):
+        """Modify the exporter specification ("progen") by changing all
+        "template" keys to full paths
+        """
+        out = {}
+        for key, val in data.items():
+            if isinstance(val, dict):
+                out[key] = Target.__add_paths_to_progen(val)
+            elif key == "template":
+                out[key] = [os.path.join(os.path.dirname(__file__), 'export', v)
+                            for v in val]
+            else:
+                out[key] = val
+        return out
+
+    def __getattr_cumulative(self, attrname):
+        """Look for the attribute in the class and its parents, as defined by
+        the resolution order
+        """
+        tdata = self.json_data
+        # For a cumulative attribute, figure out when it was defined the
+        # last time (in attribute resolution order) then follow the "_add"
+        # and "_remove" data fields
+        for idx, tgt in enumerate(self.resolution_order):
+            # the attribute was defined at this level in the resolution
+            # order
+            if attrname in tdata[tgt[0]]:
+                def_idx = idx
+                break
+        else:
+            raise AttributeError("Attribute '%s' not found in target '%s'"
+                                 % (attrname, self.name))
+        # Get the starting value of the attribute
+        starting_value = (tdata[self.resolution_order[def_idx][0]][attrname]
+                          or [])[:]
+        # Traverse the resolution list in high inheritance to low
+        # inheritance level, left to right order to figure out all the
+        # other classes that change the definition by adding or removing
+        # elements
+        for idx in xrange(self.resolution_order[def_idx][1] - 1, -1, -1):
+            same_level_targets = [tar[0] for tar in self.resolution_order
+                                  if tar[1] == idx]
+            for tar in same_level_targets:
+                data = tdata[tar]
+                # Do we have anything to add ?
+                if data.has_key(attrname + "_add"):
+                    starting_value.extend(data[attrname + "_add"])
+                # Do we have anything to remove ?
+                if data.has_key(attrname + "_remove"):
+                    # Macros can be defined either without a value (MACRO)
+                    # or with a value (MACRO=10). When removing, we specify
+                    # only the name of the macro, without the value. So we
+                    # need to create a mapping between the macro name and
+                    # its value. This will work for extra_labels and other
+                    # type of arrays as well, since they fall into the
+                    # "macros without a value" category (simple definitions
+                    # without a value).
+                    name_def_map = {}
+                    for crtv in starting_value:
+                        if crtv.find('=') != -1:
+                            temp = crtv.split('=')
+                            if len(temp) != 2:
+                                raise ValueError(
+                                    "Invalid macro definition '%s'" % crtv)
+                            name_def_map[temp[0]] = crtv
+                        else:
+                            name_def_map[crtv] = crtv
+                    for element in data[attrname + "_remove"]:
+                        if element not in name_def_map:
+                            raise ValueError(
+                                ("Unable to remove '%s' in '%s.%s' since "
+                                 % (element, self.name, attrname)) +
+                                "it doesn't exist")
+                        starting_value.remove(name_def_map[element])
+        return starting_value
+
+    def __getattr_helper(self, attrname):
+        """Compute the value of a given target attribute"""
+        if attrname in CUMULATIVE_ATTRIBUTES:
+            return self.__getattr_cumulative(attrname)
+        else:
+            tdata = self.json_data
+            starting_value = None
+            for tgt in self.resolution_order:
+                data = tdata[tgt[0]]
+                if data.has_key(attrname):
+                    starting_value = data[attrname]
+                    break
+            else: # Attribute not found
+                raise AttributeError(
+                    "Attribute '%s' not found in target '%s'"
+                    % (attrname, self.name))
+            # 'progen' needs the full path to the template (the path in JSON is
+            # relative to tools/export)
+            if attrname == "progen":
+                return self.__add_paths_to_progen(starting_value)
+            else:
+                return starting_value
+
+    def __getattr__(self, attrname):
+        """ Return the value of an attribute. This function only computes the
+        attribute's value once, then adds it to the instance attributes (in
+        __dict__), so the next time it is returned directly
+        """
+        result = self.__getattr_helper(attrname)
+        self.__dict__[attrname] = result
+        return result
+
+    @staticmethod
+    @cached
+    def get_target(target_name):
+        """ Return the target instance starting from the target name """
+        return target(target_name, Target.get_json_target_data())
+
+
+    @property
+    def program_cycle_s(self):
+        """Special override for program_cycle_s as it's default value depends
+        upon is_disk_virtual
+        """
+        try:
+            return self.__getattr__("program_cycle_s")
+        except AttributeError:
+            return 4 if self.is_disk_virtual else 1.5
+
+    @property
+    def labels(self):
+        """Get all possible labels for this target"""
+        names = copy(self.resolution_order_names)
+        if "Target" in names:
+            names.remove("Target")
+        labels = (names + CORE_LABELS[self.core] + self.extra_labels)
+        # Automatically define UVISOR_UNSUPPORTED if the target doesn't
+        # specifically define UVISOR_SUPPORTED
+        if "UVISOR_SUPPORTED" not in labels:
+            labels.append("UVISOR_UNSUPPORTED")
+        return labels
+
+    def init_hooks(self, hook, toolchain_name):
+        """Initialize the post-build hooks for a toolchain. For now, this
+        function only allows "post binary" hooks (hooks that are executed
+        after the binary image is extracted from the executable file)
+        """
+
+        # If there's no hook, simply return
+        try:
+            hook_data = self.post_binary_hook
+        except AttributeError:
+            return
+        # A hook was found. The hook's name is in the format
+        # "classname.functionname"
+        temp = hook_data["function"].split(".")
+        if len(temp) != 2:
+            raise HookError(
+                ("Invalid format for hook '%s' in target '%s'"
+                 % (hook_data["function"], self.name)) +
+                " (must be 'class_name.function_name')")
+        class_name, function_name = temp[0], temp[1]
+        # "class_name" must refer to a class in this file, so check if the
+        # class exists
+        mdata = self.get_module_data()
+        if not mdata.has_key(class_name) or \
+           not inspect.isclass(mdata[class_name]):
+            raise HookError(
+                ("Class '%s' required by '%s' in target '%s'"
+                 % (class_name, hook_data["function"], self.name)) +
+                " not found in targets.py")
+        # "function_name" must refer to a static function inside class
+        # "class_name"
+        cls = mdata[class_name]
+        if (not hasattr(cls, function_name)) or \
+           (not inspect.isfunction(getattr(cls, function_name))):
+            raise HookError(
+                ("Static function '%s' " % function_name) +
+                ("required by '%s' " % hook_data["function"]) +
+                ("in target '%s' " % self.name) +
+                ("not found in class '%s'" %  class_name))
+        # Check if the hook specification also has target restrictions
+        toolchain_restrictions = hook_data.get("toolchains", [])
+        if toolchain_restrictions and \
+           (toolchain_name not in toolchain_restrictions):
+            return
+        # Finally, hook the requested function
+        hook.hook_add_binary("post", getattr(cls, function_name))
+
+################################################################################
+# Target specific code goes in this section
+# This code can be invoked from the target description using the
+# "post_binary_hook" key
+
+class LPCTargetCode(object):
+    """General LPC Target patching code"""
+    @staticmethod
+    def lpc_patch(t_self, resources, elf, binf):
+        """Patch an elf file"""
+        t_self.debug("LPC Patch: %s" % os.path.split(binf)[1])
+        patch(binf)
+
+class LPC4088Code(object):
+    """Code specific to the LPC4088"""
+    @staticmethod
+    def binary_hook(t_self, resources, elf, binf):
+        """Hook to be run after an elf file is built"""
+        if not os.path.isdir(binf):
+            # Regular binary file, nothing to do
+            LPCTargetCode.lpc_patch(t_self, resources, elf, binf)
+            return
+        outbin = open(binf + ".temp", "wb")
+        partf = open(os.path.join(binf, "ER_IROM1"), "rb")
+        # Pad the fist part (internal flash) with 0xFF to 512k
+        data = partf.read()
+        outbin.write(data)
+        outbin.write('\xFF' * (512*1024 - len(data)))
+        partf.close()
+        # Read and append the second part (external flash) in chunks of fixed
+        # size
+        chunksize = 128 * 1024
+        partf = open(os.path.join(binf, "ER_IROM2"), "rb")
+        while True:
+            data = partf.read(chunksize)
+            outbin.write(data)
+            if len(data) < chunksize:
+                break
+        partf.close()
+        outbin.close()
+        # Remove the directory with the binary parts and rename the temporary
+        # file to 'binf'
+        shutil.rmtree(binf, True)
+        os.rename(binf + '.temp', binf)
+        t_self.debug("Generated custom binary file (internal flash + SPIFI)")
+        LPCTargetCode.lpc_patch(t_self, resources, elf, binf)
+
+class TEENSY3_1Code(object):
+    """Hooks for the TEENSY3.1"""
+    @staticmethod
+    def binary_hook(t_self, resources, elf, binf):
+        """Hook that is run after elf is generated"""
+        # This function is referenced by old versions of targets.json and should
+        # be kept for backwards compatibility.
+        pass
+
+class MTSCode(object):
+    """Generic MTS code"""
+    @staticmethod
+    def _combine_bins_helper(target_name, binf):
+        """combine bins with the bootloader for a particular target"""
+        loader = os.path.join(TOOLS_BOOTLOADERS, target_name, "bootloader.bin")
+        target = binf + ".tmp"
+        if not os.path.exists(loader):
+            print "Can't find bootloader binary: " + loader
+            return
+        outbin = open(target, 'w+b')
+        part = open(loader, 'rb')
+        data = part.read()
+        outbin.write(data)
+        outbin.write('\xFF' * (64*1024 - len(data)))
+        part.close()
+        part = open(binf, 'rb')
+        data = part.read()
+        outbin.write(data)
+        part.close()
+        outbin.seek(0, 0)
+        data = outbin.read()
+        outbin.seek(0, 1)
+        crc = struct.pack('<I', binascii.crc32(data) & 0xFFFFFFFF)
+        outbin.write(crc)
+        outbin.close()
+        os.remove(binf)
+        os.rename(target, binf)
+
+    @staticmethod
+    def combine_bins_mts_dot(t_self, resources, elf, binf):
+        """A hook for the MTS MDOT"""
+        MTSCode._combine_bins_helper("MTS_MDOT_F411RE", binf)
+
+    @staticmethod
+    def combine_bins_mts_dragonfly(t_self, resources, elf, binf):
+        """A hoof for the MTS Dragonfly"""
+        MTSCode._combine_bins_helper("MTS_DRAGONFLY_F411RE", binf)
+
+class MCU_NRF51Code(object):
+    """NRF51 Hooks"""
+    @staticmethod
+    def binary_hook(t_self, resources, _, binf):
+        """Hook that merges the soft device with the bin file"""
+        # Scan to find the actual paths of soft device
+        sdf = None
+        for softdevice_and_offset_entry\
+            in t_self.target.EXPECTED_SOFTDEVICES_WITH_OFFSETS:
+            for hexf in resources.hex_files:
+                if hexf.find(softdevice_and_offset_entry['name']) != -1:
+                    t_self.debug("SoftDevice file found %s."
+                                 % softdevice_and_offset_entry['name'])
+                    sdf = hexf
+
+                if sdf is not None:
+                    break
+            if sdf is not None:
+                break
+
+        if sdf is None:
+            t_self.debug("Hex file not found. Aborting.")
+            return
+
+        # Look for bootloader file that matches this soft device or bootloader
+        # override image
+        blf = None
+        if t_self.target.MERGE_BOOTLOADER is True:
+            for hexf in resources.hex_files:
+                if hexf.find(t_self.target.OVERRIDE_BOOTLOADER_FILENAME) != -1:
+                    t_self.debug("Bootloader file found %s."
+                                 % t_self.target.OVERRIDE_BOOTLOADER_FILENAME)
+                    blf = hexf
+                    break
+                elif hexf.find(softdevice_and_offset_entry['boot']) != -1:
+                    t_self.debug("Bootloader file found %s."
+                                 % softdevice_and_offset_entry['boot'])
+                    blf = hexf
+                    break
+
+        # Merge user code with softdevice
+        from intelhex import IntelHex
+        binh = IntelHex()
+        _, ext = os.path.splitext(binf)
+        if ext == ".hex":
+            binh.loadhex(binf)
+        elif ext == ".bin":
+            binh.loadbin(binf, softdevice_and_offset_entry['offset'])
+
+        if t_self.target.MERGE_SOFT_DEVICE is True:
+            t_self.debug("Merge SoftDevice file %s"
+                         % softdevice_and_offset_entry['name'])
+            sdh = IntelHex(sdf)
+            binh.merge(sdh)
+
+        if t_self.target.MERGE_BOOTLOADER is True and blf is not None:
+            t_self.debug("Merge BootLoader file %s" % blf)
+            blh = IntelHex(blf)
+            binh.merge(blh)
+
+        with open(binf.replace(".bin", ".hex"), "w") as fileout:
+            binh.write_hex_file(fileout, write_start_addr=False)
+
+class NCS36510TargetCode:
+    @staticmethod
+    def ncs36510_addfib(t_self, resources, elf, binf):
+        from tools.targets.NCS import add_fib_at_start
+        print("binf ", binf)
+        add_fib_at_start(binf[:-4])
+
+class RTL8195ACode:
+    """RTL8195A Hooks"""
+    @staticmethod
+    def binary_hook(t_self, resources, elf, binf):
+        from tools.targets.REALTEK_RTL8195AM import rtl8195a_elf2bin
+        rtl8195a_elf2bin(t_self.name, elf, binf)
+################################################################################
+
+# Instantiate all public targets
+TARGETS = [Target.get_target(name) for name, value
+           in Target.get_json_target_data().items()
+           if value.get("public", True)]
+
+# Map each target name to its unique instance
+TARGET_MAP = dict([(t.name, t) for t in TARGETS])
+
+TARGET_NAMES = TARGET_MAP.keys()
+
+# Some targets with different name have the same exporters
+EXPORT_MAP = {}
+
+# Detection APIs
+def get_target_detect_codes():
+    """ Returns dictionary mapping detect_code -> platform_name
+    """
+    result = {}
+    for tgt in TARGETS:
+        for detect_code in tgt.detect_code:
+            result[detect_code] = tgt.name
+    return result
+
+def set_targets_json_location(location=None):
+    """Sets the location of the JSON file that contains the targets"""
+    # First instruct Target about the new location
+    Target.set_targets_json_location(location)
+    # Then re-initialize TARGETS, TARGET_MAP and TARGET_NAMES. The
+    # re-initialization does not create new variables, it keeps the old ones
+    # instead. This ensures compatibility with code that does
+    # "from tools.targets import TARGET_NAMES"
+    TARGETS[:] = [Target.get_target(tgt) for tgt, obj
+                  in Target.get_json_target_data().items()
+                  if obj.get("public", True)]
+    TARGET_MAP.clear()
+    TARGET_MAP.update(dict([(tgt.name, tgt) for tgt in TARGETS]))
+    TARGET_NAMES[:] = TARGET_MAP.keys()
--- a/test.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/test.py	Thu Jun 22 11:12:28 2017 -0500
@@ -31,6 +31,7 @@
 from tools.options import get_default_options_parser, extract_profile
 from tools.build_api import build_project, build_library
 from tools.build_api import print_build_memory_usage
+from tools.build_api import merge_build_data
 from tools.targets import TARGET_MAP
 from tools.utils import mkdir, ToolException, NotSupportedException, args_error
 from tools.test_exporters import ReportExporter, ResultExporterType
@@ -88,6 +89,10 @@
         
         parser.add_argument("--build-report-junit", dest="build_report_junit",
                           default=None, help="Destination path for a build report in the JUnit xml format")
+        parser.add_argument("--build-data",
+                            dest="build_data",
+                            default=None,
+                            help="Dump build_data to this file")
         
         parser.add_argument("-v", "--verbose",
                           action="store_true",
@@ -175,17 +180,13 @@
             profile = extract_profile(parser, options, toolchain)
             try:
                 # Build sources
-                build_library(base_source_paths, options.build_dir, mcu, toolchain,
-                                                jobs=options.jobs,
-                                                clean=options.clean,
-                                                report=build_report,
-                                                properties=build_properties,
-                                                name="mbed-build",
-                                                macros=options.macros,
-                                                verbose=options.verbose,
-                                                notify=notify,
-                                                archive=False,
-                                                app_config=options.app_config,
+                build_library(base_source_paths, options.build_dir, mcu,
+                              toolchain, jobs=options.jobs,
+                              clean=options.clean, report=build_report,
+                              properties=build_properties, name="mbed-build",
+                              macros=options.macros, verbose=options.verbose,
+                              notify=notify, archive=False,
+                              app_config=options.app_config,
                               build_profile=profile)
 
                 library_build_success = True
@@ -245,6 +246,8 @@
 
             print_report_exporter = ReportExporter(ResultExporterType.PRINT, package="build")
             status = print_report_exporter.report(build_report)
+            if options.build_data:
+                merge_build_data(options.build_data, build_report, "test")
 
             if status:
                 sys.exit(0)
--- a/test/build_api/build_api_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,219 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import unittest
-from collections import namedtuple
-from mock import patch, MagicMock
-from tools.build_api import prepare_toolchain, build_project, build_library,\
-    scan_resources
-
-"""
-Tests for build_api.py
-"""
-
-class BuildApiTests(unittest.TestCase):
-    """
-    Test cases for Build Api
-    """
-
-    def setUp(self):
-        """
-        Called before each test case
-
-        :return:
-        """
-        self.target = "K64F"
-        self.src_paths = ['.']
-        self.toolchain_name = "ARM"
-        self.build_path = "build_path"
-
-    def tearDown(self):
-        """
-        Called after each test case
-
-        :return:
-        """
-        pass
-
-    @patch('tools.toolchains.arm.ARM_STD.parse_dependencies',
-           return_value=["foo"])
-    @patch('tools.toolchains.mbedToolchain.need_update',
-           side_effect=[i % 2 for i in range(3000)])
-    @patch('os.mkdir')
-    @patch('tools.toolchains.exists', return_value=True)
-    @patch('tools.utils.run_cmd', return_value=("", "", 0))
-    def test_always_complete_build(self, *_):
-        with MagicMock() as notify:
-            toolchain = prepare_toolchain(self.src_paths, self.target,
-                                          self.toolchain_name, notify=notify)
-
-            res = scan_resources(self.src_paths, toolchain)
-
-            toolchain.RESPONSE_FILES=False
-            toolchain.config_processed = True
-            toolchain.config_file = "junk"
-            toolchain.compile_sources(res, self.build_path)
-
-            assert any('percent' in msg[0] and msg[0]['percent'] == 100.0
-                       for _, msg, _ in notify.mock_calls if msg)
-
-
-    @patch('tools.build_api.Config')
-    def test_prepare_toolchain_app_config(self, mock_config_init):
-        """
-        Test that prepare_toolchain uses app_config correctly
-
-        :param mock_config_init: mock of Config __init__
-        :return:
-        """
-        app_config = "app_config"
-        mock_config_init.return_value = namedtuple("Config", "target")(
-            namedtuple("Target",
-                       "init_hooks name features core")(lambda _, __ : None,
-                                                        "Junk", [], "Cortex-M3"))
-
-        prepare_toolchain(self.src_paths, self.target, self.toolchain_name,
-                          app_config=app_config)
-
-        mock_config_init.assert_called_once_with(self.target, self.src_paths,
-                                                 app_config=app_config)
-
-    @patch('tools.build_api.Config')
-    def test_prepare_toolchain_no_app_config(self, mock_config_init):
-        """
-        Test that prepare_toolchain correctly deals with no app_config
-
-        :param mock_config_init: mock of Config __init__
-        :return:
-        """
-        mock_config_init.return_value = namedtuple("Config", "target")(
-            namedtuple("Target",
-                       "init_hooks name features core")(lambda _, __ : None,
-                                                        "Junk", [], "Cortex-M3"))
-
-        prepare_toolchain(self.src_paths, self.target, self.toolchain_name)
-
-        mock_config_init.assert_called_once_with(self.target, self.src_paths,
-                                                 app_config=None)
-
-    @patch('tools.build_api.scan_resources')
-    @patch('tools.build_api.mkdir')
-    @patch('os.path.exists')
-    @patch('tools.build_api.prepare_toolchain')
-    def test_build_project_app_config(self, mock_prepare_toolchain, mock_exists, _, __):
-        """
-        Test that build_project uses app_config correctly
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_exists: mock of function os.path.exists
-        :param _: mock of function mkdir (not tested)
-        :param __: mock of function scan_resources (not tested)
-        :return:
-        """
-        app_config = "app_config"
-        mock_exists.return_value = False
-        mock_prepare_toolchain().link_program.return_value = 1, 2
-
-        build_project(self.src_paths, self.build_path, self.target,
-                      self.toolchain_name, app_config=app_config)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], app_config,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-    @patch('tools.build_api.scan_resources')
-    @patch('tools.build_api.mkdir')
-    @patch('os.path.exists')
-    @patch('tools.build_api.prepare_toolchain')
-    def test_build_project_no_app_config(self, mock_prepare_toolchain, mock_exists, _, __):
-        """
-        Test that build_project correctly deals with no app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_exists: mock of function os.path.exists
-        :param _: mock of function mkdir (not tested)
-        :param __: mock of function scan_resources (not tested)
-        :return:
-        """
-        mock_exists.return_value = False
-        # Needed for the unpacking of the returned value
-        mock_prepare_toolchain().link_program.return_value = 1, 2
-
-        build_project(self.src_paths, self.build_path, self.target,
-                      self.toolchain_name)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], None,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-    @patch('tools.build_api.scan_resources')
-    @patch('tools.build_api.mkdir')
-    @patch('os.path.exists')
-    @patch('tools.build_api.prepare_toolchain')
-    def test_build_library_app_config(self, mock_prepare_toolchain, mock_exists, _, __):
-        """
-        Test that build_library uses app_config correctly
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_exists: mock of function os.path.exists
-        :param _: mock of function mkdir (not tested)
-        :param __: mock of function scan_resources (not tested)
-        :return:
-        """
-        app_config = "app_config"
-        mock_exists.return_value = False
-
-        build_library(self.src_paths, self.build_path, self.target,
-                      self.toolchain_name, app_config=app_config)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], app_config,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-    @patch('tools.build_api.scan_resources')
-    @patch('tools.build_api.mkdir')
-    @patch('os.path.exists')
-    @patch('tools.build_api.prepare_toolchain')
-    def test_build_library_no_app_config(self, mock_prepare_toolchain, mock_exists, _, __):
-        """
-        Test that build_library correctly deals with no app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_exists: mock of function os.path.exists
-        :param _: mock of function mkdir (not tested)
-        :param __: mock of function scan_resources (not tested)
-        :return:
-        """
-        mock_exists.return_value = False
-
-        build_library(self.src_paths, self.build_path, self.target,
-                      self.toolchain_name)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], None,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-if __name__ == '__main__':
-    unittest.main()
--- a/test/config/config_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,132 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import os.path
-import unittest
-from mock import patch
-from tools.config import Config
-
-"""
-Tests for config.py
-"""
-
-class ConfigTests(unittest.TestCase):
-    """
-    Test cases for Config class
-    """
-
-    def setUp(self):
-        """
-        Called before each test case
-
-        :return:
-        """
-        self.target = "K64F"
-
-    def tearDown(self):
-        """
-        Called after each test case
-
-        :return:
-        """
-        pass
-
-    @patch.object(Config, '_process_config_and_overrides')
-    @patch('tools.config.json_file_to_dict')
-    def test_init_app_config(self, mock_json_file_to_dict, _):
-        """
-        Test that the initialisation correctly uses app_config
-
-        :param mock_json_file_to_dict: mock of function json_file_to_dict
-        :param _: mock of function _process_config_and_overrides (not tested)
-        :return:
-        """
-        app_config = "app_config"
-        mock_return = {'config': 'test'}
-        mock_json_file_to_dict.return_value = mock_return
-
-        config = Config(self.target, app_config=app_config)
-
-        mock_json_file_to_dict.assert_called_with(app_config)
-        self.assertEqual(config.app_config_data, mock_return,
-                         "app_config_data should be set to the returned value")
-
-    @patch.object(Config, '_process_config_and_overrides')
-    @patch('tools.config.json_file_to_dict')
-    def test_init_no_app_config(self, mock_json_file_to_dict, _):
-        """
-        Test that the initialisation works without app config
-
-        :param mock_json_file_to_dict: mock of function json_file_to_dict
-        :param _: patch of function _process_config_and_overrides (not tested)
-        :return:
-        """
-        config = Config(self.target)
-
-        mock_json_file_to_dict.assert_not_called()
-        self.assertEqual(config.app_config_data, {},
-                         "app_config_data should be set an empty dictionary")
-
-    @patch.object(Config, '_process_config_and_overrides')
-    @patch('os.path.isfile')
-    @patch('tools.config.json_file_to_dict')
-    def test_init_no_app_config_with_dir(self, mock_json_file_to_dict, mock_isfile, _):
-        """
-        Test that the initialisation works without app config and with a
-        specified top level directory
-
-        :param mock_json_file_to_dict: mock of function json_file_to_dict
-        :param _: patch of function _process_config_and_overrides (not tested)
-        :return:
-        """
-        directory = '.'
-        path = os.path.join('.', 'mbed_app.json')
-        mock_return = {'config': 'test'}
-        mock_json_file_to_dict.return_value = mock_return
-        mock_isfile.return_value = True
-
-        config = Config(self.target, [directory])
-
-        mock_isfile.assert_called_with(path)
-        mock_json_file_to_dict.assert_called_once_with(path)
-        self.assertEqual(config.app_config_data, mock_return,
-                         "app_config_data should be set to the returned value")
-
-    @patch.object(Config, '_process_config_and_overrides')
-    @patch('tools.config.json_file_to_dict')
-    def test_init_override_app_config(self, mock_json_file_to_dict, _):
-        """
-        Test that the initialisation uses app_config instead of top_level_dir
-        when both are specified
-
-        :param mock_json_file_to_dict: mock of function json_file_to_dict
-        :param _: patch of function _process_config_and_overrides (not tested)
-        :return:
-        """
-        app_config = "app_config"
-        directory = '.'
-        mock_return = {'config': 'test'}
-        mock_json_file_to_dict.return_value = mock_return
-
-        config = Config(self.target, [directory], app_config=app_config)
-
-        mock_json_file_to_dict.assert_called_once_with(app_config)
-        self.assertEqual(config.app_config_data, mock_return,
-                         "app_config_data should be set to the returned value")
-
-if __name__ == '__main__':
-    unittest.main()
--- a/test/config_test/config_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,113 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-from tools.build_api import get_config
-from tools.targets import set_targets_json_location, Target
-from tools.config import ConfigException, Config
-import os, sys
-
-# Compare the output of config against a dictionary of known good results
-def compare_config(cfg, expected):
-    try:
-        for k in cfg:
-            if cfg[k].value != expected[k]:
-                return "'%s': expected '%s', got '%s'" % (k, expected[k], cfg[k].value)
-    except KeyError:
-        raise
-        return "Unexpected key '%s' in configuration data" % k
-    for k in expected:
-        if k not in ["desc", "expected_macros", "expected_features"] + cfg.keys():
-            return "Expected key '%s' was not found in configuration data" % k
-    return ""
-
-def test_tree(full_name, name):
-    failed = 0
-    sys.path.append(full_name)
-    if "test_data" in sys.modules:
-       del sys.modules["test_data"]
-    import test_data
-    # If the test defines custom targets, they must exist in a file called
-    # "targets.json" in the test's directory.
-    if os.path.isfile(os.path.join(full_name, "targets.json")):
-        set_targets_json_location(os.path.join(full_name, "targets.json"))
-    else: # uset the regular set of targets
-        set_targets_json_location()
-    for target, expected in test_data.expected_results.items():
-        sys.stdout.write("%s:'%s'(%s) " % (name, expected["desc"], target))
-        sys.stdout.flush()
-        err_msg = None
-        try:
-            cfg, macros, features = get_config(full_name, target, "GCC_ARM")
-            macros = Config.config_macros_to_macros(macros)
-        except ConfigException as e:
-            err_msg = e.message
-        if err_msg:
-            if expected.has_key("exception_msg"):
-                if err_msg.find(expected["exception_msg"]) == -1:
-                    print "FAILED!"
-                    sys.stderr.write("    Unexpected error message!\n")
-                    sys.stderr.write("    Expected: '%s'\n" % expected["exception_msg"])
-                    sys.stderr.write("    Got: '%s'\n" % err_msg)
-                    failed += 1
-                else:
-                    print "OK"
-            else:
-                print "FAILED!"
-                sys.stderr.write("    Error while getting configuration!\n")
-                sys.stderr.write("    " + err_msg + "\n")
-                failed += 1
-        else:
-            res = compare_config(cfg, expected)
-            expected_macros = expected.get("expected_macros", None)
-            expected_features = expected.get("expected_features", None)
-
-            if res:
-                print "FAILED!"
-                sys.stdout.write("    " + res + "\n")
-                failed += 1
-            elif expected_macros is not None:
-                if sorted(expected_macros) != sorted(macros):
-                    print "FAILED!"
-                    sys.stderr.write("    List of macros doesn't match\n")
-                    sys.stderr.write("    Expected: '%s'\n" % ",".join(sorted(expected_macros)))
-                    sys.stderr.write("    Got: '%s'\n" % ",".join(sorted(expected_macros)))
-                    failed += 1
-                else:
-                    print "OK"
-            elif expected_features is not None:
-                if sorted(expected_features) != sorted(features):
-                    print "FAILED!"
-                    sys.stderr.write("    List of features doesn't match\n")
-                    sys.stderr.write("    Expected: '%s'\n" % ",".join(sorted(expected_features)))
-                    sys.stderr.write("    Got: '%s'\n" % ",".join(sorted(expected_features)))
-                    failed += 1
-                else:
-                    print "OK"
-            else:
-                print "OK"
-    sys.path.remove(full_name)
-    return failed
-
-failed = 0
-root_dir = os.path.abspath(os.path.dirname(__file__))
-tlist = sorted(os.listdir(root_dir), key = lambda e: int(e[4:]) if e.startswith('test') else -1)
-for test_name in tlist:
-    full_name = os.path.join(root_dir, test_name)
-    if os.path.isdir(full_name) and test_name.startswith('test'):
-        failed += test_tree(full_name, test_name)
-sys.exit(failed)
-
--- a/test/config_test/test01/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,43 +0,0 @@
-{
-    "custom_targets": {
-        "b1": {
-            "inherits": ["Target"],
-            "core": "Cortex-M0",
-            "config": {
-                "base1_1": "v_base1_1_b1",
-                "base1_2": "v_base1_2_b1",
-                "base1_3": "v_base1_3_b1"
-            }
-        },
-        "d1": {
-            "inherits": ["b1"],
-            "config": {
-                "derived1": "v_derived1_d1",
-                "derived2": "v_derived2_d1"
-            },
-            "overrides": {
-                "base1_1": "v_base1_1_d1",
-                "base1_2": "v_base1_2_d1"
-            }
-        },
-        "b2": {
-            "config": {
-                "base2_1": "v_base2_1_b2",
-                "base2_2": "v_base2_2_b2"
-            }
-        },
-        "f": {
-            "inherits": ["b2", "d1"],
-            "config": {
-                "f1_1": "v_f1_1_f",
-                "f1_2": "v_f1_2_f"
-            },
-            "overrides": {
-                "base2_1": "v_base2_1_f",
-                "base1_1": "v_base1_1_f",
-                "derived2": "v_derived2_f",
-                "f1_1": "v_f1_1_f_override"
-            }
-        }
-    }
-}
--- a/test/config_test/test01/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-{
-    "b1": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "base1_1": "v_base1_1_b1",
-            "base1_2": "v_base1_2_b1",
-            "base1_3": "v_base1_3_b1"
-        }
-    },
-    "d1": {
-        "inherits": ["b1"],
-        "config": {
-            "derived1": "v_derived1_d1",
-            "derived2": "v_derived2_d1"
-        },
-        "overrides": {
-            "base1_1": "v_base1_1_d1",
-            "base1_2": "v_base1_2_d1"
-        }
-    },
-    "b2": {
-        "config": {
-            "base2_1": "v_base2_1_b2",
-            "base2_2": "v_base2_2_b2"
-        }
-    },
-    "f": {
-        "inherits": ["b2", "d1"],
-        "config": {
-            "f1_1": "v_f1_1_f",
-            "f1_2": "v_f1_2_f"
-        },
-        "overrides": {
-            "base2_1": "v_base2_1_f",
-            "base1_1": "v_base1_1_f",
-            "derived2": "v_derived2_f",
-            "f1_1": "v_f1_1_f_override"
-        }
-    }
-}
--- a/test/config_test/test01/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-# Test for configuration data defined in targets
-# A base target (B1) defines 3 configuration parameters (base1_1, base1_2 and base1_3)
-# A derived target (D1) inherits drom B1 and defines one configuration parameters (derived1 and derived2) and overrides base1_1 and base1_2
-# Another base target (B2) defines its own configuration parameters (base2_1 and base2_2)
-# The final target F derives from B2 and D1, defines two configuration paramaters (f1_1 and f1_2)
-# and overrides base2_1, base1_1, derived2 and its own configuration parameter f1_1 (which is legal)
-# Final result:
-#     base1_1 must have the value defined in F
-#     base1_2 must have the value defined in D1
-#     base1_3 must have the value defined in B1
-#     derived1 must have the value defined in D1
-#     derived2 must have the value defined in F
-#     base2_1 must have the value defined in F
-#     base2_2 must have the value defined in B2
-#     f1_1 must have the value defined and then overriden in F
-#     f1_2 must have the value defined in F
-
-expected_results = {
-    "f": {
-        "desc": "test multiple target inheritance",
-        "target.base1_1": "v_base1_1_f",
-        "target.base1_2": "v_base1_2_d1",
-        "target.base1_3": "v_base1_3_b1",
-        "target.derived1": "v_derived1_d1",
-        "target.derived2": "v_derived2_f",
-        "target.base2_1": "v_base2_1_f",
-        "target.base2_2": "v_base2_2_b2",
-        "target.f1_1": "v_f1_1_f_override",
-        "target.f1_2": "v_f1_2_f"
-    },
-    "b1": {
-        "desc": "test with a single base target, no inheritance",
-        "target.base1_1": "v_base1_1_b1",
-        "target.base1_2": "v_base1_2_b1",
-        "target.base1_3": "v_base1_3_b1"
-    },
-    "d1": {
-        "desc": "test single target inheritance",
-        "target.base1_1": "v_base1_1_d1",
-        "target.base1_2": "v_base1_2_d1",
-        "target.base1_3": "v_base1_3_b1",
-        "target.derived1": "v_derived1_d1",
-        "target.derived2": "v_derived2_d1"
-    }
-}
-
--- a/test/config_test/test02/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,47 +0,0 @@
-{
-    "custom_targets": {
-        "b1": {
-            "inherits": ["Target"],
-            "core": "Cortex-M0",
-            "config": {
-                "base1_1": "v_base1_1_b1",
-                "base1_2": "v_base1_2_b1",
-                "base1_3": "v_base1_3_b1"
-            }
-        },
-        "d1": {
-            "inherits": ["b1"],
-            "config": {
-                "derived1": "v_derived1_d1",
-                "derived2": "v_derived2_d1"
-            },
-            "overrides": {
-                "base1_1": "v_base1_1_d1",
-                "base1_2": "v_base1_2_d1"
-            }
-        },
-        "b2": {
-            "inherits": ["b1"],
-            "config": {
-                "base2_1": "v_base2_1_b2",
-                "base2_2": "v_base2_2_b2"
-            },
-            "overrides": {
-                "base1_2": "v_base1_2_b2"
-            }
-        },
-        "f": {
-            "inherits": ["d1", "b2"],
-            "config": {
-                "f1_1": "v_f1_1_f",
-                "f1_2": "v_f1_2_f"
-            },
-            "overrides": {
-                "base2_1": "v_base2_1_f",
-                "base1_1": "v_base1_1_f",
-                "derived2": "v_derived2_f",
-                "f1_1": "v_f1_1_f_override"
-            }
-        }
-    }
-}
--- a/test/config_test/test02/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-{
-    "b1": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "base1_1": "v_base1_1_b1",
-            "base1_2": "v_base1_2_b1",
-            "base1_3": "v_base1_3_b1"
-        }
-    },
-    "d1": {
-        "inherits": ["b1"],
-        "config": {
-            "derived1": "v_derived1_d1",
-            "derived2": "v_derived2_d1"
-        },
-        "overrides": {
-            "base1_1": "v_base1_1_d1",
-            "base1_2": "v_base1_2_d1"
-        }
-    },
-    "b2": {
-        "inherits": ["b1"],
-        "config": {
-            "base2_1": "v_base2_1_b2",
-            "base2_2": "v_base2_2_b2"
-        },
-        "overrides": {
-            "base1_2": "v_base1_2_b2"
-        }
-    },
-    "f": {
-        "inherits": ["d1", "b2"],
-        "config": {
-            "f1_1": "v_f1_1_f",
-            "f1_2": "v_f1_2_f"
-        },
-        "overrides": {
-            "base2_1": "v_base2_1_f",
-            "base1_1": "v_base1_1_f",
-            "derived2": "v_derived2_f",
-            "f1_1": "v_f1_1_f_override"
-        }
-    }
-}
--- a/test/config_test/test02/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,30 +0,0 @@
-# This is similar to test1, but this time B2 also inherits from B1, which allows it to override its config data.
-# B2 also overrides base1_2, like D1.
-# The order of inheritace in F is also reversed ([D1, B2] instead of [B2, D1])
-# Since the last override of base1_2 in inheritance order is in B2, base1_2 must now
-# have the value that was overriden in B2, not in D1.
-# This test also shows that multiple inheritance works for a simple diamond shaped inheritance pattern
-
-expected_results = {
-    "f": {
-        "desc": "test multiple target inheritance (diamond shape)",
-        "target.base1_1": "v_base1_1_f",
-        "target.base1_2": "v_base1_2_b2",
-        "target.base1_3": "v_base1_3_b1",
-        "target.derived1": "v_derived1_d1",
-        "target.derived2": "v_derived2_f",
-        "target.base2_1": "v_base2_1_f",
-        "target.base2_2": "v_base2_2_b2",
-        "target.f1_1": "v_f1_1_f_override",
-        "target.f1_2": "v_f1_2_f"
-    },
-    "b2": {
-        "desc": "another single inheritance test",
-        "target.base1_1": "v_base1_1_b1",
-        "target.base1_2": "v_base1_2_b2",
-        "target.base1_3": "v_base1_3_b1",
-        "target.base2_1": "v_base2_1_b2",
-        "target.base2_2": "v_base2_2_b2"
-    }
-}
-
--- a/test/config_test/test03/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-{
-    "custom_targets": {
-        "b1": {
-            "inherits": ["Target"],
-            "core": "Cortex-M0",
-            "config": {
-                "base1_1": "v_base1_1_b1",
-                "base1_2": "v_base1_2_b1",
-                "base1_3": "v_base1_3_b1"
-            }
-        },
-        "d1": {
-            "inherits": ["b1"],
-            "config": {
-                "derived1": "v_derived1_d1",
-                "derived2": "v_derived2_d1"
-            },
-            "overrides": {
-                "base1_1": "v_base1_1_d1",
-                "base1_2": "v_base1_2_d1"
-            }
-        },
-        "b2": {
-            "config": {
-                "base2_1": "v_base2_1_b2",
-                "base2_2": "v_base2_2_b2"
-            },
-            "overrides": {
-                "base1_1": "v_base1_1_b2"
-            }
-        },
-        "f": {
-            "inherits": ["b2", "d1"],
-            "config": {
-                "f1_1": "v_f1_1_f",
-                "f1_2": "v_f1_2_f"
-            },
-            "overrides": {
-                "base2_1": "v_base2_1_f",
-                "base1_1": "v_base1_1_f",
-                "derived2": "v_derived2_f",
-                "f1_1": "v_f1_1_f_override"
-            }
-        }
-    }
-}
--- a/test/config_test/test03/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,45 +0,0 @@
-{
-    "b1": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "base1_1": "v_base1_1_b1",
-            "base1_2": "v_base1_2_b1",
-            "base1_3": "v_base1_3_b1"
-        }
-    },
-    "d1": {
-        "inherits": ["b1"],
-        "config": {
-            "derived1": "v_derived1_d1",
-            "derived2": "v_derived2_d1"
-        },
-        "overrides": {
-            "base1_1": "v_base1_1_d1",
-            "base1_2": "v_base1_2_d1"
-        }
-    },
-    "b2": {
-        "config": {
-            "base2_1": "v_base2_1_b2",
-            "base2_2": "v_base2_2_b2"
-        },
-        "overrides": {
-            "base1_1": "v_base1_1_b2"
-        }
-    },
-    "f": {
-        "inherits": ["b2", "d1"],
-        "config": {
-            "f1_1": "v_f1_1_f",
-            "f1_2": "v_f1_2_f"
-        },
-        "overrides": {
-            "base2_1": "v_base2_1_f",
-            "base1_1": "v_base1_1_f",
-            "derived2": "v_derived2_f",
-            "f1_1": "v_f1_1_f_override"
-        }
-    }
-}
--- a/test/config_test/test03/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-# Similar to test1, but this time B2 attempt to override base1_1. Since B2 doesn't directly inherit
-# from B1, this must raise an error
-
-expected_results = {
-    "f": {
-        "desc": "attempt to override undefined parameter in inherited target",
-        "exception_msg": "Attempt to override undefined parameter 'base1_1' in 'target:b2'"
-    },
-    "d1": {
-        "desc": "single target inheritance again",
-        "target.base1_1": "v_base1_1_d1",
-        "target.base1_2": "v_base1_2_d1",
-        "target.base1_3": "v_base1_3_b1",
-        "target.derived1": "v_derived1_d1",
-        "target.derived2": "v_derived2_d1"
-    }
-}
-
--- a/test/config_test/test04/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-{
-    "custom_targets": {
-        "b1": {
-            "inherits": ["Target"],
-            "core": "Cortex-M0",
-            "config": {
-                "base1_1": "v_base1_1_b1",
-                "base1_2": "v_base1_2_b1",
-                "base1_3": "v_base1_3_b1"
-            }
-        },
-        "d1": {
-            "inherits": ["b1"],
-            "config": {
-                "derived1": "v_derived1_d1",
-                "derived2": "v_derived2_d1"
-            },
-            "overrides": {
-                "base1_1": "v_base1_1_d1",
-                "base1_2": "v_base1_2_d1"
-            }
-        },
-        "b2": {
-            "inherits": ["Target"],
-            "core": "Cortex-M0",
-            "config": {
-                "base2_1": "v_base2_1_b2",
-                "base2_2": "v_base2_2_b2",
-                "base1_1": "v_base1_1_b2"
-            }
-        },
-        "f": {
-            "inherits": ["b2", "d1"],
-            "config": {
-                "f1_1": "v_f1_1_f",
-                "f1_2": "v_f1_2_f"
-            },
-            "overrides": {
-                "base2_1": "v_base2_1_f",
-                "base1_1": "v_base1_1_f",
-                "derived2": "v_derived2_f",
-                "f1_1": "v_f1_1_f_override"
-            }
-        }
-    }
-}
--- a/test/config_test/test04/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-{
-    "b1": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "base1_1": "v_base1_1_b1",
-            "base1_2": "v_base1_2_b1",
-            "base1_3": "v_base1_3_b1"
-        }
-    },
-    "d1": {
-        "inherits": ["b1"],
-        "config": {
-            "derived1": "v_derived1_d1",
-            "derived2": "v_derived2_d1"
-        },
-        "overrides": {
-            "base1_1": "v_base1_1_d1",
-            "base1_2": "v_base1_2_d1"
-        }
-    },
-    "b2": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "base2_1": "v_base2_1_b2",
-            "base2_2": "v_base2_2_b2",
-            "base1_1": "v_base1_1_b2"
-        }
-    },
-    "f": {
-        "inherits": ["b2", "d1"],
-        "config": {
-            "f1_1": "v_f1_1_f",
-            "f1_2": "v_f1_2_f"
-        },
-        "overrides": {
-            "base2_1": "v_base2_1_f",
-            "base1_1": "v_base1_1_f",
-            "derived2": "v_derived2_f",
-            "f1_1": "v_f1_1_f_override"
-        }
-    }
-}
--- a/test/config_test/test04/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-# Similar to test1, but this time B2 attempt to define base1_1. Since base1_1
-# is already defined in B1 and F derives from both B1 and B2, this results
-# in an error. However, when building for B2 instead of F, defining base1_1
-# should be OK.
-
-expected_results = {
-    "f": {
-        "desc": "attempt to redefine parameter in target inheritance tree",
-        "exception_msg": "Parameter name 'base1_1' defined in both 'target:b2' and 'target:b1'"
-    },
-    "b2": {
-        "desc": "it should be OK to define parameters with the same name in non-related targets",
-        "target.base2_1": "v_base2_1_b2",
-        "target.base2_2": "v_base2_2_b2",
-        "target.base1_1": "v_base1_1_b2"
-    }
-}
-
--- a/test/config_test/test05/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "app1": "v_app1[b1_label]"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        },
-        "dummy_label": {
-            "app1": "dummy.app1",
-            "app2": "dummy.app2"
-        }
-    }
-}
--- a/test/config_test/test05/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0"
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"]
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"]
-    },
-    "both": {
-        "inherits": ["b1", "b2"]
-    }
-}
--- a/test/config_test/test05/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,29 +0,0 @@
-# This tests overriding configuration values based on target labels.
-# Four targets are defined:
-#    - "base" is the base target, it doesn't define any extra labels
-#    - "b1" inherits from "base" and adds the "b1_label" label
-#    - "b2" inherits from "base" and adds the "b2_label" label
-#    - "both" inherits from both "b1" and "b2", so it inherits both labels
-
-expected_results = {
-    "b1": {
-        "desc": "override values based on labels (first label)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2"
-    },
-    "b2": {
-        "desc": "override values based on labels (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]"
-    },
-    "both": {
-        "desc": "override values based on labels (both labels)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2[b2_label]"
-    },
-    "base": {
-        "desc": "override values based on labels (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2"
-    }
-}
--- a/test/config_test/test06/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib2[b1_label]",
-            "p2": "v_p2_lib2[b1_label]"
-        },
-        "b2_label": {
-            "p1": "v_p1_lib2[b2_label]",
-            "p2": "v_p2_lib2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test06/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib1[b1_label]"
-        },
-        "b2_label": {
-            "p2": "v_p2_lib1[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test06/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,14 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "app1": "v_app1[b1_label]"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test06/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0"
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"]
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"]
-    },
-    "both": {
-        "inherits": ["b1", "b2"]
-    }
-}
--- a/test/config_test/test06/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,49 +0,0 @@
-# This build on top of test5 by adding a few libraries with their own configurations
-# and overrides. The same targets are used for building and testing (base, b1, b2, both)
-
-expected_results = {
-   "base": {
-        "desc": "override values based on labels with libs (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2",
-        "lib2.p2": "v_p2_lib2"
-    },
-    "b1": {
-        "desc": "override values based on labels with libs (first label)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1[b1_label]",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2[b1_label]",
-        "lib2.p2": "v_p2_lib2[b1_label]"
-    },
-    "b2": {
-        "desc": "override values based on labels with libs (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2[b2_label]",
-        "lib2.p2": "v_p2_lib2[b2_label]"
-    },
-    # The values for lib2.p1 and lib2.p2 illustrate how overriding on multiple
-    # labels work. In lib2, both lib2.p1 and lib2.p2 are overriden for both
-    # labels (b1_label and b2_label). However, since "b2_label" is specified
-    # after "b1_label", it sets the final values of the overrides.
-    "both": {
-        "desc": "override values based on labels with libs (both labels)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1[b1_label]",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2[b2_label]",
-        "lib2.p2": "v_p2_lib2[b2_label]"
-    },
-}
--- a/test/config_test/test07/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib2[b1_label]",
-            "p2": "v_p2_lib2[b1_label]"
-        },
-        "b2_label": {
-            "p1": "v_p1_lib2[b2_label]",
-            "p2": "v_p2_lib2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test07/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib1[b1_label]"
-        },
-        "b2_label": {
-            "p2": "v_p2_lib1[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test07/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,19 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "*": {
-            "lib1.p3": "v_p3_lib1_app",
-            "lib1.p1": "v_p1_lib1_app",
-            "lib2.p1": "v_p1_lib2_app"
-        },
-        "b1_label": {
-            "app1": "v_app1[b1_label]"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test07/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0"
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"]
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"]
-    },
-    "both": {
-        "inherits": ["b1", "b2"]
-    }
-}
--- a/test/config_test/test07/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,48 +0,0 @@
-# This build on top of test6 by adding overrides for libs in the application
-
-expected_results = {
-   "base": {
-        "desc": "override values based on labels with libs (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2"
-    },
-    "b1": {
-        "desc": "override values based on labels with libs (first label)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b1_label]"
-    },
-    "b2": {
-        "desc": "override values based on labels with libs (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b2_label]"
-    },
-    # The values for lib2.p1 and lib2.p2 illustrate how overriding on multiple
-    # labels work. In lib2, both lib2.p1 and lib2.p2 are overriden for both
-    # labels (b1_label and b2_label). However, since "b2_label" is specified
-    # after "b1_label", it sets the final values of the overrides.
-    "both": {
-        "desc": "override values based on labels with libs (both labels)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b2_label]"
-    }
-}
--- a/test/config_test/test08/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib2[b1_label]",
-            "p2": "v_p2_lib2[b1_label]"
-        },
-        "b2_label": {
-            "p1": "v_p1_lib2[b2_label]",
-            "p2": "v_p2_lib2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test08/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib1[b1_label]"
-        },
-        "b2_label": {
-            "p2": "v_p2_lib1[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test08/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,20 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "*": {
-            "lib1.p3": "v_p3_lib1_app",
-            "lib1.p1": "v_p1_lib1_app",
-            "lib2.p1": "v_p1_lib2_app",
-            "target.par1": "v_par1_target_app"
-        },
-        "b1_label": {
-            "app1": "v_app1[b1_label]"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test08/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,35 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "par1": "v_par1_base",
-            "par2": "v_par2_base",
-            "par3": "v_par3_base"
-        }
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"],
-        "overrides": {
-            "par1": "v_par1_b1"
-        }
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"],
-        "overrides": {
-            "par2": "v_par2_b2"
-        }
-    },
-    "both": {
-        "inherits": ["b1", "b2"],
-        "config": {
-            "par4": "v_par4_both"
-        },
-        "overrides": {
-            "par3": "v_par3_both"
-        }
-    }
-}
--- a/test/config_test/test08/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,58 +0,0 @@
-# This build on top of test7 by adding some configuration values in targets
-# and overriding them in the application
-
-expected_results = {
-   "base": {
-        "desc": "override values based on labels with libs and target params (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_base",
-        "target.par3": "v_par3_base"
-    },
-    "b1": {
-        "desc": "override values based on labels with libs and target params (first label)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b1_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_base",
-        "target.par3": "v_par3_base"
-    },
-    "b2": {
-        "desc": "override values based on labels with libs and target params (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b2_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_b2",
-        "target.par3": "v_par3_base"
-    },
-    "both": {
-        "desc": "override values based on labels with libs and target params (both labels)",
-        "app.app1": "v_app1[b1_label]",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b2_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_b2",
-        "target.par3": "v_par3_both",
-        "target.par4": "v_par4_both"
-    }
-}
--- a/test/config_test/test09/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib2[b1_label]",
-            "p2": "v_p2_lib2[b1_label]"
-        },
-        "b2_label": {
-            "p1": "v_p1_lib2[b2_label]",
-            "p2": "v_p2_lib2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test09/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib1[b1_label]"
-        },
-        "b2_label": {
-            "p2": "v_p2_lib1[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test09/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,15 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "app1": "v_app1[b1_label]",
-            "app_wrong": "v_dummy"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test09/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,18 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0"
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"]
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"]
-    },
-    "both": {
-        "inherits": ["b1", "b2"]
-    }
-}
--- a/test/config_test/test09/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,34 +0,0 @@
-# This build on top of test6 by adding an invalid override in mbed_app_override.json for b1_label.
-# This will prevent the configuration for working for b1 and both, but it should still
-# work for base and b2.
-
-expected_results = {
-   "base": {
-        "desc": "override values based on labels with libs (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2",
-        "lib2.p2": "v_p2_lib2"
-    },
-    "b1": {
-        "desc": "override values based on labels with libs - invalid override (first label)",
-        "exception_msg": "Attempt to override undefined parameter 'app.app_wrong' in 'application[b1_label]"
-    },
-    "b2": {
-        "desc": "override values based on labels with libs (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2[b2_label]",
-        "lib2.p2": "v_p2_lib2[b2_label]"
-    },
-    "both": {
-        "desc": "override values based on labels with libs - invalid override (both labels)",
-        "exception_msg": "Attempt to override undefined parameter 'app.app_wrong' in 'application[b1_label]"
-    },
-}
--- a/test/config_test/test10/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,17 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib2[b1_label]",
-            "p2": "v_p2_lib2[b1_label]"
-        },
-        "b2_label": {
-            "p1": "v_p1_lib2[b2_label]",
-            "p2": "v_p2_lib2[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test10/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,16 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "b1_label": {
-            "p1": "v_p1_lib1[b1_label]"
-        },
-        "b2_label": {
-            "p2": "v_p2_lib1[b2_label]"
-        }
-    }
-}
--- a/test/config_test/test10/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,24 +0,0 @@
-{
-    "config": {
-        "app1": "v_app1",
-        "app2": "v_app2"
-    },
-    "target_overrides": {
-        "*": {
-            "lib1.p3": "v_p3_lib1_app",
-            "lib1.p1": "v_p1_lib1_app",
-            "lib2.p1": "v_p1_lib2_app",
-            "target.par1": "v_par1_target_app"
-        },
-        "b1_label": {
-            "app.app1": "v_app1[b1_label_label]"
-        },
-        "b2_label": {
-            "app2": "v_app2[b2_label]"
-        },
-        "both": {
-            "target.par4": "v_par4_app[both_label]",
-            "lib2.p1": "v_p1_lib2_app[both_label]"
-        }
-    }
-}
--- a/test/config_test/test10/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,35 +0,0 @@
-{
-    "base": {
-        "extra_labels": [],
-        "default_lib": "std",
-        "core": "Cortex-M0",
-        "config": {
-            "par1": "v_par1_base",
-            "par2": "v_par2_base",
-            "par3": "v_par3_base"
-        }
-    },
-    "b1": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b1_label"],
-        "overrides": {
-            "par1": "v_par1_b1"
-        }
-    },
-    "b2": {
-        "inherits": ["base"],
-        "extra_labels_add": ["b2_label"],
-        "overrides": {
-            "par2": "v_par2_b2"
-        }
-    },
-    "both": {
-        "inherits": ["b1", "b2"],
-        "config": {
-            "par4": "v_par4_both"
-        },
-        "overrides": {
-            "par3": "v_par3_both"
-        }
-    }
-}
--- a/test/config_test/test10/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,57 +0,0 @@
-# This builds on top of test8 by adding target-conditional overrides in mbed_app_config.json.
-
-expected_results = {
-   "base": {
-        "desc": "override values based on labels with libs, target params and target overrides (no labels)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_base",
-        "target.par3": "v_par3_base"
-    },
-    "b1": {
-        "desc": "override values based on labels with libs, target params and target overrides (first label)",
-        "app.app1": "v_app1[b1_label_label]",
-        "app.app2": "v_app2",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b1_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_base",
-        "target.par3": "v_par3_base"
-    },
-    "b2": {
-        "desc": "override values based on labels with libs, target params and target overrides (second label)",
-        "app.app1": "v_app1",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2[b2_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_b2",
-        "target.par3": "v_par3_base"
-    },
-    "both": {
-        "desc": "override values based on labels with libs, target params and target overrides (both labels)",
-        "app.app1": "v_app1[b1_label_label]",
-        "app.app2": "v_app2[b2_label]",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1[b2_label]",
-        "lib1.p3": "v_p3_lib1_app",
-        "lib2.p1": "v_p1_lib2_app[both_label]",
-        "lib2.p2": "v_p2_lib2[b2_label]",
-        "target.par1": "v_par1_target_app",
-        "target.par2": "v_par2_b2",
-        "target.par3": "v_par3_both",
-        "target.par4": "v_par4_app[both_label]"
-    }
-}
--- a/test/config_test/test11/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    }
-}
--- a/test/config_test/test11/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,14 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    },
-    "target_overrides": {
-        "K64F": {
-            "p1": "v_p1_lib1[b1_label]",
-            "lib2.p1": "dummy"
-        }
-    }
-}
--- a/test/config_test/test11/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,9 +0,0 @@
-# Two libraries (lib1 and lib2) define their own configuration parameters
-# lib1 tries to override a configuration parameter in lib2, which raises an error
-
-expected_results = {
-   "K64F": {
-        "desc": "lib1 trying to override a config parameter in lib2",
-        "exception_msg": "Invalid prefix 'lib2' for parameter name 'lib2.p1' in 'library:lib1[K64F]'"
-    }
-}
--- a/test/config_test/test12/lib1/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "p1": "v_p1_lib2",
-        "p2": "v_p2_lib2"
-    }
-}
--- a/test/config_test/test12/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "config": {
-        "p1": "v_p1_lib1",
-        "p2": "v_p2_lib1",
-        "p3": "v_p3_lib1"
-    }
-}
--- a/test/config_test/test12/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "target_overrides": {
-        "test_target": {
-            "lib1.p1": "v_p1_lib1_app",
-            "lib2.p1": "v_p1_lib2_app"
-        }
-    }
-}
--- a/test/config_test/test12/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test12/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,14 +0,0 @@
-# Two libraries (lib1 and lib2) define their own configuration parameters
-# The application config doesn't have any parameters itself, it just overrides the parameter
-# named p1 from both lib1 and lib2.
-
-expected_results = {
-   "test_target": {
-        "desc": "app without its own parameters overrides parameters in other libs",
-        "lib1.p1": "v_p1_lib1_app",
-        "lib1.p2": "v_p2_lib1",
-        "lib1.p3": "v_p3_lib1",
-        "lib2.p1": "v_p1_lib2_app",
-        "lib2.p2": "v_p2_lib2"
-    }
-}
--- a/test/config_test/test13/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "name": "lib1"
-}
--- a/test/config_test/test13/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "name": "lib1"
-}
--- a/test/config_test/test13/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Create two libraries named "lib1", which must raise an error
-
-expected_results = {
-    "K64F": {
-        "desc": "attempt to configure two libraries named 'lib1'",
-        "exception_msg": "Library name 'lib1' is not unique"
-    }
-}
--- a/test/config_test/test14/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "unknown_key": "dummy_value"
-}
--- a/test/config_test/test14/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Put an invalid key in the application configuration
-
-expected_results = {
-    "K64F": {
-        "desc": "invalid key in mbed_app_config.json",
-        "exception_msg": "Unknown key(s)"
-    }
-}
--- a/test/config_test/test15/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib1",
-    "unknown_key": "dummy_value"
-}
--- a/test/config_test/test15/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Put an invalid key in the library configuration
-
-expected_results = {
-    "K64F": {
-        "desc": "invalid key in mbed_lib_config.json",
-        "exception_msg": "Unknown key(s)"
-    }
-}
--- a/test/config_test/test16/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib1",
-    "macros": ["LIB1_1=1", "LIB1_2"]
-}
--- a/test/config_test/test16/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib2",
-    "macros": ["LIB2_1=5", "LIB1_2"]
-}
--- a/test/config_test/test16/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "macros": ["APP1=10", "APP2", "LIB2_1=5"]
-}
--- a/test/config_test/test16/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test16/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,12 +0,0 @@
-# Macro test: defined macros in the top level app and 2 libs, check if they
-# are reported properly.
-# The app defines one macro with value the same as lib2, while lib2 defined
-# the same macro without value as lib1. Since the definitions are comptabile,
-# no error should be raised
-
-expected_results = {
-    "test_target": {
-        "desc": "test macro definitions",
-        "expected_macros": ["APP1=10", "APP2", "LIB1_1=1","LIB1_2", "LIB2_1=5"]
-    }
-}
--- a/test/config_test/test17/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib1",
-    "macros": ["LIB1_1=1", "LIB1_2"]
-}
--- a/test/config_test/test17/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib2",
-    "macros": ["LIB2_1=5", "LIB1_2"]
-}
--- a/test/config_test/test17/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "macros": ["APP1=10", "APP2", "LIB2_1=10"]
-}
--- a/test/config_test/test17/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,9 +0,0 @@
-# Build on top of test16
-# Adds an invalid macro redefinition in the app
-
-expected_results = {
-    "K64F": {
-        "desc": "test invalid macro re-definition in the app",
-        "exception_msg": "Macro 'LIB2_1' defined in both 'library:lib2' and 'application' with incompatible values"
-    }
-}
--- a/test/config_test/test18/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib1",
-    "macros": ["LIB1_1=1", "LIB1_2"]
-}
--- a/test/config_test/test18/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "name": "lib2",
-    "macros": ["LIB2_1=5", "LIB1_2=3"]
-}
--- a/test/config_test/test18/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3 +0,0 @@
-{
-    "macros": ["APP1=10", "APP2", "LIB2_1=5"]
-}
--- a/test/config_test/test18/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Like test17, but this time the invalid re-definition is in lib2, not in the app
-
-expected_results = {
-    "K64F": {
-        "desc": "test invalid macro re-definition in a library",
-        "exception_msg": "defined in both"
-    }
-}
--- a/test/config_test/test19/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4 +0,0 @@
-{
-    "macros": [],
-    "invalid_key": "invalid_value"
-}
--- a/test/config_test/test19/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Test that invalid keys in application configuration are not allowed
-
-expected_results = {
-    "K64F": {
-        "desc": "test invalid key in application config",
-        "exception_msg": "Unknown key(s) 'invalid_key'"
-    }
-}
--- a/test/config_test/test20/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,5 +0,0 @@
-{
-    "name": "lib1",
-    "macros": [],
-    "invalid_key": "invalid_value"
-}
--- a/test/config_test/test20/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Like test19, but this time check invalid key in a library configuration
-
-expected_results = {
-    "K64F": {
-        "desc": "test invalid key in lib config",
-        "exception_msg": "Unknown key(s) 'invalid_key'"
-    }
-}
--- a/test/config_test/test21/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test21/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test21/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing basic features
-
-expected_results = {
-    "test_target": {
-        "desc": "test basic features",
-        "expected_features": ["IPV4"]
-    }
-}
--- a/test/config_test/test22/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test22/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test22/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test22/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing when adding two features
-
-expected_results = {
-    "test_target": {
-        "desc": "test composing features",
-        "expected_features": ["IPV4", "STORAGE"]
-    }
-}
--- a/test/config_test/test23/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test23/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "target_overrides": {
-        "*": {
-            "target.features_remove": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test23/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test23/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing when two features collide
-
-expected_results = {
-    "K64F": {
-        "desc": "test feature collisions",
-        "exception_msg": "Configuration conflict. The feature IPV4 both added and removed." 
-    }
-}
--- a/test/config_test/test24/FEATURE_IPV4/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test24/FEATURE_IPV6/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["UVISOR"]
-        }
-    }
-}
--- a/test/config_test/test24/FEATURE_STORAGE/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["UVISOR"]
-        }
-    }
-}
--- a/test/config_test/test24/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test24/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test24/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing if features can enable other features
-
-expected_results = {
-    "test_target": {
-        "desc": "test recursive features",
-        "expected_features": ["IPV4", "STORAGE", "UVISOR"]
-    }
-}
--- a/test/config_test/test25/FEATURE_IPV6/FEATURE_IPV4/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["IPV6"]
-        }
-    }
-}
--- a/test/config_test/test25/FEATURE_IPV6/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["UVISOR"]
-        }
-    }
-}
--- a/test/config_test/test25/FEATURE_STORAGE/FEATURE_IPV4/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test25/FEATURE_STORAGE/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["UVISOR"]
-        }
-    }
-}
--- a/test/config_test/test25/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,7 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features": ["IPV4", "STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test25/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing if feature collisions are detected accross recursive features
-
-expected_results = {
-    "K64F": {
-        "desc": "test recursive feature collisions",
-        "exception_msg": "Configuration conflict. The feature UVISOR both added and removed." 
-    }
-}
--- a/test/config_test/test26/FEATURE_IPV4/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["STORAGE"]
-        }
-    }
-}
--- a/test/config_test/test26/FEATURE_IPV6/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "test": {
-            "value": "BAD"
-        }
-    }
-}
--- a/test/config_test/test26/FEATURE_STORAGE/lib2/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib2",
-    "config": {
-        "test": {
-            "value": "BAD"
-        }
-    }
-}
--- a/test/config_test/test26/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["IPV4"],
-            "lib2.test": "GOOD"
-        }
-    }
-}
--- a/test/config_test/test26/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test26/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing if config settings work in recursive features
-
-expected_results = {
-    "test_target": {
-        "desc": "test recursive feature configurations",
-        "lib2.test": "GOOD"
-    }
-}
--- a/test/config_test/test27/lib1/mbed_lib.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "name": "lib1",
-    "target_overrides": {
-        "*": {
-            "target.features_remove": ["IPV4"]
-        }
-    }
-}
--- a/test/config_test/test27/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,11 +0,0 @@
-{
-    "custom_targets": {
-        "test_target": {
-            "core": "Cortex-M0",
-            "extra_labels": [],
-            "features": ["IPV4"],
-            "default_build": "standard"
-        }
-    }
-}
-
--- a/test/config_test/test27/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": ["IPV4"],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test27/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing when adding two features
-
-expected_results = {
-    "test_target": {
-        "desc": "test removing features",
-        "expected_features": []
-    }
-}
--- a/test/config_test/test28/mbed_app.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "target_overrides": {
-        "*": {
-            "target.features_add": ["UVISOR"],
-            "target.extra_labels_add": ["UVISOR_SUPPORTED"]
-        }
-    }
-}
--- a/test/config_test/test28/targets.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-{
-    "test_target": {
-        "core": "Cortex-M0",
-        "extra_labels": [],
-        "features": [],
-        "default_lib": "std"
-    }
-}
--- a/test/config_test/test28/test_data.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,8 +0,0 @@
-# Testing when adding two features
-
-expected_results = {
-    "test_target": {
-        "desc": "test uvisor feature",
-        "expected_features": ["UVISOR"]
-    }
-}
--- a/test/examples/examples.json	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,151 +0,0 @@
-{
-  "examples": [
-    {
-      "name": "mbed-os-example-blinky",
-      "github": "https://github.com/ARMmbed/mbed-os-example-blinky",
-      "mbed": [
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-blinky"
-      ],
-      "features" : [],
-      "targets" : [],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-tls",
-      "github": "https://github.com/ARMmbed/mbed-os-example-tls",
-      "mbed": [
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-tls-benchmark",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-tls-tls-client",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-tls-hashing",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-tls-authcrypt"
-      ],
-      "features" : [],
-      "targets" : ["K64F", "NUCLEO_F429ZI"],
-      "toolchains" : ["GCC_ARM", "ARM"],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-mesh-minimal",
-      "github":"https://github.com/ARMmbed/mbed-os-example-mesh-minimal",
-      "mbed": [
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-mesh-minimal"
-      ],
-      "features" : [],
-      "targets" : ["DISCO_F469NI", "DISCO_F746NG", "K64F", "K66F",
-                   "NUCLEO_F429ZI", "NUCLEO_F439ZI", "NUCLEO_F746ZG",
-                   "NUCLEO_F756ZG", "NUCLEO_F767ZI",
-                   "NUMAKER_PFM_NUC472", "UBLOX_EVK_ODIN_W2"],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-ble",
-      "github":"https://github.com/ARMmbed/mbed-os-example-ble",
-      "mbed": [
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-Beacon",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-HeartRate",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-Thermometer",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-LEDBlinker",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-LED",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-GAPButton",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-EddystoneService",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-EddystoneObserver",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-Button",
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-ble-BatteryLevel"
-      ],
-      "features" : ["BLE"],
-      "targets" : ["NRF51_DK", "NRF52_DK", "K64F", "NUCLEO_F401RE"],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : true,
-      "export": false,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-client",
-      "github":"https://github.com/ARMmbed/mbed-os-example-client",
-      "mbed": [
-          "https://developer.mbed.org/teams/mbed-os-examples/code/mbed-os-example-client"
-      ],
-      "features" : ["LWIP"],
-      "targets" : [],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : false,
-      "export": false,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-sockets",
-      "github":"https://github.com/ARMmbed/mbed-os-example-sockets",
-      "mbed": [
-      ],
-      "features" : ["LWIP"],
-      "targets" : [],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-wifi",
-      "github":"https://github.com/ARMmbed/mbed-os-example-wifi",
-      "mbed": [
-      ],
-      "features" : [],
-      "targets" : [],
-      "toolchains" : [],
-      "exporters": [],
-      "compile" : false,
-      "export": false,
-      "auto-update" : true
-    },
-    {
-      "name": "mbed-os-example-uvisor",
-      "github":"https://github.com/ARMmbed/mbed-os-example-uvisor",
-      "mbed": [],
-      "features" : [],
-      "targets" : ["K64F"],
-      "toolchains" : ["GCC_ARM"],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : false
-    },
-    {
-      "name": "mbed-os-example-uvisor-thread",
-      "github":"https://github.com/ARMmbed/mbed-os-example-uvisor-thread",
-      "mbed": [],
-      "features" : [],
-      "targets" : ["K64F"],
-      "toolchains" : ["GCC_ARM"],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : false
-    },
-    {
-      "name": "mbed-os-example-uvisor-number-store",
-      "github":"https://github.com/ARMmbed/mbed-os-example-uvisor-number-store",
-      "mbed": [],
-      "features" : [],
-      "targets" : ["K64F"],
-      "toolchains" : ["GCC_ARM"],
-      "exporters": [],
-      "compile" : true,
-      "export": true,
-      "auto-update" : false
-    }
-  ]
-}
--- a/test/examples/examples.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,128 +0,0 @@
-""" import and bulid a bunch of example programs """
-
-from argparse import ArgumentParser
-import os
-from os.path import dirname, abspath, basename
-import os.path
-import sys
-import subprocess
-import json
-
-ROOT = abspath(dirname(dirname(dirname(dirname(__file__)))))
-sys.path.insert(0, ROOT)
-
-from tools.utils import argparse_force_uppercase_type
-from tools.utils import argparse_many
-from tools.build_api import get_mbed_official_release
-import examples_lib as lib
-from examples_lib import SUPPORTED_TOOLCHAINS, SUPPORTED_IDES
-
-def main():
-    """Entry point"""
-
-    official_targets = get_mbed_official_release("5")
-    official_target_names = [x[0] for x in official_targets]
-
-
-    parser = ArgumentParser()
-    parser.add_argument("-c", dest="config", default="examples.json")
-    parser.add_argument("-e", "--example",
-                        help=("filter the examples used in the script"),
-                        type=argparse_many(lambda x: x),
-                        default=[])
-    subparsers = parser.add_subparsers()
-    import_cmd = subparsers.add_parser("import")
-    import_cmd.set_defaults(fn=do_import)
-    clone_cmd = subparsers.add_parser("clone")
-    clone_cmd.set_defaults(fn=do_clone)
-    deploy_cmd = subparsers.add_parser("deploy")
-    deploy_cmd.set_defaults(fn=do_deploy)
-    version_cmd = subparsers.add_parser("tag")
-    version_cmd.add_argument("tag")
-    version_cmd.set_defaults(fn=do_versionning)
-    compile_cmd = subparsers.add_parser("compile")
-    compile_cmd.set_defaults(fn=do_compile),
-    compile_cmd.add_argument(
-        "toolchains", nargs="*", default=SUPPORTED_TOOLCHAINS,
-        type=argparse_force_uppercase_type(SUPPORTED_TOOLCHAINS,
-                                           "toolchain")),
-    compile_cmd.add_argument("-m", "--mcu",
-                             help=("build for the given MCU (%s)" %
-                                ', '.join(official_target_names)),
-                            metavar="MCU",
-                            type=argparse_many(
-                                argparse_force_uppercase_type(
-                                    official_target_names, "MCU")),
-                            default=official_target_names)
-    export_cmd = subparsers.add_parser("export")
-    export_cmd.set_defaults(fn=do_export),
-    export_cmd.add_argument(
-        "ide", nargs="*", default=SUPPORTED_IDES,
-        type=argparse_force_uppercase_type(SUPPORTED_IDES,
-                                           "ide"))
-    export_cmd.add_argument("-m", "--mcu",
-                             help=("build for the given MCU (%s)" %
-                                ', '.join(official_target_names)),
-                            metavar="MCU",
-                            type=argparse_many(
-                                argparse_force_uppercase_type(
-                                    official_target_names, "MCU")),
-                            default=official_target_names)
-    args = parser.parse_args()
-    config = json.load(open(os.path.join(os.path.dirname(__file__),
-                               args.config)))
-
-    all_examples = []
-    for example in config['examples']:
-        all_examples = all_examples + [basename(x['repo']) for x in lib.get_repo_list(example)]
-    examples = [x for x in all_examples if x in args.example] if args.example else all_examples
-    return args.fn(args, config, examples)
-
-
-def do_export(args, config, examples):
-    """Do export and build step"""
-    results = {}
-    results = lib.export_repos(config, args.ide, args.mcu, examples)
-
-    lib.print_summary(results, export=True)
-    failures = lib.get_num_failures(results, export=True)
-    print("Number of failures = %d" % failures)
-    return failures
-
-
-def do_import(_, config, examples):
-    """Do the import step of this process"""
-    lib.source_repos(config, examples)
-    return 0
-
-
-def do_clone(_, config, examples):
-    """Do the clone step of this process"""
-    lib.clone_repos(config, examples)
-    return 0
-
-
-def do_deploy(_, config, examples):
-    """Do the deploy step of this process"""
-    lib.deploy_repos(config, examples)
-    return 0
-
-
-def do_compile(args, config, examples):
-    """Do the compile step"""
-    results = {}
-    results = lib.compile_repos(config, args.toolchains, args.mcu, examples)
-    
-    lib.print_summary(results)
-    failures = lib.get_num_failures(results)
-    print("Number of failures = %d" % failures)
-    return failures 
-    
-def do_versionning(args, config, examples):
-    """ Test update the mbed-os to the version specified by the tag """
-    lib.update_mbedos_version(config, args.tag, examples)
-    return 0
-
-
-if __name__ == "__main__":
-    sys.exit(main())
--- a/test/examples/examples_lib.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,400 +0,0 @@
-""" Import and bulid a bunch of example programs
-
-    This library includes functions that are shared between the examples.py and 
-    the update.py modules.
-    
- """
-import os
-from os.path import dirname, abspath, basename
-import os.path
-import sys
-import subprocess
-from shutil import rmtree
-from sets import Set
-
-ROOT = abspath(dirname(dirname(dirname(dirname(__file__)))))
-sys.path.insert(0, ROOT)
-
-from tools.build_api import get_mbed_official_release
-from tools.targets import TARGET_MAP
-from tools.export import EXPORTERS
-
-SUPPORTED_TOOLCHAINS = ["ARM", "IAR", "GCC_ARM"]
-SUPPORTED_IDES = [exp for exp in EXPORTERS.keys() if exp != "cmsis" and exp != "zip"]
-
-
-def print_list(lst):
-    """Prints to screen the contents of a list
-
-    Args:
-    lst - a list of any type, to be displayed
-
-    """
-    if lst:
-        for thing in lst:
-            print("# %s" % thing)
-
-
-def print_category(results, index, message):
-    summary = [example for key, summ in results.iteritems()
-               for example in summ[index]]
-    if all(len(s) == 0 for s in summary):
-        return
-    print("#")
-    print("#" * 80)
-    print("# %s" % message)
-    print("#" * 80)
-    split_summ = [s.rsplit(" ", 1) for s in summary]
-
-    print_list(summary)
-
-
-def print_summary(results, export=False):
-    """Prints to screen the results of compiling/exporting combinations of example programs,
-       targets and compile toolchains/IDEs.
-
-    Args:
-    results - results of the compilation stage. See compile_repos() and export_repos()
-              for details of the format.
-
-    """
-
-    print("#"*80)
-    print("# Examples compilation summary")
-    print("#"*80)
-
-    print_category(results, 2, "Passed example combinations")
-
-    second_result = "Failed example combinations" if not export else \
-        "Failed export example combinations"
-
-    print_category(results, 3, second_result)
-
-    if export:
-        print_category(results, 4, "Failed build combinations")
-        print_category(results, 5, "Skipped build combinations")
-
-    print("#")
-    print("#"*80)
-
-def valid_choices(allowed_choices, all_choices):
-    if len(allowed_choices) > 0:
-        return [t for t in all_choices if t in allowed_choices]
-    else:
-        return all_choices
-
-
-def target_cross_toolchain(allowed_targets, allowed_toolchains, features=[]):
-    """Generate pairs of target and toolchains
-
-    Args:
-    allowed_targets - a list of all possible targets
-    allowed_toolchains - a list of all possible toolchains
-
-    Kwargs:
-    features - the features that must be in the features array of a
-               target
-    """
-    for target in allowed_targets:
-        for toolchain in allowed_toolchains:
-            if all(feature in TARGET_MAP[target].features
-                    for feature in features):
-                yield target, toolchain
-
-
-def target_cross_ide(allowed_targets, allowed_ides, features=[], toolchains=[]):
-    """Generate pairs of target and ides
-
-    Args:
-    allowed_targets - a list of all possible targets
-    allowed_ides - a list of all possible IDEs
-
-    Kwargs:
-    features - the features that must be in the features array of a
-               target
-    """
-    for target in allowed_targets:
-        for ide in allowed_ides:
-            if (target in EXPORTERS[ide].TARGETS and
-                (not toolchains or EXPORTERS[ide].TOOLCHAIN in toolchains) and
-                all(feature in TARGET_MAP[target].features
-                    for feature in features)):
-                yield target, ide
-
-
-def get_repo_list(example):
-    """ Returns a list of all the repos associated with the specific example in the json
-        config file.
-        If there are repos listed under the mbed section then these will be returned as a 
-        list. If not then the github single repo with be returned. 
-        NOTE: This does not currently deal with multiple examples underneath a github 
-        sourced exampe repo.
-
-    Args:
-    example - Example for which the repo list is requested
-    repos - The list of repos and types contained within that example in the json file
-
-    """
-    repos = []
-    if len(example['mbed']) > 0:
-        for repo in example['mbed']:
-            repos.append({
-                'repo': repo,
-                'type': 'hg'
-            })
-    else:
-        repos.append({
-            'repo': example['github'],
-            'type': 'git'
-        })
-    return repos
-
-
-def source_repos(config, examples):
-    """ Imports each of the repos and its dependencies (.lib files) associated
-        with the specific examples name from the json config file. Note if
-        there is already a clone of the repo then it will first be removed to
-        ensure a clean, up to date cloning.
-    Args:
-    config - the json object imported from the file. 
-
-    """
-    print("\nImporting example repos....\n")
-    for example in config['examples']:
-        for repo_info in get_repo_list(example):
-            name = basename(repo_info['repo'])
-            if name in examples:
-                if os.path.exists(name):
-                    print("'%s' example directory already exists. Deleting..." % name)
-                    rmtree(name)
-
-                subprocess.call(["mbed-cli", "import", repo_info['repo']])
-
-def clone_repos(config, examples):
-    """ Clones each of the repos associated with the specific examples name from the
-        json config file. Note if there is already a clone of the repo then it will first
-        be removed to ensure a clean, up to date cloning.
-    Args:
-    config - the json object imported from the file.
-
-    """
-    print("\nCloning example repos....\n")
-    for example in config['examples']:
-        for repo_info in get_repo_list(example):
-            name = basename(repo_info['repo'])
-            if name in examples:
-                if os.path.exists(name):
-                    print("'%s' example directory already exists. Deleting..." % name)
-                    rmtree(name)
-
-                subprocess.call([repo_info['type'], "clone", repo_info['repo']])
-
-def deploy_repos(config, examples):
-    """ If the example directory exists as provided by the json config file,
-        pull in the examples dependencies by using `mbed-cli deploy`.
-    Args:
-    config - the json object imported from the file.
-
-    """
-    print("\nDeploying example repos....\n")
-    for example in config['examples']:
-        for repo_info in get_repo_list(example):
-            name = basename(repo_info['repo'])
-            if name in examples:
-                if os.path.exists(name):
-                    os.chdir(name)
-                    subprocess.call(["mbed-cli", "deploy"])
-                    os.chdir("..")
-                else:
-                    print("'%s' example directory doesn't exist. Skipping..." % name)
-
-
-def get_num_failures(results, export=False):
-    """ Returns the number of failed compilations from the results summary
-    Args:
-    results - results summary of the compilation stage. See compile_repos() for
-              details of the format.
-    num_failures 
-
-    """
-    num_failures = 0
-
-    for key, val in results.iteritems():
-        num_failures = num_failures + len(val[3])
-        if export:
-            num_failures += len(val[4])
-
-    return num_failures
-
-def export_repos(config, ides, targets, examples):
-    """Exports and builds combinations of example programs, targets and IDEs.
-
-        The results are returned in a [key: value] dictionary format:
-            Where key = The example name from the json config file
-            value = a list containing: pass_status, successes, export failures, build_failures,
-            and build_skips
-
-            where pass_status = The overall pass status for the export of the full
-            set of example programs comprising the example suite.
-            IE they must build and export) True if all examples pass, false otherwise
-            successes = list of examples that exported and built (if possible)
-            If the exporter has no build functionality, then it is a pass
-            if exported
-            export_failures = list of examples that failed to export.
-            build_failures = list of examples that failed to build
-            build_skips = list of examples that cannot build
-
-            Both successes and failures contain the example name, target and IDE
-
-            Args:
-            config - the json object imported from the file.
-            ides - List of IDES to export to
-    """
-    results = {}
-    valid_examples = Set(examples)
-    print("\nExporting example repos....\n")
-    for example in config['examples']:
-        example_names = [basename(x['repo']) for x in get_repo_list(example)]
-        common_examples = valid_examples.intersection(Set(example_names))
-        if not common_examples:
-            continue
-        export_failures = []
-        build_failures = []
-        build_skips = []
-        successes = []
-        exported = True
-        pass_status = True
-        if example['export']:
-            for repo_info in get_repo_list(example):
-                example_project_name = basename(repo_info['repo'])
-                os.chdir(example_project_name)
-                # Check that the target, IDE, and features combinations are valid and return a
-                # list of valid combinations to work through
-                for target, ide in target_cross_ide(valid_choices(example['targets'], targets),
-                                                    valid_choices(example['exporters'], ides),
-                                                    example['features'], example['toolchains']):
-                    example_name = "{} {} {}".format(example_project_name, target,
-                                                     ide)
-                    def status(message):
-                        print(message + " %s" % example_name)
-                        sys.stdout.flush()
-
-                    status("Exporting")
-                    proc = subprocess.Popen(["mbed-cli", "export", "-i", ide,
-                                             "-m", target])
-                    proc.wait()
-                    if proc.returncode:
-                        export_failures.append(example_name)
-                        status("FAILURE exporting")
-                    else:
-                        status("SUCCESS exporting")
-                        status("Building")
-                        try:
-                            if EXPORTERS[ide].build(example_project_name):
-                                status("FAILURE building")
-                                build_failures.append(example_name)
-                            else:
-                                status("SUCCESS building")
-                                successes.append(example_name)
-                        except TypeError:
-                            successes.append(example_name)
-                            build_skips.append(example_name)
-                os.chdir("..")
-
-                if len(build_failures+export_failures) > 0:
-                    pass_status= False
-        else:
-            exported = False
-
-        results[example['name']] = [exported, pass_status, successes,
-                                    export_failures, build_failures, build_skips]
-
-    return results
-
-
-def compile_repos(config, toolchains, targets, examples):
-    """Compiles combinations of example programs, targets and compile chains.
-       
-       The results are returned in a [key: value] dictionary format:
-       Where key = The example name from the json config file
-             value = a list containing: pass_status, successes, and failures
-             
-             where pass_status = The overall pass status for the compilation of the full
-                                 set of example programs comprising the example suite.
-                                 True if all examples pass, false otherwise
-                   successes = list of passing examples. 
-                   failures = list of failing examples.
-                   
-                   Both successes and failures contain the example name, target and compile chain
-
-    Args:
-    config - the json object imported from the file. 
-    toolchains - List of toolchains to compile for.
-    results - results of the compilation stage. 
-
-    """
-    results = {}
-    valid_examples = Set(examples)
-    print("\nCompiling example repos....\n")
-    for example in config['examples']:
-        example_names = [basename(x['repo']) for x in get_repo_list(example)]
-        common_examples = valid_examples.intersection(Set(example_names))
-        if not common_examples:
-            continue
-        failures = []
-        successes = []
-        compiled = True
-        pass_status = True
-        if example['compile']:
-            for repo_info in get_repo_list(example):
-                name = basename(repo_info['repo'])
-                os.chdir(name)
-                
-                # Check that the target, toolchain and features combinations are valid and return a 
-                # list of valid combinations to work through
-                for target, toolchain in target_cross_toolchain(valid_choices(example['targets'], targets),
-                                                                valid_choices(example['toolchains'], toolchains),
-                                                                example['features']):
-                    print("Compiling %s for %s, %s" % (name, target, toolchain))
-                    proc = subprocess.Popen(["mbed-cli", "compile", "-t", toolchain,
-                                             "-m", target, "--silent"])
-                    proc.wait()
-                    example_summary = "{} {} {}".format(name, target, toolchain)
-                    if proc.returncode:
-                        failures.append(example_summary)
-                    else:
-                        successes.append(example_summary)
-                os.chdir("..")
-            
-            # If there are any compilation failures for the example 'set' then the overall status is fail.
-            if len(failures) > 0:
-                pass_status = False
-        else:
-            compiled = False
-
-        results[example['name']] = [compiled, pass_status, successes, failures]
-
-    return results
-
-
-def update_mbedos_version(config, tag, examples):
-    """ For each example repo identified in the config json object, update the version of 
-        mbed-os to that specified by the supplied GitHub tag. This function assumes that each
-        example repo has already been cloned.
-        
-    Args:
-    config - the json object imported from the file. 
-    tag - GitHub tag corresponding to a version of mbed-os to upgrade to.
-    
-    """
-    print("Updating mbed-os in examples to version %s\n" % tag)
-    for example in config['examples']:
-        if example['name'] not in examples:
-            continue
-        for repo_info in get_repo_list(example):
-            update_dir =  basename(repo_info['repo']) + "/mbed-os"
-            print("\nChanging dir to %s\n" % update_dir)
-            os.chdir(update_dir)
-            subprocess.call(["mbed-cli", "update", tag, "--clean"])
-            os.chdir("../..")
-
--- a/test/examples/update.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,367 +0,0 @@
-#!/usr/bin/env python
-
-import os
-from os.path import dirname, abspath, basename
-import sys
-import argparse
-import json
-import subprocess
-import shutil
-import stat
-import re
-from github import Github, GithubException
-
-ROOT = abspath(dirname(dirname(dirname(dirname(__file__)))))
-sys.path.insert(0, ROOT)
-
-import examples_lib as lib
-from examples_lib import SUPPORTED_TOOLCHAINS
-
-def run_cmd(command, print_warning_on_fail=True):
-    """ Takes the command specified and runs it in a sub-process, obtaining the return code.
-        
-    Args:
-    command - command to run, provided as a list of individual fields which are combined into a 
-              single command before passing to the sub-process call.
-    return_code - result of the command.
-
-    """
-    print('[Exec] %s' % ' '.join(command))
-    return_code = subprocess.call(command)
-    
-    if return_code:
-        print("The command '%s' failed with return code: %s" % (' '.join(command), return_code))
-        print("Ignoring and moving on to the next example")
-    
-    return return_code
-    
-def run_cmd_with_output(command, print_warning_on_fail=True):
-    """ Takes the command specified and runs it in a sub-process, obtaining the return code 
-        and the returned output.
-        
-    Args:
-    command - command to run, provided as a list of individual fields which are combined into a 
-              single command before passing to the sub-process call.
-    return_code - result of the command.
-    output - the output of the command
-
-    """
-    print('[Exec] %s' % ' '.join(command))
-    returncode = 0
-    output = None
-    try:
-        output = subprocess.check_output(command)
-    except subprocess.CalledProcessError as e:
-        print("The command '%s' failed with return code: %s" % (' '.join(command), e.returncode))
-        returncode = e.returncode
-    return returncode, output
-
-def rmtree_readonly(directory):
-    """ Deletes a readonly directory tree.
-        
-    Args:
-    directory - tree to delete
-    """
-    def remove_readonly(func, path, _):
-        os.chmod(path, stat.S_IWRITE)
-        func(path)
-
-    shutil.rmtree(directory, onerror=remove_readonly)
-
-def find_all_examples(path):
-    """ Searches the path specified for sub-example folders, ie those containing an
-        mbed-os.lib file. If found adds the path to the sub-example to a list which is 
-        then returned.
-        
-    Args:
-    path - path to search.
-    examples - (returned) list of paths to example directories.
-
-    """
-    examples = []
-    for root, dirs, files in os.walk(path):
-        if 'mbed-os.lib' in files:
-            examples += [root]
-    
-    return examples
-
-def upgrade_single_example(example, tag, directory, ref):
-    """ Updates the mbed-os.lib file in the example specified to correspond to the 
-        version specified by the GitHub tag supplied. Also deals with 
-        multiple sub-examples in the GitHub repo, updating them in the same way.
-        
-    Args:
-    example - json example object containing the GitHub repo to update.
-    tag - GitHub tag corresponding to a version of mbed-os to upgrade to.
-    directory - directory path for the example.
-    ref - SHA corresponding to the supplied tag
-    returns - True if the upgrade was successful, False otherwise.
-    
-    """
-    cwd = os.getcwd()
-    os.chdir(directory)
-    
-    return_code = False
-    
-    if os.path.isfile("mbed-os.lib"):
-        # Rename command will fail on some OS's if the target file already exist,
-        # so ensure if it does, it is deleted first.
-        if os.path.isfile("mbed-os.lib_bak"):
-            os.remove("mbed-os.lib_bak")
-        
-        os.rename("mbed-os.lib", "mbed-os.lib_bak")
-    else:
-        print("!! Error trying to backup mbed-os.lib prior to updating.")
-        return False
-    
-    # mbed-os.lib file contains one line with the following format
-    # e.g. https://github.com/ARMmbed/mbed-os/#0789928ee7f2db08a419fa4a032fffd9bd477aa7
-    lib_re = re.compile('https://github.com/ARMmbed/mbed-os/#[A-Za-z0-9]+')
-    updated = False
-
-    # Scan through mbed-os.lib line by line
-    with open('mbed-os.lib_bak', 'r') as ip, open('mbed-os.lib', 'w') as op:
-        for line in ip:
-
-            opline = line
-            
-            regexp = lib_re.match(line)
-            if regexp:
-                opline = 'https://github.com/ARMmbed/mbed-os/#' + ref
-                updated = True
-    
-            op.write(opline)
-
-    if updated:
-        # Setup and run the git add command
-        cmd = ['git', 'add', 'mbed-os.lib']
-        return_code = run_cmd(cmd)
-
-    os.chdir(cwd)
-    return not return_code
-
-def prepare_fork(arm_example):
-    """ Synchronises a cloned fork to ensure it is up to date with the original. 
-        
-    Args:
-    arm_example - Full GitHub repo path for original example 
-    ret - True if the fork was synchronised successfully, False otherwise
-    
-    """
-
-    print "In " + os.getcwd()
-
-    for cmd in [['git', 'remote', 'add', 'armmbed', arm_example],
-                ['git', 'fetch', 'armmbed'],
-                ['git', 'reset', '--hard', 'armmbed/master'],
-                ['git', 'push', '-f', 'origin']]:
-        if run_cmd(cmd):
-            print("preparation of the fork failed!")
-            return False
-    return True
-
-
-def upgrade_example(github, example, tag, user, ref):
-    """ Clone a fork of the example specified.
-        Ensures the fork is up to date with the original and then and updates the associated 
-        mbed-os.lib file on that fork to correspond to the version specified by the GitHub tag supplied. 
-        Also deals with multiple sub-examples in the GitHub repo, updating them in the same way.
-        The updates are pushed to the forked repo.
-        Finally a PR is raised against the original example repo for the changes.
-        
-    Args:
-    github - GitHub instance to allow internal git commands to be run
-    example - json example object containing the GitHub repo to update.
-    tag - GitHub tag corresponding to a version of mbed-os to upgrade to.
-    user - GitHub user name
-    ref - SHA corresponding to the tag
-    
-    """
-    ret = False
-    print("\nUpdating example '%s'" % example['name'])
-    cwd = os.getcwd()
-
-    full_repo_name = 'ARMmbed/'+ example['name']
-    fork = "https://github.com/" + user + '/' + example['name'] 
-
-    # Check access to mbed-os repo
-    try:
-        repo = github.get_repo(full_repo_name, False)
-
-    except:
-        print("\t\t!! Repo does not exist - skipping\n")
-        return False
-
-
-    # Clone the forked example repo
-    clone_cmd = ['git', 'clone', fork]
-    return_code = run_cmd(clone_cmd)
-    
-    if not return_code:
-    
-        # Find all examples
-        example_directories = find_all_examples(example['name'])
-        
-        os.chdir(example['name'])
-        
-        # checkout and synchronise the release-candidate branch
-        prepare_fork(example['github'])
-        
-        for example_directory in example_directories:
-            if not upgrade_single_example(example, tag, os.path.relpath(example_directory, example['name']), ref):
-                os.chdir(cwd)
-                return False
-
-        # Setup the default commit message
-        commit_message = 'Updating mbed-os to ' + tag 
-
-        # Setup and run the commit command
-        commit_cmd = ['git', 'commit', '-m', commit_message]
-        return_code = run_cmd(commit_cmd)
-        if not return_code:
-
-            # Setup and run the push command
-            push_cmd = ['git', 'push', 'origin']
-            return_code = run_cmd(push_cmd)
-            
-            if not return_code:
-                body = "Please test/merge this PR and then tag Master with " + tag
-                # Raise a PR from release-candidate to master
-                user_fork = user + ':master' 
-                try:
-                    pr = repo.create_pull(title='Updating mbed-os to ' + tag, head=user_fork, base='master', body=body)
-                    ret = True
-                except GithubException as e:
-                    # Default to False
-                    print("Creation of Pull Request from release-candidate to master failed with the following error!")
-                    print e
-            else:
-                print("!!! Git push command failed.")
-        else:
-            print("!!! Git commit command failed.")
-    else:
-        print("!!! Could not clone user fork %s\n" % fork)
-
-
-    os.chdir(cwd)
-    return ret
-
-def create_work_directory(path):
-    """ Create a new directory specified in 'path', overwrite if the directory already 
-        exists.
-        
-    Args:
-    path - directory path to be created. 
-    
-    """
-    if os.path.exists(path):
-        print("'%s' directory already exists. Deleting..." % path)
-        rmtree_readonly(path)
-    
-    os.makedirs(path)
-
-def test_compile(config, tag):
-    """ For each example repo identified in the config json object, clone, update mbed-os to
-        the specified tag and then compile for all supported toolchains.
-        
-    Args:
-    config - the json object imported from the file. 
-    tag - GitHub tag corresponding to a version of mbed-os to upgrade to.
-    results - summary of compilation results. 
-    
-    """
-    # Create work directories
-    create_work_directory('test_compile')
-    
-    # Loop through the examples
-    results = {}
-    os.chdir('test_compile')
-
-    lib.source_repos(config)    
-    lib.update_mbedos_version(config, tag)
-    results = lib.compile_repos(config, SUPPORTED_TOOLCHAINS)
-    os.chdir("..")
-
-    return results
-    
-
-def main(arguments):
-    """ Will update any mbed-os.lib files found in the example list specified by the config file.
-        If no config file is specified the default 'examples.json' is used. 
-        The update is done by cloning a fork of each example (the fork must be present in the 
-        github account specified by the github user parameter). The fork is searched for any
-        mbed-os.lib files and each one found is updated with the SHA corresponding to the supplied
-        github tag. A pull request is then made from the fork to the original example repo.
-        
-    Args:
-    tag - tag to update the mbed-os.lib to. E.g. mbed-os-5.3.1
-    github_token - Pre-authorised token to allow github access
-    github_user - github username whose account contains the example forks
-    config_file - optional parameter to specify a list of examples
-
-    """
-
-    parser = argparse.ArgumentParser(description=__doc__,
-                                     formatter_class=argparse.RawDescriptionHelpFormatter)
-    parser.add_argument('tag', help="mbed-os tag to which all examples will be updated")
-    parser.add_argument('-c', '--config_file', help="Path to the configuration file (default is 'examples.json')", default='examples.json')
-    parser.add_argument('-T', '--github_token', help="GitHub token for secure access")
-    parser.add_argument('-U', '--github_user', help="GitHub user for forked repos")
-    
-    args = parser.parse_args(arguments)
-
-    cfg = os.path.join(os.path.dirname(__file__), args.config_file)
-    
-    # Load the config file
-    config = json.load(open(os.path.join(os.path.dirname(__file__),
-                             args.config_file)))
-    
-    if not config:
-        print("Failed to load config file '%s'" % args.config_file)
-        sys.exit(1)
-    
-    # Create working directory
-    create_work_directory('examples')
-
-    github = Github(args.github_token)
-
-    # Get the github sha corresponding to the specified mbed-os tag
-    cmd = ['git', 'rev-list', '-1', args.tag]
-    return_code, ref = run_cmd_with_output(cmd) 
-
-    if return_code:
-        print("Could not obtain SHA for tag: %s\n" % args.tag)
-        sys.exit(1)
-
-    # Loop through the examples
-    failures = []
-    successes = []
-    results = {}
-    os.chdir('examples')
-    
-    for example in config['examples']:
-        # Determine if this example should be updated and if so update any found 
-        # mbed-os.lib files.
-
-        if upgrade_example(github, example, args.tag, args.github_user, ref):
-            successes += [example['name']]
-        else:
-            failures += [example['name']]
-    
-    os.chdir('../')
-    
-    # Finish the script and report the results
-    print(os.linesep + os.linesep +'Finished updating examples!' + os.linesep)
-    
-    if successes:
-        print('\nThe following examples updated successfully:')
-        for success in successes:
-            print('    - %s' % success)
-    
-    if failures:
-        print('\nThe following examples were not updated:')
-        for fail in failures:
-            print('    - %s' % fail)
-
-if __name__ == '__main__':
-    sys.exit(main(sys.argv[1:]))
\ No newline at end of file
--- a/test/export/build_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,298 +0,0 @@
-#!/usr/bin/env python
-"""
-mbed SDK
-Copyright (c) 2011-2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import sys
-from os import remove, rename
-from os.path import join, dirname, exists, abspath
-ROOT = abspath(join(dirname(__file__), "..", "..", ".."))
-sys.path.insert(0, ROOT)
-import argparse
-import os
-from argparse import ArgumentTypeError
-import sys
-from shutil import rmtree
-from collections import namedtuple
-from copy import copy
-
-
-from tools.paths import EXPORT_DIR
-from tools.tests import TESTS
-from tools.build_api import get_mbed_official_release, RELEASE_VERSIONS
-from tools.test_api import find_tests
-from tools.project import export
-from Queue import Queue
-from threading import Thread, Lock
-from tools.project_api import print_results, get_exporter_toolchain
-from tools.tests import test_name_known, test_known
-from tools.export import EXPORTERS
-from tools.utils import argparse_force_lowercase_type, \
-                        argparse_many, columnate, args_error, \
-                        argparse_filestring_type
-from tools.options import extract_profile
-
-print_lock = Lock()
-
-def do_queue(Class, function, interable) :
-    q = Queue()
-    threads = [Class(q, function) for each in range(20)]
-    for thing in interable :
-        q.put(thing)
-    for each in threads :
-        each.setDaemon(True)
-        each.start()
-    q.join()
-
-
-class Reader (Thread) :
-    def __init__(self, queue, func) :
-        Thread.__init__(self)
-        self.queue = queue
-        self.func = func
-
-    def start(self) :
-        sys.stdout.flush()
-        while not self.queue.empty() :
-            test = self.queue.get()
-            self.func(test)
-            self.queue.task_done()
-
-
-class ExportBuildTest(object):
-    """Object to encapsulate logic for progen build testing"""
-    def __init__(self, tests, parser, options):
-        """
-        Initialize an instance of class ProgenBuildTest
-        Args:
-            tests: array of TestCase instances
-        """
-        self.total = len(tests)
-        self.parser = parser
-        self.options = options
-        self.counter = 0
-        self.successes = []
-        self.failures = []
-        self.skips = []
-        self.tests = [ExportBuildTest.test_case(test) for test in tests]
-        self.build_queue = Queue()
-
-    @staticmethod
-    def test_case(case):
-        TestCase = namedtuple('TestCase', case.keys())
-        return TestCase(**case)
-
-    def handle_log(self,log):
-        try:
-            with open(log, 'r') as in_log:
-                print in_log.read()
-                sys.stdout.flush()
-            log_name = join(EXPORT_DIR, dirname(log) + "_log.txt")
-            if exists(log_name):
-                # delete it if so
-                remove(log_name)
-            rename(log, log_name)
-        except IOError:
-            pass
-
-    def batch_tests(self, clean=False):
-        """Performs all exports of self.tests
-        Peroform_exports will fill self.build_queue.
-        This function will empty self.build_queue and call the test's
-        IDE's build function."""
-        do_queue(Reader, self.perform_exports, self.tests)
-        self.counter = 0
-        self.total = self.build_queue.qsize()
-        while not self.build_queue.empty():
-            build = self.build_queue.get()
-            self.counter +=1
-            exporter = build[0]
-            test_case = build[1]
-            self.display_counter("Building test case  %s::%s\t%s"
-                                 % (test_case.mcu,
-                                    test_case.ide,
-                                    test_case.name))
-
-            cwd = os.getcwd()
-            os.chdir(exporter.export_dir)
-            res = EXPORTERS[exporter.NAME.lower()].build(exporter.project_name, cleanup=False)
-            os.chdir(cwd)
-            if res:
-                self.failures.append("%s::%s\t%s" % (test_case.mcu,
-                                                     test_case.ide,
-                                                     test_case.name))
-            else:
-                self.successes.append("%s::%s\t%s" % (test_case.mcu,
-                                                      test_case.ide,
-                                                      test_case.name))
-            self.handle_log(exporter.generated_files[-1])
-            if clean:
-                rmtree(exporter.export_dir)
-
-    def display_counter (self, message) :
-        with print_lock:
-            sys.stdout.write("{}/{} {}".format(self.counter, self.total,
-                                               message) +"\n")
-            sys.stdout.flush()
-
-    def perform_exports(self, test_case):
-        """
-        Generate the project file for test_case and fill self.build_queue
-        Args:
-            test_case: object of type TestCase
-        """
-        sys.stdout.flush()
-        self.counter += 1
-        name_str = ('%s_%s_%s') % (test_case.mcu, test_case.ide, test_case.name)
-        self.display_counter("Exporting test case  %s::%s\t%s" % (test_case.mcu,
-                                                                  test_case.ide,
-                                                                  test_case.name))
-        exporter, toolchain = get_exporter_toolchain(test_case.ide)
-        if test_case.mcu not in exporter.TARGETS:
-            self.skips.append("%s::%s\t%s" % (test_case.mcu, test_case.ide,
-                                              test_case.name))
-            return
-        profile = extract_profile(self.parser, self.options, toolchain)
-        exporter = export(test_case.mcu, test_case.ide,
-                          project_id=test_case.id, zip_proj=None,
-                          src=test_case.src,
-                          export_path=join(EXPORT_DIR, name_str),
-                          silent=True, build_profile=profile)
-        exporter.generated_files.append(join(EXPORT_DIR,name_str,test_case.log))
-        self.build_queue.put((exporter,test_case))
-            # Check if the specified name is in all_os_tests
-
-
-def check_valid_mbed_os(test):
-    """Check if the specified name is in all_os_tests
-    args:
-        test: string name to index all_os_tests
-    returns: tuple of test_name and source location of test,
-        as given by find_tests"""
-    all_os_tests = find_tests(ROOT, "K64F", "ARM")
-    if test in all_os_tests.keys():
-        return (test, all_os_tests[test])
-    else:
-        supported = columnate([t for t in all_os_tests.keys()])
-        raise ArgumentTypeError("Program with name '{0}' not found. "
-                                "Supported tests are: \n{1}".format(test,supported))
-
-
-def check_version(version):
-    """Check if the specified version is valid
-    args:
-        version: integer versio of mbed
-    returns:
-        version if it is valid"""
-    if version not in RELEASE_VERSIONS:
-        raise ArgumentTypeError("Choose from versions : %s"%", ".join(RELEASE_VERSIONS))
-    return version
-
-
-def main():
-    """Entry point"""
-
-    ide_list = ["iar", "uvision"]
-
-    default_v2 = [test_name_known("MBED_BLINKY")]
-    default_v5 = [check_valid_mbed_os('tests-mbedmicro-rtos-mbed-basic')]
-
-    parser = argparse.ArgumentParser(description=
-                                     "Test progen builders. Leave any flag off"
-                                     " to run with all possible options.")
-    parser.add_argument("-i",
-                        dest="ides",
-                        default=ide_list,
-                        type=argparse_many(argparse_force_lowercase_type(
-                            ide_list, "toolchain")),
-                        help="The target IDE: %s"% str(ide_list))
-
-    parser.add_argument( "-p",
-                        type=argparse_many(test_known),
-                        dest="programs",
-                        help="The index of the desired test program: [0-%d]"
-                             % (len(TESTS) - 1))
-
-    parser.add_argument("-n",
-                        type=argparse_many(test_name_known),
-                        dest="programs",
-                        help="The name of the desired test program")
-
-    parser.add_argument("-m", "--mcu",
-                        help=("Generate projects for the given MCUs"),
-                        metavar="MCU",
-                        type=argparse_many(str.upper))
-
-    parser.add_argument("-os-tests",
-                        type=argparse_many(check_valid_mbed_os),
-                        dest="os_tests",
-                        help="Mbed-os tests")
-
-    parser.add_argument("-c", "--clean",
-                        dest="clean",
-                        action="store_true",
-                        help="clean up the exported project files",
-                        default=False)
-
-    parser.add_argument("--release",
-                        dest="release",
-                        type=check_version,
-                        help="Which version of mbed to test",
-                        default=RELEASE_VERSIONS[-1])
-
-    parser.add_argument("--profile",
-                        dest="profile",
-                        action="append",
-                        type=argparse_filestring_type,
-                        default=[])
-
-    options = parser.parse_args()
-    # targets in chosen release
-    targetnames = [target[0] for target in
-                   get_mbed_official_release(options.release)]
-    # all targets in release are default
-    test_targets = options.mcu or targetnames
-    if not all([t in targetnames for t in test_targets]):
-        args_error(parser, "Only specify targets in release %s:\n%s"
-                   %(options.release, columnate(sorted(targetnames))))
-
-    v2_tests, v5_tests = [],[]
-    if options.release == '5':
-        v5_tests = options.os_tests or default_v5
-    elif options.release == '2':
-        v2_tests = options.programs or default_v2
-
-    tests = []
-    default_test = {key:None for key in ['ide', 'mcu', 'name', 'id', 'src', 'log']}
-    for mcu in test_targets:
-        for ide in options.ides:
-            log = "build_log.txt" if ide == 'iar' \
-                else join('build', 'build_log.txt')
-            # add each test case to the tests array
-            default_test.update({'mcu': mcu, 'ide': ide, 'log':log})
-            for test in v2_tests:
-                default_test.update({'name':TESTS[test]["id"], 'id':test})
-                tests.append(copy(default_test))
-            for test in v5_tests:
-                default_test.update({'name':test[0],'src':[test[1],ROOT]})
-                tests.append(copy(default_test))
-    test = ExportBuildTest(tests, parser, options)
-    test.batch_tests(clean=options.clean)
-    print_results(test.successes, test.failures, test.skips)
-    sys.exit(len(test.failures))
-
-if __name__ == "__main__":
-    main()
--- a/test/memap/memap_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,168 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-import sys
-import os
-
-ROOT = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "..", ".."))
-sys.path.insert(0, ROOT)
-
-import unittest
-from tools.memap import MemapParser
-from copy import deepcopy
-
-"""
-Tests for test_api.py
-"""
-
-class MemapParserTests(unittest.TestCase):
-    """
-    Test cases for Test Api
-    """
-
-    def setUp(self):
-        """
-        Called before each test case
-
-        :return:
-        """
-        self.memap_parser = MemapParser()
-        
-        self.memap_parser.modules = {
-            "Misc": {
-                "unknown": 0,
-                ".ARM": 8,
-                ".ARM.extab": 0,
-                ".init": 12,
-                "OUTPUT": 0,
-                ".stack": 0,
-                ".eh_frame": 0,
-                ".fini_array": 4,
-                ".heap": 0,
-                ".stabstr": 0,
-                ".interrupts_ram": 0,
-                ".init_array": 0,
-                ".stab": 0,
-                ".ARM.attributes": 7347,
-                ".bss": 8517,
-                ".flash_config": 16,
-                ".interrupts": 1024,
-                ".data": 2325,
-                ".ARM.exidx": 0,
-                ".text": 59906,
-                ".jcr": 0
-            },
-            "Fill": {
-                "unknown": 12,
-                ".ARM": 0,
-                ".ARM.extab": 0,
-                ".init": 0,
-                "OUTPUT": 0,
-                ".stack": 0,
-                ".eh_frame": 0,
-                ".fini_array": 0,
-                ".heap": 65536,
-                ".stabstr": 0,
-                ".interrupts_ram": 1024,
-                ".init_array": 0,
-                ".stab": 0,
-                ".ARM.attributes": 0,
-                ".bss": 2235,
-                ".flash_config": 0,
-                ".interrupts": 0,
-                ".data": 3,
-                ".ARM.exidx": 0,
-                ".text": 136,
-                ".jcr": 0
-            }
-        }
-        
-        self.memap_parser.compute_report()
-
-    def tearDown(self):
-        """
-        Called after each test case
-
-        :return:
-        """
-        pass
-    
-    def generate_test_helper(self, output_type, file_output=None):
-        """
-        Helper that ensures that the member variables "modules", "mem_report",
-        and "mem_summary" are unchanged after calling "generate_output"
-        
-        :param output_type: type string that is passed to "generate_output"
-        :param file_output: path to output file that is passed to "generate_output"      
-        :return:
-        """
-        
-        old_modules = deepcopy(self.memap_parser.modules)
-        old_report = deepcopy(self.memap_parser.mem_report)
-        old_summary = deepcopy(self.memap_parser.mem_summary)
-        self.memap_parser.generate_output(output_type, file_output)
-        self.assertEqual(self.memap_parser.modules, old_modules,
-                         "generate_output modified the 'modules' property")
-        self.assertEqual(self.memap_parser.mem_report, old_report,
-                         "generate_output modified the 'mem_report' property")
-        self.assertEqual(self.memap_parser.mem_summary, old_summary,
-                         "generate_output modified the 'mem_summary' property")
-
-    def test_report_computed(self):
-        """
-        Test ensures the report and summary are computed
-        
-        :return:
-        """
-        self.assertTrue(self.memap_parser.mem_report)
-        self.assertTrue(self.memap_parser.mem_summary)
-        self.assertEqual(self.memap_parser.mem_report[-1]['summary'],
-                         self.memap_parser.mem_summary,
-                         "mem_report did not contain a correct copy of mem_summary")
-    
-    def test_generate_output_table(self):
-        """
-        Test ensures that an output of type "table" can be generated correctly
-        
-        :return:
-        """
-        self.generate_test_helper('table')
-    
-    def test_generate_output_json(self):
-        """
-        Test ensures that an output of type "json" can be generated correctly
-        
-        :return:
-        """
-        file_name = '.json_test_output.json'
-        self.generate_test_helper('json', file_output=file_name)
-        self.assertTrue(os.path.exists(file_name), "Failed to create json file")
-        os.remove(file_name)
-    
-    def test_generate_output_csv_ci(self):
-        """
-        Test ensures that an output of type "csv-ci" can be generated correctly
-        
-        :return:
-        """
-        file_name = '.csv_ci_test_output.csv'
-        self.generate_test_helper('csv-ci', file_output=file_name)
-        self.assertTrue(os.path.exists(file_name), "Failed to create csv-ci file")
-        os.remove(file_name)
-    
-
-if __name__ == '__main__':
-    unittest.main()
--- a/test/pylint.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,48 +0,0 @@
-"""A test that all code scores above a 9.25 in pylint"""
-
-import subprocess
-import re
-import os.path
-
-SCORE_REGEXP = re.compile(
-    r'^Your\ code\ has\ been\ rated\ at\ (\-?[0-9\.]+)/10')
-
-TOOLS_ROOT = os.path.dirname(os.path.dirname(__file__))
-
-
-def parse_score(pylint_output):
-    """Parse the score out of pylint's output as a float If the score is not
-    found, return 0.0.
-    """
-    for line in pylint_output.splitlines():
-        match = re.match(SCORE_REGEXP, line)
-        if match:
-            return float(match.group(1))
-    return 0.0
-
-def execute_pylint(filename):
-    """Execute a pylint process and collect it's output
-    """
-    process = subprocess.Popen(
-        ["pylint", filename],
-        stdout=subprocess.PIPE,
-        stderr=subprocess.PIPE
-    )
-    stout, sterr = process.communicate()
-    status = process.poll()
-    return status, stout, sterr
-
-FILES = ["build_api.py", "config.py", "colorize.py", "detect_targets.py",
-         "hooks.py", "libraries.py", "memap.py", "options.py", "paths.py",
-         "targets.py", "test/pylint.py"]
-
-if __name__ == "__main__":
-    for python_module in FILES:
-        _, stdout, stderr = execute_pylint(os.path.join(TOOLS_ROOT,
-                                                        python_module))
-        score = parse_score(stdout)
-        if score < 9.25:
-            print(stdout)
-
-
-
--- a/test/targets/target_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,43 +0,0 @@
-#!/usr/bin/env python
-"""
- mbed
- Copyright (c) 2017-2017 ARM Limited
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
-     http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-"""
-
-import sys
-from os.path import join, abspath, dirname
-import unittest
-
-# Be sure that the tools directory is in the search path
-ROOT = abspath(join(dirname(__file__), "..", "..", ".."))
-sys.path.insert(0, ROOT)
-
-from tools.targets import TARGETS
-from tools.arm_pack_manager import Cache
-
-class TestTargets(unittest.TestCase):
-
-    def test_device_name(self):
-        """Assert device name is in a pack"""
-        cache = Cache(True, True)
-        named_targets = (target for target in TARGETS if
-                         hasattr(target, "device_name"))
-        for target in named_targets:
-            self.assertTrue(target.device_name in cache.index,
-                            "Target %s contains invalid device_name %s" %
-                            (target.name, target.device_name))
-
-if __name__ == '__main__':
-    unittest.main()
--- a/test/test_api/test_api_test.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,141 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2016 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-"""
-
-import unittest
-from mock import patch
-from tools.test_api import find_tests, build_tests
-
-"""
-Tests for test_api.py
-"""
-
-class TestApiTests(unittest.TestCase):
-    """
-    Test cases for Test Api
-    """
-
-    def setUp(self):
-        """
-        Called before each test case
-
-        :return:
-        """
-        self.base_dir = 'base_dir'
-        self.target = "K64F"
-        self.toolchain_name = "ARM"
-
-    def tearDown(self):
-        """
-        Called after each test case
-
-        :return:
-        """
-        pass
-
-    @patch('tools.test_api.scan_resources')
-    @patch('tools.test_api.prepare_toolchain')
-    def test_find_tests_app_config(self, mock_prepare_toolchain, mock_scan_resources):
-        """
-        Test find_tests for correct use of app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_scan_resources: mock of function scan_resources
-        :return:
-        """
-        app_config = "app_config"
-        mock_scan_resources().inc_dirs.return_value = []
-
-        find_tests(self.base_dir, self.target, self.toolchain_name, app_config=app_config)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], app_config,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-    @patch('tools.test_api.scan_resources')
-    @patch('tools.test_api.prepare_toolchain')
-    def test_find_tests_no_app_config(self, mock_prepare_toolchain, mock_scan_resources):
-        """
-        Test find_tests correctly deals with no app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_scan_resources: mock of function scan_resources
-        :return:
-        """
-        mock_scan_resources().inc_dirs.return_value = []
-
-        find_tests(self.base_dir, self.target, self.toolchain_name)
-
-        args = mock_prepare_toolchain.call_args
-        self.assertTrue('app_config' in args[1],
-                        "prepare_toolchain was not called with app_config")
-        self.assertEqual(args[1]['app_config'], None,
-                         "prepare_toolchain was called with an incorrect app_config")
-
-    @patch('tools.test_api.scan_resources')
-    @patch('tools.test_api.build_project')
-    def test_build_tests_app_config(self, mock_build_project, mock_scan_resources):
-        """
-        Test build_tests for correct use of app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_scan_resources: mock of function scan_resources
-        :return:
-        """
-        tests = {'test1': 'test1_path','test2': 'test2_path'}
-        src_paths = ['.']
-        build_path = "build_path"
-        app_config = "app_config"
-        mock_build_project.return_value = "build_project"
-
-        build_tests(tests, src_paths, build_path, self.target, self.toolchain_name,
-                    app_config=app_config)
-
-        arg_list = mock_build_project.call_args_list
-        for args in arg_list:
-            self.assertTrue('app_config' in args[1],
-                            "build_tests was not called with app_config")
-            self.assertEqual(args[1]['app_config'], app_config,
-                             "build_tests was called with an incorrect app_config")
-
-    @patch('tools.test_api.scan_resources')
-    @patch('tools.test_api.build_project')
-    def test_build_tests_no_app_config(self, mock_build_project, mock_scan_resources):
-        """
-        Test build_tests correctly deals with no app_config
-
-        :param mock_prepare_toolchain: mock of function prepare_toolchain
-        :param mock_scan_resources: mock of function scan_resources
-        :return:
-        """
-        tests = {'test1': 'test1_path', 'test2': 'test2_path'}
-        src_paths = ['.']
-        build_path = "build_path"
-        mock_build_project.return_value = "build_project"
-
-        build_tests(tests, src_paths, build_path, self.target, self.toolchain_name)
-
-        arg_list = mock_build_project.call_args_list
-        for args in arg_list:
-            self.assertTrue('app_config' in args[1],
-                            "build_tests was not called with app_config")
-            self.assertEqual(args[1]['app_config'], None,
-                             "build_tests was called with an incorrect app_config")
-
-if __name__ == '__main__':
-    unittest.main()
--- a/test/toolchains/api.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,127 +0,0 @@
-"""Tests for the toolchain sub-system"""
-import sys
-import os
-from string import printable
-from copy import deepcopy
-from mock import MagicMock, patch
-from hypothesis import given
-from hypothesis.strategies import text, lists, fixed_dictionaries
-
-ROOT = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "..",
-                                    ".."))
-sys.path.insert(0, ROOT)
-
-from tools.toolchains import TOOLCHAIN_CLASSES, LEGACY_TOOLCHAIN_NAMES,\
-    Resources
-from tools.targets import TARGET_MAP
-
-def test_instantiation():
-    """Test that all exported toolchain may be instantiated"""
-    for name, tc_class in  TOOLCHAIN_CLASSES.items():
-        cls = tc_class(TARGET_MAP["K64F"])
-        assert name == cls.name or\
-            name == LEGACY_TOOLCHAIN_NAMES[cls.name]
-
-ALPHABET = [char for char in printable if char not in [u'.', u'/']]
-
-@given(fixed_dictionaries({
-    'common': lists(text()),
-    'c': lists(text()),
-    'cxx': lists(text()),
-    'asm': lists(text()),
-    'ld': lists(text())}),
-       lists(text(min_size=1, alphabet=ALPHABET), min_size=1))
-def test_toolchain_profile_c(profile, source_file):
-    """Test that the appropriate profile parameters are passed to the
-    C compiler"""
-    filename = deepcopy(source_file)
-    filename[-1] += ".c"
-    to_compile = os.path.join(*filename)
-    with patch('os.mkdir') as _mkdir:
-        for _, tc_class in TOOLCHAIN_CLASSES.items():
-            toolchain = tc_class(TARGET_MAP["K64F"], build_profile=profile)
-            toolchain.inc_md5 = ""
-            toolchain.build_dir = ""
-            compile_command = toolchain.compile_command(to_compile,
-                                                        to_compile + ".o", [])
-            for parameter in profile['c'] + profile['common']:
-                assert any(parameter in cmd for cmd in compile_command), \
-                    "Toolchain %s did not propigate arg %s" % (toolchain.name,
-                                                            parameter)
-
-@given(fixed_dictionaries({
-    'common': lists(text()),
-    'c': lists(text()),
-    'cxx': lists(text()),
-    'asm': lists(text()),
-    'ld': lists(text())}),
-       lists(text(min_size=1, alphabet=ALPHABET), min_size=1))
-def test_toolchain_profile_cpp(profile, source_file):
-    """Test that the appropriate profile parameters are passed to the
-    C++ compiler"""
-    filename = deepcopy(source_file)
-    filename[-1] += ".cpp"
-    to_compile = os.path.join(*filename)
-    with patch('os.mkdir') as _mkdir:
-        for _, tc_class in TOOLCHAIN_CLASSES.items():
-            toolchain = tc_class(TARGET_MAP["K64F"], build_profile=profile)
-            toolchain.inc_md5 = ""
-            toolchain.build_dir = ""
-            compile_command = toolchain.compile_command(to_compile,
-                                                        to_compile + ".o", [])
-            for parameter in profile['cxx'] + profile['common']:
-                assert any(parameter in cmd for cmd in compile_command), \
-                    "Toolchain %s did not propigate arg %s" % (toolchain.name,
-                                                            parameter)
-
-@given(fixed_dictionaries({
-    'common': lists(text()),
-    'c': lists(text()),
-    'cxx': lists(text()),
-    'asm': lists(text()),
-    'ld': lists(text())}),
-       lists(text(min_size=1, alphabet=ALPHABET), min_size=1))
-def test_toolchain_profile_asm(profile, source_file):
-    """Test that the appropriate profile parameters are passed to the
-    Assembler"""
-    filename = deepcopy(source_file)
-    filename[-1] += ".s"
-    to_compile = os.path.join(*filename)
-    with patch('os.mkdir') as _mkdir:
-        for _, tc_class in TOOLCHAIN_CLASSES.items():
-            toolchain = tc_class(TARGET_MAP["K64F"], build_profile=profile)
-            toolchain.inc_md5 = ""
-            toolchain.build_dir = ""
-            compile_command = toolchain.compile_command(to_compile,
-                                                        to_compile + ".o", [])
-            if not compile_command:
-                assert compile_command, to_compile
-            for parameter in profile['asm']:
-                assert any(parameter in cmd for cmd in compile_command), \
-                    "Toolchain %s did not propigate arg %s" % (toolchain.name,
-                                                            parameter)
-
-    for name, Class in  TOOLCHAIN_CLASSES.items():
-        CLS = Class(TARGET_MAP["K64F"])
-        assert name == CLS.name or name ==  LEGACY_TOOLCHAIN_NAMES[CLS.name]
-
-
-@given(lists(text(alphabet=ALPHABET, min_size=1), min_size=1))
-def test_detect_duplicates(filenames):
-    c_sources = [os.path.join(name, "dupe.c") for name in filenames]
-    s_sources = [os.path.join(name, "dupe.s") for name in filenames]
-    cpp_sources = [os.path.join(name, "dupe.cpp") for name in filenames]
-    with MagicMock() as notify:
-        toolchain = TOOLCHAIN_CLASSES["ARM"](TARGET_MAP["K64F"], notify=notify)
-        res = Resources()
-        res.c_sources = c_sources
-        res.s_sources = s_sources
-        res.cpp_sources = cpp_sources
-        assert res.detect_duplicates(toolchain) == 1,\
-            "Not Enough duplicates found"
-
-        _, (notification, _), _ = notify.mock_calls[1]
-        assert "dupe.o" in notification["message"]
-        assert "dupe.s" in notification["message"]
-        assert "dupe.c" in notification["message"]
-        assert "dupe.cpp" in notification["message"]
--- a/test_api.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/test_api.py	Thu Jun 22 11:12:28 2017 -0500
@@ -2013,7 +2013,7 @@
     tests = {}
 
     # Prepare the toolchain
-    toolchain = prepare_toolchain([base_dir], target_name, toolchain_name,
+    toolchain = prepare_toolchain([base_dir], None, target_name, toolchain_name,
                                   silent=True, app_config=app_config)
 
     # Scan the directory for paths to probe for 'TESTS' folders
--- a/test_exporters.py	Wed Feb 15 13:53:18 2017 -0600
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,414 +0,0 @@
-"""
-mbed SDK
-Copyright (c) 2011-2014 ARM Limited
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-Author: Przemyslaw Wirkus <Przemyslaw.wirkus@arm.com>
-"""
-
-from tools.utils import construct_enum, mkdir
-from prettytable import PrettyTable
-import os
-
-ResultExporterType = construct_enum(HTML='Html_Exporter',
-                                    JUNIT='JUnit_Exporter',
-                                    JUNIT_OPER='JUnit_Exporter_Interoperability',
-                                    BUILD='Build_Exporter',
-                                    TEXT='Text_Exporter',
-                                    PRINT='Print_Exporter')
-
-
-class ReportExporter():
-    """ Class exports extended test result Python data structure to
-        different formats like HTML, JUnit XML.
-
-    Parameter 'test_result_ext' format:
-
-    u'uARM': {   u'LPC1768': {   'MBED_2': {   0: {   'copy_method': 'shutils.copy()',
-                                                      'duration': 20,
-                                                      'elapsed_time': 1.7929999828338623,
-                                                      'output': 'Host test instrumentation on ...\r\n',
-                                                      'result': 'OK',
-                                                      'target_name': u'LPC1768',
-                                                      'description': 'stdio',
-                                                      'id': u'MBED_2',
-                                                      'toolchain_name': u'uARM'}},
-    """
-    CSS_STYLE = """<style>
-                   .name{
-                    border: 1px solid;
-                    border-radius: 25px;
-                    width: 100px;
-                   }
-                   .tooltip{
-                       position:absolute;
-                       background-color: #F5DA81;
-                       display:none;
-                   }
-                   </style>
-                """
-
-    JAVASCRIPT = """
-                 <script type="text/javascript">
-                 function show (elem) {
-                     elem.style.display = "block";
-                 }
-                 function hide (elem) {
-                     elem.style.display = "";
-                 }
-                 </script>
-                 """
-
-    def __init__(self, result_exporter_type, package="test"):
-        self.result_exporter_type = result_exporter_type
-        self.package = package
-
-    def report(self, test_summary_ext, test_suite_properties=None,
-               print_log_for_failures=True):
-        """ Invokes report depending on exporter_type set in constructor
-        """
-        if self.result_exporter_type == ResultExporterType.HTML:
-            # HTML exporter
-            return self.exporter_html(test_summary_ext, test_suite_properties)
-        elif self.result_exporter_type == ResultExporterType.JUNIT:
-            # JUNIT exporter for results from test suite
-            return self.exporter_junit(test_summary_ext, test_suite_properties)
-        elif self.result_exporter_type == ResultExporterType.JUNIT_OPER:
-            # JUNIT exporter for interoperability test
-            return self.exporter_junit_ioper(test_summary_ext, test_suite_properties)
-        elif self.result_exporter_type == ResultExporterType.PRINT:
-            # JUNIT exporter for interoperability test
-            return self.exporter_print(test_summary_ext, print_log_for_failures=print_log_for_failures)
-        elif self.result_exporter_type == ResultExporterType.TEXT:
-            return self.exporter_text(test_summary_ext)
-        return None
-
-    def report_to_file(self, test_summary_ext, file_name, test_suite_properties=None):
-        """ Stores report to specified file
-        """
-        report = self.report(test_summary_ext, test_suite_properties=test_suite_properties)
-        self.write_to_file(report, file_name)
-
-    def write_to_file(self, report, file_name):
-        if report is not None:
-            dirname = os.path.dirname(file_name)
-            if dirname:
-                mkdir(dirname)
-            with open(file_name, 'w') as f:
-                f.write(report)
-
-    def get_tooltip_name(self, toolchain, target, test_id, loop_no):
-        """ Generate simple unique tool-tip name which can be used.
-            For example as HTML <div> section id attribute.
-        """
-        return "target_test_%s_%s_%s_%s"% (toolchain.lower(), target.lower(), test_id.lower(), loop_no)
-
-    def get_result_div_sections(self, test, test_no):
-        """ Generates separate <DIV> sections which contains test results output.
-        """
-
-        RESULT_COLORS = {'OK': 'LimeGreen',
-                         'FAIL': 'Orange',
-                         'ERROR': 'LightCoral',
-                         'OTHER': 'LightGray',
-                        }
-
-        tooltip_name = self.get_tooltip_name(test['toolchain_name'], test['target_name'], test['id'], test_no)
-        background_color = RESULT_COLORS[test['result'] if test['result'] in RESULT_COLORS else 'OTHER']
-        result_div_style = "background-color: %s"% background_color
-
-        result = """<div class="name" style="%s" onmouseover="show(%s)" onmouseout="hide(%s)">
-                       <center>%s</center>
-                       <div class = "tooltip" id= "%s">
-                       <b>%s</b><br />
-                       <hr />
-                       <b>%s</b> in <b>%.2f sec</b><br />
-                       <hr />
-                       <small>
-                       %s
-                       </small>
-                       </div>
-                    </div>
-                 """% (result_div_style,
-                       tooltip_name,
-                       tooltip_name,
-                       test['result'],
-                       tooltip_name,
-                       test['target_name_unique'],
-                       test['description'],
-                       test['elapsed_time'],
-                       test['output'].replace('\n', '<br />'))
-        return result
-
-    def get_result_tree(self, test_results):
-        """ If test was run in a loop (we got few results from the same test)
-            we will show it in a column to see all results.
-            This function produces HTML table with corresponding results.
-        """
-        result = ''
-        for i, test_result in enumerate(test_results):
-            result += '<table>'
-            test_ids = sorted(test_result.keys())
-            for test_no in test_ids:
-                test = test_result[test_no]
-                result += """<tr>
-                                 <td valign="top">%s</td>
-                             </tr>"""% self.get_result_div_sections(test, "%d_%d" % (test_no, i))
-            result += '</table>'
-        return result
-
-    def get_all_unique_test_ids(self, test_result_ext):
-        """ Gets all unique test ids from all ran tests.
-            We need this to create complete list of all test ran.
-        """
-        result = []
-        targets = test_result_ext.keys()
-        for target in targets:
-            toolchains = test_result_ext[target].keys()
-            for toolchain in toolchains:
-                tests = test_result_ext[target][toolchain].keys()
-                result.extend(tests)
-        return sorted(list(set(result)))
-
-    #
-    # Exporters functions
-    #
-
-    def exporter_html(self, test_result_ext, test_suite_properties=None):
-        """ Export test results in proprietary HTML format.
-        """
-        result = """<html>
-                    <head>
-                        <title>mbed SDK test suite test result report</title>
-                        %s
-                        %s
-                    </head>
-                    <body>
-                 """% (self.CSS_STYLE, self.JAVASCRIPT)
-
-        unique_test_ids = self.get_all_unique_test_ids(test_result_ext)
-        targets = sorted(test_result_ext.keys())
-        result += '<table>'
-        for target in targets:
-            toolchains = sorted(test_result_ext[target].keys())
-            for toolchain in toolchains:
-                result += '<tr>'
-                result += '<td></td>'
-                result += '<td></td>'
-
-                tests = sorted(test_result_ext[target][toolchain].keys())
-                for test in unique_test_ids:
-                    result += """<td align="center">%s</td>"""% test
-                result += """</tr>
-                              <tr>
-                              <td valign="center">%s</td>
-                              <td valign="center"><b>%s</b></td>
-                          """% (toolchain, target)
-
-                for test in unique_test_ids:
-                    test_result = self.get_result_tree(test_result_ext[target][toolchain][test]) if test in tests else ''
-                    result += '<td>%s</td>'% (test_result)
-
-                result += '</tr>'
-        result += '</table>'
-        result += '</body></html>'
-        return result
-
-    def exporter_junit_ioper(self, test_result_ext, test_suite_properties=None):
-        from junit_xml import TestSuite, TestCase
-        test_suites = []
-        test_cases = []
-
-        for platform in sorted(test_result_ext.keys()):
-            # {platform : ['Platform', 'Result', 'Scope', 'Description'])
-            test_cases = []
-            for tr_result in test_result_ext[platform]:
-                result, name, scope, description = tr_result
-
-                classname = 'test.ioper.%s.%s.%s' % (platform, name, scope)
-                elapsed_sec = 0
-                _stdout = description
-                _stderr = ''
-                # Test case
-                tc = TestCase(name, classname, elapsed_sec, _stdout, _stderr)
-                # Test case extra failure / error info
-                if result == 'FAIL':
-                    tc.add_failure_info(description, _stdout)
-                elif result == 'ERROR':
-                    tc.add_error_info(description, _stdout)
-                elif result == 'SKIP' or result == 'NOT_SUPPORTED':
-                    tc.add_skipped_info(description, _stdout)
-
-                test_cases.append(tc)
-            ts = TestSuite("test.suite.ioper.%s" % (platform), test_cases)
-            test_suites.append(ts)
-        return TestSuite.to_xml_string(test_suites)
-
-    def exporter_junit(self, test_result_ext, test_suite_properties=None):
-        """ Export test results in JUnit XML compliant format
-        """
-        from junit_xml import TestSuite, TestCase
-        test_suites = []
-        test_cases = []
-
-        targets = sorted(test_result_ext.keys())
-        for target in targets:
-            toolchains = sorted(test_result_ext[target].keys())
-            for toolchain in toolchains:
-                test_cases = []
-                tests = sorted(test_result_ext[target][toolchain].keys())
-                for test in tests:
-                    test_results = test_result_ext[target][toolchain][test]
-                    for test_res in test_results:
-                        test_ids = sorted(test_res.keys())
-                        for test_no in test_ids:
-                            test_result = test_res[test_no]
-                            name = test_result['description']
-                            classname = '%s.%s.%s.%s'% (self.package, target, toolchain, test_result['id'])
-                            elapsed_sec = test_result['elapsed_time']
-                            _stdout = test_result['output']
-
-                            if 'target_name_unique' in test_result:
-                                _stderr = test_result['target_name_unique']
-                            else:
-                                _stderr = test_result['target_name']
-
-                            # Test case
-                            tc = TestCase(name, classname, elapsed_sec, _stdout, _stderr)
-
-                            # Test case extra failure / error info
-                            message = test_result['result']
-                            if test_result['result'] == 'FAIL':
-                                tc.add_failure_info(message, _stdout)
-                            elif test_result['result'] == 'SKIP' or test_result["result"] == 'NOT_SUPPORTED':
-                                tc.add_skipped_info(message, _stdout)
-                            elif test_result['result'] != 'OK':
-                                tc.add_error_info(message, _stdout)
-
-                            test_cases.append(tc)
-
-                ts = TestSuite("test.suite.%s.%s"% (target, toolchain), test_cases, properties=test_suite_properties[target][toolchain])
-                test_suites.append(ts)
-        return TestSuite.to_xml_string(test_suites)
-
-    def exporter_print_helper(self, array, print_log=False):
-        for item in array:
-            print "  * %s::%s::%s" % (item["target_name"], item["toolchain_name"], item["id"])
-            if print_log:
-                log_lines = item["output"].split("\n")
-                for log_line in log_lines:
-                    print "        %s" % log_line
-
-    def exporter_print(self, test_result_ext, print_log_for_failures=False):
-        """ Export test results in print format.
-        """
-        failures = []
-        skips = []
-        successes = []
-
-        unique_test_ids = self.get_all_unique_test_ids(test_result_ext)
-        targets = sorted(test_result_ext.keys())
-
-        for target in targets:
-            toolchains = sorted(test_result_ext[target].keys())
-            for toolchain in toolchains:
-                tests = sorted(test_result_ext[target][toolchain].keys())
-                for test in tests:
-                    test_runs = test_result_ext[target][toolchain][test]
-                    for test_runner in test_runs:
-                        #test_run = test_result_ext[target][toolchain][test][test_run_number][0]
-                        test_run = test_runner[0]
-                        
-                        if "result" in test_run:
-                            if test_run["result"] == "FAIL":
-                                failures.append(test_run)
-                            elif test_run["result"] == "SKIP" or test_run["result"] == "NOT_SUPPORTED":
-                                skips.append(test_run)
-                            elif test_run["result"] == "OK":
-                                successes.append(test_run)
-                            else:
-                                raise Exception("Unhandled result type: %s" % (test_run["result"]))
-                        else:
-                            raise Exception("'test_run' did not have a 'result' value")
-
-        if successes:
-            print "\n\nBuild successes:"
-            self.exporter_print_helper(successes)
-
-        if skips:
-            print "\n\nBuild skips:"
-            self.exporter_print_helper(skips)
-
-        if failures:
-            print "\n\nBuild failures:"
-            self.exporter_print_helper(failures, print_log=print_log_for_failures)
-            return False
-        else:
-            return True
-
-    def exporter_text(self, test_result_ext):
-        """ Prints well-formed summary with results (SQL table like)
-            table shows target x test results matrix across
-        """
-        success_code = 0    # Success code that can be leter returned to
-        # Pretty table package is used to print results
-        pt = PrettyTable(["Result", "Target", "Toolchain", "Test ID", "Test Description",
-                          "Elapsed Time", "Timeout"])
-        pt.align["Result"] = "l" # Left align
-        pt.align["Target"] = "l" # Left align
-        pt.align["Toolchain"] = "l" # Left align
-        pt.align["Test ID"] = "l" # Left align
-        pt.align["Test Description"] = "l" # Left align
-        pt.padding_width = 1 # One space between column edges and contents (default)
-
-        result_dict = {"OK" : 0,
-                       "FAIL" : 0,
-                       "ERROR" : 0,
-                       "UNDEF" : 0,
-                       "IOERR_COPY" : 0,
-                       "IOERR_DISK" : 0,
-                       "IOERR_SERIAL" : 0,
-                       "TIMEOUT" : 0,
-                       "NO_IMAGE" : 0,
-                       "MBED_ASSERT" : 0,
-                       "BUILD_FAILED" : 0,
-                       "NOT_SUPPORTED" : 0
-        }
-        unique_test_ids = self.get_all_unique_test_ids(test_result_ext)
-        targets = sorted(test_result_ext.keys())
-        for target in targets:
-            toolchains = sorted(test_result_ext[target].keys())
-            for toolchain in toolchains:
-                test_cases = []
-                tests = sorted(test_result_ext[target][toolchain].keys())
-                for test in tests:
-                    test_results = test_result_ext[target][toolchain][test]
-                    for test_res in test_results:
-                        test_ids = sorted(test_res.keys())
-                        for test_no in test_ids:
-                            test_result = test_res[test_no]
-                            result_dict[test_result['result']] += 1
-                            pt.add_row([test_result['result'],
-                                        test_result['target_name'],
-                                        test_result['toolchain_name'],
-                                        test_result['id'],
-                                        test_result['description'],
-                                        test_result['elapsed_time'],
-                                        test_result['duration']])
-        result = pt.get_string()
-        result += "\n"
-
-        # Print result count
-        result += "Result: " + ' / '.join(['%s %s' % (value, key) for (key, value) in {k: v for k, v in result_dict.items() if v != 0}.iteritems()])
-        return result
--- a/tests.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/tests.py	Thu Jun 22 11:12:28 2017 -0500
@@ -116,6 +116,7 @@
      * NUCLEO_F103RB: (RX=PA_11, TX=PA_12)
      * NUCLEO_F746ZG: (RX=PA_11, TX=PA_12)
      * DISCO_F746NG:  (RX=PB_8, TX=PB_9)
+     * DISCO_L475VG_IOT01A:  (RX=PA_11, TX=PA_12)
      * DISCO_L476VG:  (RX=PA_11, TX=PA_12)
      * NUCLEO_L476RG: (RX=PA_11, TX=PA_12)
      * NUCLEO_L432KC: (RX=PA_11, TX=PA_12)
@@ -136,7 +137,7 @@
         "source_dir": join(TEST_DIR, "mbed", "file"),
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB],
         "automated": True,
-        "mcu": ["LPC1768", "LPC2368", "LPC11U24"]
+        "mcu": ["LPC1768", "LPC11U24"]
     },
     {
         "id": "MBED_A3", "description": "C++ STL",
@@ -185,12 +186,12 @@
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB],
         "automated": True,
         "peripherals": ["analog_loop"],
-        "mcu": ["LPC1768", "LPC2368", "LPC2460", "KL25Z", "K64F", "K66F", "K22F", "LPC4088", "LPC1549",
+        "mcu": ["LPC1768", "KL25Z", "K64F", "K66F", "K22F", "LPC4088", "LPC1549",
                 "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_F302R8", "NUCLEO_F303K8", "NUCLEO_F303RE", "NUCLEO_F207ZG",
-                "NUCLEO_F334R8", "NUCLEO_F303ZE", "NUCLEO_L053R8", "NUCLEO_L073RZ", "NUCLEO_L152RE",
+                "NUCLEO_F334R8", "NUCLEO_F303ZE", "NUCLEO_L053R8", "DISCO_L072CZ_LRWAN1", "NUCLEO_L073RZ", "NUCLEO_L152RE",
                 "NUCLEO_F410RB", "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F429ZI",
                 "DISCO_F407VG", "NUCLEO_F746ZG", "NUCLEO_L476RG",
-                "DISCO_L053C8", "DISCO_F334C8", "DISCO_L476VG", "DISCO_F469NI", "DISCO_F429ZI", "DISCO_F769NI",
+                "DISCO_L053C8", "DISCO_F334C8", "DISCO_L475VG_IOT01A", "DISCO_L476VG", "DISCO_F469NI", "DISCO_F429ZI", "DISCO_F769NI",
                 "ARCH_MAX", "MAX32600MBED", "MOTE_L152RC", "B96B_F446VE"]
     },
     {
@@ -217,13 +218,6 @@
         "automated": True,
     },
     {
-        "id": "MBED_A12", "description": "SD File System",
-        "source_dir": join(TEST_DIR, "mbed", "sd"),
-        "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-        "automated": True,
-        "peripherals": ["SD"]
-    },
-    {
         "id": "MBED_A13", "description": "I2C MMA7660 accelerometer",
         "source_dir": join(TEST_DIR, "mbed", "i2c_MMA7660"),
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, join(PERIPHERALS, 'MMA7660')],
@@ -324,7 +318,7 @@
                 "NUCLEO_F091RC", "NUCLEO_F072RB", "NUCLEO_F042K6", "NUCLEO_F334R8", "NUCLEO_F207ZG",
         "NUCLEO_F303RE", "NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F446RE","NUCLEO_F446ZE",
         "DISCO_F469NI", "DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG",
-        "DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
+        "DISCO_F746NG", "DISCO_L475VG_IOT01A", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
         "DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG"]
     },
     {
@@ -336,7 +330,7 @@
                 "NUCLEO_F091RC", "NUCLEO_F072RB", "NUCLEO_F042K6", "NUCLEO_F334R8", "NUCLEO_F207ZG",
         "NUCLEO_F303RE", "NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F446RE","NUCLEO_F446ZE",
         "DISCO_F469NI", "DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG",
-        "DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
+        "DISCO_F746NG", "DISCO_L475VG_IOT01A", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
         "DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG"]
     },
     {
@@ -347,6 +341,19 @@
         "peripherals": ["i2c_loop"]
     },
     {
+        "id": "MBED_A30", "description": "CAN API",
+        "source_dir": join(TEST_DIR, "mbed", "can_api"),
+        "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB],
+        "automated": True,
+        "mcu": ["LPC1549", "LPC1768","B96B_F446VE", "VK_RZ_A1H",
+                "NUCLEO_F091RC", "NUCLEO_F072RB", "NUCLEO_F042K6", "NUCLEO_F334R8", "NUCLEO_F207ZG",
+                "NUCLEO_F303RE", "NUCLEO_F303K8", "NUCLEO_F303ZE", "NUCLEO_F302R8", "NUCLEO_F446RE","NUCLEO_F446ZE",
+                "DISCO_F469NI", "DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG",
+                "NUCLEO_F429ZI", "NUCLEO_F439ZI", "NUCLEO_F756ZG", "NUCLEO_L486RG",
+                "DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
+                "DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG"]
+    },
+    {
         "id": "MBED_BLINKY", "description": "Blinky",
         "source_dir": join(TEST_DIR, "mbed", "blinky"),
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB],
@@ -394,29 +401,6 @@
         "dependencies": [MBED_LIBRARIES]
     },
 
-    # performance related tests
-    {
-        "id": "PERF_1", "description": "SD Stdio R/W Speed",
-        "source_dir": join(TEST_DIR, "mbed", "sd_perf_stdio"),
-        "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-        "automated": True,
-        "peripherals": ["SD"]
-    },
-    {
-        "id": "PERF_2", "description": "SD FileHandle R/W Speed",
-        "source_dir": join(TEST_DIR, "mbed", "sd_perf_fhandle"),
-        "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-        "automated": True,
-        "peripherals": ["SD"]
-    },
-    {
-        "id": "PERF_3", "description": "SD FatFS R/W Speed",
-        "source_dir": join(TEST_DIR, "mbed", "sd_perf_fatfs"),
-        "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-        "automated": True,
-        "peripherals": ["SD"]
-    },
-
 
     # Not automated MBED tests
     {
@@ -539,12 +523,6 @@
         "dependencies": [MBED_LIBRARIES],
     },
     {
-        "id": "MBED_19", "description": "SD FS Directory",
-        "source_dir": join(TEST_DIR, "mbed", "dir_sd"),
-        "dependencies": [MBED_LIBRARIES, FS_LIBRARY],
-        "peripherals": ["SD"]
-    },
-    {
         "id": "MBED_20", "description": "InterruptIn 2",
         "source_dir": join(TEST_DIR, "mbed", "interruptin_2"),
         "dependencies": [MBED_LIBRARIES],
@@ -559,7 +537,7 @@
         "source_dir": join(TEST_DIR, "mbed", "semihost"),
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB],
         "automated": True,
-        "mcu": ["LPC1768", "LPC2368", "LPC11U24"]
+        "mcu": ["LPC1768", "LPC11U24"]
     },
     {
         "id": "MBED_23", "description": "Ticker Int us",
@@ -676,308 +654,6 @@
         "automated": False
     },
 
-    # CMSIS RTOS tests
-    {
-        "id": "CMSIS_RTOS_1", "description": "Basic",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "basic"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_2", "description": "Mutex",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "mutex"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_3", "description": "Semaphore",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "semaphore"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_4", "description": "Signals",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "signals"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_5", "description": "Queue",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "queue"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_6", "description": "Mail",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "mail"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_7", "description": "Timer",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "timer"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-    {
-        "id": "CMSIS_RTOS_8", "description": "ISR",
-        "source_dir": join(TEST_DIR, "rtos", "cmsis", "isr"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES],
-    },
-
-    # mbed RTOS tests
-    {
-        "id": "RTOS_1", "description": "Basic thread",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "basic"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test": "wait_us_auto",
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303ZE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_2", "description": "Mutex resource lock",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "mutex"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG",
-                "NUCLEO_F446ZE", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_3", "description": "Semaphore resource lock",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "semaphore"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE",  "NUCLEO_F446ZE",
-                "NUCLEO_F103RB", "DISCO_F746NG",
-                "NUCLEO_F746ZG",  "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_4", "description": "Signals messaging",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "signals"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F446ZE",
-                "NUCLEO_F103RB", "DISCO_F746NG",
-                "NUCLEO_F746ZG",  "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_5", "description": "Queue messaging",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "queue"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
-                "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_6", "description": "Mail messaging",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "mail"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
-                "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_7", "description": "Timer",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "timer"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test": "wait_us_auto",
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
-                "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_8", "description": "ISR (Queue)",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "isr"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB],
-        "automated": True,
-        "mcu": ["LPC1768", "LPC1549", "LPC11U24", "LPC812", "LPC2460", "LPC824", "SSCI824",
-                "KL25Z", "KL05Z", "K22F", "K64F", "K66F", "KL43Z", "KL46Z", "HEXIWEAR",
-                "RZ_A1H", "VK_RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "DISCO_F469NI", "NUCLEO_F410RB", "NUCLEO_F429ZI",
-                "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8", "NUCLEO_F303ZE", "NUCLEO_F070RB", "NUCLEO_F207ZG",
-                "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_L432KC", "DISCO_L476VG", "NUCLEO_L476RG",
-                "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
-                "NUCLEO_F446RE", "NUCLEO_F446ZE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
-                "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "NRF51822", "NRF51_DK", "SEEED_TINY_BLE", "ARM_BEETLE_SOC", "NUCLEO_F767ZI", "DISCO_F769NI"],
-    },
-    {
-        "id": "RTOS_9", "description": "SD File write-read",
-        "source_dir": join(TEST_DIR, "rtos", "mbed", "file"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-        "automated": True,
-        "peripherals": ["SD"],
-        "mcu": ["LPC1768", "LPC11U24", "LPC812", "KL25Z", "HEXIWEAR",
-                "KL05Z", "K64F", "K66F", "KL46Z", "RZ_A1H",
-                "NUMAKER_PFM_NUC472", "NUMAKER_PFM_M453",
-                "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F429ZI", "NUCLEO_F411RE", "NUCLEO_F412ZG", "NUCLEO_F401RE", "NUCLEO_F410RB", "DISCO_F469NI", "NUCLEO_F207ZG"],
-    },
-
-    # Networking Tests
-    {
-        "id": "NET_1", "description": "TCP client hello world",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "tcpclient"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_2", "description": "NIST Internet Time Service",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "udpclient"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_3", "description": "TCP echo server",
-        "source_dir": join(TEST_DIR, "net", "echo", "tcp_server"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test" : "tcpecho_server_auto",
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_4", "description": "TCP echo client",
-        "source_dir": join(TEST_DIR, "net", "echo", "tcp_client"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test": "tcpecho_client_auto",
-        "peripherals": ["ethernet"]
-    },
-    {
-        "id": "NET_5", "description": "UDP echo server",
-        "source_dir": join(TEST_DIR, "net", "echo", "udp_server"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test" : "udpecho_server_auto",
-        "peripherals": ["ethernet"]
-    },
-    {
-        "id": "NET_6", "description": "UDP echo client",
-        "source_dir": join(TEST_DIR, "net", "echo", "udp_client"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test" : "udpecho_client_auto",
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_7", "description": "HTTP client hello world",
-        "source_dir": join(TEST_DIR, "net", "protocols", "HTTPClient_HelloWorld"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_8", "description": "NTP client",
-        "source_dir": join(TEST_DIR, "net", "protocols", "NTPClient_HelloWorld"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_9", "description": "Multicast Send",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "multicast_send"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY],
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_10", "description": "Multicast Receive",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "multicast_receive"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY],
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_11", "description": "Broadcast Send",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "broadcast_send"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY],
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_12", "description": "Broadcast Receive",
-        "source_dir": join(TEST_DIR, "net", "helloworld", "broadcast_receive"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY],
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_13", "description": "TCP client echo loop",
-        "source_dir": join(TEST_DIR, "net", "echo", "tcp_client_loop"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY, TEST_MBED_LIB],
-        "automated": True,
-        #"host_test": "tcpecho_client_auto",
-        "peripherals": ["ethernet"],
-    },
-    {
-        "id": "NET_14", "description": "UDP PHY/Data link layer",
-        "source_dir": join(TEST_DIR, "net", "echo", "udp_link_layer"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY],
-        "automated": False,
-        "host_test": "udp_link_layer_auto",
-        "peripherals": ["ethernet"],
-    },
-
-    # u-blox tests
-    {
-        "id": "UB_1", "description": "u-blox USB modem: HTTP client",
-        "source_dir": [join(TEST_DIR, "net", "cellular", "http", "ubloxusb"), join(TEST_DIR, "net", "cellular", "http", "common")],
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY],
-        "supported": CORTEX_ARM_SUPPORT,
-    },
-    {
-        "id": "UB_2", "description": "u-blox USB modem: SMS test",
-        "source_dir": [join(TEST_DIR, "net", "cellular", "sms", "ubloxusb"), join(TEST_DIR, "net", "cellular", "sms", "common")],
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY],
-        "supported": CORTEX_ARM_SUPPORT,
-    },
-
     # USB Tests 
     # USB device test list
     {
@@ -1020,17 +696,7 @@
         "source_dir": join(TEST_DIR, "usb", "device", "audio_cb"),
         "dependencies": [MBED_LIBRARIES, USB_LIBRARIES],
     },
-    # USB host test list
-    {
-        "id": "USB_10", "description": "MSD",
-        "source_dir": join(TEST_DIR, "usb", "host", "mass_storage"),
-        "dependencies": [MBED_LIBRARIES,  USB_HOST_LIBRARIES, FAT_FS, RTOS],
-    },
-    {
-        "id": "USB_11", "description": "mouse",
-        "source_dir": join(TEST_DIR, "usb", "host", "mouse"),
-        "dependencies": [MBED_LIBRARIES,  USB_HOST_LIBRARIES, RTOS],
-    },
+
     # CMSIS DSP
     {
         "id": "CMSIS_DSP_1", "description": "FIR",
@@ -1089,11 +755,6 @@
         "automated": True,
         #"host_test" : "dev_null_auto",
     },
-    {
-        "id": "EXAMPLE_2", "description": "FS + RTOS",
-        "source_dir": join(TEST_DIR, "mbed", "fs"),
-        "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, TEST_MBED_LIB, FS_LIBRARY],
-    },
 
     # CPPUTEST Library provides Unit testing Framework
     #
@@ -1116,7 +777,7 @@
         "source_dir": join(TEST_DIR, "utest", "semihost_fs"),
         "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, CPPUTEST_LIBRARY],
         "automated": False,
-        "mcu": ["LPC1768", "LPC2368", "LPC11U24"]
+        "mcu": ["LPC1768", "LPC11U24"]
     },
     {
         "id": "UT_3", "description": "General tests",
@@ -1174,8 +835,7 @@
     "i2c": ["MBED_A19", "MBED_A20"],
     "spi": ["MBED_A12"],
 }
-GROUPS["rtos"] = [test["id"] for test in TESTS if test["id"].startswith("RTOS_")]
-GROUPS["net"] = [test["id"] for test in TESTS if test["id"].startswith("NET_")]
+
 GROUPS["automated"] = [test["id"] for test in TESTS if test.get("automated", False)]
 # Look for 'TEST_GROUPS' in mbed_settings.py and update the GROUPS dictionary
 # with the information in test_groups if found
--- a/toolchains/__init__.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/toolchains/__init__.py	Thu Jun 22 11:12:28 2017 -0500
@@ -215,7 +215,7 @@
 # standard labels for the "TARGET_" and "TOOLCHAIN_" specific directories, but
 # had the knowledge of a list of these directories to be ignored.
 LEGACY_IGNORE_DIRS = set([
-    'LPC11U24', 'LPC1768', 'LPC2368', 'LPC4088', 'LPC812', 'KL25Z',
+    'LPC11U24', 'LPC1768', 'LPC4088', 'LPC812', 'KL25Z',
     'ARM', 'uARM', 'IAR',
     'GCC_ARM', 'GCC_CS', 'GCC_CR', 'GCC_CW', 'GCC_CW_EWL', 'GCC_CW_NEWLIB',
 ])
@@ -252,11 +252,14 @@
 
     MBED_CONFIG_FILE_NAME="mbed_config.h"
 
+    PROFILE_FILE_NAME = ".profile"
+
     __metaclass__ = ABCMeta
 
     profile_template = {'common':[], 'c':[], 'cxx':[], 'asm':[], 'ld':[]}
 
-    def __init__(self, target, notify=None, macros=None, silent=False, extra_verbose=False, build_profile=None):
+    def __init__(self, target, notify=None, macros=None, silent=False,
+                 extra_verbose=False, build_profile=None, build_dir=None):
         self.target = target
         self.name = self.__class__.__name__
 
@@ -295,12 +298,9 @@
         self.build_all = False
 
         # Build output dir
-        self.build_dir = None
+        self.build_dir = build_dir
         self.timestamp = time()
 
-        # Output build naming based on target+toolchain combo (mbed 2.0 builds)
-        self.obj_path = join("TARGET_"+target.name, "TOOLCHAIN_"+self.name)
-
         # Number of concurrent build jobs. 0 means auto (based on host system cores)
         self.jobs = 0
 
@@ -476,7 +476,7 @@
             # This is a policy decision and it should /really/ be in the config system
             # ATM it's here for backward compatibility
             if ((("-g" in self.flags['common'] or "-g3" in self.flags['common']) and
-                 "-O0") in self.flags['common'] or
+                 "-O0" in self.flags['common']) or
                 ("-r" in self.flags['common'] and
                  "-On" in self.flags['common'])):
                 self.labels['TARGET'].append("DEBUG")
@@ -580,7 +580,8 @@
                     self.add_ignore_patterns(root, base_path, lines)
 
             # Skip the whole folder if ignored, e.g. .mbedignore containing '*'
-            if self.is_ignored(join(relpath(root, base_path),"")):
+            if (self.is_ignored(join(relpath(root, base_path),"")) or
+                self.build_dir == join(relpath(root, base_path))):
                 dirs[:] = []
                 continue
 
@@ -613,6 +614,7 @@
                             break
 
             # Add root to include paths
+            root = root.rstrip("/")
             resources.inc_dirs.append(root)
             resources.file_basepath[root] = base_path
 
@@ -773,7 +775,7 @@
 
     # THIS METHOD IS BEING CALLED BY THE MBED ONLINE BUILD SYSTEM
     # ANY CHANGE OF PARAMETERS OR RETURN VALUES WILL BREAK COMPATIBILITY
-    def compile_sources(self, resources, build_path, inc_dirs=None):
+    def compile_sources(self, resources, inc_dirs=None):
         # Web IDE progress bar for project build
         files_to_compile = resources.s_sources + resources.c_sources + resources.cpp_sources
         self.to_be_compiled = len(files_to_compile)
@@ -790,8 +792,6 @@
         inc_paths = sorted(set(inc_paths))
         # Unique id of all include paths
         self.inc_md5 = md5(' '.join(inc_paths)).hexdigest()
-        # Where to store response files
-        self.build_dir = build_path
 
         objects = []
         queue = []
@@ -800,11 +800,13 @@
 
         # Generate configuration header (this will update self.build_all if needed)
         self.get_config_header()
+        self.dump_build_profile()
 
         # Sort compile queue for consistency
         files_to_compile.sort()
         for source in files_to_compile:
-            object = self.relative_object_path(build_path, resources.file_basepath[source], source)
+            object = self.relative_object_path(
+                self.build_dir, resources.file_basepath[source], source)
 
             # Queue mode (multiprocessing)
             commands = self.compile_command(source, object, inc_paths)
@@ -910,6 +912,13 @@
                 deps = self.parse_dependencies(dep_path) if (exists(dep_path)) else []
             except IOError, IndexError:
                 deps = []
+            config_file = ([self.config.app_config_location]
+                           if self.config.app_config_location else [])
+            deps.extend(config_file)
+            if ext == '.cpp' or self.COMPILE_C_AS_CPP:
+                deps.append(join(self.build_dir, self.PROFILE_FILE_NAME + "-cxx"))
+            else:
+                deps.append(join(self.build_dir, self.PROFILE_FILE_NAME + "-c"))
             if len(deps) == 0 or self.need_update(object, deps):
                 if ext == '.cpp' or self.COMPILE_C_AS_CPP:
                     return self.compile_cpp(source, object, includes)
@@ -917,6 +926,7 @@
                     return self.compile_c(source, object, includes)
         elif ext == '.s':
             deps = [source]
+            deps.append(join(self.build_dir, self.PROFILE_FILE_NAME + "-asm"))
             if self.need_update(object, deps):
                 return self.assemble(source, object, includes)
         else:
@@ -959,7 +969,7 @@
 
     def compile_output(self, output=[]):
         _rc = output[0]
-        _stderr = output[1]
+        _stderr = output[1].decode("utf-8")
         command = output[2]
 
         # Parse output for Warnings and Errors
@@ -1005,16 +1015,20 @@
 
         filename = name+'.'+ext
         elf = join(tmp_path, name + '.elf')
-        bin = join(tmp_path, filename)
+        bin = None if ext is 'elf' else join(tmp_path, filename)
         map = join(tmp_path, name + '.map')
 
         r.objects = sorted(set(r.objects))
-        if self.need_update(elf, r.objects + r.libraries + [r.linker_script]):
+        config_file = ([self.config.app_config_location]
+                       if self.config.app_config_location else [])
+        dependencies = r.objects + r.libraries + [r.linker_script] + config_file
+        dependencies.append(join(self.build_dir, self.PROFILE_FILE_NAME + "-ld"))
+        if self.need_update(elf, dependencies):
             needed_update = True
             self.progress("link", name)
             self.link(elf, r.objects, r.libraries, r.lib_dirs, r.linker_script)
 
-        if self.need_update(bin, [elf]):
+        if bin and self.need_update(bin, [elf]):
             needed_update = True
             self.progress("elf2bin", name)
             self.binary(r, elf, bin)
@@ -1157,6 +1171,22 @@
         self.config_processed = True
         return self.config_file
 
+    def dump_build_profile(self):
+        """Dump the current build profile and macros into the `.profile` file
+        in the build directory"""
+        for key in ["cxx", "c", "asm", "ld"]:
+            to_dump = (str(self.flags[key]) + str(sorted(self.macros)))
+            if key in ["cxx", "c"]:
+                to_dump += str(self.flags['common'])
+            where = join(self.build_dir, self.PROFILE_FILE_NAME + "-" + key)
+            self._overwrite_when_not_equal(where, to_dump)
+
+    @staticmethod
+    def _overwrite_when_not_equal(filename, content):
+        if not exists(filename) or content != open(filename).read():
+            with open(filename, "wb") as out:
+                out.write(content)
+
     @staticmethod
     def generic_check_executable(tool_key, executable_name, levels_up,
                                  nested_dir=None):
@@ -1345,31 +1375,87 @@
         """
         raise NotImplemented
 
+    @staticmethod
+    @abstractmethod
+    def name_mangle(name):
+        """Mangle a name based on the conventional name mangling of this toolchain
+
+        Positional arguments:
+        name -- the name to mangle
+
+        Return:
+        the mangled name as a string
+        """
+        raise NotImplemented
+
+    @staticmethod
+    @abstractmethod
+    def make_ld_define(name, value):
+        """Create an argument to the linker that would define a symbol
+
+        Positional arguments:
+        name -- the symbol to define
+        value -- the value to give the symbol
+
+        Return:
+        The linker flag as a string
+        """
+        raise NotImplemented
+
+    @staticmethod
+    @abstractmethod
+    def redirect_symbol(source, sync, build_dir):
+        """Redirect a symbol at link time to point at somewhere else
+
+        Positional arguments:
+        source -- the symbol doing the pointing
+        sync -- the symbol being pointed to
+        build_dir -- the directory to put "response files" if needed by the toolchain
+
+        Side Effects:
+        Possibly create a file in the build directory
+
+        Return:
+        The linker flag to redirect the symbol, as a string
+        """
+        raise NotImplemented
+
     # Return the list of macros geenrated by the build system
     def get_config_macros(self):
         return Config.config_to_macros(self.config_data) if self.config_data else []
 
+    @property
+    def report(self):
+        to_ret = {}
+        to_ret['c_compiler'] = {'flags': copy(self.flags['c']),
+                                'symbols': self.get_symbols()}
+        to_ret['cxx_compiler'] = {'flags': copy(self.flags['cxx']),
+                                  'symbols': self.get_symbols()}
+        to_ret['assembler'] = {'flags': copy(self.flags['asm']),
+                               'symbols': self.get_symbols(True)}
+        to_ret['linker'] = {'flags': copy(self.flags['ld'])}
+        to_ret.update(self.config.report)
+        return to_ret
+
 from tools.settings import ARM_PATH
-from tools.settings import GCC_ARM_PATH, GCC_CR_PATH
+from tools.settings import GCC_ARM_PATH
 from tools.settings import IAR_PATH
 
 TOOLCHAIN_PATHS = {
     'ARM': ARM_PATH,
     'uARM': ARM_PATH,
     'GCC_ARM': GCC_ARM_PATH,
-    'GCC_CR': GCC_CR_PATH,
     'IAR': IAR_PATH
 }
 
 from tools.toolchains.arm import ARM_STD, ARM_MICRO
-from tools.toolchains.gcc import GCC_ARM, GCC_CR
+from tools.toolchains.gcc import GCC_ARM
 from tools.toolchains.iar import IAR
 
 TOOLCHAIN_CLASSES = {
     'ARM': ARM_STD,
     'uARM': ARM_MICRO,
     'GCC_ARM': GCC_ARM,
-    'GCC_CR': GCC_CR,
     'IAR': IAR
 }
 
--- a/toolchains/arm.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/toolchains/arm.py	Thu Jun 22 11:12:28 2017 -0500
@@ -15,7 +15,9 @@
 limitations under the License.
 """
 import re
-from os.path import join, dirname, splitext, basename
+from os.path import join, dirname, splitext, basename, exists
+from os import makedirs, write
+from tempfile import mkstemp
 
 from tools.toolchains import mbedToolchain, TOOLCHAIN_PATHS
 from tools.hooks import hook_tool
@@ -38,8 +40,10 @@
         return mbedToolchain.generic_check_executable("ARM", 'armcc', 2, 'bin')
 
     def __init__(self, target, notify=None, macros=None,
-                 silent=False, extra_verbose=False, build_profile=None):
+                 silent=False, extra_verbose=False, build_profile=None,
+                 build_dir=None):
         mbedToolchain.__init__(self, target, notify, macros, silent,
+                               build_dir=build_dir,
                                extra_verbose=extra_verbose,
                                build_profile=build_profile)
 
@@ -179,6 +183,8 @@
         else:
             args = ["-o", output, "--info=totals", "--map", "--list=%s" % map_file]
 
+        args.extend(self.flags['ld'])
+
         if mem_map:
             args.extend(["--scatter", mem_map])
 
@@ -210,8 +216,10 @@
 
     @hook_tool
     def binary(self, resources, elf, bin):
+        _, fmt = splitext(bin)
+        bin_arg = {".bin": "--bin", ".hex": "--i32"}[fmt]
         # Build binary command
-        cmd = [self.elf2bin, '--bin', '-o', bin, elf]
+        cmd = [self.elf2bin, bin_arg, '-o', bin, elf]
 
         # Call cmdline hook
         cmd = self.hook.get_cmdline_binary(cmd)
@@ -220,6 +228,22 @@
         self.cc_verbose("FromELF: %s" % ' '.join(cmd))
         self.default_cmd(cmd)
 
+    @staticmethod
+    def name_mangle(name):
+        return "_Z%i%sv" % (len(name), name)
+
+    @staticmethod
+    def make_ld_define(name, value):
+        return "--predefine=\"-D%s=0x%x\"" % (name, value)
+
+    @staticmethod
+    def redirect_symbol(source, sync, build_dir):
+        if not exists(build_dir):
+            makedirs(build_dir)
+        handle, filename = mkstemp(prefix=".redirect-symbol.", dir=build_dir)
+        write(handle, "RESOLVE %s AS %s\n" % (source, sync))
+        return "--edit=%s" % filename
+
 
 class ARM_STD(ARM):
     pass
--- a/toolchains/gcc.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/toolchains/gcc.py	Thu Jun 22 11:12:28 2017 -0500
@@ -15,7 +15,8 @@
 limitations under the License.
 """
 import re
-from os.path import join, basename, splitext
+from os.path import join, basename, splitext, dirname, exists
+from distutils.spawn import find_executable
 
 from tools.toolchains import mbedToolchain, TOOLCHAIN_PATHS
 from tools.hooks import hook_tool
@@ -29,12 +30,13 @@
     INDEX_PATTERN  = re.compile('(?P<col>\s*)\^')
 
     def __init__(self, target,  notify=None, macros=None,
-                 silent=False, tool_path="", extra_verbose=False,
-                 build_profile=None):
+                 silent=False, extra_verbose=False, build_profile=None,
+                 build_dir=None):
         mbedToolchain.__init__(self, target, notify, macros, silent,
                                extra_verbose=extra_verbose,
-                               build_profile=build_profile)
+                               build_profile=build_profile, build_dir=build_dir)
 
+        tool_path=TOOLCHAIN_PATHS['GCC_ARM']
         # Add flags for current size setting
         default_lib = "std"
         if hasattr(target, "default_lib"):
@@ -58,7 +60,7 @@
             cpu = target.core.lower()
 
         self.cpu = ["-mcpu=%s" % cpu]
-        if target.core.startswith("Cortex"):
+        if target.core.startswith("Cortex-M"):
             self.cpu.append("-mthumb")
 
         # FPU handling, M7 possibly to have double FPU
@@ -92,7 +94,8 @@
 
         self.flags['ld'] += self.cpu
         self.ld = [join(tool_path, "arm-none-eabi-gcc")] + self.flags['ld']
-        self.sys_libs = ["stdc++", "supc++", "m", "c", "gcc"]
+        self.sys_libs = ["stdc++", "supc++", "m", "c", "gcc", "nosys"]
+        self.preproc = [join(tool_path, "arm-none-eabi-cpp"), "-E", "-P"]
 
         self.ar = join(tool_path, "arm-none-eabi-ar")
         self.elf2bin = join(tool_path, "arm-none-eabi-objcopy")
@@ -125,7 +128,7 @@
         # The warning/error notification is multiline
         msg = None
         for line in output.splitlines():
-            match = GCC.DIAGNOSTIC_PATTERN.search(line)
+            match = self.DIAGNOSTIC_PATTERN.search(line)
             if match is not None:
                 if msg is not None:
                     self.cc_info(msg)
@@ -142,7 +145,7 @@
                 }
             elif msg is not None:
                 # Determine the warning/error column by calculating the ^ position
-                match = GCC.INDEX_PATTERN.match(line)
+                match = self.INDEX_PATTERN.match(line)
                 if match is not None:
                     msg['col'] = len(match.group('col'))
                     self.cc_info(msg)
@@ -213,6 +216,15 @@
             libs.append("-l%s" % name[3:])
         libs.extend(["-l%s" % l for l in self.sys_libs])
 
+        # Preprocess
+        if mem_map:
+            preproc_output = join(dirname(output), ".link_script.ld")
+            cmd = (self.preproc + [mem_map] + self.ld[1:] +
+                   [ "-o", preproc_output])
+            self.cc_verbose("Preproc: %s" % ' '.join(cmd))
+            self.default_cmd(cmd)
+            mem_map = preproc_output
+
         # Build linker command
         map_file = splitext(output)[0] + ".map"
         cmd = self.ld + ["-o", output, "-Wl,-Map=%s" % map_file] + objects + ["-Wl,--start-group"] + libs + ["-Wl,--end-group"]
@@ -249,7 +261,9 @@
     @hook_tool
     def binary(self, resources, elf, bin):
         # Build binary command
-        cmd = [self.elf2bin, "-O", "binary", elf, bin]
+        _, fmt = splitext(bin)
+        bin_arg = {'.bin': 'binary', '.hex': 'ihex'}[fmt]
+        cmd = [self.elf2bin, "-O", bin_arg, elf, bin]
 
         # Call cmdline hook
         cmd = self.hook.get_cmdline_binary(cmd)
@@ -258,46 +272,32 @@
         self.cc_verbose("FromELF: %s" % ' '.join(cmd))
         self.default_cmd(cmd)
 
+    @staticmethod
+    def name_mangle(name):
+        return "_Z%i%sv" % (len(name), name)
 
-class GCC_ARM(GCC):
+    @staticmethod
+    def make_ld_define(name, value):
+        return "-D%s=0x%x" % (name, value)
+
+    @staticmethod
+    def redirect_symbol(source, sync, build_dir):
+        return "-Wl,--defsym=%s=%s" % (source, sync)
+
     @staticmethod
     def check_executable():
         """Returns True if the executable (arm-none-eabi-gcc) location
         specified by the user exists OR the executable can be found on the PATH.
         Returns False otherwise."""
-        return mbedToolchain.generic_check_executable("GCC_ARM", 'arm-none-eabi-gcc', 1)
-
-    def __init__(self, target, notify=None, macros=None,
-                 silent=False, extra_verbose=False, build_profile=None):
-        GCC.__init__(self, target, notify, macros, silent,
-                     TOOLCHAIN_PATHS['GCC_ARM'], extra_verbose=extra_verbose,
-                     build_profile=build_profile)
-
-        self.sys_libs.append("nosys")
-
+        if not TOOLCHAIN_PATHS['GCC_ARM'] or not exists(TOOLCHAIN_PATHS['GCC_ARM']):
+            if find_executable('arm-none-eabi-gcc'):
+                TOOLCHAIN_PATHS['GCC_ARM'] = ''
+                return True
+            else:
+                return False
+        else:
+            exec_name = join(TOOLCHAIN_PATHS['GCC_ARM'], 'arm-none-eabi-gcc')
+            return exists(exec_name) or exists(exec_name + '.exe')
 
-class GCC_CR(GCC):
-    @staticmethod
-    def check_executable():
-        """Returns True if the executable (arm-none-eabi-gcc) location
-        specified by the user exists OR the executable can be found on the PATH.
-        Returns False otherwise."""
-        return mbedToolchain.generic_check_executable("GCC_CR", 'arm-none-eabi-gcc', 1)
-
-    def __init__(self, target, notify=None, macros=None,
-                 silent=False, extra_verbose=False, build_profile=None):
-        GCC.__init__(self, target, notify, macros, silent,
-                     TOOLCHAIN_PATHS['GCC_CR'], extra_verbose=extra_verbose,
-                     build_profile=build_profile)
-
-        additional_compiler_flags = [
-            "-D__NEWLIB__", "-D__CODE_RED", "-D__USE_CMSIS", "-DCPP_USE_HEAP",
-        ]
-        self.cc += additional_compiler_flags
-        self.cppc += additional_compiler_flags
-
-        # Use latest gcc nanolib
-        self.ld.append("--specs=nano.specs")
-        if target.name in ["LPC1768", "LPC4088", "LPC4088_DM", "LPC4330", "UBLOX_C027", "LPC2368"]:
-            self.ld.extend(["-u _printf_float", "-u _scanf_float"])
-        self.ld += ["-nostdlib"]
+class GCC_ARM(GCC):
+    pass
--- a/toolchains/iar.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/toolchains/iar.py	Thu Jun 22 11:12:28 2017 -0500
@@ -37,8 +37,10 @@
         return mbedToolchain.generic_check_executable("IAR", 'iccarm', 2, "bin")
 
     def __init__(self, target, notify=None, macros=None,
-                 silent=False, extra_verbose=False, build_profile=None):
+                 silent=False, extra_verbose=False, build_profile=None,
+                 build_dir=None):
         mbedToolchain.__init__(self, target, notify, macros, silent,
+                               build_dir=build_dir,
                                extra_verbose=extra_verbose,
                                build_profile=build_profile)
         if target.core == "Cortex-M7F" or target.core == "Cortex-M7FD":
@@ -89,6 +91,7 @@
         self.cppc = [main_cc]
         self.cc += self.flags["common"] + c_flags_cmd + self.flags["c"]
         self.cppc += self.flags["common"] + c_flags_cmd + cxx_flags_cmd + self.flags["cxx"]
+        
         self.ld   = [join(IAR_BIN, "ilinkarm")]
         self.ar = join(IAR_BIN, "iarchive")
         self.elf2bin = join(IAR_BIN, "ielftool")
@@ -222,8 +225,10 @@
 
     @hook_tool
     def binary(self, resources, elf, bin):
+        _, fmt = splitext(bin)
+        bin_arg = {".bin": "--bin", ".hex": "--ihex"}[fmt]
         # Build binary command
-        cmd = [self.elf2bin, "--bin", elf, bin]
+        cmd = [self.elf2bin, bin_arg, elf, bin]
 
         # Call cmdline hook
         cmd = self.hook.get_cmdline_binary(cmd)
@@ -231,3 +236,15 @@
         # Exec command
         self.cc_verbose("FromELF: %s" % ' '.join(cmd))
         self.default_cmd(cmd)
+
+    @staticmethod
+    def name_mangle(name):
+        return "_Z%i%sv" % (len(name), name)
+
+    @staticmethod
+    def make_ld_define(name, value):
+        return "--config_def %s=0x%x" % (name, value)
+
+    @staticmethod
+    def redirect_symbol(source, sync, build_dir):
+        return "--redirect %s=%s" % (source, sync)
--- a/utils.py	Wed Feb 15 13:53:18 2017 -0600
+++ b/utils.py	Thu Jun 22 11:12:28 2017 -0500
@@ -28,6 +28,7 @@
 import json
 from collections import OrderedDict
 import logging
+from intelhex import IntelHex
 
 def remove_if_in(lst, thing):
     if thing in lst:
@@ -510,7 +511,21 @@
     for string_part in range(num_parts):
         start_index = string_part * string_limit
         if string_part == num_parts - 1:
-            print large_string[start_index:]
+            sys.stdout.write(large_string[start_index:])
         else:
-            end_index = ((string_part + 1) * string_limit) - 1
-            print large_string[start_index:end_index],
+            sys.stdout.write(large_string[start_index:
+                                          start_index + string_limit])
+    sys.stdout.write("\n")
+
+def intelhex_offset(filename, offset):
+    """Load a hex or bin file at a particular offset"""
+    _, inteltype = splitext(filename)
+    ih = IntelHex()
+    if inteltype == ".bin":
+        ih.loadbin(filename, offset=offset)
+    elif inteltype == ".hex":
+        ih.loadhex(filename)
+    else:
+        raise ToolException("File %s does not have a known binary file type"
+                            % filename)
+    return ih