Diff: export/iar/iar_definitions.json

Revision:

42:2cf3f29fece1

Parent:

41:2a77626a4c21

Child:

43:2a7da56ebd24

diff -r 2a77626a4c21 -r 2cf3f29fece1 export/iar/iar_definitions.json
--- a/export/iar/iar_definitions.json	Wed Oct 25 14:46:50 2017 -0500
+++ b/export/iar/iar_definitions.json	Mon Nov 06 13:17:14 2017 -0600
@@ -1,4 +1,7 @@
 {
+    "STM32L496ZG": {
+        "OGChipSelectEditMenu": "STM32L496ZG\tST STM32L496ZG"
+    },
     "STM32L476VG": {
         "OGChipSelectEditMenu": "STM32L476VG\tST STM32L476VG"
     },
@@ -110,6 +113,9 @@
     "LPC1768": {
         "OGChipSelectEditMenu": "LPC1768\tNXP LPC1768"
     },
+    "LPC1769": {
+        "OGChipSelectEditMenu": "LPC1769\tNXP LPC1769"
+    },
     "STM32F446RE": {
         "OGChipSelectEditMenu": "STM32F446RE\tST STM32F446RE"
     },
@@ -234,5 +240,10 @@
         "CExtraOptionsCheck": 1,
         "CExtraOptions": "--drv_vector_table_base=0x0",
         "CMSISDAPJtagSpeedList": 10
+    },
+    "TMPM066FWUG":{
+        "OGChipSelectEditMenu": "TMPM066FWUG\tToshiba TMPM066FWUG",
+        "GFPUCoreSlave": 21,
+        "GBECoreSlave": 21
     }
 }