Clone of official tools
export/lpcxpresso/lpc824_cproject.tmpl@47:21ae3e5a7128, 2021-02-04 (annotated)
- Committer:
- Anders Blomdell
- Date:
- Thu Feb 04 17:17:13 2021 +0100
- Revision:
- 47:21ae3e5a7128
- Parent:
- 36:96847d42f010
Add a few normpath calls
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
The Other Jimmy |
36:96847d42f010 | 1 | {% extends "lpcxpresso/cproject_cortexm0_common.tmpl" %} |
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36:96847d42f010 | 2 | |
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36:96847d42f010 | 3 | {% block startup_file %}startup_LPC824_CR.cpp{% endblock %} |
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36:96847d42f010 | 4 | |
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36:96847d42f010 | 5 | {% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?> |
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36:96847d42f010 | 6 | <TargetConfig> |
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36:96847d42f010 | 7 | <Properties property_0="" property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/> |
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36:96847d42f010 | 8 | <infoList vendor="NXP"><info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"><chip><name>LPC824</name> |
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36:96847d42f010 | 9 | <family>LPC82x</family> |
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36:96847d42f010 | 10 | <vendor>NXP (formerly Philips)</vendor> |
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36:96847d42f010 | 11 | <reset board="None" core="Real" sys="Real"/> |
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36:96847d42f010 | 12 | <clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> |
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36:96847d42f010 | 13 | <memory can_program="true" id="Flash" is_ro="true" type="Flash"/> |
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36:96847d42f010 | 14 | <memory id="RAM" type="RAM"/> |
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36:96847d42f010 | 15 | <memory id="Periph" is_volatile="true" type="Peripheral"/> |
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36:96847d42f010 | 16 | <memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/> |
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36:96847d42f010 | 17 | <memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> |
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36:96847d42f010 | 18 | <peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/> |
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36:96847d42f010 | 19 | <peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/> |
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36:96847d42f010 | 20 | <peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40000000"/> |
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36:96847d42f010 | 21 | <peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x40004000"/> |
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36:96847d42f010 | 22 | <peripheralInstance derived_from="WKT" determined="infoFile" id="WKT" location="0x40008000"/> |
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36:96847d42f010 | 23 | <peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x4000c000"/> |
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36:96847d42f010 | 24 | <peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/> |
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36:96847d42f010 | 25 | <peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40020000"/> |
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36:96847d42f010 | 26 | <peripheralInstance derived_from="CMP" determined="infoFile" id="CMP" location="0x40024000"/> |
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36:96847d42f010 | 27 | <peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/> |
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36:96847d42f010 | 28 | <peripheralInstance derived_from="INPUTMUX" determined="infoFile" id="INPUTMUX" location="0x4002c000"/> |
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36:96847d42f010 | 29 | <peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x40040000"/> |
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36:96847d42f010 | 30 | <peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> |
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36:96847d42f010 | 31 | <peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/> |
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36:96847d42f010 | 32 | <peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/> |
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36:96847d42f010 | 33 | <peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40054000"/> |
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36:96847d42f010 | 34 | <peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40058000"/> |
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36:96847d42f010 | 35 | <peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4005c000"/> |
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36:96847d42f010 | 36 | <peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40064000"/> |
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36:96847d42f010 | 37 | <peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40068000"/> |
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36:96847d42f010 | 38 | <peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x4006c000"/> |
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36:96847d42f010 | 39 | <peripheralInstance derived_from="I2C2" determined="infoFile" id="I2C2" location="0x40070000"/> |
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36:96847d42f010 | 40 | <peripheralInstance derived_from="I2C3" determined="infoFile" id="I2C3" location="0x40074000"/> |
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36:96847d42f010 | 41 | <peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/> |
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36:96847d42f010 | 42 | <peripheralInstance derived_from="SCT" determined="infoFile" id="SCT" location="0x50004000"/> |
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36:96847d42f010 | 43 | <peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50008000"/> |
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36:96847d42f010 | 44 | <peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/> |
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36:96847d42f010 | 45 | <peripheralInstance derived_from="PIN-INT" determined="infoFile" id="PIN-INT" location="0xa0004000"/> |
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36:96847d42f010 | 46 | </chip> |
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36:96847d42f010 | 47 | <processor><name gcc_name="cortex-m0">Cortex-M0</name> |
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36:96847d42f010 | 48 | <family>Cortex-M</family> |
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36:96847d42f010 | 49 | </processor> |
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36:96847d42f010 | 50 | <link href="LPC82x_peripheral.xme" show="embed" type="simple"/> |
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36:96847d42f010 | 51 | </info> |
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36:96847d42f010 | 52 | </infoList> |
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36:96847d42f010 | 53 | </TargetConfig>{% endblock %} |