Anasse Abdoul / Mbed 2 deprecated Test_MPU6050

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Dependencies:   mbed

mbed-rtos/targets/TARGET_NXP/mbed_rtx4.h@0:a59a3d743804, 2022-03-31 (annotated)

Committer:
anasse
Date:
Thu Mar 31 07:43:50 2022 +0000
Revision:
0:a59a3d743804
vers0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
anasse 0:a59a3d743804 1 /* mbed Microcontroller Library
anasse 0:a59a3d743804 2 * Copyright (c) 2016 ARM Limited
anasse 0:a59a3d743804 3 *
anasse 0:a59a3d743804 4 * Licensed under the Apache License, Version 2.0 (the "License");
anasse 0:a59a3d743804 5 * you may not use this file except in compliance with the License.
anasse 0:a59a3d743804 6 * You may obtain a copy of the License at
anasse 0:a59a3d743804 7 *
anasse 0:a59a3d743804 8 * http://www.apache.org/licenses/LICENSE-2.0
anasse 0:a59a3d743804 9 *
anasse 0:a59a3d743804 10 * Unless required by applicable law or agreed to in writing, software
anasse 0:a59a3d743804 11 * distributed under the License is distributed on an "AS IS" BASIS,
anasse 0:a59a3d743804 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
anasse 0:a59a3d743804 13 * See the License for the specific language governing permissions and
anasse 0:a59a3d743804 14 * limitations under the License.
anasse 0:a59a3d743804 15 */
anasse 0:a59a3d743804 16
anasse 0:a59a3d743804 17 #ifndef MBED_MBED_RTX_H
anasse 0:a59a3d743804 18 #define MBED_MBED_RTX_H
anasse 0:a59a3d743804 19
anasse 0:a59a3d743804 20 #if defined(TARGET_LPC11U68)
anasse 0:a59a3d743804 21
anasse 0:a59a3d743804 22 #ifndef INITIAL_SP
anasse 0:a59a3d743804 23 #define INITIAL_SP (0x10008000UL)
anasse 0:a59a3d743804 24 #endif
anasse 0:a59a3d743804 25
anasse 0:a59a3d743804 26 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 27
anasse 0:a59a3d743804 28 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 29 #define OS_TASKCNT 14
anasse 0:a59a3d743804 30 #endif
anasse 0:a59a3d743804 31 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 32 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 33 #endif
anasse 0:a59a3d743804 34 #ifndef OS_CLOCK
anasse 0:a59a3d743804 35 #define OS_CLOCK 48000000
anasse 0:a59a3d743804 36 #endif
anasse 0:a59a3d743804 37
anasse 0:a59a3d743804 38 #elif defined(TARGET_LPC11U24) \
anasse 0:a59a3d743804 39 || defined(TARGET_LPC11U35_401) \
anasse 0:a59a3d743804 40 || defined(TARGET_LPC11U35_501) \
anasse 0:a59a3d743804 41 || defined(TARGET_LPCCAPPUCCINO)
anasse 0:a59a3d743804 42
anasse 0:a59a3d743804 43 #ifndef INITIAL_SP
anasse 0:a59a3d743804 44 #define INITIAL_SP (0x10002000UL)
anasse 0:a59a3d743804 45 #endif
anasse 0:a59a3d743804 46
anasse 0:a59a3d743804 47 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 48
anasse 0:a59a3d743804 49 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 50 #define OS_TASKCNT 6
anasse 0:a59a3d743804 51 #endif
anasse 0:a59a3d743804 52 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 53 #define OS_MAINSTKSIZE 128
anasse 0:a59a3d743804 54 #endif
anasse 0:a59a3d743804 55 #ifndef OS_CLOCK
anasse 0:a59a3d743804 56 #define OS_CLOCK 48000000
anasse 0:a59a3d743804 57 #endif
anasse 0:a59a3d743804 58
anasse 0:a59a3d743804 59 #elif defined(TARGET_LPC1114)
anasse 0:a59a3d743804 60
anasse 0:a59a3d743804 61 #ifndef INITIAL_SP
anasse 0:a59a3d743804 62 #define INITIAL_SP (0x10001000UL)
anasse 0:a59a3d743804 63 #endif
anasse 0:a59a3d743804 64
anasse 0:a59a3d743804 65 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 66
anasse 0:a59a3d743804 67 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 68 #define OS_TASKCNT 6
anasse 0:a59a3d743804 69 #endif
anasse 0:a59a3d743804 70 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 71 #define OS_MAINSTKSIZE 128
anasse 0:a59a3d743804 72 #endif
anasse 0:a59a3d743804 73 #ifndef OS_CLOCK
anasse 0:a59a3d743804 74 #define OS_CLOCK 48000000
anasse 0:a59a3d743804 75 #endif
anasse 0:a59a3d743804 76
anasse 0:a59a3d743804 77 #elif defined(TARGET_LPC1347)
anasse 0:a59a3d743804 78
anasse 0:a59a3d743804 79 #ifndef INITIAL_SP
anasse 0:a59a3d743804 80 #define INITIAL_SP (0x10002000UL)
anasse 0:a59a3d743804 81 #endif
anasse 0:a59a3d743804 82
anasse 0:a59a3d743804 83 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 84
anasse 0:a59a3d743804 85 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 86 #define OS_TASKCNT 14
anasse 0:a59a3d743804 87 #endif
anasse 0:a59a3d743804 88 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 89 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 90 #endif
anasse 0:a59a3d743804 91 #ifndef OS_CLOCK
anasse 0:a59a3d743804 92 #define OS_CLOCK 72000000
anasse 0:a59a3d743804 93 #endif
anasse 0:a59a3d743804 94
anasse 0:a59a3d743804 95 #elif defined(TARGET_LPC1549)
anasse 0:a59a3d743804 96
anasse 0:a59a3d743804 97 #ifndef INITIAL_SP
anasse 0:a59a3d743804 98 #define INITIAL_SP (0x02009000UL)
anasse 0:a59a3d743804 99 #endif
anasse 0:a59a3d743804 100
anasse 0:a59a3d743804 101 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 102
anasse 0:a59a3d743804 103 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 104 #define OS_TASKCNT 14
anasse 0:a59a3d743804 105 #endif
anasse 0:a59a3d743804 106 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 107 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 108 #endif
anasse 0:a59a3d743804 109 #ifndef OS_CLOCK
anasse 0:a59a3d743804 110 #define OS_CLOCK 72000000
anasse 0:a59a3d743804 111 #endif
anasse 0:a59a3d743804 112
anasse 0:a59a3d743804 113 #elif defined(TARGET_LPC1768)
anasse 0:a59a3d743804 114
anasse 0:a59a3d743804 115 #ifndef INITIAL_SP
anasse 0:a59a3d743804 116 #define INITIAL_SP (0x10008000UL)
anasse 0:a59a3d743804 117 #endif
anasse 0:a59a3d743804 118
anasse 0:a59a3d743804 119 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 120
anasse 0:a59a3d743804 121 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 122 #define OS_TASKCNT 14
anasse 0:a59a3d743804 123 #endif
anasse 0:a59a3d743804 124 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 125 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 126 #endif
anasse 0:a59a3d743804 127 #ifndef OS_CLOCK
anasse 0:a59a3d743804 128 #define OS_CLOCK 96000000
anasse 0:a59a3d743804 129 #endif
anasse 0:a59a3d743804 130
anasse 0:a59a3d743804 131 #elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM)
anasse 0:a59a3d743804 132
anasse 0:a59a3d743804 133 #ifndef INITIAL_SP
anasse 0:a59a3d743804 134 #define INITIAL_SP (0x10010000UL)
anasse 0:a59a3d743804 135 #endif
anasse 0:a59a3d743804 136
anasse 0:a59a3d743804 137 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 138
anasse 0:a59a3d743804 139 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 140 #define OS_TASKCNT 14
anasse 0:a59a3d743804 141 #endif
anasse 0:a59a3d743804 142 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 143 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 144 #endif
anasse 0:a59a3d743804 145 #ifndef OS_CLOCK
anasse 0:a59a3d743804 146 #define OS_CLOCK 120000000
anasse 0:a59a3d743804 147 #endif
anasse 0:a59a3d743804 148
anasse 0:a59a3d743804 149 #elif defined(TARGET_LPC4330) || defined(TARGET_LPC4337)
anasse 0:a59a3d743804 150
anasse 0:a59a3d743804 151 #ifndef INITIAL_SP
anasse 0:a59a3d743804 152 #define INITIAL_SP (0x10008000UL)
anasse 0:a59a3d743804 153 #endif
anasse 0:a59a3d743804 154
anasse 0:a59a3d743804 155 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 156
anasse 0:a59a3d743804 157 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 158 #define OS_TASKCNT 14
anasse 0:a59a3d743804 159 #endif
anasse 0:a59a3d743804 160 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 161 #define OS_MAINSTKSIZE 256
anasse 0:a59a3d743804 162 #endif
anasse 0:a59a3d743804 163 #ifndef OS_CLOCK
anasse 0:a59a3d743804 164 #define OS_CLOCK 204000000
anasse 0:a59a3d743804 165 #endif
anasse 0:a59a3d743804 166
anasse 0:a59a3d743804 167 #elif defined(TARGET_LPC812)
anasse 0:a59a3d743804 168
anasse 0:a59a3d743804 169 #ifndef INITIAL_SP
anasse 0:a59a3d743804 170 #define INITIAL_SP (0x10001000UL)
anasse 0:a59a3d743804 171 #endif
anasse 0:a59a3d743804 172
anasse 0:a59a3d743804 173 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 174
anasse 0:a59a3d743804 175 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 176 #define OS_TASKCNT 6
anasse 0:a59a3d743804 177 #endif
anasse 0:a59a3d743804 178 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 179 #define OS_MAINSTKSIZE 128
anasse 0:a59a3d743804 180 #endif
anasse 0:a59a3d743804 181 #ifndef OS_CLOCK
anasse 0:a59a3d743804 182 #define OS_CLOCK 36000000
anasse 0:a59a3d743804 183 #endif
anasse 0:a59a3d743804 184
anasse 0:a59a3d743804 185 #elif defined(TARGET_LPC824) || defined(TARGET_SSCI824)
anasse 0:a59a3d743804 186
anasse 0:a59a3d743804 187 #ifndef INITIAL_SP
anasse 0:a59a3d743804 188 #define INITIAL_SP (0x10002000UL)
anasse 0:a59a3d743804 189 #endif
anasse 0:a59a3d743804 190
anasse 0:a59a3d743804 191 // RTX 4 only config below, for backward-compability
anasse 0:a59a3d743804 192
anasse 0:a59a3d743804 193 #ifndef OS_TASKCNT
anasse 0:a59a3d743804 194 #define OS_TASKCNT 6
anasse 0:a59a3d743804 195 #endif
anasse 0:a59a3d743804 196 #ifndef OS_MAINSTKSIZE
anasse 0:a59a3d743804 197 #define OS_MAINSTKSIZE 128
anasse 0:a59a3d743804 198 #endif
anasse 0:a59a3d743804 199 #ifndef OS_CLOCK
anasse 0:a59a3d743804 200 #define OS_CLOCK 30000000
anasse 0:a59a3d743804 201 #endif
anasse 0:a59a3d743804 202
anasse 0:a59a3d743804 203 #endif
anasse 0:a59a3d743804 204
anasse 0:a59a3d743804 205 #endif // MBED_MBED_RTX_H