UniGraphics Library Fork to support mbed os 6.3 Release for ILI9341

Dependents:   TFT_ILI9341_UniGraphic TFT_ILI9341_os6

Committer:
amouroug
Date:
Tue Oct 06 05:07:55 2020 +0000
Revision:
0:bb2bda4f5846
Unigraphics Library Fork to support mbed-os 6.3 for ILI9341;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
amouroug 0:bb2bda4f5846 1 /* mbed UniGraphic library - Abstract protocol class
amouroug 0:bb2bda4f5846 2 * Copyright (c) 2015 Giuliano Dianda
amouroug 0:bb2bda4f5846 3 * Released under the MIT License: http://mbed.org/license/mit
amouroug 0:bb2bda4f5846 4 */
amouroug 0:bb2bda4f5846 5
amouroug 0:bb2bda4f5846 6 /** @file Protocols.h
amouroug 0:bb2bda4f5846 7 */
amouroug 0:bb2bda4f5846 8 #ifndef Protocols_H
amouroug 0:bb2bda4f5846 9 #define Protocols_H
amouroug 0:bb2bda4f5846 10
amouroug 0:bb2bda4f5846 11 #include "mbed.h"
amouroug 0:bb2bda4f5846 12
amouroug 0:bb2bda4f5846 13 #define RGB24to16(r,g,b) (((r&0xF8)<<8)|((g&0xFC)<<3)|((b&0xF8)>>3)) //5 red | 6 green | 5 blue
amouroug 0:bb2bda4f5846 14 #define BGR2RGB(color) (((color&0x1F)<<11) | (color&0x7E0) | ((color&0xF800)>>11))
amouroug 0:bb2bda4f5846 15
amouroug 0:bb2bda4f5846 16 #define FLIP_NONE 0
amouroug 0:bb2bda4f5846 17 #define FLIP_X 1
amouroug 0:bb2bda4f5846 18 #define FLIP_Y 2
amouroug 0:bb2bda4f5846 19
amouroug 0:bb2bda4f5846 20 //#define USE_CS
amouroug 0:bb2bda4f5846 21
amouroug 0:bb2bda4f5846 22 /** Protocol types
amouroug 0:bb2bda4f5846 23 */
amouroug 0:bb2bda4f5846 24 #include "platform.h"
amouroug 0:bb2bda4f5846 25
amouroug 0:bb2bda4f5846 26 #if DEVICE_PORTINOUT
amouroug 0:bb2bda4f5846 27 enum proto_t {
amouroug 0:bb2bda4f5846 28 PAR_8 /**< Parallel 8bit, port pins 0 to 7 */
amouroug 0:bb2bda4f5846 29 ,PAR_16 /**< Parallel 16bit, port pins 0 to 15 */
amouroug 0:bb2bda4f5846 30 ,BUS_8 /**< Parallel 8bit, scattered pins */
amouroug 0:bb2bda4f5846 31 ,BUS_16 /**< Parallel 16bit, scattered pins */
amouroug 0:bb2bda4f5846 32 ,SPI_8 /**< SPI 8bit */
amouroug 0:bb2bda4f5846 33 ,SPI_16 /**< SPI 16bit */
amouroug 0:bb2bda4f5846 34 ,I2C_ /**< I2C */
amouroug 0:bb2bda4f5846 35 };
amouroug 0:bb2bda4f5846 36 #else
amouroug 0:bb2bda4f5846 37 enum proto_t {
amouroug 0:bb2bda4f5846 38 BUS_8 /**< Parallel 8bit, scattered pins */
amouroug 0:bb2bda4f5846 39 ,BUS_16 /**< Parallel 16bit, scattered pins */
amouroug 0:bb2bda4f5846 40 ,SPI_8 /**< SPI 8bit */
amouroug 0:bb2bda4f5846 41 ,SPI_16 /**< SPI 16bit */
amouroug 0:bb2bda4f5846 42 ,I2C_ /**< I2C */
amouroug 0:bb2bda4f5846 43 };
amouroug 0:bb2bda4f5846 44 #endif
amouroug 0:bb2bda4f5846 45
amouroug 0:bb2bda4f5846 46
amouroug 0:bb2bda4f5846 47 /** Abstract interface class for spi and parallel protocols
amouroug 0:bb2bda4f5846 48 */
amouroug 0:bb2bda4f5846 49 class Protocols
amouroug 0:bb2bda4f5846 50 {
amouroug 0:bb2bda4f5846 51 public:
amouroug 0:bb2bda4f5846 52
amouroug 0:bb2bda4f5846 53 /** Send 8bit command to display controller
amouroug 0:bb2bda4f5846 54 *
amouroug 0:bb2bda4f5846 55 * @param cmd: byte to send
amouroug 0:bb2bda4f5846 56 *
amouroug 0:bb2bda4f5846 57 */
amouroug 0:bb2bda4f5846 58 virtual void wr_cmd8(unsigned char cmd) = 0;
amouroug 0:bb2bda4f5846 59
amouroug 0:bb2bda4f5846 60 /** Send 8bit data to display controller
amouroug 0:bb2bda4f5846 61 *
amouroug 0:bb2bda4f5846 62 * @param data: byte to send
amouroug 0:bb2bda4f5846 63 *
amouroug 0:bb2bda4f5846 64 */
amouroug 0:bb2bda4f5846 65 virtual void wr_data8(unsigned char data) = 0;
amouroug 0:bb2bda4f5846 66
amouroug 0:bb2bda4f5846 67 /** Send 2x8bit command to display controller
amouroug 0:bb2bda4f5846 68 *
amouroug 0:bb2bda4f5846 69 * @param cmd: halfword to send
amouroug 0:bb2bda4f5846 70 *
amouroug 0:bb2bda4f5846 71 */
amouroug 0:bb2bda4f5846 72 virtual void wr_cmd16(unsigned short cmd) = 0;
amouroug 0:bb2bda4f5846 73
amouroug 0:bb2bda4f5846 74 /** Send 2x8bit data to display controller
amouroug 0:bb2bda4f5846 75 *
amouroug 0:bb2bda4f5846 76 * @param data: halfword to send
amouroug 0:bb2bda4f5846 77 *
amouroug 0:bb2bda4f5846 78 */
amouroug 0:bb2bda4f5846 79 virtual void wr_data16(unsigned short data) = 0;
amouroug 0:bb2bda4f5846 80
amouroug 0:bb2bda4f5846 81 /** Send 16bit pixeldata to display controller
amouroug 0:bb2bda4f5846 82 *
amouroug 0:bb2bda4f5846 83 * @param data: halfword to send
amouroug 0:bb2bda4f5846 84 *
amouroug 0:bb2bda4f5846 85 */
amouroug 0:bb2bda4f5846 86 virtual void wr_gram(unsigned short data) = 0;
amouroug 0:bb2bda4f5846 87
amouroug 0:bb2bda4f5846 88 /** Send same 16bit pixeldata to display controller multiple times
amouroug 0:bb2bda4f5846 89 *
amouroug 0:bb2bda4f5846 90 * @param data: halfword to send
amouroug 0:bb2bda4f5846 91 * @param count: how many
amouroug 0:bb2bda4f5846 92 *
amouroug 0:bb2bda4f5846 93 */
amouroug 0:bb2bda4f5846 94 virtual void wr_gram(unsigned short data, unsigned int count) = 0;
amouroug 0:bb2bda4f5846 95
amouroug 0:bb2bda4f5846 96 /** Send array of pixeldata shorts to display controller
amouroug 0:bb2bda4f5846 97 *
amouroug 0:bb2bda4f5846 98 * @param data: unsigned short pixeldata array
amouroug 0:bb2bda4f5846 99 * @param lenght: lenght (in shorts)
amouroug 0:bb2bda4f5846 100 *
amouroug 0:bb2bda4f5846 101 */
amouroug 0:bb2bda4f5846 102 virtual void wr_grambuf(unsigned short* data, unsigned int lenght) = 0;
amouroug 0:bb2bda4f5846 103
amouroug 0:bb2bda4f5846 104 /** Read 16bit pixeldata from display controller (with dummy cycle)
amouroug 0:bb2bda4f5846 105 *
amouroug 0:bb2bda4f5846 106 * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit
amouroug 0:bb2bda4f5846 107 * @returns 16bit color
amouroug 0:bb2bda4f5846 108 */
amouroug 0:bb2bda4f5846 109 virtual unsigned short rd_gram(bool convert) = 0;
amouroug 0:bb2bda4f5846 110
amouroug 0:bb2bda4f5846 111 /** Read 4x8bit register data (with dummy cycle)
amouroug 0:bb2bda4f5846 112 * @param reg the register to read
amouroug 0:bb2bda4f5846 113 * @returns data as uint
amouroug 0:bb2bda4f5846 114 *
amouroug 0:bb2bda4f5846 115 */
amouroug 0:bb2bda4f5846 116 virtual unsigned int rd_reg_data32(unsigned char reg) = 0;
amouroug 0:bb2bda4f5846 117
amouroug 0:bb2bda4f5846 118 /** Read 3x8bit ExtendedCommands register data
amouroug 0:bb2bda4f5846 119 * @param reg the register to read
amouroug 0:bb2bda4f5846 120 * @param SPIreadenablecmd vendor/device specific cmd to read EXTC registers
amouroug 0:bb2bda4f5846 121 * @returns data as uint
amouroug 0:bb2bda4f5846 122 * @note EXTC regs (0xB0 to 0xFF) are read/write registers but needs special cmd to be read in SPI mode
amouroug 0:bb2bda4f5846 123 */
amouroug 0:bb2bda4f5846 124 virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd) = 0;
amouroug 0:bb2bda4f5846 125
amouroug 0:bb2bda4f5846 126 /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent
amouroug 0:bb2bda4f5846 127 * for PAR protocols: a signle RD bit toggle
amouroug 0:bb2bda4f5846 128 * for SPI8: 8clocks
amouroug 0:bb2bda4f5846 129 * for SPI16: 16 clocks
amouroug 0:bb2bda4f5846 130 */
amouroug 0:bb2bda4f5846 131 virtual void dummyread () = 0;
amouroug 0:bb2bda4f5846 132
amouroug 0:bb2bda4f5846 133 /** ILI932x specific, select register for a successive write or read
amouroug 0:bb2bda4f5846 134 *
amouroug 0:bb2bda4f5846 135 * @param reg register to be selected
amouroug 0:bb2bda4f5846 136 * @param forread false = a write next (default), true = a read next
amouroug 0:bb2bda4f5846 137 * @note forread only used by SPI protocols
amouroug 0:bb2bda4f5846 138 */
amouroug 0:bb2bda4f5846 139 virtual void reg_select(unsigned char reg, bool forread =false) = 0;
amouroug 0:bb2bda4f5846 140
amouroug 0:bb2bda4f5846 141 /** ILI932x specific, write register with data
amouroug 0:bb2bda4f5846 142 *
amouroug 0:bb2bda4f5846 143 * @param reg register to write
amouroug 0:bb2bda4f5846 144 * @param data 16bit data
amouroug 0:bb2bda4f5846 145 */
amouroug 0:bb2bda4f5846 146 virtual void reg_write(unsigned char reg, unsigned short data) = 0;
amouroug 0:bb2bda4f5846 147
amouroug 0:bb2bda4f5846 148 /** ILI932x specific, read register
amouroug 0:bb2bda4f5846 149 *
amouroug 0:bb2bda4f5846 150 * @param reg register to be read
amouroug 0:bb2bda4f5846 151 * @returns 16bit register value
amouroug 0:bb2bda4f5846 152 */
amouroug 0:bb2bda4f5846 153 virtual unsigned short reg_read(unsigned char reg) = 0;
amouroug 0:bb2bda4f5846 154
amouroug 0:bb2bda4f5846 155 /** HW reset sequence (without display init commands)
amouroug 0:bb2bda4f5846 156 */
amouroug 0:bb2bda4f5846 157 virtual void hw_reset() = 0;
amouroug 0:bb2bda4f5846 158
amouroug 0:bb2bda4f5846 159 /** Set ChipSelect high or low
amouroug 0:bb2bda4f5846 160 * @param enable 0/1
amouroug 0:bb2bda4f5846 161 */
amouroug 0:bb2bda4f5846 162 virtual void BusEnable(bool enable) = 0;
amouroug 0:bb2bda4f5846 163
amouroug 0:bb2bda4f5846 164 };
amouroug 0:bb2bda4f5846 165 #endif