UniGraphics Library Fork to support mbed os 6.3 Release for ILI9341

Dependents:   TFT_ILI9341_UniGraphic TFT_ILI9341_os6

Committer:
amouroug
Date:
Tue Oct 06 05:07:55 2020 +0000
Revision:
0:bb2bda4f5846
Child:
1:6f267dbbafec
Unigraphics Library Fork to support mbed-os 6.3 for ILI9341;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
amouroug 0:bb2bda4f5846 1 /* mbed UniGraphic library - BUS16 protocol class
amouroug 0:bb2bda4f5846 2 * Copyright (c) 2015 Giuliano Dianda
amouroug 0:bb2bda4f5846 3 * Released under the MIT License: http://mbed.org/license/mit
amouroug 0:bb2bda4f5846 4 *
amouroug 0:bb2bda4f5846 5 * Derived work of:
amouroug 0:bb2bda4f5846 6 *
amouroug 0:bb2bda4f5846 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
amouroug 0:bb2bda4f5846 8 * Copyright (c) 2013 Peter Drescher - DC2PD
amouroug 0:bb2bda4f5846 9 *
amouroug 0:bb2bda4f5846 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
amouroug 0:bb2bda4f5846 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
amouroug 0:bb2bda4f5846 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
amouroug 0:bb2bda4f5846 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
amouroug 0:bb2bda4f5846 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
amouroug 0:bb2bda4f5846 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
amouroug 0:bb2bda4f5846 16 * THE SOFTWARE.
amouroug 0:bb2bda4f5846 17 */
amouroug 0:bb2bda4f5846 18 #include "BUS16.h"
amouroug 0:bb2bda4f5846 19
amouroug 0:bb2bda4f5846 20 BUS16::BUS16(PinName* buspins, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
amouroug 0:bb2bda4f5846 21 : _bus(buspins), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
amouroug 0:bb2bda4f5846 22 {
amouroug 0:bb2bda4f5846 23 _reset = 1;
amouroug 0:bb2bda4f5846 24 _DC=1;
amouroug 0:bb2bda4f5846 25 _WR=1;
amouroug 0:bb2bda4f5846 26 _RD=1;
amouroug 0:bb2bda4f5846 27 _CS=1;
amouroug 0:bb2bda4f5846 28 _bus.mode(PullNone);
amouroug 0:bb2bda4f5846 29 _bus.output(); // will re-enable our GPIO port
amouroug 0:bb2bda4f5846 30 hw_reset();
amouroug 0:bb2bda4f5846 31 }
amouroug 0:bb2bda4f5846 32
amouroug 0:bb2bda4f5846 33 void BUS16::wr_cmd8(unsigned char cmd)
amouroug 0:bb2bda4f5846 34 {
amouroug 0:bb2bda4f5846 35 _DC = 0; // 0=cmd
amouroug 0:bb2bda4f5846 36 _bus.write(cmd); // write 8bit
amouroug 0:bb2bda4f5846 37 _WR=0;
amouroug 0:bb2bda4f5846 38 _WR=1;
amouroug 0:bb2bda4f5846 39 _DC = 1; // 1=data next
amouroug 0:bb2bda4f5846 40 }
amouroug 0:bb2bda4f5846 41 void BUS16::wr_data8(unsigned char data)
amouroug 0:bb2bda4f5846 42 {
amouroug 0:bb2bda4f5846 43 _bus.write(data); // write 8bit
amouroug 0:bb2bda4f5846 44 _WR=0;
amouroug 0:bb2bda4f5846 45 _WR=1;
amouroug 0:bb2bda4f5846 46 }
amouroug 0:bb2bda4f5846 47 void BUS16::wr_cmd16(unsigned short cmd)
amouroug 0:bb2bda4f5846 48 {
amouroug 0:bb2bda4f5846 49 _DC = 0; // 0=cmd
amouroug 0:bb2bda4f5846 50 _bus.write(cmd>>8); // write 8bit
amouroug 0:bb2bda4f5846 51 _WR=0;
amouroug 0:bb2bda4f5846 52 _WR=1;
amouroug 0:bb2bda4f5846 53 _bus.write(cmd&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 54 _WR=0;
amouroug 0:bb2bda4f5846 55 _WR=1;
amouroug 0:bb2bda4f5846 56 _DC = 1; // 1=data next
amouroug 0:bb2bda4f5846 57 }
amouroug 0:bb2bda4f5846 58 void BUS16::wr_data16(unsigned short data)
amouroug 0:bb2bda4f5846 59 {
amouroug 0:bb2bda4f5846 60 _bus.write(data>>8); // write 8bit
amouroug 0:bb2bda4f5846 61 _WR=0;
amouroug 0:bb2bda4f5846 62 _WR=1;
amouroug 0:bb2bda4f5846 63 _bus.write(data&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 64 _WR=0;
amouroug 0:bb2bda4f5846 65 _WR=1;
amouroug 0:bb2bda4f5846 66 }
amouroug 0:bb2bda4f5846 67 void BUS16::wr_gram(unsigned short data)
amouroug 0:bb2bda4f5846 68 {
amouroug 0:bb2bda4f5846 69 _bus.write(data); // write 16bit
amouroug 0:bb2bda4f5846 70 _WR=0;
amouroug 0:bb2bda4f5846 71 _WR=1;
amouroug 0:bb2bda4f5846 72 }
amouroug 0:bb2bda4f5846 73 void BUS16::wr_gram(unsigned short data, unsigned int count)
amouroug 0:bb2bda4f5846 74 {
amouroug 0:bb2bda4f5846 75 while(count)
amouroug 0:bb2bda4f5846 76 {
amouroug 0:bb2bda4f5846 77 _bus.write(data); // rewrite even if same data, otherwise too much fast
amouroug 0:bb2bda4f5846 78 _WR=0;
amouroug 0:bb2bda4f5846 79 _WR=1;
amouroug 0:bb2bda4f5846 80 count--;
amouroug 0:bb2bda4f5846 81 }
amouroug 0:bb2bda4f5846 82 }
amouroug 0:bb2bda4f5846 83 void BUS16::wr_grambuf(unsigned short* data, unsigned int lenght)
amouroug 0:bb2bda4f5846 84 {
amouroug 0:bb2bda4f5846 85 while(lenght)
amouroug 0:bb2bda4f5846 86 {
amouroug 0:bb2bda4f5846 87 _bus.write(*data); // write 16bit
amouroug 0:bb2bda4f5846 88 _WR=0;
amouroug 0:bb2bda4f5846 89 _WR=1;
amouroug 0:bb2bda4f5846 90 data++;
amouroug 0:bb2bda4f5846 91 lenght--;
amouroug 0:bb2bda4f5846 92 }
amouroug 0:bb2bda4f5846 93 }
amouroug 0:bb2bda4f5846 94 unsigned short BUS16::rd_gram(bool convert)
amouroug 0:bb2bda4f5846 95 {
amouroug 0:bb2bda4f5846 96 unsigned int r=0;
amouroug 0:bb2bda4f5846 97 _bus.input();
amouroug 0:bb2bda4f5846 98
amouroug 0:bb2bda4f5846 99 _RD = 0;
amouroug 0:bb2bda4f5846 100 _bus.read(); //dummy read
amouroug 0:bb2bda4f5846 101 _RD = 1;
amouroug 0:bb2bda4f5846 102
amouroug 0:bb2bda4f5846 103 _RD = 0;
amouroug 0:bb2bda4f5846 104 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 105 r |= _bus.read();
amouroug 0:bb2bda4f5846 106 _RD = 1;
amouroug 0:bb2bda4f5846 107 if(convert)
amouroug 0:bb2bda4f5846 108 {
amouroug 0:bb2bda4f5846 109 r <<= 8;
amouroug 0:bb2bda4f5846 110 _RD = 0;
amouroug 0:bb2bda4f5846 111 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 112 r |= _bus.read()>>8; //MSB of port read is blue, LSB is red of next pixel
amouroug 0:bb2bda4f5846 113 _RD = 1;
amouroug 0:bb2bda4f5846 114 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
amouroug 0:bb2bda4f5846 115 // during reading, you read the raw 18bit gram
amouroug 0:bb2bda4f5846 116 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
amouroug 0:bb2bda4f5846 117 }
amouroug 0:bb2bda4f5846 118 _bus.output();
amouroug 0:bb2bda4f5846 119 return (unsigned short)r;
amouroug 0:bb2bda4f5846 120 }
amouroug 0:bb2bda4f5846 121 unsigned int BUS16::rd_reg_data32(unsigned char reg)
amouroug 0:bb2bda4f5846 122 {
amouroug 0:bb2bda4f5846 123 wr_cmd8(reg);
amouroug 0:bb2bda4f5846 124 unsigned int r=0;
amouroug 0:bb2bda4f5846 125 // _DC = 1; // 1=data
amouroug 0:bb2bda4f5846 126 _bus.input();
amouroug 0:bb2bda4f5846 127
amouroug 0:bb2bda4f5846 128 _RD = 0;
amouroug 0:bb2bda4f5846 129 _bus.read(); //dummy read
amouroug 0:bb2bda4f5846 130 _RD = 1;
amouroug 0:bb2bda4f5846 131
amouroug 0:bb2bda4f5846 132 _RD = 0;
amouroug 0:bb2bda4f5846 133 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 134 r |= (_bus.read()&0xFF);
amouroug 0:bb2bda4f5846 135 r <<= 8;
amouroug 0:bb2bda4f5846 136 _RD = 1;
amouroug 0:bb2bda4f5846 137
amouroug 0:bb2bda4f5846 138 _RD = 0;
amouroug 0:bb2bda4f5846 139 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 140 r |= (_bus.read()&0xFF);
amouroug 0:bb2bda4f5846 141 r <<= 8;
amouroug 0:bb2bda4f5846 142 _RD = 1;
amouroug 0:bb2bda4f5846 143
amouroug 0:bb2bda4f5846 144 _RD = 0;
amouroug 0:bb2bda4f5846 145 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 146 r |= (_bus.read()&0xFF);
amouroug 0:bb2bda4f5846 147 r <<= 8;
amouroug 0:bb2bda4f5846 148 _RD = 1;
amouroug 0:bb2bda4f5846 149
amouroug 0:bb2bda4f5846 150 _RD = 0;
amouroug 0:bb2bda4f5846 151 // _RD = 0; // add wait
amouroug 0:bb2bda4f5846 152 r |= (_bus.read()&0xFF);
amouroug 0:bb2bda4f5846 153 _RD = 1;
amouroug 0:bb2bda4f5846 154
amouroug 0:bb2bda4f5846 155 _CS = 1; // toggle CS to interupt the cmd in case was not supported
amouroug 0:bb2bda4f5846 156 _CS = 0;
amouroug 0:bb2bda4f5846 157
amouroug 0:bb2bda4f5846 158 _bus.output();
amouroug 0:bb2bda4f5846 159 return r;
amouroug 0:bb2bda4f5846 160 }
amouroug 0:bb2bda4f5846 161 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
amouroug 0:bb2bda4f5846 162 unsigned int BUS16::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
amouroug 0:bb2bda4f5846 163 {
amouroug 0:bb2bda4f5846 164 return rd_reg_data32(reg);
amouroug 0:bb2bda4f5846 165 }
amouroug 0:bb2bda4f5846 166 // ILI932x specific
amouroug 0:bb2bda4f5846 167 void BUS16::dummyread()
amouroug 0:bb2bda4f5846 168 {
amouroug 0:bb2bda4f5846 169 _bus.input();
amouroug 0:bb2bda4f5846 170 _RD = 0;
amouroug 0:bb2bda4f5846 171 _bus.read(); // dummy read
amouroug 0:bb2bda4f5846 172 _RD=1;
amouroug 0:bb2bda4f5846 173 // _bus.output();
amouroug 0:bb2bda4f5846 174 }
amouroug 0:bb2bda4f5846 175 // ILI932x specific
amouroug 0:bb2bda4f5846 176 void BUS16::reg_select(unsigned char reg, bool forread)
amouroug 0:bb2bda4f5846 177 {
amouroug 0:bb2bda4f5846 178 _DC = 0;
amouroug 0:bb2bda4f5846 179 _bus.write(reg); // write 16bit
amouroug 0:bb2bda4f5846 180 _WR=0;
amouroug 0:bb2bda4f5846 181 _WR=1;
amouroug 0:bb2bda4f5846 182 _DC = 1; // 1=data next
amouroug 0:bb2bda4f5846 183 }
amouroug 0:bb2bda4f5846 184 // ILI932x specific
amouroug 0:bb2bda4f5846 185 void BUS16::reg_write(unsigned char reg, unsigned short data)
amouroug 0:bb2bda4f5846 186 {
amouroug 0:bb2bda4f5846 187 _DC = 0;
amouroug 0:bb2bda4f5846 188 _bus.write(reg); // write 16bit
amouroug 0:bb2bda4f5846 189 _WR=0;
amouroug 0:bb2bda4f5846 190 _WR=1;
amouroug 0:bb2bda4f5846 191 _DC = 1;
amouroug 0:bb2bda4f5846 192 _bus.write(data); // write 16bit
amouroug 0:bb2bda4f5846 193 _WR=0;
amouroug 0:bb2bda4f5846 194 _WR=1;
amouroug 0:bb2bda4f5846 195 }
amouroug 0:bb2bda4f5846 196 // ILI932x specific
amouroug 0:bb2bda4f5846 197 unsigned short BUS16::reg_read(unsigned char reg)
amouroug 0:bb2bda4f5846 198 {
amouroug 0:bb2bda4f5846 199 unsigned short r=0;
amouroug 0:bb2bda4f5846 200 _DC = 0;
amouroug 0:bb2bda4f5846 201 _bus.write(reg); // write 16bit
amouroug 0:bb2bda4f5846 202 _WR=0;
amouroug 0:bb2bda4f5846 203 _WR=1;
amouroug 0:bb2bda4f5846 204 _DC = 1;
amouroug 0:bb2bda4f5846 205 _bus.input();
amouroug 0:bb2bda4f5846 206 _RD=0;
amouroug 0:bb2bda4f5846 207 r |= _bus.read(); // read 16bit
amouroug 0:bb2bda4f5846 208 _RD=1;
amouroug 0:bb2bda4f5846 209 _bus.output();
amouroug 0:bb2bda4f5846 210 return r;
amouroug 0:bb2bda4f5846 211 }
amouroug 0:bb2bda4f5846 212 void BUS16::hw_reset()
amouroug 0:bb2bda4f5846 213 {
amouroug 0:bb2bda4f5846 214 ThisThread::sleep_for(15);
amouroug 0:bb2bda4f5846 215 _DC = 1;
amouroug 0:bb2bda4f5846 216 _CS = 1;
amouroug 0:bb2bda4f5846 217 _WR = 1;
amouroug 0:bb2bda4f5846 218 _RD = 1;
amouroug 0:bb2bda4f5846 219 _reset = 0; // display reset
amouroug 0:bb2bda4f5846 220 ThisThread::sleep_for(2);
amouroug 0:bb2bda4f5846 221 _reset = 1; // end reset
amouroug 0:bb2bda4f5846 222 ThisThread::sleep_for(100);
amouroug 0:bb2bda4f5846 223 }
amouroug 0:bb2bda4f5846 224 void BUS16::BusEnable(bool enable)
amouroug 0:bb2bda4f5846 225 {
amouroug 0:bb2bda4f5846 226 _CS = enable ? 0:1;
amouroug 0:bb2bda4f5846 227 }