Arunkumar Mourougappane / UniGraphic

UniGraphics Library Fork to support mbed os 6.3 Release for ILI9341

Dependents:   TFT_ILI9341_UniGraphic TFT_ILI9341_os6

Protocols/SPI8.cpp@2:59188908eb60, 2020-10-08 (annotated)

Committer:
amouroug
Date:
Thu Oct 08 18:11:03 2020 -0500
Revision:
2:59188908eb60
Parent:
1:6f267dbbafec 
Added GraphicsDisplay GFX API to draw triangle.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
amouroug 0:bb2bda4f5846 1 /* mbed UniGraphic library - SPI8 protocol class
amouroug 0:bb2bda4f5846 2 * Copyright (c) 2015 Giuliano Dianda
amouroug 0:bb2bda4f5846 3 * Released under the MIT License: http://mbed.org/license/mit
amouroug 0:bb2bda4f5846 4 *
amouroug 0:bb2bda4f5846 5 * Derived work of:
amouroug 0:bb2bda4f5846 6 *
amouroug 0:bb2bda4f5846 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
amouroug 0:bb2bda4f5846 8 * Copyright (c) 2013 Peter Drescher - DC2PD
amouroug 0:bb2bda4f5846 9 *
amouroug 0:bb2bda4f5846 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
amouroug 0:bb2bda4f5846 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
amouroug 0:bb2bda4f5846 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
amouroug 0:bb2bda4f5846 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
amouroug 0:bb2bda4f5846 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
amouroug 0:bb2bda4f5846 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
amouroug 0:bb2bda4f5846 16 * THE SOFTWARE.
amouroug 0:bb2bda4f5846 17 */
amouroug 0:bb2bda4f5846 18
amouroug 0:bb2bda4f5846 19 #include "SPI8.h"
amouroug 0:bb2bda4f5846 20
amouroug 0:bb2bda4f5846 21
amouroug 0:bb2bda4f5846 22 SPI8::SPI8(int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC)
amouroug 0:bb2bda4f5846 23 : _CS(CS), _spi(mosi, miso, sclk), _reset(reset), _DC(DC)
amouroug 0:bb2bda4f5846 24 {
amouroug 0:bb2bda4f5846 25 _reset = 1;
amouroug 0:bb2bda4f5846 26 _DC=1;
amouroug 0:bb2bda4f5846 27 _CS=1;
amouroug 0:bb2bda4f5846 28 _spi.format(8,0); // 8 bit spi mode 0
amouroug 0:bb2bda4f5846 29 _spi.frequency(Hz);
amouroug 0:bb2bda4f5846 30 hw_reset();
amouroug 0:bb2bda4f5846 31 }
amouroug 0:bb2bda4f5846 32
amouroug 0:bb2bda4f5846 33 void SPI8::wr_cmd8(unsigned char cmd)
amouroug 0:bb2bda4f5846 34 {
amouroug 0:bb2bda4f5846 35 _DC.write(0); // 0=cmd
amouroug 0:bb2bda4f5846 36 _spi.write(cmd); // write 8bit
amouroug 0:bb2bda4f5846 37 _DC.write(1); // 1=data next
amouroug 0:bb2bda4f5846 38 }
amouroug 0:bb2bda4f5846 39 void SPI8::wr_data8(unsigned char data)
amouroug 0:bb2bda4f5846 40 {
amouroug 0:bb2bda4f5846 41 _spi.write(data); // write 8bit
amouroug 0:bb2bda4f5846 42 }
amouroug 0:bb2bda4f5846 43 void SPI8::wr_cmd16(unsigned short cmd)
amouroug 0:bb2bda4f5846 44 {
amouroug 0:bb2bda4f5846 45 _DC.write(0); // 0=cmd
amouroug 0:bb2bda4f5846 46 _spi.write(cmd>>8); // write 8bit
amouroug 0:bb2bda4f5846 47 _spi.write(cmd&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 48 _DC.write(1); // 1=data next
amouroug 0:bb2bda4f5846 49 }
amouroug 0:bb2bda4f5846 50 void SPI8::wr_data16(unsigned short data)
amouroug 0:bb2bda4f5846 51 {
amouroug 0:bb2bda4f5846 52 _spi.write(data>>8); // write 8bit
amouroug 0:bb2bda4f5846 53 _spi.write(data&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 54 }
amouroug 0:bb2bda4f5846 55 void SPI8::wr_gram(unsigned short data)
amouroug 0:bb2bda4f5846 56 {
amouroug 0:bb2bda4f5846 57 _spi.write(data>>8); // write 8bit
amouroug 0:bb2bda4f5846 58 _spi.write(data&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 59 }
amouroug 0:bb2bda4f5846 60 void SPI8::wr_gram(unsigned short data, unsigned int count)
amouroug 0:bb2bda4f5846 61 {
amouroug 0:bb2bda4f5846 62 if((data>>8)==(data&0xFF))
amouroug 0:bb2bda4f5846 63 {
amouroug 0:bb2bda4f5846 64 count<<=1;
amouroug 0:bb2bda4f5846 65 while(count)
amouroug 0:bb2bda4f5846 66 {
amouroug 0:bb2bda4f5846 67 _spi.write(data); // write 8bit
amouroug 0:bb2bda4f5846 68 count--;
amouroug 0:bb2bda4f5846 69 }
amouroug 0:bb2bda4f5846 70 }
amouroug 0:bb2bda4f5846 71 else
amouroug 0:bb2bda4f5846 72 {
amouroug 0:bb2bda4f5846 73 while(count)
amouroug 0:bb2bda4f5846 74 {
amouroug 0:bb2bda4f5846 75 _spi.write(data>>8); // write 8bit
amouroug 0:bb2bda4f5846 76 _spi.write(data&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 77 count--;
amouroug 0:bb2bda4f5846 78 }
amouroug 0:bb2bda4f5846 79 }
amouroug 0:bb2bda4f5846 80 }
amouroug 0:bb2bda4f5846 81 void SPI8::wr_grambuf(unsigned short* data, unsigned int lenght)
amouroug 0:bb2bda4f5846 82 {
amouroug 0:bb2bda4f5846 83 while(lenght)
amouroug 0:bb2bda4f5846 84 {
amouroug 0:bb2bda4f5846 85 _spi.write((*data)>>8); // write 8bit
amouroug 0:bb2bda4f5846 86 _spi.write((*data)&0xFF); // write 8bit
amouroug 0:bb2bda4f5846 87 data++;
amouroug 0:bb2bda4f5846 88 lenght--;
amouroug 0:bb2bda4f5846 89 }
amouroug 0:bb2bda4f5846 90 }
amouroug 0:bb2bda4f5846 91 unsigned short SPI8::rd_gram(bool convert)
amouroug 0:bb2bda4f5846 92 {
amouroug 0:bb2bda4f5846 93 unsigned int r=0;
amouroug 0:bb2bda4f5846 94 _spi.write(0); // whole first byte is dummy
amouroug 0:bb2bda4f5846 95 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 96 r <<= 8;
amouroug 0:bb2bda4f5846 97 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 98 if(convert)
amouroug 0:bb2bda4f5846 99 {
amouroug 0:bb2bda4f5846 100 r <<= 8;
amouroug 0:bb2bda4f5846 101 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 102 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
amouroug 0:bb2bda4f5846 103 // during reading, you read the raw 18bit gram
amouroug 0:bb2bda4f5846 104 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
amouroug 0:bb2bda4f5846 105 }
amouroug 0:bb2bda4f5846 106 _CS = 1; // force CS HIG to interupt the "read state"
amouroug 0:bb2bda4f5846 107 _CS = 0;
amouroug 0:bb2bda4f5846 108 return (unsigned short)r;
amouroug 0:bb2bda4f5846 109 }
amouroug 0:bb2bda4f5846 110 unsigned int SPI8::rd_reg_data32(unsigned char reg)
amouroug 0:bb2bda4f5846 111 {
amouroug 0:bb2bda4f5846 112 wr_cmd8(reg);
amouroug 0:bb2bda4f5846 113 unsigned int r=0;
amouroug 0:bb2bda4f5846 114
amouroug 0:bb2bda4f5846 115 r |= _spi.write(0); // we get only 7bit valid, first bit was the dummy cycle
amouroug 0:bb2bda4f5846 116 r <<= 8;
amouroug 0:bb2bda4f5846 117 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 118 r <<= 8;
amouroug 0:bb2bda4f5846 119 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 120 r <<= 8;
amouroug 0:bb2bda4f5846 121 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 122 r <<= 1; // 32bits are aligned, now collecting bit_0
amouroug 0:bb2bda4f5846 123 r |= (_spi.write(0) >> 7);
amouroug 0:bb2bda4f5846 124 // we clocked 7 more bit so ILI waiting for 8th, we need to reset spi bus
amouroug 0:bb2bda4f5846 125 _CS = 1; // force CS HIG to interupt the cmd
amouroug 0:bb2bda4f5846 126 _CS = 0;
amouroug 0:bb2bda4f5846 127 return r;
amouroug 0:bb2bda4f5846 128 }
amouroug 0:bb2bda4f5846 129 unsigned int SPI8::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
amouroug 0:bb2bda4f5846 130 {
amouroug 0:bb2bda4f5846 131 unsigned int r=0;
amouroug 0:bb2bda4f5846 132 for(int regparam=1; regparam<4; regparam++) // when reading EXTC regs, first parameter is always dummy, so start with 1
amouroug 0:bb2bda4f5846 133 {
amouroug 0:bb2bda4f5846 134 wr_cmd8(SPIreadenablecmd); // spi-in enable cmd, 0xD9 (ili9341) or 0xFB (ili9488) or don't know
amouroug 0:bb2bda4f5846 135 wr_data8(0xF0|regparam); // in low nibble specify which reg parameter we want
amouroug 0:bb2bda4f5846 136 wr_cmd8(reg); // now send cmd (select register we want to read)
amouroug 0:bb2bda4f5846 137 r <<= 8;
amouroug 0:bb2bda4f5846 138 r |= _spi.write(0);
amouroug 0:bb2bda4f5846 139 // r = _spi.write(0) >> 8; for 16bit
amouroug 0:bb2bda4f5846 140 }
amouroug 0:bb2bda4f5846 141 _CS = 1; // force CS HIG to interupt the cmd
amouroug 0:bb2bda4f5846 142 _CS = 0;
amouroug 0:bb2bda4f5846 143 return r;
amouroug 0:bb2bda4f5846 144 }
amouroug 0:bb2bda4f5846 145 // ILI932x specific
amouroug 0:bb2bda4f5846 146 void SPI8::dummyread()
amouroug 0:bb2bda4f5846 147 {
amouroug 0:bb2bda4f5846 148 _spi.write(0); // dummy read
amouroug 0:bb2bda4f5846 149 }
amouroug 0:bb2bda4f5846 150 // ILI932x specific
amouroug 0:bb2bda4f5846 151 void SPI8::reg_select(unsigned char reg, bool forread)
amouroug 0:bb2bda4f5846 152 {
amouroug 0:bb2bda4f5846 153 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 154 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 155 _spi.write(0x70);
amouroug 0:bb2bda4f5846 156 _spi.write(0); // write MSB
amouroug 0:bb2bda4f5846 157 _spi.write(reg); // write LSB
amouroug 0:bb2bda4f5846 158 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 159 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 160 if(forread) _spi.write(0x73);
amouroug 0:bb2bda4f5846 161 else _spi.write(0x72);
amouroug 0:bb2bda4f5846 162 }
amouroug 0:bb2bda4f5846 163 // ILI932x specific
amouroug 0:bb2bda4f5846 164 void SPI8::reg_write(unsigned char reg, unsigned short data)
amouroug 0:bb2bda4f5846 165 {
amouroug 0:bb2bda4f5846 166 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 167 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 168 _spi.write(0x70);
amouroug 0:bb2bda4f5846 169 _spi.write(0); // write MSB
amouroug 0:bb2bda4f5846 170 _spi.write(reg); // write LSB
amouroug 0:bb2bda4f5846 171 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 172 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 173 _spi.write(0x72);
amouroug 0:bb2bda4f5846 174 _spi.write(data>>8);
amouroug 0:bb2bda4f5846 175 _spi.write(data&0xFF);
amouroug 0:bb2bda4f5846 176 }
amouroug 0:bb2bda4f5846 177 // ILI932x specific
amouroug 0:bb2bda4f5846 178 unsigned short SPI8::reg_read(unsigned char reg)
amouroug 0:bb2bda4f5846 179 {
amouroug 0:bb2bda4f5846 180 unsigned short r=0;
amouroug 0:bb2bda4f5846 181 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 182 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 183 _spi.write(0x70);
amouroug 0:bb2bda4f5846 184 _spi.write(0); // write MSB
amouroug 0:bb2bda4f5846 185 _spi.write(reg); // write LSB
amouroug 0:bb2bda4f5846 186 _CS = 1; //fixme: really needed?
amouroug 0:bb2bda4f5846 187 _CS = 0; //fixme: really needed?
amouroug 0:bb2bda4f5846 188 _spi.write(0x73);
amouroug 0:bb2bda4f5846 189 _spi.write(0); // dummy read
amouroug 0:bb2bda4f5846 190 r = _spi.write(0); // read 8bit
amouroug 0:bb2bda4f5846 191 r <<= 8;
amouroug 0:bb2bda4f5846 192 r |= _spi.write(0); // read 8bit
amouroug 0:bb2bda4f5846 193 return r;
amouroug 0:bb2bda4f5846 194 }
amouroug 0:bb2bda4f5846 195 void SPI8::hw_reset()
amouroug 0:bb2bda4f5846 196 {
amouroug 1:6f267dbbafec 197 ThisThread::sleep_for(15ms);
amouroug 0:bb2bda4f5846 198 _DC = 1;
amouroug 0:bb2bda4f5846 199 _CS = 1;
amouroug 0:bb2bda4f5846 200 _reset = 0; // display reset
amouroug 1:6f267dbbafec 201 ThisThread::sleep_for(2ms);
amouroug 0:bb2bda4f5846 202 _reset = 1; // end reset
amouroug 1:6f267dbbafec 203 ThisThread::sleep_for(100ms);
amouroug 0:bb2bda4f5846 204 }
amouroug 0:bb2bda4f5846 205 void SPI8::BusEnable(bool enable)
amouroug 0:bb2bda4f5846 206 {
amouroug 0:bb2bda4f5846 207 _CS = enable ? 0:1;
amouroug 0:bb2bda4f5846 208 }