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Diff: targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_addrdefine.h
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
diff -r 423e1876dc07 -r ef7eb2e8f9f7 targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_addrdefine.h --- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_addrdefine.h Tue Aug 02 14:07:36 2016 +0000 +++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_addrdefine.h Fri Sep 02 15:07:44 2016 +0100 @@ -1,22 +1,22 @@ -#ifndef __GPIO_ADDRDEFINE__ -#define __GPIO_ADDRDEFINE__ - -#define GPIO_BASE ((long)0xFCFE3000uL) /* GPIO */ - -#define PORT(n) (volatile unsigned short *)(GPIO_BASE + 0x000 + ((n)*4)) -#define PSR(n) (volatile unsigned long *)(GPIO_BASE + 0x100 + ((n)*4)) -#define PPR(n) (volatile unsigned short *)(GPIO_BASE + 0x200 + ((n)*4)) -#define PM(n) (volatile unsigned short *)(GPIO_BASE + 0x300 + ((n)*4)) -#define PMC(n) (volatile unsigned short *)(GPIO_BASE + 0x400 + ((n)*4)) -#define PFC(n) (volatile unsigned short *)(GPIO_BASE + 0x500 + ((n)*4)) -#define PFCE(n) (volatile unsigned short *)(GPIO_BASE + 0x600 + ((n)*4)) -#define PNOT(n) (volatile unsigned short *)(GPIO_BASE + 0x700 + ((n)*4)) -#define PMSR(n) (volatile unsigned long *)(GPIO_BASE + 0x800 + ((n)*4)) -#define PMCSR(n) (volatile unsigned long *)(GPIO_BASE + 0x900 + ((n)*4)) -#define PFCAE(n) (volatile unsigned short *)(GPIO_BASE + 0xa00 + ((n)*4)) -#define PIBC(n) (volatile unsigned short *)(GPIO_BASE + 0x4000 +((n)*4)) -#define PBDC(n) (volatile unsigned short *)(GPIO_BASE + 0x4100 +((n)*4)) -#define PIPC(n) (volatile unsigned short *)(GPIO_BASE + 0x4200 +((n)*4)) - -#endif/*__GPIO_ADDRDEFINE__*/ - +#ifndef __GPIO_ADDRDEFINE__ +#define __GPIO_ADDRDEFINE__ + +#define GPIO_BASE ((long)0xFCFE3000uL) /* GPIO */ + +#define PORT(n) (volatile unsigned short *)(GPIO_BASE + 0x000 + ((n)*4)) +#define PSR(n) (volatile unsigned long *)(GPIO_BASE + 0x100 + ((n)*4)) +#define PPR(n) (volatile unsigned short *)(GPIO_BASE + 0x200 + ((n)*4)) +#define PM(n) (volatile unsigned short *)(GPIO_BASE + 0x300 + ((n)*4)) +#define PMC(n) (volatile unsigned short *)(GPIO_BASE + 0x400 + ((n)*4)) +#define PFC(n) (volatile unsigned short *)(GPIO_BASE + 0x500 + ((n)*4)) +#define PFCE(n) (volatile unsigned short *)(GPIO_BASE + 0x600 + ((n)*4)) +#define PNOT(n) (volatile unsigned short *)(GPIO_BASE + 0x700 + ((n)*4)) +#define PMSR(n) (volatile unsigned long *)(GPIO_BASE + 0x800 + ((n)*4)) +#define PMCSR(n) (volatile unsigned long *)(GPIO_BASE + 0x900 + ((n)*4)) +#define PFCAE(n) (volatile unsigned short *)(GPIO_BASE + 0xa00 + ((n)*4)) +#define PIBC(n) (volatile unsigned short *)(GPIO_BASE + 0x4000 +((n)*4)) +#define PBDC(n) (volatile unsigned short *)(GPIO_BASE + 0x4100 +((n)*4)) +#define PIPC(n) (volatile unsigned short *)(GPIO_BASE + 0x4200 +((n)*4)) + +#endif/*__GPIO_ADDRDEFINE__*/ +