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Diff: targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c
- Revision:
- 172:7d866c31b3c5
- Parent:
- 167:e84263d55307
- Child:
- 176:447f873cad2f
diff -r 89b338f31ef1 -r 7d866c31b3c5 targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c --- a/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c Wed Aug 16 18:27:13 2017 +0100 +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c Thu Aug 31 17:27:04 2017 +0100 @@ -26,31 +26,33 @@ #define YEAR0 1900 //#define EPOCH_YR 1970 -static int rtc_inited = 0; static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL}; void rtc_init(void) { - if (rtc_inited) { + if (rtc_isenabled()) { return; } - rtc_inited = 1; - - // Enable IP clock - CLK_EnableModuleClock(rtc_modinit.clkidx); RTC_Open(NULL); } void rtc_free(void) { - // FIXME + // N/A } int rtc_isenabled(void) { - return rtc_inited; + // NOTE: To access (RTC) registers, clock must be enabled first. + if (! (CLK->APBCLK0 & CLK_APBCLK0_RTCCKEN_Msk)) { + // Enable IP clock + CLK_EnableModuleClock(rtc_modinit.clkidx); + } + + // NOTE: Check RTC Init Active flag to support crossing reset cycle. + return !! (RTC->INIT & RTC_INIT_INIT_Active_Msk); } /* @@ -68,7 +70,9 @@ time_t rtc_read(void) { - if (! rtc_inited) { + // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency. + // RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect. + if (! rtc_isenabled()) { rtc_init(); } @@ -94,7 +98,7 @@ void rtc_write(time_t t) { - if (! rtc_inited) { + if (! rtc_isenabled()) { rtc_init(); }