Amit Gandhi / sensen_copy_2

t

Fork of mbed-dev by mbed official

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/test_map.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Child:
147:30b64687e01f
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file test_map.h
<> 144:ef7eb2e8f9f7 4 * @brief Test hw module register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 2848 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup test
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 */
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 #ifndef TEST_MAP_H_
<> 144:ef7eb2e8f9f7 27 #define TEST_MAP_H_
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 30 * *
<> 144:ef7eb2e8f9f7 31 * Header files *
<> 144:ef7eb2e8f9f7 32 * *
<> 144:ef7eb2e8f9f7 33 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #include "architecture.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /**************************************************************************************************
<> 144:ef7eb2e8f9f7 38 * *
<> 144:ef7eb2e8f9f7 39 * Type definitions *
<> 144:ef7eb2e8f9f7 40 * *
<> 144:ef7eb2e8f9f7 41 **************************************************************************************************/
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /** General test registers
<> 144:ef7eb2e8f9f7 44 *
<> 144:ef7eb2e8f9f7 45 */
<> 144:ef7eb2e8f9f7 46 typedef struct {
<> 144:ef7eb2e8f9f7 47 __IO uint32_t UNLOCK;
<> 144:ef7eb2e8f9f7 48 __IO uint32_t ANA_TEST_MUX;
<> 144:ef7eb2e8f9f7 49 __IO uint32_t OVD_ENA_MODE;
<> 144:ef7eb2e8f9f7 50 __IO uint32_t OVD_VAL;
<> 144:ef7eb2e8f9f7 51 __IO uint32_t ANA_TEST_MODE;
<> 144:ef7eb2e8f9f7 52 __IO uint32_t CLK_TEST_MODE;
<> 144:ef7eb2e8f9f7 53 union {
<> 144:ef7eb2e8f9f7 54 struct {
<> 144:ef7eb2e8f9f7 55 __IO uint32_t PAD0:1;
<> 144:ef7eb2e8f9f7 56 __IO uint32_t PAD1:1;
<> 144:ef7eb2e8f9f7 57 __IO uint32_t FORCE_SOURCE:1;
<> 144:ef7eb2e8f9f7 58 __IO uint32_t FORCE_SINK:1;
<> 144:ef7eb2e8f9f7 59 __IO uint32_t PD_CONTROL:3;
<> 144:ef7eb2e8f9f7 60 __IO uint32_t PAD3:1;
<> 144:ef7eb2e8f9f7 61 __IO uint32_t BYPASS_PLL_REG:1;
<> 144:ef7eb2e8f9f7 62 __IO uint32_t PAD4:4;
<> 144:ef7eb2e8f9f7 63 __IO uint32_t DITHER_MODE:1;
<> 144:ef7eb2e8f9f7 64 __IO uint32_t PLL_MODE:1;
<> 144:ef7eb2e8f9f7 65 __IO uint32_t FORCE_LOCK:1;
<> 144:ef7eb2e8f9f7 66 } BITS;
<> 144:ef7eb2e8f9f7 67 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 68 } PLL_TEST_MODE;
<> 144:ef7eb2e8f9f7 69 __IO uint32_t RX_TEST_MODE;
<> 144:ef7eb2e8f9f7 70 __IO uint32_t PMU_TEST_MODE;
<> 144:ef7eb2e8f9f7 71 } TestReg_t, *TestReg_pt;
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 /** Digital test registers
<> 144:ef7eb2e8f9f7 74 *
<> 144:ef7eb2e8f9f7 75 */
<> 144:ef7eb2e8f9f7 76 typedef struct {
<> 144:ef7eb2e8f9f7 77 union {
<> 144:ef7eb2e8f9f7 78 struct {
<> 144:ef7eb2e8f9f7 79 __IO uint32_t PAD0 :4; /**< */
<> 144:ef7eb2e8f9f7 80 __IO uint32_t DIO4 :4; /**< DIO4 Test Mux Control */
<> 144:ef7eb2e8f9f7 81 __IO uint32_t DIO5 :4; /**< DIO5 Test Mux Control */
<> 144:ef7eb2e8f9f7 82 __IO uint32_t DIO6 :4; /**< DIO6 Test Mux Control */
<> 144:ef7eb2e8f9f7 83 __IO uint32_t DIO7 :4; /**< DIO7 Test Mux Control */
<> 144:ef7eb2e8f9f7 84 __IO uint32_t DIO8 :4; /**< DIO8 Test Mux Control */
<> 144:ef7eb2e8f9f7 85 __IO uint32_t DIO9 :4; /**< DIO9 Test Mux Control */
<> 144:ef7eb2e8f9f7 86 __IO uint32_t DIO10 :4; /**< DIO10 Test Mux Control */
<> 144:ef7eb2e8f9f7 87 } BITS;
<> 144:ef7eb2e8f9f7 88 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 89 } DIG_TEST_MUX;
<> 144:ef7eb2e8f9f7 90 __IO uint32_t DIG_TEST_MODE;
<> 144:ef7eb2e8f9f7 91 union {
<> 144:ef7eb2e8f9f7 92 struct {
<> 144:ef7eb2e8f9f7 93 __IO uint32_t PAD0 :12; /**< */
<> 144:ef7eb2e8f9f7 94 __IO uint32_t DIO5 :3; /**< DIO5 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 95 __IO uint32_t DIO6 :3; /**< DIO6 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 96 __IO uint32_t DIO7 :3; /**< DIO7 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 97 __IO uint32_t DIO8 :3; /**< DIO8 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 98 __IO uint32_t DIO9 :3; /**< DIO9 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 99 __IO uint32_t DIO10 :3; /**< DIO10 Input Test Mux Control */
<> 144:ef7eb2e8f9f7 100 } BITS;
<> 144:ef7eb2e8f9f7 101 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 102 } DIG_IN_TEST_MUX;
<> 144:ef7eb2e8f9f7 103 __IO uint32_t SCAN_MODE;
<> 144:ef7eb2e8f9f7 104 __IO uint32_t BIST_TEST_MUX;
<> 144:ef7eb2e8f9f7 105 __IO uint32_t RAM_DIAG_ADDR;
<> 144:ef7eb2e8f9f7 106 __IO uint32_t RAM_DIAG_DATA;
<> 144:ef7eb2e8f9f7 107 __IO uint32_t SRAMA_DIAG_COMP;
<> 144:ef7eb2e8f9f7 108 __IO uint32_t SRAMB_DIAG_COMP;
<> 144:ef7eb2e8f9f7 109 __IO uint32_t RAM_BUF_TEST_MODE;
<> 144:ef7eb2e8f9f7 110 } TestDigReg_t, *TestDigReg_pt;
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /** NVM test registers
<> 144:ef7eb2e8f9f7 113 *
<> 144:ef7eb2e8f9f7 114 */
<> 144:ef7eb2e8f9f7 115 typedef struct {
<> 144:ef7eb2e8f9f7 116 __O uint32_t PAD;
<> 144:ef7eb2e8f9f7 117 } TestNvmReg_t, *TestNvmReg_pt;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 #endif /* TEST_MAP_H_ */