Amit Gandhi / sensen_copy_2

t

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_ELMO_F411RE/TOOLCHAIN_IAR/startup_stm32f411xe.S@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
<> 144:ef7eb2e8f9f7 2 ;* File Name : startup_stm32f411xe.s
<> 144:ef7eb2e8f9f7 3 ;* Author : MCD Application Team
<> 144:ef7eb2e8f9f7 4 ;* Version : V2.1.0
<> 144:ef7eb2e8f9f7 5 ;* Date : 19-June-2014
<> 144:ef7eb2e8f9f7 6 ;* Description : STM32F411xExx devices vector table for EWARM toolchain.
<> 144:ef7eb2e8f9f7 7 ;* This module performs:
<> 144:ef7eb2e8f9f7 8 ;* - Set the initial SP
<> 144:ef7eb2e8f9f7 9 ;* - Set the initial PC == _iar_program_start,
<> 144:ef7eb2e8f9f7 10 ;* - Set the vector table entries with the exceptions ISR
<> 144:ef7eb2e8f9f7 11 ;* address.
<> 144:ef7eb2e8f9f7 12 ;* - Configure the system clock
<> 144:ef7eb2e8f9f7 13 ;* - Branches to main in the C library (which eventually
<> 144:ef7eb2e8f9f7 14 ;* calls main()).
<> 144:ef7eb2e8f9f7 15 ;* After Reset the Cortex-M4 processor is in Thread mode,
<> 144:ef7eb2e8f9f7 16 ;* priority is Privileged, and the Stack is set to Main.
<> 144:ef7eb2e8f9f7 17 ;********************************************************************************
<> 144:ef7eb2e8f9f7 18 ;*
<> 144:ef7eb2e8f9f7 19 ;* Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 20 ;* are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 21 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 22 ;* this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 23 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 24 ;* this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 25 ;* and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 26 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 27 ;* may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 28 ;* without specific prior written permission.
<> 144:ef7eb2e8f9f7 29 ;*
<> 144:ef7eb2e8f9f7 30 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 31 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 32 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 33 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 34 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 35 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 36 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 37 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 38 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 39 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 40 ;*
<> 144:ef7eb2e8f9f7 41 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 42 ;
<> 144:ef7eb2e8f9f7 43 ;
<> 144:ef7eb2e8f9f7 44 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 45 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 46 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 47 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 48 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 49 ;
<> 144:ef7eb2e8f9f7 50 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 51 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 52 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 53 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 54 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 55 ;
<> 144:ef7eb2e8f9f7 56 ; Cortex-M version
<> 144:ef7eb2e8f9f7 57 ;
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 62 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 67 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 68 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 DATA
<> 144:ef7eb2e8f9f7 71 __vector_table
<> 144:ef7eb2e8f9f7 72 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 73 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 76 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 77 DCD MemManage_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 78 DCD BusFault_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 79 DCD UsageFault_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 80 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 81 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 82 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 83 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 84 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 85 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 86 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 87 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 88 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 ; External Interrupts
<> 144:ef7eb2e8f9f7 91 DCD WWDG_IRQHandler ; Window WatchDog
<> 144:ef7eb2e8f9f7 92 DCD PVD_IRQHandler ; PVD through EXTI Line detection
<> 144:ef7eb2e8f9f7 93 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
<> 144:ef7eb2e8f9f7 94 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
<> 144:ef7eb2e8f9f7 95 DCD FLASH_IRQHandler ; FLASH
<> 144:ef7eb2e8f9f7 96 DCD RCC_IRQHandler ; RCC
<> 144:ef7eb2e8f9f7 97 DCD EXTI0_IRQHandler ; EXTI Line0
<> 144:ef7eb2e8f9f7 98 DCD EXTI1_IRQHandler ; EXTI Line1
<> 144:ef7eb2e8f9f7 99 DCD EXTI2_IRQHandler ; EXTI Line2
<> 144:ef7eb2e8f9f7 100 DCD EXTI3_IRQHandler ; EXTI Line3
<> 144:ef7eb2e8f9f7 101 DCD EXTI4_IRQHandler ; EXTI Line4
<> 144:ef7eb2e8f9f7 102 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
<> 144:ef7eb2e8f9f7 103 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
<> 144:ef7eb2e8f9f7 104 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
<> 144:ef7eb2e8f9f7 105 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
<> 144:ef7eb2e8f9f7 106 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
<> 144:ef7eb2e8f9f7 107 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
<> 144:ef7eb2e8f9f7 108 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
<> 144:ef7eb2e8f9f7 109 DCD ADC_IRQHandler ; ADC1
<> 144:ef7eb2e8f9f7 110 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 111 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 112 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 113 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 114 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
<> 144:ef7eb2e8f9f7 115 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
<> 144:ef7eb2e8f9f7 116 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
<> 144:ef7eb2e8f9f7 117 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
<> 144:ef7eb2e8f9f7 118 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 144:ef7eb2e8f9f7 119 DCD TIM2_IRQHandler ; TIM2
<> 144:ef7eb2e8f9f7 120 DCD TIM3_IRQHandler ; TIM3
<> 144:ef7eb2e8f9f7 121 DCD TIM4_IRQHandler ; TIM4
<> 144:ef7eb2e8f9f7 122 DCD I2C1_EV_IRQHandler ; I2C1 Event
<> 144:ef7eb2e8f9f7 123 DCD I2C1_ER_IRQHandler ; I2C1 Error
<> 144:ef7eb2e8f9f7 124 DCD I2C2_EV_IRQHandler ; I2C2 Event
<> 144:ef7eb2e8f9f7 125 DCD I2C2_ER_IRQHandler ; I2C2 Error
<> 144:ef7eb2e8f9f7 126 DCD SPI1_IRQHandler ; SPI1
<> 144:ef7eb2e8f9f7 127 DCD SPI2_IRQHandler ; SPI2
<> 144:ef7eb2e8f9f7 128 DCD USART1_IRQHandler ; USART1
<> 144:ef7eb2e8f9f7 129 DCD USART2_IRQHandler ; USART2
<> 144:ef7eb2e8f9f7 130 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 131 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
<> 144:ef7eb2e8f9f7 132 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
<> 144:ef7eb2e8f9f7 133 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
<> 144:ef7eb2e8f9f7 134 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 135 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 136 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 137 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 138 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
<> 144:ef7eb2e8f9f7 139 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 140 DCD SDIO_IRQHandler ; SDIO
<> 144:ef7eb2e8f9f7 141 DCD TIM5_IRQHandler ; TIM5
<> 144:ef7eb2e8f9f7 142 DCD SPI3_IRQHandler ; SPI3
<> 144:ef7eb2e8f9f7 143 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 144 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 145 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 146 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 147 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
<> 144:ef7eb2e8f9f7 148 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
<> 144:ef7eb2e8f9f7 149 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
<> 144:ef7eb2e8f9f7 150 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
<> 144:ef7eb2e8f9f7 151 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
<> 144:ef7eb2e8f9f7 152 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 153 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 154 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 155 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 156 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 157 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 158 DCD OTG_FS_IRQHandler ; USB OTG FS
<> 144:ef7eb2e8f9f7 159 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
<> 144:ef7eb2e8f9f7 160 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
<> 144:ef7eb2e8f9f7 161 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
<> 144:ef7eb2e8f9f7 162 DCD USART6_IRQHandler ; USART6
<> 144:ef7eb2e8f9f7 163 DCD I2C3_EV_IRQHandler ; I2C3 event
<> 144:ef7eb2e8f9f7 164 DCD I2C3_ER_IRQHandler ; I2C3 error
<> 144:ef7eb2e8f9f7 165 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 166 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 167 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 168 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 169 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 170 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 171 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 172 DCD FPU_IRQHandler ; FPU
<> 144:ef7eb2e8f9f7 173 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 174 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 175 DCD SPI4_IRQHandler ; SPI4
<> 144:ef7eb2e8f9f7 176 DCD SPI5_IRQHandler ; SPI5
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 179 ;;
<> 144:ef7eb2e8f9f7 180 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 181 ;;
<> 144:ef7eb2e8f9f7 182 THUMB
<> 144:ef7eb2e8f9f7 183 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 184 SECTION .text:CODE:REORDER:NOROOT(2)
<> 144:ef7eb2e8f9f7 185 Reset_Handler
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 188 BLX R0
<> 144:ef7eb2e8f9f7 189 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 190 BX R0
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 193 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 194 NMI_Handler
<> 144:ef7eb2e8f9f7 195 B NMI_Handler
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 198 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 199 HardFault_Handler
<> 144:ef7eb2e8f9f7 200 B HardFault_Handler
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 PUBWEAK MemManage_Handler
<> 144:ef7eb2e8f9f7 203 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 204 MemManage_Handler
<> 144:ef7eb2e8f9f7 205 B MemManage_Handler
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 PUBWEAK BusFault_Handler
<> 144:ef7eb2e8f9f7 208 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 209 BusFault_Handler
<> 144:ef7eb2e8f9f7 210 B BusFault_Handler
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 PUBWEAK UsageFault_Handler
<> 144:ef7eb2e8f9f7 213 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 214 UsageFault_Handler
<> 144:ef7eb2e8f9f7 215 B UsageFault_Handler
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 218 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 219 SVC_Handler
<> 144:ef7eb2e8f9f7 220 B SVC_Handler
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 PUBWEAK DebugMon_Handler
<> 144:ef7eb2e8f9f7 223 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 224 DebugMon_Handler
<> 144:ef7eb2e8f9f7 225 B DebugMon_Handler
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 228 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 229 PendSV_Handler
<> 144:ef7eb2e8f9f7 230 B PendSV_Handler
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 233 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 234 SysTick_Handler
<> 144:ef7eb2e8f9f7 235 B SysTick_Handler
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 PUBWEAK WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 238 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 239 WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 240 B WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 PUBWEAK PVD_IRQHandler
<> 144:ef7eb2e8f9f7 243 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 244 PVD_IRQHandler
<> 144:ef7eb2e8f9f7 245 B PVD_IRQHandler
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 PUBWEAK TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 248 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 249 TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 250 B TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 PUBWEAK RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 253 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 254 RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 255 B RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 PUBWEAK FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 258 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 259 FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 260 B FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 PUBWEAK RCC_IRQHandler
<> 144:ef7eb2e8f9f7 263 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 264 RCC_IRQHandler
<> 144:ef7eb2e8f9f7 265 B RCC_IRQHandler
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 PUBWEAK EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 268 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 269 EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 270 B EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 PUBWEAK EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 273 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 274 EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 275 B EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 PUBWEAK EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 278 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 279 EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 280 B EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 PUBWEAK EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 283 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 284 EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 285 B EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 PUBWEAK EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 288 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 289 EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 290 B EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 PUBWEAK DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 293 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 294 DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 295 B DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 PUBWEAK DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 298 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 299 DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 300 B DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 PUBWEAK DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 303 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 304 DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 305 B DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 PUBWEAK DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 308 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 309 DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 310 B DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 PUBWEAK DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 313 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 314 DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 315 B DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 PUBWEAK DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 318 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 319 DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 320 B DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 PUBWEAK DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 323 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 324 DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 325 B DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 PUBWEAK ADC_IRQHandler
<> 144:ef7eb2e8f9f7 328 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 329 ADC_IRQHandler
<> 144:ef7eb2e8f9f7 330 B ADC_IRQHandler
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 PUBWEAK EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 333 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 334 EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 335 B EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 PUBWEAK TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 338 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 339 TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 340 B TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 PUBWEAK TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 343 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 344 TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 345 B TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 348 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 349 TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 350 B TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 PUBWEAK TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 353 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 354 TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 355 B TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 PUBWEAK TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 358 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 359 TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 360 B TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 PUBWEAK TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 363 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 364 TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 365 B TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 PUBWEAK TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 368 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 369 TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 370 B TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 PUBWEAK I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 373 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 374 I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 375 B I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 PUBWEAK I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 378 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 379 I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 380 B I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 PUBWEAK I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 383 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 384 I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 385 B I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 PUBWEAK I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 388 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 389 I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 390 B I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 PUBWEAK SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 393 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 394 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 395 B SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 PUBWEAK SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 398 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 399 SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 400 B SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 PUBWEAK USART1_IRQHandler
<> 144:ef7eb2e8f9f7 403 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 404 USART1_IRQHandler
<> 144:ef7eb2e8f9f7 405 B USART1_IRQHandler
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 PUBWEAK USART2_IRQHandler
<> 144:ef7eb2e8f9f7 408 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 409 USART2_IRQHandler
<> 144:ef7eb2e8f9f7 410 B USART2_IRQHandler
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 PUBWEAK EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 413 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 414 EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 415 B EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 PUBWEAK RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 418 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 419 RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 420 B RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 PUBWEAK OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 423 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 424 OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 425 B OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 PUBWEAK DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 428 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 429 DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 430 B DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 PUBWEAK SDIO_IRQHandler
<> 144:ef7eb2e8f9f7 433 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 434 SDIO_IRQHandler
<> 144:ef7eb2e8f9f7 435 B SDIO_IRQHandler
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 PUBWEAK TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 438 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 439 TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 440 B TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 PUBWEAK SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 443 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 444 SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 445 B SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 PUBWEAK DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 448 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 449 DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 450 B DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 PUBWEAK DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 453 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 454 DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 455 B DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 PUBWEAK DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 458 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 459 DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 460 B DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 461
<> 144:ef7eb2e8f9f7 462 PUBWEAK DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 463 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 464 DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 465 B DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 PUBWEAK DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 468 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 469 DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 470 B DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 PUBWEAK OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 473 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 474 OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 475 B OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 476
<> 144:ef7eb2e8f9f7 477 PUBWEAK DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 478 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 479 DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 480 B DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 PUBWEAK DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 483 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 484 DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 485 B DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 PUBWEAK DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 488 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 489 DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 490 B DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 491
<> 144:ef7eb2e8f9f7 492 PUBWEAK USART6_IRQHandler
<> 144:ef7eb2e8f9f7 493 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 494 USART6_IRQHandler
<> 144:ef7eb2e8f9f7 495 B USART6_IRQHandler
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 PUBWEAK I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 498 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 499 I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 500 B I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 PUBWEAK I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 503 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 504 I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 505 B I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 PUBWEAK FPU_IRQHandler
<> 144:ef7eb2e8f9f7 508 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 509 FPU_IRQHandler
<> 144:ef7eb2e8f9f7 510 B FPU_IRQHandler
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 PUBWEAK SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 513 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 514 SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 515 B SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 PUBWEAK SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 518 SECTION .text:CODE:REORDER:NOROOT(1)
<> 144:ef7eb2e8f9f7 519 SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 520 B SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 521
<> 144:ef7eb2e8f9f7 522 END
<> 144:ef7eb2e8f9f7 523 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/