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Fork of mbed-dev by mbed official

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
158:b23ee177fd68
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V2.6.1
AnnaBridge 167:e84263d55307 6 * @date 14-February-2017
<> 144:ef7eb2e8f9f7 7 * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * The file is the unique include file that the application programmer
<> 144:ef7eb2e8f9f7 10 * is using in the C source code, usually in main.c. This file contains:
<> 144:ef7eb2e8f9f7 11 * - Configuration section that allows to select:
<> 144:ef7eb2e8f9f7 12 * - The STM32F4xx device used in the target application
<> 144:ef7eb2e8f9f7 13 * - To use or not the peripheral's drivers in application code(i.e.
<> 144:ef7eb2e8f9f7 14 * code will be based on direct access to peripheral's registers
<> 144:ef7eb2e8f9f7 15 * rather than drivers API), this option is controlled by
<> 144:ef7eb2e8f9f7 16 * "#define USE_HAL_DRIVER"
<> 144:ef7eb2e8f9f7 17 *
<> 144:ef7eb2e8f9f7 18 ******************************************************************************
<> 144:ef7eb2e8f9f7 19 * @attention
<> 144:ef7eb2e8f9f7 20 *
AnnaBridge 167:e84263d55307 21 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 24 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 25 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 26 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 27 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 28 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 29 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 30 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 31 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 32 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 33 *
<> 144:ef7eb2e8f9f7 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 35 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 41 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 42 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 44 *
<> 144:ef7eb2e8f9f7 45 ******************************************************************************
<> 144:ef7eb2e8f9f7 46 */
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /** @addtogroup CMSIS
<> 144:ef7eb2e8f9f7 49 * @{
<> 144:ef7eb2e8f9f7 50 */
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /** @addtogroup stm32f4xx
<> 144:ef7eb2e8f9f7 53 * @{
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 #ifndef __STM32F4xx_H
<> 144:ef7eb2e8f9f7 57 #define __STM32F4xx_H
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 60 extern "C" {
<> 144:ef7eb2e8f9f7 61 #endif /* __cplusplus */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /** @addtogroup Library_configuration_section
<> 144:ef7eb2e8f9f7 64 * @{
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /**
<> 144:ef7eb2e8f9f7 68 * @brief STM32 Family
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70 #if !defined (STM32F4)
<> 144:ef7eb2e8f9f7 71 #define STM32F4
<> 144:ef7eb2e8f9f7 72 #endif /* STM32F4 */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /* Uncomment the line below according to the target STM32 device used in your
<> 144:ef7eb2e8f9f7 75 application
<> 144:ef7eb2e8f9f7 76 */
<> 144:ef7eb2e8f9f7 77 #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
<> 144:ef7eb2e8f9f7 78 !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
<> 144:ef7eb2e8f9f7 79 !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \
<> 144:ef7eb2e8f9f7 80 !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \
<> 144:ef7eb2e8f9f7 81 !defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \
AnnaBridge 167:e84263d55307 82 !defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx)
<> 144:ef7eb2e8f9f7 83 /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
<> 144:ef7eb2e8f9f7 84 /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
<> 144:ef7eb2e8f9f7 85 /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
<> 144:ef7eb2e8f9f7 86 /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
<> 144:ef7eb2e8f9f7 87 /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
<> 144:ef7eb2e8f9f7 88 /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
<> 144:ef7eb2e8f9f7 89 #define STM32F429xx /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
<> 144:ef7eb2e8f9f7 90 STM32F439NI, STM32F429IG and STM32F429II Devices */
<> 144:ef7eb2e8f9f7 91 /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
<> 144:ef7eb2e8f9f7 92 STM32F439NI, STM32F439IG and STM32F439II Devices */
<> 144:ef7eb2e8f9f7 93 /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
<> 144:ef7eb2e8f9f7 94 /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
<> 144:ef7eb2e8f9f7 95 /* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */
<> 144:ef7eb2e8f9f7 96 /* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
<> 144:ef7eb2e8f9f7 97 /* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */
<> 144:ef7eb2e8f9f7 98 /* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */
<> 144:ef7eb2e8f9f7 99 /* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,
<> 144:ef7eb2e8f9f7 100 and STM32F446ZE Devices */
<> 144:ef7eb2e8f9f7 101 /* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG,
<> 144:ef7eb2e8f9f7 102 STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */
<> 144:ef7eb2e8f9f7 103 /* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG
<> 144:ef7eb2e8f9f7 104 and STM32F479NG Devices */
<> 144:ef7eb2e8f9f7 105 /* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */
<> 144:ef7eb2e8f9f7 106 /* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */
<> 144:ef7eb2e8f9f7 107 /* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */
<> 144:ef7eb2e8f9f7 108 /* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */
AnnaBridge 167:e84263d55307 109 /* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG,
AnnaBridge 167:e84263d55307 110 STM32F413RG, STM32F413VG and STM32F413ZG Devices */
AnnaBridge 167:e84263d55307 111 /* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */
<> 144:ef7eb2e8f9f7 112 #endif
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /* Tip: To avoid modifying this file each time you need to switch between these
<> 144:ef7eb2e8f9f7 115 devices, you can define the device in your toolchain compiler preprocessor.
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 #if !defined (USE_HAL_DRIVER)
<> 144:ef7eb2e8f9f7 118 /**
<> 144:ef7eb2e8f9f7 119 * @brief Comment the line below if you will not use the peripherals drivers.
<> 144:ef7eb2e8f9f7 120 In this case, these drivers will not be included and the application code will
<> 144:ef7eb2e8f9f7 121 be based on direct access to peripherals registers
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123 #define USE_HAL_DRIVER
<> 144:ef7eb2e8f9f7 124 #endif /* USE_HAL_DRIVER */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /**
AnnaBridge 167:e84263d55307 127 * @brief CMSIS version number V2.6.1
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129 #define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
AnnaBridge 167:e84263d55307 130 #define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
AnnaBridge 167:e84263d55307 131 #define __STM32F4xx_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
<> 144:ef7eb2e8f9f7 132 #define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
<> 144:ef7eb2e8f9f7 133 #define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\
<> 144:ef7eb2e8f9f7 134 |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\
<> 144:ef7eb2e8f9f7 135 |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\
<> 144:ef7eb2e8f9f7 136 |(__STM32F4xx_CMSIS_VERSION))
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /**
<> 144:ef7eb2e8f9f7 139 * @}
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /** @addtogroup Device_Included
<> 144:ef7eb2e8f9f7 143 * @{
<> 144:ef7eb2e8f9f7 144 */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 #if defined(STM32F405xx)
<> 144:ef7eb2e8f9f7 147 #include "stm32f405xx.h"
<> 144:ef7eb2e8f9f7 148 #elif defined(STM32F415xx)
<> 144:ef7eb2e8f9f7 149 #include "stm32f415xx.h"
<> 144:ef7eb2e8f9f7 150 #elif defined(STM32F407xx)
<> 144:ef7eb2e8f9f7 151 #include "stm32f407xx.h"
<> 144:ef7eb2e8f9f7 152 #elif defined(STM32F417xx)
<> 144:ef7eb2e8f9f7 153 #include "stm32f417xx.h"
<> 144:ef7eb2e8f9f7 154 #elif defined(STM32F427xx)
<> 144:ef7eb2e8f9f7 155 #include "stm32f427xx.h"
<> 144:ef7eb2e8f9f7 156 #elif defined(STM32F437xx)
<> 144:ef7eb2e8f9f7 157 #include "stm32f437xx.h"
<> 144:ef7eb2e8f9f7 158 #elif defined(STM32F429xx)
<> 144:ef7eb2e8f9f7 159 #include "stm32f429xx.h"
<> 144:ef7eb2e8f9f7 160 #elif defined(STM32F439xx)
<> 144:ef7eb2e8f9f7 161 #include "stm32f439xx.h"
<> 144:ef7eb2e8f9f7 162 #elif defined(STM32F401xC)
<> 144:ef7eb2e8f9f7 163 #include "stm32f401xc.h"
<> 144:ef7eb2e8f9f7 164 #elif defined(STM32F401xE)
<> 144:ef7eb2e8f9f7 165 #include "stm32f401xe.h"
<> 144:ef7eb2e8f9f7 166 #elif defined(STM32F410Tx)
<> 144:ef7eb2e8f9f7 167 #include "stm32f410tx.h"
<> 144:ef7eb2e8f9f7 168 #elif defined(STM32F410Cx)
<> 144:ef7eb2e8f9f7 169 #include "stm32f410cx.h"
<> 144:ef7eb2e8f9f7 170 #elif defined(STM32F410Rx)
<> 144:ef7eb2e8f9f7 171 #include "stm32f410rx.h"
<> 144:ef7eb2e8f9f7 172 #elif defined(STM32F411xE)
<> 144:ef7eb2e8f9f7 173 #include "stm32f411xe.h"
<> 144:ef7eb2e8f9f7 174 #elif defined(STM32F446xx)
<> 144:ef7eb2e8f9f7 175 #include "stm32f446xx.h"
<> 144:ef7eb2e8f9f7 176 #elif defined(STM32F469xx)
<> 144:ef7eb2e8f9f7 177 #include "stm32f469xx.h"
<> 144:ef7eb2e8f9f7 178 #elif defined(STM32F479xx)
<> 144:ef7eb2e8f9f7 179 #include "stm32f479xx.h"
<> 144:ef7eb2e8f9f7 180 #elif defined(STM32F412Cx)
<> 144:ef7eb2e8f9f7 181 #include "stm32f412cx.h"
<> 144:ef7eb2e8f9f7 182 #elif defined(STM32F412Zx)
<> 144:ef7eb2e8f9f7 183 #include "stm32f412zx.h"
<> 144:ef7eb2e8f9f7 184 #elif defined(STM32F412Rx)
<> 144:ef7eb2e8f9f7 185 #include "stm32f412rx.h"
<> 144:ef7eb2e8f9f7 186 #elif defined(STM32F412Vx)
<> 144:ef7eb2e8f9f7 187 #include "stm32f412vx.h"
AnnaBridge 167:e84263d55307 188 #elif defined(STM32F413xx)
AnnaBridge 167:e84263d55307 189 #include "stm32f413xx.h"
AnnaBridge 167:e84263d55307 190 #elif defined(STM32F423xx)
AnnaBridge 167:e84263d55307 191 #include "stm32f423xx.h"
<> 144:ef7eb2e8f9f7 192 #else
<> 144:ef7eb2e8f9f7 193 #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
<> 144:ef7eb2e8f9f7 194 #endif
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /**
<> 144:ef7eb2e8f9f7 197 * @}
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /** @addtogroup Exported_types
<> 144:ef7eb2e8f9f7 201 * @{
<> 144:ef7eb2e8f9f7 202 */
<> 144:ef7eb2e8f9f7 203 typedef enum
<> 144:ef7eb2e8f9f7 204 {
<> 144:ef7eb2e8f9f7 205 RESET = 0U,
<> 144:ef7eb2e8f9f7 206 SET = !RESET
<> 144:ef7eb2e8f9f7 207 } FlagStatus, ITStatus;
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 typedef enum
<> 144:ef7eb2e8f9f7 210 {
<> 144:ef7eb2e8f9f7 211 DISABLE = 0U,
<> 144:ef7eb2e8f9f7 212 ENABLE = !DISABLE
<> 144:ef7eb2e8f9f7 213 } FunctionalState;
<> 144:ef7eb2e8f9f7 214 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 typedef enum
<> 144:ef7eb2e8f9f7 217 {
<> 144:ef7eb2e8f9f7 218 ERROR = 0U,
<> 144:ef7eb2e8f9f7 219 SUCCESS = !ERROR
<> 144:ef7eb2e8f9f7 220 } ErrorStatus;
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /**
<> 144:ef7eb2e8f9f7 223 * @}
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** @addtogroup Exported_macro
<> 144:ef7eb2e8f9f7 228 * @{
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230 #define SET_BIT(REG, BIT) ((REG) |= (BIT))
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 #define READ_BIT(REG, BIT) ((REG) & (BIT))
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 #define CLEAR_REG(REG) ((REG) = (0x0))
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 #define WRITE_REG(REG, VAL) ((REG) = (VAL))
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 #define READ_REG(REG) ((REG))
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 #if defined (USE_HAL_DRIVER)
<> 144:ef7eb2e8f9f7 252 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 253 #endif /* USE_HAL_DRIVER */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257 #endif /* __cplusplus */
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 #endif /* __STM32F4xx_H */
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @}
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/