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targets/TARGET_ONSEMI/TARGET_NCS36510/adc_sar.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 149:156823d33999
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /** |
<> | 149:156823d33999 | 2 | ****************************************************************************** |
<> | 149:156823d33999 | 3 | * @file adc_sar.h |
<> | 149:156823d33999 | 4 | * @internal |
<> | 149:156823d33999 | 5 | * @author ON Semiconductor |
<> | 149:156823d33999 | 6 | * $Rev: 3426 $ |
<> | 149:156823d33999 | 7 | * $Date: 2015-06-15 16:46:35 +0530 (Mon, 15 Jun 2015) $ |
<> | 149:156823d33999 | 8 | * @brief Definitions and API for the SAR ADC driver. |
<> | 149:156823d33999 | 9 | ****************************************************************************** |
<> | 149:156823d33999 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
<> | 149:156823d33999 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
<> | 149:156823d33999 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
<> | 149:156823d33999 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
<> | 149:156823d33999 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
<> | 149:156823d33999 | 15 | * if applicable the software license agreement. Do not use this software and/or |
<> | 149:156823d33999 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
<> | 149:156823d33999 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
<> | 149:156823d33999 | 18 | * terms and conditions. |
<> | 149:156823d33999 | 19 | * |
<> | 149:156823d33999 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 149:156823d33999 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 149:156823d33999 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 149:156823d33999 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 149:156823d33999 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 149:156823d33999 | 25 | * @endinternal |
<> | 149:156823d33999 | 26 | * |
<> | 149:156823d33999 | 27 | * @ingroup adc_sar |
<> | 149:156823d33999 | 28 | * |
<> | 149:156823d33999 | 29 | * @details |
<> | 149:156823d33999 | 30 | * <p> |
<> | 149:156823d33999 | 31 | * </p> |
<> | 149:156823d33999 | 32 | */ |
<> | 149:156823d33999 | 33 | |
<> | 149:156823d33999 | 34 | #ifndef ADC_DRIVER_H_ |
<> | 149:156823d33999 | 35 | #define ADC_DRIVER_H_ |
<> | 149:156823d33999 | 36 | |
<> | 149:156823d33999 | 37 | #include "adc_sar_map.h" |
<> | 149:156823d33999 | 38 | |
<> | 149:156823d33999 | 39 | #if DEVICE_ANALOGIN |
<> | 149:156823d33999 | 40 | |
<> | 149:156823d33999 | 41 | #ifdef __cplusplus |
<> | 149:156823d33999 | 42 | extern "C" { |
<> | 149:156823d33999 | 43 | #endif |
<> | 149:156823d33999 | 44 | |
<> | 149:156823d33999 | 45 | /* ADC register bits */ |
<> | 149:156823d33999 | 46 | #define ADC_CONTROL_MODE_BIT_POS 0 |
<> | 149:156823d33999 | 47 | #define ADC_CONTROL_MEASTYPE_BIT_POS 3 |
<> | 149:156823d33999 | 48 | #define ADC_CONTROL_INPUTSCALE_BIT_POS 4 |
<> | 149:156823d33999 | 49 | #define ADC_CONTROL_MEAS_CH_BIT_POS 8 |
<> | 149:156823d33999 | 50 | #define ADC_CONTROL_REF_CH_BIT_POS 12 |
<> | 149:156823d33999 | 51 | #define ADC_PRESCALE_VAL_BIT_POS 0 |
<> | 149:156823d33999 | 52 | #define ADC_PRESCALE_EN_BIT_POS 8 |
<> | 149:156823d33999 | 53 | #define ADC_DELAY_SAMPLE_RATE_BIT_POS 0 |
<> | 149:156823d33999 | 54 | #define ADC_DELAY_WARMUP_BIT_POS 16 |
<> | 149:156823d33999 | 55 | #define ADC_DELAY_SAMPLE_TIME_BIT_POS 24 |
<> | 149:156823d33999 | 56 | |
<> | 149:156823d33999 | 57 | typedef enum { |
<> | 149:156823d33999 | 58 | ADC_CHANNEL0 = 0, |
<> | 149:156823d33999 | 59 | ADC_CHANNEL1, |
<> | 149:156823d33999 | 60 | ADC_CHANNEL2, |
<> | 149:156823d33999 | 61 | ADC_CHANNEL3, |
<> | 149:156823d33999 | 62 | ADC_TEMPSENSR = 6, |
<> | 149:156823d33999 | 63 | ADC_BATTERY |
<> | 149:156823d33999 | 64 | } Type_RefCh_ConvCh; |
<> | 149:156823d33999 | 65 | |
<> | 149:156823d33999 | 66 | typedef enum { |
<> | 149:156823d33999 | 67 | ADC_RELATIVE_MEAS = 0, |
<> | 149:156823d33999 | 68 | ADC_ABSOLUTE_MEAS |
<> | 149:156823d33999 | 69 | } Type_Meastype; |
<> | 149:156823d33999 | 70 | |
<> | 149:156823d33999 | 71 | typedef enum { |
<> | 149:156823d33999 | 72 | ADC_SINGLE_SAMPLE = 0, |
<> | 149:156823d33999 | 73 | ADC_CONTINUOUS_SAMPLE |
<> | 149:156823d33999 | 74 | } Type_Mode; |
<> | 149:156823d33999 | 75 | |
<> | 149:156823d33999 | 76 | typedef enum { |
<> | 149:156823d33999 | 77 | ADC_INT_DISABLE = 0, |
<> | 149:156823d33999 | 78 | ADC_INT_ENABLE |
<> | 149:156823d33999 | 79 | } Type_Intrpt; |
<> | 149:156823d33999 | 80 | |
<> | 149:156823d33999 | 81 | typedef enum { |
<> | 149:156823d33999 | 82 | ADC_IP_SCALE_1_0 = 0, |
<> | 149:156823d33999 | 83 | ADC_IP_SCALE_0_6923, |
<> | 149:156823d33999 | 84 | ADC_IP_SCALE_0_5294, |
<> | 149:156823d33999 | 85 | ADC_IP_SCALE_0_4286, |
<> | 149:156823d33999 | 86 | ADC_IP_SCALE_0_3600, |
<> | 149:156823d33999 | 87 | ADC_IP_SCALE_0_3103, |
<> | 149:156823d33999 | 88 | ADC_IP_SCALE_0_2728, |
<> | 149:156823d33999 | 89 | ADC_IP_SCALE_0_2432 |
<> | 149:156823d33999 | 90 | } Ip_Scale_Type; |
<> | 149:156823d33999 | 91 | |
<> | 149:156823d33999 | 92 | void fAdcHandler(void); |
<> | 149:156823d33999 | 93 | |
<> | 149:156823d33999 | 94 | #ifdef __cplusplus |
<> | 149:156823d33999 | 95 | } |
<> | 149:156823d33999 | 96 | #endif |
<> | 149:156823d33999 | 97 | |
<> | 149:156823d33999 | 98 | #endif /* DEVICE_ANALOGIN */ |
<> | 149:156823d33999 | 99 | |
<> | 149:156823d33999 | 100 | #endif /* ADC_DRIVER_H_ */ |