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Fork of mbed-dev by mbed official

Committer:
mbed_official
Date:
Tue Apr 19 11:15:15 2016 +0100
Revision:
113:b3775bf36a83
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 896981126b34b6d9441e3eea77881c67a1ae3dbd

Full URL: https://github.com/mbedmicro/mbed/commit/896981126b34b6d9441e3eea77881c67a1ae3dbd/

Exporter tool addition for e2 studio

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 113:b3775bf36a83 1 ;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
bogdanm 0:9b334a45a8ff 2 ;* File Name : startup_stm32l053xx.s
bogdanm 0:9b334a45a8ff 3 ;* Author : MCD Application Team
mbed_official 113:b3775bf36a83 4 ;* Version : V1.5.0
mbed_official 113:b3775bf36a83 5 ;* Date : 8-January-2016
bogdanm 0:9b334a45a8ff 6 ;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
bogdanm 0:9b334a45a8ff 7 ;* This module performs:
bogdanm 0:9b334a45a8ff 8 ;* - Set the initial SP
bogdanm 0:9b334a45a8ff 9 ;* - Set the initial PC == Reset_Handler
bogdanm 0:9b334a45a8ff 10 ;* - Set the vector table entries with the exceptions ISR address
bogdanm 0:9b334a45a8ff 11 ;* - Branches to __main in the C library (which eventually
bogdanm 0:9b334a45a8ff 12 ;* calls main()).
bogdanm 0:9b334a45a8ff 13 ;* After Reset the Cortex-M0+ processor is in Thread mode,
bogdanm 0:9b334a45a8ff 14 ;* priority is Privileged, and the Stack is set to Main.
bogdanm 0:9b334a45a8ff 15 ;* <<< Use Configuration Wizard in Context Menu >>>
bogdanm 0:9b334a45a8ff 16 ;*******************************************************************************
bogdanm 0:9b334a45a8ff 17 ;*
bogdanm 0:9b334a45a8ff 18 ;* Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 19 ;* are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 20 ;* 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 21 ;* this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 23 ;* this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 24 ;* and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 26 ;* may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 27 ;* without specific prior written permission.
bogdanm 0:9b334a45a8ff 28 ;*
bogdanm 0:9b334a45a8ff 29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 39 ;*
bogdanm 0:9b334a45a8ff 40 ;*******************************************************************************
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 __initial_sp EQU 0x20002000 ; Top of RAM
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 PRESERVE8
bogdanm 0:9b334a45a8ff 45 THUMB
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 ; Vector Table Mapped to Address 0 at Reset
bogdanm 0:9b334a45a8ff 49 AREA RESET, DATA, READONLY
bogdanm 0:9b334a45a8ff 50 EXPORT __Vectors
bogdanm 0:9b334a45a8ff 51 EXPORT __Vectors_End
bogdanm 0:9b334a45a8ff 52 EXPORT __Vectors_Size
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 __Vectors DCD __initial_sp ; Top of Stack
bogdanm 0:9b334a45a8ff 55 DCD Reset_Handler ; Reset Handler
bogdanm 0:9b334a45a8ff 56 DCD NMI_Handler ; NMI Handler
bogdanm 0:9b334a45a8ff 57 DCD HardFault_Handler ; Hard Fault Handler
bogdanm 0:9b334a45a8ff 58 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 59 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 60 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 61 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 62 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 63 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 64 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 65 DCD SVC_Handler ; SVCall Handler
mbed_official 113:b3775bf36a83 66 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 67 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 68 DCD PendSV_Handler ; PendSV Handler
bogdanm 0:9b334a45a8ff 69 DCD SysTick_Handler ; SysTick Handler
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 ; External Interrupts
bogdanm 0:9b334a45a8ff 72 DCD WWDG_IRQHandler ; Window Watchdog
bogdanm 0:9b334a45a8ff 73 DCD PVD_IRQHandler ; PVD through EXTI Line detect
bogdanm 0:9b334a45a8ff 74 DCD RTC_IRQHandler ; RTC through EXTI Line
bogdanm 0:9b334a45a8ff 75 DCD FLASH_IRQHandler ; FLASH
bogdanm 0:9b334a45a8ff 76 DCD RCC_CRS_IRQHandler ; RCC and CRS
bogdanm 0:9b334a45a8ff 77 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
bogdanm 0:9b334a45a8ff 78 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
bogdanm 0:9b334a45a8ff 79 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
bogdanm 0:9b334a45a8ff 80 DCD TSC_IRQHandler ; TSC
bogdanm 0:9b334a45a8ff 81 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
bogdanm 0:9b334a45a8ff 82 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
bogdanm 0:9b334a45a8ff 83 DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
bogdanm 0:9b334a45a8ff 84 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
bogdanm 0:9b334a45a8ff 85 DCD LPTIM1_IRQHandler ; LPTIM1
bogdanm 0:9b334a45a8ff 86 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 87 DCD TIM2_IRQHandler ; TIM2
bogdanm 0:9b334a45a8ff 88 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 89 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
bogdanm 0:9b334a45a8ff 90 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 91 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 92 DCD TIM21_IRQHandler ; TIM21
bogdanm 0:9b334a45a8ff 93 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 94 DCD TIM22_IRQHandler ; TIM22
bogdanm 0:9b334a45a8ff 95 DCD I2C1_IRQHandler ; I2C1
bogdanm 0:9b334a45a8ff 96 DCD I2C2_IRQHandler ; I2C2
bogdanm 0:9b334a45a8ff 97 DCD SPI1_IRQHandler ; SPI1
bogdanm 0:9b334a45a8ff 98 DCD SPI2_IRQHandler ; SPI2
bogdanm 0:9b334a45a8ff 99 DCD USART1_IRQHandler ; USART1
bogdanm 0:9b334a45a8ff 100 DCD USART2_IRQHandler ; USART2
bogdanm 0:9b334a45a8ff 101 DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
bogdanm 0:9b334a45a8ff 102 DCD LCD_IRQHandler ; LCD
bogdanm 0:9b334a45a8ff 103 DCD USB_IRQHandler ; USB
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 __Vectors_End
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 __Vectors_Size EQU __Vectors_End - __Vectors
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 AREA |.text|, CODE, READONLY
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 ; Reset handler routine
bogdanm 0:9b334a45a8ff 112 Reset_Handler PROC
bogdanm 0:9b334a45a8ff 113 EXPORT Reset_Handler [WEAK]
bogdanm 0:9b334a45a8ff 114 IMPORT __main
bogdanm 0:9b334a45a8ff 115 IMPORT SystemInit
bogdanm 0:9b334a45a8ff 116 LDR R0, =SystemInit
bogdanm 0:9b334a45a8ff 117 BLX R0
bogdanm 0:9b334a45a8ff 118 LDR R0, =__main
bogdanm 0:9b334a45a8ff 119 BX R0
bogdanm 0:9b334a45a8ff 120 ENDP
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 ; Dummy Exception Handlers (infinite loops which can be modified)
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 NMI_Handler PROC
bogdanm 0:9b334a45a8ff 125 EXPORT NMI_Handler [WEAK]
bogdanm 0:9b334a45a8ff 126 B .
bogdanm 0:9b334a45a8ff 127 ENDP
bogdanm 0:9b334a45a8ff 128 HardFault_Handler\
bogdanm 0:9b334a45a8ff 129 PROC
bogdanm 0:9b334a45a8ff 130 EXPORT HardFault_Handler [WEAK]
bogdanm 0:9b334a45a8ff 131 B .
bogdanm 0:9b334a45a8ff 132 ENDP
bogdanm 0:9b334a45a8ff 133 SVC_Handler PROC
bogdanm 0:9b334a45a8ff 134 EXPORT SVC_Handler [WEAK]
bogdanm 0:9b334a45a8ff 135 B .
bogdanm 0:9b334a45a8ff 136 ENDP
bogdanm 0:9b334a45a8ff 137 PendSV_Handler PROC
bogdanm 0:9b334a45a8ff 138 EXPORT PendSV_Handler [WEAK]
bogdanm 0:9b334a45a8ff 139 B .
bogdanm 0:9b334a45a8ff 140 ENDP
bogdanm 0:9b334a45a8ff 141 SysTick_Handler PROC
bogdanm 0:9b334a45a8ff 142 EXPORT SysTick_Handler [WEAK]
bogdanm 0:9b334a45a8ff 143 B .
bogdanm 0:9b334a45a8ff 144 ENDP
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 Default_Handler PROC
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 EXPORT WWDG_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 149 EXPORT PVD_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 150 EXPORT RTC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 151 EXPORT FLASH_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 152 EXPORT RCC_CRS_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 153 EXPORT EXTI0_1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 154 EXPORT EXTI2_3_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 155 EXPORT EXTI4_15_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 156 EXPORT TSC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 157 EXPORT DMA1_Channel1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 158 EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 159 EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 160 EXPORT ADC1_COMP_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 161 EXPORT LPTIM1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 162 EXPORT TIM2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 163 EXPORT TIM6_DAC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 164 EXPORT TIM21_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 165 EXPORT TIM22_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 166 EXPORT I2C1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 167 EXPORT I2C2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 168 EXPORT SPI1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 169 EXPORT SPI2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 170 EXPORT USART1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 171 EXPORT USART2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 172 EXPORT RNG_LPUART1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 173 EXPORT LCD_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 174 EXPORT USB_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 WWDG_IRQHandler
bogdanm 0:9b334a45a8ff 178 PVD_IRQHandler
bogdanm 0:9b334a45a8ff 179 RTC_IRQHandler
bogdanm 0:9b334a45a8ff 180 FLASH_IRQHandler
bogdanm 0:9b334a45a8ff 181 RCC_CRS_IRQHandler
bogdanm 0:9b334a45a8ff 182 EXTI0_1_IRQHandler
bogdanm 0:9b334a45a8ff 183 EXTI2_3_IRQHandler
bogdanm 0:9b334a45a8ff 184 EXTI4_15_IRQHandler
bogdanm 0:9b334a45a8ff 185 TSC_IRQHandler
bogdanm 0:9b334a45a8ff 186 DMA1_Channel1_IRQHandler
bogdanm 0:9b334a45a8ff 187 DMA1_Channel2_3_IRQHandler
bogdanm 0:9b334a45a8ff 188 DMA1_Channel4_5_6_7_IRQHandler
bogdanm 0:9b334a45a8ff 189 ADC1_COMP_IRQHandler
bogdanm 0:9b334a45a8ff 190 LPTIM1_IRQHandler
bogdanm 0:9b334a45a8ff 191 TIM2_IRQHandler
bogdanm 0:9b334a45a8ff 192 TIM6_DAC_IRQHandler
bogdanm 0:9b334a45a8ff 193 TIM21_IRQHandler
bogdanm 0:9b334a45a8ff 194 TIM22_IRQHandler
bogdanm 0:9b334a45a8ff 195 I2C1_IRQHandler
bogdanm 0:9b334a45a8ff 196 I2C2_IRQHandler
bogdanm 0:9b334a45a8ff 197 SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 198 SPI2_IRQHandler
bogdanm 0:9b334a45a8ff 199 USART1_IRQHandler
bogdanm 0:9b334a45a8ff 200 USART2_IRQHandler
bogdanm 0:9b334a45a8ff 201 RNG_LPUART1_IRQHandler
bogdanm 0:9b334a45a8ff 202 LCD_IRQHandler
bogdanm 0:9b334a45a8ff 203 USB_IRQHandler
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 B .
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 ENDP
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 ALIGN
bogdanm 0:9b334a45a8ff 210 END
mbed_official 113:b3775bf36a83 211
mbed_official 113:b3775bf36a83 212 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****