Amit Gandhi / sensen_copy_2

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Fork of mbed-dev by mbed official

targets/TARGET_Silicon_Labs/TARGET_EFM32/us_ticker.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/us_ticker.c@148:21d94c44109e
Child:
150:02e0a0aed4ec
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file us_ticker.c
<> 144:ef7eb2e8f9f7 3 *******************************************************************************
<> 144:ef7eb2e8f9f7 4 * @section License
<> 148:21d94c44109e 5 * <b>(C) Copyright 2016 Silicon Labs, http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * SPDX-License-Identifier: Apache-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 144:ef7eb2e8f9f7 11 * not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 12 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 144:ef7eb2e8f9f7 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 19 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 20 * limitations under the License.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 ******************************************************************************/
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 #include <stddef.h>
<> 144:ef7eb2e8f9f7 25 #include "us_ticker_api.h"
<> 144:ef7eb2e8f9f7 26 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 27 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 28 #include "em_cmu.h"
<> 144:ef7eb2e8f9f7 29 #include "em_timer.h"
<> 144:ef7eb2e8f9f7 30 #include "device_peripherals.h"
<> 144:ef7eb2e8f9f7 31 #include "device.h"
<> 144:ef7eb2e8f9f7 32 #include "clocking.h"
<> 144:ef7eb2e8f9f7 33 #include "sleep_api.h"
<> 144:ef7eb2e8f9f7 34 #include "sleepmodes.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 #define TIMER_LEAST_ACTIVE_SLEEPMODE EM1
<> 144:ef7eb2e8f9f7 37 /**
<> 144:ef7eb2e8f9f7 38 * Timer functions for microsecond ticker.
<> 144:ef7eb2e8f9f7 39 * mbed expects a 32-bit timer. Since the EFM32 only has 16-bit timers,
<> 144:ef7eb2e8f9f7 40 * the upper 16 bits are implemented in software.
<> 144:ef7eb2e8f9f7 41 */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 static uint8_t us_ticker_inited = 0; // Is ticker initialized yet
<> 144:ef7eb2e8f9f7 44
<> 148:21d94c44109e 45 static volatile uint32_t ticker_cnt = 0; //Internal overflow count, used to extend internal 16-bit counter to (MHz * 32-bit)
<> 144:ef7eb2e8f9f7 46 static volatile uint32_t ticker_int_cnt = 0; //Amount of overflows until user interrupt
<> 144:ef7eb2e8f9f7 47 static volatile uint8_t ticker_freq_mhz = 0; //Frequency of timer in MHz
<> 148:21d94c44109e 48 static volatile uint32_t ticker_top_us = 0; //Amount of us corresponding to the top value of the timer
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 void us_ticker_irq_handler_internal(void)
<> 144:ef7eb2e8f9f7 51 {
<> 148:21d94c44109e 52 /* Handle timer overflow */
<> 148:21d94c44109e 53 if (TIMER_IntGet(US_TICKER_TIMER) & TIMER_IF_OF) {
<> 148:21d94c44109e 54 ticker_cnt++;
<> 148:21d94c44109e 55 if(ticker_cnt >= ((uint32_t)ticker_freq_mhz << 16)) ticker_cnt = 0;
<> 148:21d94c44109e 56 TIMER_IntClear(US_TICKER_TIMER, TIMER_IF_OF);
<> 148:21d94c44109e 57 }
<> 148:21d94c44109e 58
<> 144:ef7eb2e8f9f7 59 /* Check for user interrupt expiration */
<> 144:ef7eb2e8f9f7 60 if (TIMER_IntGet(US_TICKER_TIMER) & TIMER_IF_CC0) {
<> 148:21d94c44109e 61 if (ticker_int_cnt > 0) {
<> 144:ef7eb2e8f9f7 62 ticker_int_cnt--;
<> 144:ef7eb2e8f9f7 63 TIMER_IntClear(US_TICKER_TIMER, TIMER_IF_CC0);
<> 144:ef7eb2e8f9f7 64 } else {
<> 144:ef7eb2e8f9f7 65 us_ticker_irq_handler();
<> 144:ef7eb2e8f9f7 66 }
<> 144:ef7eb2e8f9f7 67 }
<> 144:ef7eb2e8f9f7 68 }
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 void us_ticker_init(void)
<> 144:ef7eb2e8f9f7 71 {
<> 144:ef7eb2e8f9f7 72 if (us_ticker_inited) {
<> 144:ef7eb2e8f9f7 73 return;
<> 144:ef7eb2e8f9f7 74 }
<> 144:ef7eb2e8f9f7 75 us_ticker_inited = 1;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /* Enable clock for TIMERs */
<> 144:ef7eb2e8f9f7 78 CMU_ClockEnable(US_TICKER_TIMER_CLOCK, true);
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /* Clear TIMER counter value */
<> 144:ef7eb2e8f9f7 81 TIMER_CounterSet(US_TICKER_TIMER, 0);
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /* Get frequency of clock in MHz for scaling ticks to microseconds */
<> 144:ef7eb2e8f9f7 84 ticker_freq_mhz = (REFERENCE_FREQUENCY / 1000000);
<> 144:ef7eb2e8f9f7 85 MBED_ASSERT(ticker_freq_mhz > 0);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /*
<> 144:ef7eb2e8f9f7 88 * Calculate maximum prescaler that gives at least 1 MHz frequency, while keeping clock as an integer multiple of 1 MHz.
<> 144:ef7eb2e8f9f7 89 * Example: 14 MHz => prescaler = 1 (i.e. DIV2), ticker_freq_mhz = 7;
<> 144:ef7eb2e8f9f7 90 * 24 MHz => prescaler = 3 (i.e. DIV8), ticker_freq_mhz = 3;
<> 144:ef7eb2e8f9f7 91 * 48 MHz => prescaler = 4 (i.e. DIV16), ticker_freq_mhz = 3;
<> 144:ef7eb2e8f9f7 92 * Limit prescaling to maximum prescaler value, which is 10 (DIV1024).
<> 144:ef7eb2e8f9f7 93 */
<> 144:ef7eb2e8f9f7 94 uint32_t prescaler = 0;
<> 144:ef7eb2e8f9f7 95 while((ticker_freq_mhz & 1) == 0 && prescaler <= 10) {
<> 144:ef7eb2e8f9f7 96 ticker_freq_mhz = ticker_freq_mhz >> 1;
<> 144:ef7eb2e8f9f7 97 prescaler++;
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /* Set prescaler */
<> 144:ef7eb2e8f9f7 101 US_TICKER_TIMER->CTRL = (US_TICKER_TIMER->CTRL & ~_TIMER_CTRL_PRESC_MASK) | (prescaler << _TIMER_CTRL_PRESC_SHIFT);
<> 144:ef7eb2e8f9f7 102
<> 148:21d94c44109e 103 /* calculate top value */
<> 148:21d94c44109e 104 ticker_top_us = (uint32_t) 0x10000 / ticker_freq_mhz;
<> 148:21d94c44109e 105
<> 144:ef7eb2e8f9f7 106 /* Select Compare Channel parameters */
<> 144:ef7eb2e8f9f7 107 TIMER_InitCC_TypeDef timerCCInit = TIMER_INITCC_DEFAULT;
<> 144:ef7eb2e8f9f7 108 timerCCInit.mode = timerCCModeCompare;
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /* Configure Compare Channel 0 */
<> 144:ef7eb2e8f9f7 111 TIMER_InitCC(US_TICKER_TIMER, 0, &timerCCInit);
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /* Enable interrupt vector in NVIC */
<> 144:ef7eb2e8f9f7 114 TIMER_IntEnable(US_TICKER_TIMER, TIMER_IEN_OF);
<> 144:ef7eb2e8f9f7 115 NVIC_SetVector(US_TICKER_TIMER_IRQ, (uint32_t) us_ticker_irq_handler_internal);
<> 144:ef7eb2e8f9f7 116 NVIC_EnableIRQ(US_TICKER_TIMER_IRQ);
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /* Set top value */
<> 148:21d94c44109e 119 TIMER_TopSet(US_TICKER_TIMER, (ticker_top_us * ticker_freq_mhz) - 1);
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 /* Start TIMER */
<> 144:ef7eb2e8f9f7 122 TIMER_Enable(US_TICKER_TIMER, true);
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 uint32_t us_ticker_read()
<> 144:ef7eb2e8f9f7 126 {
<> 148:21d94c44109e 127 uint32_t countH_old, countH;
<> 148:21d94c44109e 128 uint16_t countL;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 if (!us_ticker_inited) {
<> 144:ef7eb2e8f9f7 131 us_ticker_init();
<> 144:ef7eb2e8f9f7 132 }
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /* Avoid jumping in time by reading high bits twice */
<> 144:ef7eb2e8f9f7 135 do {
<> 144:ef7eb2e8f9f7 136 countH_old = ticker_cnt;
<> 144:ef7eb2e8f9f7 137 if (TIMER_IntGet(US_TICKER_TIMER) & TIMER_IF_OF) {
<> 148:21d94c44109e 138 countH_old++;
<> 144:ef7eb2e8f9f7 139 }
<> 144:ef7eb2e8f9f7 140 countL = US_TICKER_TIMER->CNT;
<> 144:ef7eb2e8f9f7 141 countH = ticker_cnt;
<> 144:ef7eb2e8f9f7 142 if (TIMER_IntGet(US_TICKER_TIMER) & TIMER_IF_OF) {
<> 148:21d94c44109e 143 countH++;
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145 } while (countH_old != countH);
<> 144:ef7eb2e8f9f7 146
<> 148:21d94c44109e 147 /* Timer count value needs to be div'ed by the frequency to get to 1MHz ticks.
<> 148:21d94c44109e 148 * For the software-extended part, the amount of us in one overflow is constant.
<> 148:21d94c44109e 149 */
<> 148:21d94c44109e 150 return (countL / ticker_freq_mhz) + (countH * ticker_top_us);
<> 144:ef7eb2e8f9f7 151 }
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 144:ef7eb2e8f9f7 154 {
<> 148:21d94c44109e 155 uint64_t goal = timestamp;
<> 148:21d94c44109e 156 uint32_t trigger;
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 if((US_TICKER_TIMER->IEN & TIMER_IEN_CC0) == 0) {
<> 144:ef7eb2e8f9f7 159 //Timer was disabled, but is going to be enabled. Set sleep mode.
<> 144:ef7eb2e8f9f7 160 blockSleepMode(TIMER_LEAST_ACTIVE_SLEEPMODE);
<> 144:ef7eb2e8f9f7 161 }
<> 144:ef7eb2e8f9f7 162 TIMER_IntDisable(US_TICKER_TIMER, TIMER_IEN_CC0);
<> 144:ef7eb2e8f9f7 163
<> 148:21d94c44109e 164 /* convert us delta value back to timer ticks */
<> 148:21d94c44109e 165 goal -= us_ticker_read();
<> 148:21d94c44109e 166 trigger = US_TICKER_TIMER->CNT;
<> 148:21d94c44109e 167
<> 148:21d94c44109e 168 /* Catch "Going back in time" */
<> 148:21d94c44109e 169 if(goal < (50 / (REFERENCE_FREQUENCY / 1000000)) ||
<> 148:21d94c44109e 170 goal >= 0xFFFFFF00UL) {
<> 148:21d94c44109e 171 TIMER_IntClear(US_TICKER_TIMER, TIMER_IFC_CC0);
<> 148:21d94c44109e 172 TIMER_CompareSet(US_TICKER_TIMER, 0, (US_TICKER_TIMER->CNT + 3 > US_TICKER_TIMER->TOP ? 3 : US_TICKER_TIMER->CNT + 3));
<> 148:21d94c44109e 173 TIMER_IntEnable(US_TICKER_TIMER, TIMER_IEN_CC0);
<> 148:21d94c44109e 174 return;
<> 144:ef7eb2e8f9f7 175 }
<> 144:ef7eb2e8f9f7 176
<> 148:21d94c44109e 177 /* Cap at 32 bit */
<> 148:21d94c44109e 178 goal &= 0xFFFFFFFFUL;
<> 148:21d94c44109e 179 /* Convert to ticker timebase */
<> 148:21d94c44109e 180 goal *= ticker_freq_mhz;
<> 144:ef7eb2e8f9f7 181
<> 148:21d94c44109e 182 /* Note: we should actually populate the following fields by the division and remainder
<> 148:21d94c44109e 183 * of goal / ticks_per_overflow, but since we're keeping the frequency as low
<> 148:21d94c44109e 184 * as possible, and ticks_per_overflow as close to FFFF as possible, we can
<> 148:21d94c44109e 185 * get away with ditching the division here and saving cycles.
<> 148:21d94c44109e 186 *
<> 148:21d94c44109e 187 * "exact" implementation:
<> 148:21d94c44109e 188 * ticker_int_cnt = goal / TIMER_TopGet(US_TICKER_TIMER);
<> 148:21d94c44109e 189 * ticker_int_rem = goal % TIMER_TopGet(US_TICKER_TIMER);
<> 148:21d94c44109e 190 */
<> 148:21d94c44109e 191 ticker_int_cnt = (goal >> 16) & 0xFFFFFFFF;
<> 144:ef7eb2e8f9f7 192
<> 148:21d94c44109e 193 /* Set compare channel 0 to (current position + lower 16 bits of target).
<> 148:21d94c44109e 194 * When lower 16 bits match, run complete cycles with ticker_int_rem as trigger value
<> 148:21d94c44109e 195 * for ticker_int_cnt times. */
<> 148:21d94c44109e 196 TIMER_IntClear(US_TICKER_TIMER, TIMER_IFC_CC0);
<> 148:21d94c44109e 197
<> 148:21d94c44109e 198 /* Take top of timer into account so that we don't end up missing a cycle */
<> 148:21d94c44109e 199 /* Set trigger point by adding delta to current time */
<> 148:21d94c44109e 200 if((goal & 0xFFFF) >= TIMER_TopGet(US_TICKER_TIMER)) {
<> 148:21d94c44109e 201 trigger += (goal & 0xFFFF) - TIMER_TopGet(US_TICKER_TIMER);
<> 148:21d94c44109e 202 ticker_int_cnt++;
<> 144:ef7eb2e8f9f7 203 } else {
<> 148:21d94c44109e 204 trigger += (goal & 0xFFFF);
<> 144:ef7eb2e8f9f7 205 }
<> 148:21d94c44109e 206
<> 148:21d94c44109e 207 if(trigger >= TIMER_TopGet(US_TICKER_TIMER)) {
<> 148:21d94c44109e 208 trigger -= TIMER_TopGet(US_TICKER_TIMER);
<> 148:21d94c44109e 209 }
<> 148:21d94c44109e 210
<> 148:21d94c44109e 211 TIMER_CompareSet(US_TICKER_TIMER, 0, trigger);
<> 148:21d94c44109e 212
<> 144:ef7eb2e8f9f7 213 TIMER_IntEnable(US_TICKER_TIMER, TIMER_IEN_CC0);
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 void us_ticker_disable_interrupt(void)
<> 144:ef7eb2e8f9f7 217 {
<> 144:ef7eb2e8f9f7 218 if((US_TICKER_TIMER->IEN & TIMER_IEN_CC0) != 0) {
<> 144:ef7eb2e8f9f7 219 //Timer was enabled, but is going to get disabled. Clear sleepmode.
<> 144:ef7eb2e8f9f7 220 unblockSleepMode(TIMER_LEAST_ACTIVE_SLEEPMODE);
<> 144:ef7eb2e8f9f7 221 }
<> 144:ef7eb2e8f9f7 222 /* Disable compare channel interrupts */
<> 144:ef7eb2e8f9f7 223 TIMER_IntDisable(US_TICKER_TIMER, TIMER_IEN_CC0);
<> 144:ef7eb2e8f9f7 224 }
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 void us_ticker_clear_interrupt(void)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 /* Clear compare channel interrupts */
<> 144:ef7eb2e8f9f7 229 TIMER_IntClear(US_TICKER_TIMER, TIMER_IFC_CC0);
<> 144:ef7eb2e8f9f7 230 }