Amit Gandhi / sensen_copy_2

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targets/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/tc/tc.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/tc/tc.c@107:414e9c822e99 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 107:414e9c822e99 1 /**
mbed_official 107:414e9c822e99 2 * \file
mbed_official 107:414e9c822e99 3 *
mbed_official 107:414e9c822e99 4 * \brief SAM Timer Counter (TC) driver.
mbed_official 107:414e9c822e99 5 *
mbed_official 107:414e9c822e99 6 * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
mbed_official 107:414e9c822e99 7 *
mbed_official 107:414e9c822e99 8 * \asf_license_start
mbed_official 107:414e9c822e99 9 *
mbed_official 107:414e9c822e99 10 * \page License
mbed_official 107:414e9c822e99 11 *
mbed_official 107:414e9c822e99 12 * Redistribution and use in source and binary forms, with or without
mbed_official 107:414e9c822e99 13 * modification, are permitted provided that the following conditions are met:
mbed_official 107:414e9c822e99 14 *
mbed_official 107:414e9c822e99 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 107:414e9c822e99 16 * this list of conditions and the following disclaimer.
mbed_official 107:414e9c822e99 17 *
mbed_official 107:414e9c822e99 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 107:414e9c822e99 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 107:414e9c822e99 20 * and/or other materials provided with the distribution.
mbed_official 107:414e9c822e99 21 *
mbed_official 107:414e9c822e99 22 * 3. The name of Atmel may not be used to endorse or promote products derived
mbed_official 107:414e9c822e99 23 * from this software without specific prior written permission.
mbed_official 107:414e9c822e99 24 *
mbed_official 107:414e9c822e99 25 * 4. This software may only be redistributed and used in connection with an
mbed_official 107:414e9c822e99 26 * Atmel microcontroller product.
mbed_official 107:414e9c822e99 27 *
mbed_official 107:414e9c822e99 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
mbed_official 107:414e9c822e99 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
mbed_official 107:414e9c822e99 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
mbed_official 107:414e9c822e99 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
mbed_official 107:414e9c822e99 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 107:414e9c822e99 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
mbed_official 107:414e9c822e99 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
mbed_official 107:414e9c822e99 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
mbed_official 107:414e9c822e99 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 107:414e9c822e99 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 107:414e9c822e99 38 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 107:414e9c822e99 39 *
mbed_official 107:414e9c822e99 40 * \asf_license_stop
mbed_official 107:414e9c822e99 41 *
mbed_official 107:414e9c822e99 42 */
mbed_official 107:414e9c822e99 43 /*
mbed_official 107:414e9c822e99 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
mbed_official 107:414e9c822e99 45 */
mbed_official 107:414e9c822e99 46
mbed_official 107:414e9c822e99 47 #include <assert.h>
mbed_official 107:414e9c822e99 48 #include "tc.h"
mbed_official 107:414e9c822e99 49
mbed_official 107:414e9c822e99 50 /// @cond
mbed_official 107:414e9c822e99 51 /**INDENT-OFF**/
mbed_official 107:414e9c822e99 52 #ifdef __cplusplus
mbed_official 107:414e9c822e99 53 extern "C" {
mbed_official 107:414e9c822e99 54 #endif
mbed_official 107:414e9c822e99 55 /**INDENT-ON**/
mbed_official 107:414e9c822e99 56 /// @endcond
mbed_official 107:414e9c822e99 57
mbed_official 107:414e9c822e99 58 #ifndef TC_WPMR_WPKEY_PASSWD
mbed_official 107:414e9c822e99 59 #define TC_WPMR_WPKEY_PASSWD TC_WPMR_WPKEY((uint32_t)0x54494D)
mbed_official 107:414e9c822e99 60 #endif
mbed_official 107:414e9c822e99 61
mbed_official 107:414e9c822e99 62 /**
mbed_official 107:414e9c822e99 63 * \brief Configure TC for timer, waveform generation, or capture.
mbed_official 107:414e9c822e99 64 *
mbed_official 107:414e9c822e99 65 * \param[in,out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 66 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 67 * \param[in] ul_mode Control mode register bitmask value to set
mbed_official 107:414e9c822e99 68 *
mbed_official 107:414e9c822e99 69 * \note For more information regarding <i>ul_mode</i> configuration refer to
mbed_official 107:414e9c822e99 70 * the section entitled "Channel Mode Register: Capture Mode" and/or section
mbed_official 107:414e9c822e99 71 * "Waveform Operating Mode" in the device-specific datasheet.
mbed_official 107:414e9c822e99 72 *
mbed_official 107:414e9c822e99 73 * \note If the TC is configured for waveform generation then the external event
mbed_official 107:414e9c822e99 74 * selection (EEVT) should only be set to TC_CMR_EEVT_TIOB, or the
mbed_official 107:414e9c822e99 75 * equivalent value of 0, if it really is the intention to use TIOB as an
mbed_official 107:414e9c822e99 76 * external event trigger. This is because this setting forces TIOB to be
mbed_official 107:414e9c822e99 77 * an input, even if the external event trigger has not been enabled with
mbed_official 107:414e9c822e99 78 * TC_CMR_ENETRG, and thus prevents normal operation of TIOB.
mbed_official 107:414e9c822e99 79 */
mbed_official 107:414e9c822e99 80 void tc_init(
mbed_official 107:414e9c822e99 81 Tc *p_tc,
mbed_official 107:414e9c822e99 82 uint32_t ul_channel,
mbed_official 107:414e9c822e99 83 uint32_t ul_mode)
mbed_official 107:414e9c822e99 84 {
mbed_official 107:414e9c822e99 85 TcChannel *tc_channel;
mbed_official 107:414e9c822e99 86
mbed_official 107:414e9c822e99 87 /* Validate inputs. */
mbed_official 107:414e9c822e99 88 Assert(p_tc);
mbed_official 107:414e9c822e99 89 Assert(ul_channel <
mbed_official 107:414e9c822e99 90 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 91 tc_channel = p_tc->TC_CHANNEL + ul_channel;
mbed_official 107:414e9c822e99 92
mbed_official 107:414e9c822e99 93 /* Disable TC clock. */
mbed_official 107:414e9c822e99 94 tc_channel->TC_CCR = TC_CCR_CLKDIS;
mbed_official 107:414e9c822e99 95
mbed_official 107:414e9c822e99 96 /* Disable interrupts. */
mbed_official 107:414e9c822e99 97 tc_channel->TC_IDR = 0xFFFFFFFF;
mbed_official 107:414e9c822e99 98
mbed_official 107:414e9c822e99 99 /* Clear status register. */
mbed_official 107:414e9c822e99 100 tc_channel->TC_SR;
mbed_official 107:414e9c822e99 101
mbed_official 107:414e9c822e99 102 /* Set mode. */
mbed_official 107:414e9c822e99 103 tc_channel->TC_CMR = ul_mode;
mbed_official 107:414e9c822e99 104 }
mbed_official 107:414e9c822e99 105
mbed_official 107:414e9c822e99 106 /**
mbed_official 107:414e9c822e99 107 * \brief Asserts a SYNC signal to generate a software trigger on
mbed_official 107:414e9c822e99 108 * all channels.
mbed_official 107:414e9c822e99 109 *
mbed_official 107:414e9c822e99 110 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 111 *
mbed_official 107:414e9c822e99 112 */
mbed_official 107:414e9c822e99 113 void tc_sync_trigger(
mbed_official 107:414e9c822e99 114 Tc *p_tc)
mbed_official 107:414e9c822e99 115 {
mbed_official 107:414e9c822e99 116 /* Validate inputs. */
mbed_official 107:414e9c822e99 117 Assert(p_tc);
mbed_official 107:414e9c822e99 118
mbed_official 107:414e9c822e99 119 p_tc->TC_BCR = TC_BCR_SYNC;
mbed_official 107:414e9c822e99 120 }
mbed_official 107:414e9c822e99 121
mbed_official 107:414e9c822e99 122 /**
mbed_official 107:414e9c822e99 123 * \brief Configure the TC Block mode.
mbed_official 107:414e9c822e99 124 *
mbed_official 107:414e9c822e99 125 * \note The function tc_init() must be called prior to this one.
mbed_official 107:414e9c822e99 126 *
mbed_official 107:414e9c822e99 127 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 128 * \param[in] ul_blockmode Block mode register value to set
mbed_official 107:414e9c822e99 129 *
mbed_official 107:414e9c822e99 130 * \note For more information regarding <i>ul_blockmode</i> configuration refer to
mbed_official 107:414e9c822e99 131 * the section entitled "TC Block Mode Register" in the device-specific datasheet.
mbed_official 107:414e9c822e99 132 */
mbed_official 107:414e9c822e99 133 void tc_set_block_mode(
mbed_official 107:414e9c822e99 134 Tc *p_tc,
mbed_official 107:414e9c822e99 135 uint32_t ul_blockmode)
mbed_official 107:414e9c822e99 136 {
mbed_official 107:414e9c822e99 137 /* Validate inputs. */
mbed_official 107:414e9c822e99 138 Assert(p_tc);
mbed_official 107:414e9c822e99 139
mbed_official 107:414e9c822e99 140 p_tc->TC_BMR = ul_blockmode;
mbed_official 107:414e9c822e99 141 }
mbed_official 107:414e9c822e99 142
mbed_official 107:414e9c822e99 143 #if (!SAM3U) || defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 144
mbed_official 107:414e9c822e99 145 /**
mbed_official 107:414e9c822e99 146 * \brief Configure TC for 2-bit Gray Counter for Stepper Motor.
mbed_official 107:414e9c822e99 147 * \note The function tc_init() must be called prior to this one.
mbed_official 107:414e9c822e99 148 *
mbed_official 107:414e9c822e99 149 * \note This function is not available on SAM3U devices.
mbed_official 107:414e9c822e99 150 *
mbed_official 107:414e9c822e99 151 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 152 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 153 * \param[in] ul_steppermode Stepper motor mode register value to set
mbed_official 107:414e9c822e99 154 *
mbed_official 107:414e9c822e99 155 * \return 0 for OK.
mbed_official 107:414e9c822e99 156 */
mbed_official 107:414e9c822e99 157 uint32_t tc_init_2bit_gray(
mbed_official 107:414e9c822e99 158 Tc *p_tc,
mbed_official 107:414e9c822e99 159 uint32_t ul_channel,
mbed_official 107:414e9c822e99 160 uint32_t ul_steppermode)
mbed_official 107:414e9c822e99 161 {
mbed_official 107:414e9c822e99 162 /* Validate inputs. */
mbed_official 107:414e9c822e99 163 Assert(p_tc);
mbed_official 107:414e9c822e99 164 Assert(ul_channel <
mbed_official 107:414e9c822e99 165 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 166
mbed_official 107:414e9c822e99 167 p_tc->TC_CHANNEL[ul_channel].TC_SMMR = ul_steppermode;
mbed_official 107:414e9c822e99 168 return 0;
mbed_official 107:414e9c822e99 169 }
mbed_official 107:414e9c822e99 170
mbed_official 107:414e9c822e99 171 #endif /* (!SAM3U) || defined(__DOXYGEN__) */
mbed_official 107:414e9c822e99 172
mbed_official 107:414e9c822e99 173 /**
mbed_official 107:414e9c822e99 174 * \brief Start the TC clock on the specified channel.
mbed_official 107:414e9c822e99 175 *
mbed_official 107:414e9c822e99 176 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 177 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 178 */
mbed_official 107:414e9c822e99 179 void tc_start(
mbed_official 107:414e9c822e99 180 Tc *p_tc,
mbed_official 107:414e9c822e99 181 uint32_t ul_channel)
mbed_official 107:414e9c822e99 182 {
mbed_official 107:414e9c822e99 183 /* Validate inputs. */
mbed_official 107:414e9c822e99 184 Assert(p_tc);
mbed_official 107:414e9c822e99 185 Assert(ul_channel <
mbed_official 107:414e9c822e99 186 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 187
mbed_official 107:414e9c822e99 188 p_tc->TC_CHANNEL[ul_channel].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
mbed_official 107:414e9c822e99 189 }
mbed_official 107:414e9c822e99 190
mbed_official 107:414e9c822e99 191 /**
mbed_official 107:414e9c822e99 192 * \brief Stop the TC clock on the specified channel.
mbed_official 107:414e9c822e99 193 *
mbed_official 107:414e9c822e99 194 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 195 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 196 */
mbed_official 107:414e9c822e99 197 void tc_stop(
mbed_official 107:414e9c822e99 198 Tc *p_tc,
mbed_official 107:414e9c822e99 199 uint32_t ul_channel)
mbed_official 107:414e9c822e99 200 {
mbed_official 107:414e9c822e99 201 /* Validate inputs. */
mbed_official 107:414e9c822e99 202 Assert(p_tc);
mbed_official 107:414e9c822e99 203 Assert(ul_channel <
mbed_official 107:414e9c822e99 204 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 205
mbed_official 107:414e9c822e99 206 p_tc->TC_CHANNEL[ul_channel].TC_CCR = TC_CCR_CLKDIS;
mbed_official 107:414e9c822e99 207 }
mbed_official 107:414e9c822e99 208
mbed_official 107:414e9c822e99 209 /**
mbed_official 107:414e9c822e99 210 * \brief Read the counter value on the specified channel.
mbed_official 107:414e9c822e99 211 *
mbed_official 107:414e9c822e99 212 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 213 * \param[in] ul_channel Channel to read
mbed_official 107:414e9c822e99 214 *
mbed_official 107:414e9c822e99 215 * \return The counter value.
mbed_official 107:414e9c822e99 216 */
mbed_official 107:414e9c822e99 217 uint32_t tc_read_cv(
mbed_official 107:414e9c822e99 218 Tc *p_tc,
mbed_official 107:414e9c822e99 219 uint32_t ul_channel)
mbed_official 107:414e9c822e99 220 {
mbed_official 107:414e9c822e99 221 /* Validate inputs. */
mbed_official 107:414e9c822e99 222 Assert(p_tc);
mbed_official 107:414e9c822e99 223 Assert(ul_channel <
mbed_official 107:414e9c822e99 224 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 225
mbed_official 107:414e9c822e99 226 return p_tc->TC_CHANNEL[ul_channel].TC_CV;
mbed_official 107:414e9c822e99 227 }
mbed_official 107:414e9c822e99 228
mbed_official 107:414e9c822e99 229 /**
mbed_official 107:414e9c822e99 230 * \brief Read TC Register A (RA) on the specified channel.
mbed_official 107:414e9c822e99 231 *
mbed_official 107:414e9c822e99 232 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 233 * \param[in] ul_channel Channel to read
mbed_official 107:414e9c822e99 234 *
mbed_official 107:414e9c822e99 235 * \return The TC Register A (RA) value.
mbed_official 107:414e9c822e99 236 */
mbed_official 107:414e9c822e99 237 uint32_t tc_read_ra(
mbed_official 107:414e9c822e99 238 Tc *p_tc,
mbed_official 107:414e9c822e99 239 uint32_t ul_channel)
mbed_official 107:414e9c822e99 240 {
mbed_official 107:414e9c822e99 241 /* Validate inputs. */
mbed_official 107:414e9c822e99 242 Assert(p_tc);
mbed_official 107:414e9c822e99 243 Assert(ul_channel <
mbed_official 107:414e9c822e99 244 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 245
mbed_official 107:414e9c822e99 246 return p_tc->TC_CHANNEL[ul_channel].TC_RA;
mbed_official 107:414e9c822e99 247 }
mbed_official 107:414e9c822e99 248
mbed_official 107:414e9c822e99 249 /**
mbed_official 107:414e9c822e99 250 * \brief Read TC Register B (RB) on the specified channel.
mbed_official 107:414e9c822e99 251 *
mbed_official 107:414e9c822e99 252 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 253 * \param[in] ul_channel Channel to read
mbed_official 107:414e9c822e99 254 *
mbed_official 107:414e9c822e99 255 * \return The TC Register B (RB) value.
mbed_official 107:414e9c822e99 256 */
mbed_official 107:414e9c822e99 257 uint32_t tc_read_rb(
mbed_official 107:414e9c822e99 258 Tc *p_tc,
mbed_official 107:414e9c822e99 259 uint32_t ul_channel)
mbed_official 107:414e9c822e99 260 {
mbed_official 107:414e9c822e99 261 /* Validate inputs. */
mbed_official 107:414e9c822e99 262 Assert(p_tc);
mbed_official 107:414e9c822e99 263 Assert(ul_channel <
mbed_official 107:414e9c822e99 264 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 265
mbed_official 107:414e9c822e99 266 return p_tc->TC_CHANNEL[ul_channel].TC_RB;
mbed_official 107:414e9c822e99 267 }
mbed_official 107:414e9c822e99 268
mbed_official 107:414e9c822e99 269 /**
mbed_official 107:414e9c822e99 270 * \brief Read TC Register C (RC) on the specified channel.
mbed_official 107:414e9c822e99 271 *
mbed_official 107:414e9c822e99 272 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 273 * \param[in] ul_channel Channel to read
mbed_official 107:414e9c822e99 274 *
mbed_official 107:414e9c822e99 275 * \return The Register C (RC) value.
mbed_official 107:414e9c822e99 276 */
mbed_official 107:414e9c822e99 277 uint32_t tc_read_rc(
mbed_official 107:414e9c822e99 278 Tc *p_tc,
mbed_official 107:414e9c822e99 279 uint32_t ul_channel)
mbed_official 107:414e9c822e99 280 {
mbed_official 107:414e9c822e99 281 /* Validate inputs. */
mbed_official 107:414e9c822e99 282 Assert(p_tc);
mbed_official 107:414e9c822e99 283 Assert(ul_channel <
mbed_official 107:414e9c822e99 284 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 285
mbed_official 107:414e9c822e99 286 return p_tc->TC_CHANNEL[ul_channel].TC_RC;
mbed_official 107:414e9c822e99 287 }
mbed_official 107:414e9c822e99 288
mbed_official 107:414e9c822e99 289 /**
mbed_official 107:414e9c822e99 290 * \brief Write to TC Register A (RA) on the specified channel.
mbed_official 107:414e9c822e99 291 *
mbed_official 107:414e9c822e99 292 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 293 * \param[in] ul_channel Channel to write
mbed_official 107:414e9c822e99 294 * \param[in] ul_value Value to write
mbed_official 107:414e9c822e99 295 */
mbed_official 107:414e9c822e99 296 void tc_write_ra(
mbed_official 107:414e9c822e99 297 Tc *p_tc,
mbed_official 107:414e9c822e99 298 uint32_t ul_channel,
mbed_official 107:414e9c822e99 299 uint32_t ul_value)
mbed_official 107:414e9c822e99 300 {
mbed_official 107:414e9c822e99 301 /* Validate inputs. */
mbed_official 107:414e9c822e99 302 Assert(p_tc);
mbed_official 107:414e9c822e99 303 Assert(ul_channel <
mbed_official 107:414e9c822e99 304 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 305
mbed_official 107:414e9c822e99 306 p_tc->TC_CHANNEL[ul_channel].TC_RA = ul_value;
mbed_official 107:414e9c822e99 307 }
mbed_official 107:414e9c822e99 308
mbed_official 107:414e9c822e99 309 /**
mbed_official 107:414e9c822e99 310 * \brief Write to TC Register B (RB) on the specified channel.
mbed_official 107:414e9c822e99 311 *
mbed_official 107:414e9c822e99 312 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 313 * \param[in] ul_channel Channel to write
mbed_official 107:414e9c822e99 314 * \param[in] ul_value Value to write
mbed_official 107:414e9c822e99 315 */
mbed_official 107:414e9c822e99 316 void tc_write_rb(
mbed_official 107:414e9c822e99 317 Tc *p_tc,
mbed_official 107:414e9c822e99 318 uint32_t ul_channel,
mbed_official 107:414e9c822e99 319 uint32_t ul_value)
mbed_official 107:414e9c822e99 320 {
mbed_official 107:414e9c822e99 321 /* Validate inputs. */
mbed_official 107:414e9c822e99 322 Assert(p_tc);
mbed_official 107:414e9c822e99 323 Assert(ul_channel <
mbed_official 107:414e9c822e99 324 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 325
mbed_official 107:414e9c822e99 326 p_tc->TC_CHANNEL[ul_channel].TC_RB = ul_value;
mbed_official 107:414e9c822e99 327 }
mbed_official 107:414e9c822e99 328
mbed_official 107:414e9c822e99 329 /**
mbed_official 107:414e9c822e99 330 * \brief Write to TC Register C (RC) on the selected channel.
mbed_official 107:414e9c822e99 331 *
mbed_official 107:414e9c822e99 332 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 333 * \param[in] ul_channel Channel to write
mbed_official 107:414e9c822e99 334 * \param[in] ul_value Value to write
mbed_official 107:414e9c822e99 335 */
mbed_official 107:414e9c822e99 336 void tc_write_rc(
mbed_official 107:414e9c822e99 337 Tc *p_tc,
mbed_official 107:414e9c822e99 338 uint32_t ul_channel,
mbed_official 107:414e9c822e99 339 uint32_t ul_value)
mbed_official 107:414e9c822e99 340 {
mbed_official 107:414e9c822e99 341 /* Validate inputs. */
mbed_official 107:414e9c822e99 342 Assert(p_tc);
mbed_official 107:414e9c822e99 343 Assert(ul_channel <
mbed_official 107:414e9c822e99 344 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 345
mbed_official 107:414e9c822e99 346 p_tc->TC_CHANNEL[ul_channel].TC_RC = ul_value;
mbed_official 107:414e9c822e99 347 }
mbed_official 107:414e9c822e99 348
mbed_official 107:414e9c822e99 349 /**
mbed_official 107:414e9c822e99 350 * \brief Enable the TC interrupts on the specified channel.
mbed_official 107:414e9c822e99 351 *
mbed_official 107:414e9c822e99 352 * \param[in,out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 353 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 354 * \param[in] ul_sources Bitmask of interrupt sources
mbed_official 107:414e9c822e99 355 *
mbed_official 107:414e9c822e99 356 * Where the input parameter <i>ul_sources</i> can be one or more of the following:
mbed_official 107:414e9c822e99 357 * <table>
mbed_official 107:414e9c822e99 358 * <tr>
mbed_official 107:414e9c822e99 359 * <th>Parameter Value</th>
mbed_official 107:414e9c822e99 360 * <th>Description</th>
mbed_official 107:414e9c822e99 361 * </tr>
mbed_official 107:414e9c822e99 362 * <tr><td>TC_IER_COVFS</td><td>Enables the Counter Overflow Interrupt</td></tr>
mbed_official 107:414e9c822e99 363 * <tr><td>TC_IER_LOVRS</td><td>Enables the Load Overrun Interrupt</td></tr>
mbed_official 107:414e9c822e99 364 * <tr><td>TC_IER_CPAS</td><td>Enables the RA Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 365 * <tr><td>TC_IER_CPBS</td><td>Enables the RB Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 366 * <tr><td>TC_IER_CPCS</td><td>Enables the RC Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 367 * <tr><td>TC_IER_LDRAS</td><td>Enables the RA Load Interrupt</td></tr>
mbed_official 107:414e9c822e99 368 * <tr><td>TC_IER_LDRBS</td><td>Enables the RB Load Interrupt</td></tr>
mbed_official 107:414e9c822e99 369 * <tr><td>TC_IER_ETRGS</td><td>Enables the External Trigger Interrupt</td></tr>
mbed_official 107:414e9c822e99 370 * </table>
mbed_official 107:414e9c822e99 371 */
mbed_official 107:414e9c822e99 372 void tc_enable_interrupt(
mbed_official 107:414e9c822e99 373 Tc *p_tc,
mbed_official 107:414e9c822e99 374 uint32_t ul_channel,
mbed_official 107:414e9c822e99 375 uint32_t ul_sources)
mbed_official 107:414e9c822e99 376 {
mbed_official 107:414e9c822e99 377 TcChannel *tc_channel;
mbed_official 107:414e9c822e99 378
mbed_official 107:414e9c822e99 379 /* Validate inputs. */
mbed_official 107:414e9c822e99 380 Assert(p_tc);
mbed_official 107:414e9c822e99 381 Assert(ul_channel <
mbed_official 107:414e9c822e99 382 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 383 tc_channel = p_tc->TC_CHANNEL + ul_channel;
mbed_official 107:414e9c822e99 384 tc_channel->TC_IER = ul_sources;
mbed_official 107:414e9c822e99 385 }
mbed_official 107:414e9c822e99 386
mbed_official 107:414e9c822e99 387 /**
mbed_official 107:414e9c822e99 388 * \brief Disable TC interrupts on the specified channel.
mbed_official 107:414e9c822e99 389 *
mbed_official 107:414e9c822e99 390 * \param[in,out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 391 * \param[in] ul_channel Channel to configure
mbed_official 107:414e9c822e99 392 * \param[in] ul_sources A bitmask of Interrupt sources
mbed_official 107:414e9c822e99 393 *
mbed_official 107:414e9c822e99 394 * Where the input parameter <i>ul_sources</i> can be one or more of the following:
mbed_official 107:414e9c822e99 395 * <table>
mbed_official 107:414e9c822e99 396 * <tr>
mbed_official 107:414e9c822e99 397 * <th>Parameter Value</th>
mbed_official 107:414e9c822e99 398 * <th>Description</th>
mbed_official 107:414e9c822e99 399 * </tr>
mbed_official 107:414e9c822e99 400 * <tr><td>TC_IDR_COVFS</td><td>Disables the Counter Overflow Interrupt</td></tr>
mbed_official 107:414e9c822e99 401 * <tr><td>TC_IDR_LOVRS</td><td>Disables the Load Overrun Interrupt</td></tr>
mbed_official 107:414e9c822e99 402 * <tr><td>TC_IDR_CPAS</td><td>Disables the RA Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 403 * <tr><td>TC_IDR_CPBS</td><td>Disables the RB Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 404 * <tr><td>TC_IDR_CPCS</td><td>Disables the RC Compare Interrupt</td></tr>
mbed_official 107:414e9c822e99 405 * <tr><td>TC_IDR_LDRAS</td><td>Disables the RA Load Interrupt</td></tr>
mbed_official 107:414e9c822e99 406 * <tr><td>TC_IDR_LDRBS</td><td>Disables the RB Load Interrupt</td></tr>
mbed_official 107:414e9c822e99 407 * <tr><td>TC_IDR_ETRGS</td><td>Disables the External Trigger Interrupt</td></tr>
mbed_official 107:414e9c822e99 408 * </table>
mbed_official 107:414e9c822e99 409 */
mbed_official 107:414e9c822e99 410 void tc_disable_interrupt(
mbed_official 107:414e9c822e99 411 Tc *p_tc,
mbed_official 107:414e9c822e99 412 uint32_t ul_channel,
mbed_official 107:414e9c822e99 413 uint32_t ul_sources)
mbed_official 107:414e9c822e99 414 {
mbed_official 107:414e9c822e99 415 TcChannel *tc_channel;
mbed_official 107:414e9c822e99 416
mbed_official 107:414e9c822e99 417 /* Validate inputs. */
mbed_official 107:414e9c822e99 418 Assert(p_tc);
mbed_official 107:414e9c822e99 419 Assert(ul_channel <
mbed_official 107:414e9c822e99 420 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 421 tc_channel = p_tc->TC_CHANNEL + ul_channel;
mbed_official 107:414e9c822e99 422 tc_channel->TC_IDR = ul_sources;
mbed_official 107:414e9c822e99 423 }
mbed_official 107:414e9c822e99 424
mbed_official 107:414e9c822e99 425 /**
mbed_official 107:414e9c822e99 426 * \brief Read the TC interrupt mask for the specified channel.
mbed_official 107:414e9c822e99 427 *
mbed_official 107:414e9c822e99 428 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 429 * \param[in] ul_channel Channel to read
mbed_official 107:414e9c822e99 430 *
mbed_official 107:414e9c822e99 431 * \return The TC interrupt mask value.
mbed_official 107:414e9c822e99 432 */
mbed_official 107:414e9c822e99 433 uint32_t tc_get_interrupt_mask(
mbed_official 107:414e9c822e99 434 Tc *p_tc,
mbed_official 107:414e9c822e99 435 uint32_t ul_channel)
mbed_official 107:414e9c822e99 436 {
mbed_official 107:414e9c822e99 437 TcChannel *tc_channel;
mbed_official 107:414e9c822e99 438
mbed_official 107:414e9c822e99 439 /* Validate inputs. */
mbed_official 107:414e9c822e99 440 Assert(p_tc);
mbed_official 107:414e9c822e99 441 Assert(ul_channel <
mbed_official 107:414e9c822e99 442 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 443 tc_channel = p_tc->TC_CHANNEL + ul_channel;
mbed_official 107:414e9c822e99 444 return tc_channel->TC_IMR;
mbed_official 107:414e9c822e99 445 }
mbed_official 107:414e9c822e99 446
mbed_official 107:414e9c822e99 447 /**
mbed_official 107:414e9c822e99 448 * \brief Get the current status for the specified TC channel.
mbed_official 107:414e9c822e99 449 *
mbed_official 107:414e9c822e99 450 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 451 * \param[in] ul_channel Channel number
mbed_official 107:414e9c822e99 452 *
mbed_official 107:414e9c822e99 453 * \return The current TC status.
mbed_official 107:414e9c822e99 454 */
mbed_official 107:414e9c822e99 455 uint32_t tc_get_status(
mbed_official 107:414e9c822e99 456 Tc *p_tc,
mbed_official 107:414e9c822e99 457 uint32_t ul_channel)
mbed_official 107:414e9c822e99 458 {
mbed_official 107:414e9c822e99 459 TcChannel *tc_channel;
mbed_official 107:414e9c822e99 460
mbed_official 107:414e9c822e99 461 /* Validate inputs. */
mbed_official 107:414e9c822e99 462 Assert(p_tc);
mbed_official 107:414e9c822e99 463 Assert(ul_channel <
mbed_official 107:414e9c822e99 464 (sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
mbed_official 107:414e9c822e99 465
mbed_official 107:414e9c822e99 466 tc_channel = p_tc->TC_CHANNEL + ul_channel;
mbed_official 107:414e9c822e99 467 return tc_channel->TC_SR;
mbed_official 107:414e9c822e99 468 }
mbed_official 107:414e9c822e99 469
mbed_official 107:414e9c822e99 470 /* TC divisor used to find the lowest acceptable timer frequency */
mbed_official 107:414e9c822e99 471 #define TC_DIV_FACTOR 65536
mbed_official 107:414e9c822e99 472
mbed_official 107:414e9c822e99 473 #if (!SAM4L) && !defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 474
mbed_official 107:414e9c822e99 475 #ifndef FREQ_SLOW_CLOCK_EXT
mbed_official 107:414e9c822e99 476 #define FREQ_SLOW_CLOCK_EXT 32768 /* External slow clock frequency (hz) */
mbed_official 107:414e9c822e99 477 #endif
mbed_official 107:414e9c822e99 478
mbed_official 107:414e9c822e99 479 /**
mbed_official 107:414e9c822e99 480 * \brief Find the best MCK divisor.
mbed_official 107:414e9c822e99 481 *
mbed_official 107:414e9c822e99 482 * Finds the best MCK divisor given the timer frequency and MCK. The result
mbed_official 107:414e9c822e99 483 * is guaranteed to satisfy the following equation:
mbed_official 107:414e9c822e99 484 * \code (MCK / (DIV * 65536)) <= freq <= (MCK / DIV) \endcode
mbed_official 107:414e9c822e99 485 * With DIV being the lowest possible value, to maximize timing adjust resolution.
mbed_official 107:414e9c822e99 486 *
mbed_official 107:414e9c822e99 487 * \param[in] ul_freq Desired timer frequency
mbed_official 107:414e9c822e99 488 * \param[in] ul_mck Master clock frequency
mbed_official 107:414e9c822e99 489 * \param[out] p_uldiv Divisor value
mbed_official 107:414e9c822e99 490 * \param[out] p_ultcclks TCCLKS field value for divisor
mbed_official 107:414e9c822e99 491 * \param[in] ul_boardmck Board clock frequency
mbed_official 107:414e9c822e99 492 *
mbed_official 107:414e9c822e99 493 * \return The divisor found status.
mbed_official 107:414e9c822e99 494 * \retval 0 No suitable divisor was found
mbed_official 107:414e9c822e99 495 * \retval 1 A divisor was found
mbed_official 107:414e9c822e99 496 */
mbed_official 107:414e9c822e99 497 uint32_t tc_find_mck_divisor(
mbed_official 107:414e9c822e99 498 uint32_t ul_freq,
mbed_official 107:414e9c822e99 499 uint32_t ul_mck,
mbed_official 107:414e9c822e99 500 uint32_t *p_uldiv,
mbed_official 107:414e9c822e99 501 uint32_t *p_ultcclks,
mbed_official 107:414e9c822e99 502 uint32_t ul_boardmck)
mbed_official 107:414e9c822e99 503 {
mbed_official 107:414e9c822e99 504 const uint32_t divisors[5] = { 2, 8, 32, 128,
mbed_official 107:414e9c822e99 505 ul_boardmck / FREQ_SLOW_CLOCK_EXT
mbed_official 107:414e9c822e99 506 };
mbed_official 107:414e9c822e99 507 uint32_t ul_index;
mbed_official 107:414e9c822e99 508 uint32_t ul_high, ul_low;
mbed_official 107:414e9c822e99 509
mbed_official 107:414e9c822e99 510 /* Satisfy frequency bound. */
mbed_official 107:414e9c822e99 511 for (ul_index = 0;
mbed_official 107:414e9c822e99 512 ul_index < (sizeof(divisors) / sizeof(divisors[0]));
mbed_official 107:414e9c822e99 513 ul_index++) {
mbed_official 107:414e9c822e99 514 ul_high = ul_mck / divisors[ul_index];
mbed_official 107:414e9c822e99 515 ul_low = ul_high / TC_DIV_FACTOR;
mbed_official 107:414e9c822e99 516 if (ul_freq > ul_high) {
mbed_official 107:414e9c822e99 517 return 0;
mbed_official 107:414e9c822e99 518 } else if (ul_freq >= ul_low) {
mbed_official 107:414e9c822e99 519 break;
mbed_official 107:414e9c822e99 520 }
mbed_official 107:414e9c822e99 521 }
mbed_official 107:414e9c822e99 522 if (ul_index >= (sizeof(divisors) / sizeof(divisors[0]))) {
mbed_official 107:414e9c822e99 523 return 0;
mbed_official 107:414e9c822e99 524 }
mbed_official 107:414e9c822e99 525
mbed_official 107:414e9c822e99 526 /* Store results. */
mbed_official 107:414e9c822e99 527 if (p_uldiv) {
mbed_official 107:414e9c822e99 528 *p_uldiv = divisors[ul_index];
mbed_official 107:414e9c822e99 529 }
mbed_official 107:414e9c822e99 530
mbed_official 107:414e9c822e99 531 if (p_ultcclks) {
mbed_official 107:414e9c822e99 532 *p_ultcclks = ul_index;
mbed_official 107:414e9c822e99 533 }
mbed_official 107:414e9c822e99 534
mbed_official 107:414e9c822e99 535 return 1;
mbed_official 107:414e9c822e99 536 }
mbed_official 107:414e9c822e99 537
mbed_official 107:414e9c822e99 538 #endif /* (!SAM4L) */
mbed_official 107:414e9c822e99 539
mbed_official 107:414e9c822e99 540 #if (SAM4L) || defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 541 /**
mbed_official 107:414e9c822e99 542 * \brief Find the best PBA/MCK divisor.
mbed_official 107:414e9c822e99 543 *
mbed_official 107:414e9c822e99 544 * <b>For SAM4L devices:</b> Finds the best PBA divisor given the timer
mbed_official 107:414e9c822e99 545 * frequency and PBA clock. The result is guaranteed to satisfy the following equation:
mbed_official 107:414e9c822e99 546 * \code (ul_pbaclk / (2* DIV * 65536)) <= freq <= (ul_pbaclk / (2* DIV)) \endcode
mbed_official 107:414e9c822e99 547 * with DIV being the lowest possible value, to maximize timing adjust resolution.
mbed_official 107:414e9c822e99 548 *
mbed_official 107:414e9c822e99 549 * <b>For non SAM4L devices:</b> Finds the best MCK divisor given the timer frequency
mbed_official 107:414e9c822e99 550 * and MCK. The result is guaranteed to satisfy the following equation:
mbed_official 107:414e9c822e99 551 * \code (MCK / (DIV * 65536)) <= freq <= (MCK / DIV) \endcode
mbed_official 107:414e9c822e99 552 * with DIV being the lowest possible value, to maximize timing adjust resolution.
mbed_official 107:414e9c822e99 553 *
mbed_official 107:414e9c822e99 554 * \param[in] ul_freq Desired timer frequency
mbed_official 107:414e9c822e99 555 * \param[in] ul_mck PBA clock frequency
mbed_official 107:414e9c822e99 556 * \param[out] p_uldiv Divisor value
mbed_official 107:414e9c822e99 557 * \param[out] p_ultcclks TCCLKS field value for divisor
mbed_official 107:414e9c822e99 558 * \param[in] ul_boardmck Board clock frequency (set to 0 for SAM4L devices)
mbed_official 107:414e9c822e99 559 *
mbed_official 107:414e9c822e99 560 * \return The divisor found status.
mbed_official 107:414e9c822e99 561 * \retval 0 No suitable divisor was found
mbed_official 107:414e9c822e99 562 * \retval 1 A divisor was found
mbed_official 107:414e9c822e99 563 */
mbed_official 107:414e9c822e99 564 uint32_t tc_find_mck_divisor(
mbed_official 107:414e9c822e99 565 uint32_t ul_freq,
mbed_official 107:414e9c822e99 566 uint32_t ul_mck,
mbed_official 107:414e9c822e99 567 uint32_t *p_uldiv,
mbed_official 107:414e9c822e99 568 uint32_t *p_ultcclks,
mbed_official 107:414e9c822e99 569 uint32_t ul_boardmck)
mbed_official 107:414e9c822e99 570 {
mbed_official 107:414e9c822e99 571 const uint32_t divisors[5] = { 0, 2, 8, 32, 128};
mbed_official 107:414e9c822e99 572 uint32_t ul_index;
mbed_official 107:414e9c822e99 573 uint32_t ul_high, ul_low;
mbed_official 107:414e9c822e99 574
mbed_official 107:414e9c822e99 575 UNUSED(ul_boardmck);
mbed_official 107:414e9c822e99 576
mbed_official 107:414e9c822e99 577 /* Satisfy frequency bound. */
mbed_official 107:414e9c822e99 578 for (ul_index = 1;
mbed_official 107:414e9c822e99 579 ul_index < (sizeof(divisors) / sizeof(divisors[0]));
mbed_official 107:414e9c822e99 580 ul_index++) {
mbed_official 107:414e9c822e99 581 ul_high = ul_mck / divisors[ul_index];
mbed_official 107:414e9c822e99 582 ul_low = ul_high / TC_DIV_FACTOR;
mbed_official 107:414e9c822e99 583 if (ul_freq > ul_high) {
mbed_official 107:414e9c822e99 584 return 0;
mbed_official 107:414e9c822e99 585 } else if (ul_freq >= ul_low) {
mbed_official 107:414e9c822e99 586 break;
mbed_official 107:414e9c822e99 587 }
mbed_official 107:414e9c822e99 588 }
mbed_official 107:414e9c822e99 589 if (ul_index >= (sizeof(divisors) / sizeof(divisors[0]))) {
mbed_official 107:414e9c822e99 590 return 0;
mbed_official 107:414e9c822e99 591 }
mbed_official 107:414e9c822e99 592
mbed_official 107:414e9c822e99 593 /* Store results. */
mbed_official 107:414e9c822e99 594 if (p_uldiv) {
mbed_official 107:414e9c822e99 595 *p_uldiv = divisors[ul_index];
mbed_official 107:414e9c822e99 596 }
mbed_official 107:414e9c822e99 597
mbed_official 107:414e9c822e99 598 if (p_ultcclks) {
mbed_official 107:414e9c822e99 599 *p_ultcclks = ul_index;
mbed_official 107:414e9c822e99 600 }
mbed_official 107:414e9c822e99 601
mbed_official 107:414e9c822e99 602 return 1;
mbed_official 107:414e9c822e99 603 }
mbed_official 107:414e9c822e99 604
mbed_official 107:414e9c822e99 605 #endif /* (SAM4L) || defined(__DOXYGEN__) */
mbed_official 107:414e9c822e99 606
mbed_official 107:414e9c822e99 607 #if (!SAM4L && !SAMG) || defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 608
mbed_official 107:414e9c822e99 609 /**
mbed_official 107:414e9c822e99 610 * \brief Enable TC QDEC interrupts.
mbed_official 107:414e9c822e99 611 *
mbed_official 107:414e9c822e99 612 * \note This function is not available on SAM4L or SAMG devices.
mbed_official 107:414e9c822e99 613 *
mbed_official 107:414e9c822e99 614 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 615 * \param[in] ul_sources A bitmask of QDEC interrupts to be enabled
mbed_official 107:414e9c822e99 616 *
mbed_official 107:414e9c822e99 617 * Where the input parameter <i>ul_sources</i> can be one or more of the following:
mbed_official 107:414e9c822e99 618 * <table>
mbed_official 107:414e9c822e99 619 * <tr>
mbed_official 107:414e9c822e99 620 * <th>Parameter Value</th>
mbed_official 107:414e9c822e99 621 * <th>Description</th>
mbed_official 107:414e9c822e99 622 * </tr>
mbed_official 107:414e9c822e99 623 * <tr><td>TC_QIER_IDX</td><td>Enable the rising edge detected on IDX input interrupt</td></tr>
mbed_official 107:414e9c822e99 624 * <tr><td>TC_QIER_DIRCHG</td><td>Enable the change in rotation direction detected interrupt</td></tr>
mbed_official 107:414e9c822e99 625 * <tr><td>TC_QIER_QERR</td><td>Enable the quadrature error detected on PHA/PHB interrupt</td></tr>
mbed_official 107:414e9c822e99 626 * </table>
mbed_official 107:414e9c822e99 627 */
mbed_official 107:414e9c822e99 628 void tc_enable_qdec_interrupt(
mbed_official 107:414e9c822e99 629 Tc *p_tc,
mbed_official 107:414e9c822e99 630 uint32_t ul_sources)
mbed_official 107:414e9c822e99 631 {
mbed_official 107:414e9c822e99 632 /* Validate inputs. */
mbed_official 107:414e9c822e99 633 Assert(p_tc);
mbed_official 107:414e9c822e99 634
mbed_official 107:414e9c822e99 635 p_tc->TC_QIER = ul_sources;
mbed_official 107:414e9c822e99 636 }
mbed_official 107:414e9c822e99 637
mbed_official 107:414e9c822e99 638 /**
mbed_official 107:414e9c822e99 639 * \brief Disable TC QDEC interrupts.
mbed_official 107:414e9c822e99 640 *
mbed_official 107:414e9c822e99 641 * \note This function is not available on SAM4L or SAMG devices.
mbed_official 107:414e9c822e99 642 *
mbed_official 107:414e9c822e99 643 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 644 * \param[in] ul_sources A bitmask of QDEC interrupts to be disabled
mbed_official 107:414e9c822e99 645 *
mbed_official 107:414e9c822e99 646 * Where the input parameter <i>ul_sources</i> can be one or more of the following:
mbed_official 107:414e9c822e99 647 * <table>
mbed_official 107:414e9c822e99 648 * <tr>
mbed_official 107:414e9c822e99 649 * <th>Parameter Value</th>
mbed_official 107:414e9c822e99 650 * <th>Description</th>
mbed_official 107:414e9c822e99 651 * </tr>
mbed_official 107:414e9c822e99 652 * <tr><td>TC_QIDR_IDX</td><td>Disable the rising edge detected on IDX input interrupt</td></tr>
mbed_official 107:414e9c822e99 653 * <tr><td>TC_QIDR_DIRCHG</td><td>Disable the change in rotation direction detected interrupt</td></tr>
mbed_official 107:414e9c822e99 654 * <tr><td>TC_QIDR_QERR</td><td>Disable the quadrature error detected on PHA/PHB interrupt</td></tr>
mbed_official 107:414e9c822e99 655 * </table>
mbed_official 107:414e9c822e99 656 */
mbed_official 107:414e9c822e99 657 void tc_disable_qdec_interrupt(
mbed_official 107:414e9c822e99 658 Tc *p_tc,
mbed_official 107:414e9c822e99 659 uint32_t ul_sources)
mbed_official 107:414e9c822e99 660 {
mbed_official 107:414e9c822e99 661 /* Validate inputs. */
mbed_official 107:414e9c822e99 662 Assert(p_tc);
mbed_official 107:414e9c822e99 663
mbed_official 107:414e9c822e99 664 p_tc->TC_QIDR = ul_sources;
mbed_official 107:414e9c822e99 665 }
mbed_official 107:414e9c822e99 666
mbed_official 107:414e9c822e99 667 /**
mbed_official 107:414e9c822e99 668 * \brief Read TC QDEC interrupt mask.
mbed_official 107:414e9c822e99 669 *
mbed_official 107:414e9c822e99 670 * \note This function is not available on SAM4L or SAMG devices.
mbed_official 107:414e9c822e99 671 *
mbed_official 107:414e9c822e99 672 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 673 *
mbed_official 107:414e9c822e99 674 * \return The QDEC interrupt mask value.
mbed_official 107:414e9c822e99 675 */
mbed_official 107:414e9c822e99 676 uint32_t tc_get_qdec_interrupt_mask(
mbed_official 107:414e9c822e99 677 Tc *p_tc)
mbed_official 107:414e9c822e99 678 {
mbed_official 107:414e9c822e99 679 /* Validate inputs. */
mbed_official 107:414e9c822e99 680 Assert(p_tc);
mbed_official 107:414e9c822e99 681
mbed_official 107:414e9c822e99 682 return p_tc->TC_QIMR;
mbed_official 107:414e9c822e99 683 }
mbed_official 107:414e9c822e99 684
mbed_official 107:414e9c822e99 685 /**
mbed_official 107:414e9c822e99 686 * \brief Get current TC QDEC interrupt status.
mbed_official 107:414e9c822e99 687 *
mbed_official 107:414e9c822e99 688 * \note This function is not available on SAM4L or SAMG devices.
mbed_official 107:414e9c822e99 689 *
mbed_official 107:414e9c822e99 690 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 691 *
mbed_official 107:414e9c822e99 692 * \return The TC QDEC interrupt status.
mbed_official 107:414e9c822e99 693 */
mbed_official 107:414e9c822e99 694 uint32_t tc_get_qdec_interrupt_status(
mbed_official 107:414e9c822e99 695 Tc *p_tc)
mbed_official 107:414e9c822e99 696 {
mbed_official 107:414e9c822e99 697 /* Validate inputs. */
mbed_official 107:414e9c822e99 698 Assert(p_tc);
mbed_official 107:414e9c822e99 699
mbed_official 107:414e9c822e99 700 return p_tc->TC_QISR;
mbed_official 107:414e9c822e99 701 }
mbed_official 107:414e9c822e99 702
mbed_official 107:414e9c822e99 703 #endif /* (!SAM4L && !SAMG) || defined(__DOXYGEN__) */
mbed_official 107:414e9c822e99 704
mbed_official 107:414e9c822e99 705 #if (!SAM3U) || defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 706
mbed_official 107:414e9c822e99 707 /**
mbed_official 107:414e9c822e99 708 * \brief Enable or disable write protection of TC registers.
mbed_official 107:414e9c822e99 709 *
mbed_official 107:414e9c822e99 710 * \note This function is not available on SAM3U devices.
mbed_official 107:414e9c822e99 711 *
mbed_official 107:414e9c822e99 712 * \param[out] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 713 * \param[in] ul_enable 1 to enable, 0 to disable
mbed_official 107:414e9c822e99 714 */
mbed_official 107:414e9c822e99 715 void tc_set_writeprotect(
mbed_official 107:414e9c822e99 716 Tc *p_tc,
mbed_official 107:414e9c822e99 717 uint32_t ul_enable)
mbed_official 107:414e9c822e99 718 {
mbed_official 107:414e9c822e99 719 /* Validate inputs. */
mbed_official 107:414e9c822e99 720 Assert(p_tc);
mbed_official 107:414e9c822e99 721
mbed_official 107:414e9c822e99 722 if (ul_enable) {
mbed_official 107:414e9c822e99 723 p_tc->TC_WPMR = TC_WPMR_WPKEY_PASSWD | TC_WPMR_WPEN;
mbed_official 107:414e9c822e99 724 } else {
mbed_official 107:414e9c822e99 725 p_tc->TC_WPMR = TC_WPMR_WPKEY_PASSWD;
mbed_official 107:414e9c822e99 726 }
mbed_official 107:414e9c822e99 727 }
mbed_official 107:414e9c822e99 728
mbed_official 107:414e9c822e99 729 #endif /* (!SAM3U) || defined(__DOXYGEN__) */
mbed_official 107:414e9c822e99 730
mbed_official 107:414e9c822e99 731 #if SAM4L || defined(__DOXYGEN__)
mbed_official 107:414e9c822e99 732
mbed_official 107:414e9c822e99 733 /**
mbed_official 107:414e9c822e99 734 * \brief Indicate TC features.
mbed_official 107:414e9c822e99 735 *
mbed_official 107:414e9c822e99 736 * \note This function is only available on SAM4L devices.
mbed_official 107:414e9c822e99 737 *
mbed_official 107:414e9c822e99 738 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 739 *
mbed_official 107:414e9c822e99 740 * \return The TC FEATURES register contents.
mbed_official 107:414e9c822e99 741 */
mbed_official 107:414e9c822e99 742 uint32_t tc_get_feature(
mbed_official 107:414e9c822e99 743 Tc *p_tc)
mbed_official 107:414e9c822e99 744 {
mbed_official 107:414e9c822e99 745 /* Validate inputs. */
mbed_official 107:414e9c822e99 746 Assert(p_tc);
mbed_official 107:414e9c822e99 747
mbed_official 107:414e9c822e99 748 return p_tc->TC_FEATURES;
mbed_official 107:414e9c822e99 749 }
mbed_official 107:414e9c822e99 750
mbed_official 107:414e9c822e99 751 /**
mbed_official 107:414e9c822e99 752 * \brief Indicate TC version.
mbed_official 107:414e9c822e99 753 *
mbed_official 107:414e9c822e99 754 * \note This function is only available on SAM4L devices.
mbed_official 107:414e9c822e99 755 *
mbed_official 107:414e9c822e99 756 * \param[in] p_tc Module hardware register base address pointer
mbed_official 107:414e9c822e99 757 *
mbed_official 107:414e9c822e99 758 * \return The TC VERSION register contents.
mbed_official 107:414e9c822e99 759 */
mbed_official 107:414e9c822e99 760 uint32_t tc_get_version(
mbed_official 107:414e9c822e99 761 Tc *p_tc)
mbed_official 107:414e9c822e99 762 {
mbed_official 107:414e9c822e99 763 /* Validate inputs. */
mbed_official 107:414e9c822e99 764 Assert(p_tc);
mbed_official 107:414e9c822e99 765
mbed_official 107:414e9c822e99 766 return p_tc->TC_VERSION;
mbed_official 107:414e9c822e99 767 }
mbed_official 107:414e9c822e99 768
mbed_official 107:414e9c822e99 769 #endif /* SAM4L || defined(__DOXYGEN__) */
mbed_official 107:414e9c822e99 770
mbed_official 107:414e9c822e99 771 /// @cond
mbed_official 107:414e9c822e99 772 /**INDENT-OFF**/
mbed_official 107:414e9c822e99 773 #ifdef __cplusplus
mbed_official 107:414e9c822e99 774 }
mbed_official 107:414e9c822e99 775 #endif
mbed_official 107:414e9c822e99 776 /**INDENT-ON**/
mbed_official 107:414e9c822e99 777 /// @endcond