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targets/TARGET_Maxim/TARGET_MAX32625/device/tmr_regs.h@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 150:02e0a0aed4ec | 1 | /******************************************************************************* |
<> | 150:02e0a0aed4ec | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 6 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 10 | * |
<> | 150:02e0a0aed4ec | 11 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 12 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 13 | * |
<> | 150:02e0a0aed4ec | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 21 | * |
<> | 150:02e0a0aed4ec | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 24 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 25 | * |
<> | 150:02e0a0aed4ec | 26 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 30 | * ownership rights. |
<> | 150:02e0a0aed4ec | 31 | ******************************************************************************/ |
<> | 150:02e0a0aed4ec | 32 | |
<> | 150:02e0a0aed4ec | 33 | #ifndef _MXC_TMR_REGS_H_ |
<> | 150:02e0a0aed4ec | 34 | #define _MXC_TMR_REGS_H_ |
<> | 150:02e0a0aed4ec | 35 | |
<> | 150:02e0a0aed4ec | 36 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 37 | extern "C" { |
<> | 150:02e0a0aed4ec | 38 | #endif |
<> | 150:02e0a0aed4ec | 39 | |
<> | 150:02e0a0aed4ec | 40 | #include <stdint.h> |
<> | 150:02e0a0aed4ec | 41 | #include "mxc_device.h" |
<> | 150:02e0a0aed4ec | 42 | |
<> | 150:02e0a0aed4ec | 43 | /* |
<> | 150:02e0a0aed4ec | 44 | If types are not defined elsewhere (CMSIS) define them here |
<> | 150:02e0a0aed4ec | 45 | */ |
<> | 150:02e0a0aed4ec | 46 | #ifndef __IO |
<> | 150:02e0a0aed4ec | 47 | #define __IO volatile |
<> | 150:02e0a0aed4ec | 48 | #endif |
<> | 150:02e0a0aed4ec | 49 | #ifndef __I |
<> | 150:02e0a0aed4ec | 50 | #define __I volatile const |
<> | 150:02e0a0aed4ec | 51 | #endif |
<> | 150:02e0a0aed4ec | 52 | #ifndef __O |
<> | 150:02e0a0aed4ec | 53 | #define __O volatile |
<> | 150:02e0a0aed4ec | 54 | #endif |
<> | 150:02e0a0aed4ec | 55 | |
<> | 150:02e0a0aed4ec | 56 | |
<> | 150:02e0a0aed4ec | 57 | /* |
<> | 150:02e0a0aed4ec | 58 | Typedefed structure(s) for module registers (per instance or section) with direct 32-bit |
<> | 150:02e0a0aed4ec | 59 | access to each register in module. |
<> | 150:02e0a0aed4ec | 60 | */ |
<> | 150:02e0a0aed4ec | 61 | |
<> | 150:02e0a0aed4ec | 62 | /* Offset Register Description |
<> | 150:02e0a0aed4ec | 63 | ============= ============================================================================ */ |
<> | 150:02e0a0aed4ec | 64 | typedef struct { |
<> | 150:02e0a0aed4ec | 65 | __IO uint32_t ctrl; /* 0x0000 Timer Control Register */ |
<> | 150:02e0a0aed4ec | 66 | __IO uint32_t count32; /* 0x0004 Timer [32 bit] Current Count Value */ |
<> | 150:02e0a0aed4ec | 67 | __IO uint32_t term_cnt32; /* 0x0008 Timer [32 bit] Terminal Count Setting */ |
<> | 150:02e0a0aed4ec | 68 | __IO uint32_t pwm_cap32; /* 0x000C Timer [32 bit] PWM Compare Setting or Capture/Measure Value */ |
<> | 150:02e0a0aed4ec | 69 | __IO uint32_t count16_0; /* 0x0010 Timer [16 bit] Current Count Value, 16-bit Timer 0 */ |
<> | 150:02e0a0aed4ec | 70 | __IO uint32_t term_cnt16_0; /* 0x0014 Timer [16 bit] Terminal Count Setting, 16-bit Timer 0 */ |
<> | 150:02e0a0aed4ec | 71 | __IO uint32_t count16_1; /* 0x0018 Timer [16 bit] Current Count Value, 16-bit Timer 1 */ |
<> | 150:02e0a0aed4ec | 72 | __IO uint32_t term_cnt16_1; /* 0x001C Timer [16 bit] Terminal Count Setting, 16-bit Timer 1 */ |
<> | 150:02e0a0aed4ec | 73 | __IO uint32_t intfl; /* 0x0020 Timer Interrupt Flags */ |
<> | 150:02e0a0aed4ec | 74 | __IO uint32_t inten; /* 0x0024 Timer Interrupt Enable/Disable Settings */ |
<> | 150:02e0a0aed4ec | 75 | } mxc_tmr_regs_t; |
<> | 150:02e0a0aed4ec | 76 | |
<> | 150:02e0a0aed4ec | 77 | |
<> | 150:02e0a0aed4ec | 78 | /* |
<> | 150:02e0a0aed4ec | 79 | Register offsets for module TMR. |
<> | 150:02e0a0aed4ec | 80 | */ |
<> | 150:02e0a0aed4ec | 81 | |
<> | 150:02e0a0aed4ec | 82 | #define MXC_R_TMR_OFFS_CTRL ((uint32_t)0x00000000UL) |
<> | 150:02e0a0aed4ec | 83 | #define MXC_R_TMR_OFFS_COUNT32 ((uint32_t)0x00000004UL) |
<> | 150:02e0a0aed4ec | 84 | #define MXC_R_TMR_OFFS_TERM_CNT32 ((uint32_t)0x00000008UL) |
<> | 150:02e0a0aed4ec | 85 | #define MXC_R_TMR_OFFS_PWM_CAP32 ((uint32_t)0x0000000CUL) |
<> | 150:02e0a0aed4ec | 86 | #define MXC_R_TMR_OFFS_COUNT16_0 ((uint32_t)0x00000010UL) |
<> | 150:02e0a0aed4ec | 87 | #define MXC_R_TMR_OFFS_TERM_CNT16_0 ((uint32_t)0x00000014UL) |
<> | 150:02e0a0aed4ec | 88 | #define MXC_R_TMR_OFFS_COUNT16_1 ((uint32_t)0x00000018UL) |
<> | 150:02e0a0aed4ec | 89 | #define MXC_R_TMR_OFFS_TERM_CNT16_1 ((uint32_t)0x0000001CUL) |
<> | 150:02e0a0aed4ec | 90 | #define MXC_R_TMR_OFFS_INTFL ((uint32_t)0x00000020UL) |
<> | 150:02e0a0aed4ec | 91 | #define MXC_R_TMR_OFFS_INTEN ((uint32_t)0x00000024UL) |
<> | 150:02e0a0aed4ec | 92 | |
<> | 150:02e0a0aed4ec | 93 | |
<> | 150:02e0a0aed4ec | 94 | /* |
<> | 150:02e0a0aed4ec | 95 | Field positions and masks for module TMR. |
<> | 150:02e0a0aed4ec | 96 | */ |
<> | 150:02e0a0aed4ec | 97 | |
<> | 150:02e0a0aed4ec | 98 | #define MXC_F_TMR_CTRL_MODE_POS 0 |
<> | 150:02e0a0aed4ec | 99 | #define MXC_F_TMR_CTRL_MODE ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 100 | #define MXC_F_TMR_CTRL_TMR2X16_POS 3 |
<> | 150:02e0a0aed4ec | 101 | #define MXC_F_TMR_CTRL_TMR2X16 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS)) |
<> | 150:02e0a0aed4ec | 102 | #define MXC_F_TMR_CTRL_PRESCALE_POS 4 |
<> | 150:02e0a0aed4ec | 103 | #define MXC_F_TMR_CTRL_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 104 | #define MXC_F_TMR_CTRL_POLARITY_POS 8 |
<> | 150:02e0a0aed4ec | 105 | #define MXC_F_TMR_CTRL_POLARITY ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS)) |
<> | 150:02e0a0aed4ec | 106 | #define MXC_F_TMR_CTRL_ENABLE0_POS 12 |
<> | 150:02e0a0aed4ec | 107 | #define MXC_F_TMR_CTRL_ENABLE0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS)) |
<> | 150:02e0a0aed4ec | 108 | #define MXC_F_TMR_CTRL_ENABLE1_POS 13 |
<> | 150:02e0a0aed4ec | 109 | #define MXC_F_TMR_CTRL_ENABLE1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS)) |
<> | 150:02e0a0aed4ec | 110 | |
<> | 150:02e0a0aed4ec | 111 | #define MXC_F_TMR_COUNT16_0_VALUE_POS 0 |
<> | 150:02e0a0aed4ec | 112 | #define MXC_F_TMR_COUNT16_0_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS)) |
<> | 150:02e0a0aed4ec | 113 | |
<> | 150:02e0a0aed4ec | 114 | #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS 0 |
<> | 150:02e0a0aed4ec | 115 | #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS)) |
<> | 150:02e0a0aed4ec | 116 | |
<> | 150:02e0a0aed4ec | 117 | #define MXC_F_TMR_COUNT16_1_VALUE_POS 0 |
<> | 150:02e0a0aed4ec | 118 | #define MXC_F_TMR_COUNT16_1_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS)) |
<> | 150:02e0a0aed4ec | 119 | |
<> | 150:02e0a0aed4ec | 120 | #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS 0 |
<> | 150:02e0a0aed4ec | 121 | #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS)) |
<> | 150:02e0a0aed4ec | 122 | |
<> | 150:02e0a0aed4ec | 123 | #define MXC_F_TMR_INTFL_TIMER0_POS 0 |
<> | 150:02e0a0aed4ec | 124 | #define MXC_F_TMR_INTFL_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS)) |
<> | 150:02e0a0aed4ec | 125 | #define MXC_F_TMR_INTFL_TIMER1_POS 1 |
<> | 150:02e0a0aed4ec | 126 | #define MXC_F_TMR_INTFL_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS)) |
<> | 150:02e0a0aed4ec | 127 | |
<> | 150:02e0a0aed4ec | 128 | #define MXC_F_TMR_INTEN_TIMER0_POS 0 |
<> | 150:02e0a0aed4ec | 129 | #define MXC_F_TMR_INTEN_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS)) |
<> | 150:02e0a0aed4ec | 130 | #define MXC_F_TMR_INTEN_TIMER1_POS 1 |
<> | 150:02e0a0aed4ec | 131 | #define MXC_F_TMR_INTEN_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS)) |
<> | 150:02e0a0aed4ec | 132 | |
<> | 150:02e0a0aed4ec | 133 | |
<> | 150:02e0a0aed4ec | 134 | |
<> | 150:02e0a0aed4ec | 135 | /* |
<> | 150:02e0a0aed4ec | 136 | Field values and shifted values for module TMR. |
<> | 150:02e0a0aed4ec | 137 | */ |
<> | 150:02e0a0aed4ec | 138 | |
<> | 150:02e0a0aed4ec | 139 | #define MXC_V_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(0x00000000UL)) |
<> | 150:02e0a0aed4ec | 140 | #define MXC_V_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(0x00000001UL)) |
<> | 150:02e0a0aed4ec | 141 | #define MXC_V_TMR_CTRL_MODE_COUNTER ((uint32_t)(0x00000002UL)) |
<> | 150:02e0a0aed4ec | 142 | #define MXC_V_TMR_CTRL_MODE_PWM ((uint32_t)(0x00000003UL)) |
<> | 150:02e0a0aed4ec | 143 | #define MXC_V_TMR_CTRL_MODE_CAPTURE ((uint32_t)(0x00000004UL)) |
<> | 150:02e0a0aed4ec | 144 | #define MXC_V_TMR_CTRL_MODE_COMPARE ((uint32_t)(0x00000005UL)) |
<> | 150:02e0a0aed4ec | 145 | #define MXC_V_TMR_CTRL_MODE_GATED ((uint32_t)(0x00000006UL)) |
<> | 150:02e0a0aed4ec | 146 | #define MXC_V_TMR_CTRL_MODE_MEASURE ((uint32_t)(0x00000007UL)) |
<> | 150:02e0a0aed4ec | 147 | |
<> | 150:02e0a0aed4ec | 148 | #define MXC_S_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(MXC_V_TMR_CTRL_MODE_ONE_SHOT << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 149 | #define MXC_S_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(MXC_V_TMR_CTRL_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 150 | #define MXC_S_TMR_CTRL_MODE_COUNTER ((uint32_t)(MXC_V_TMR_CTRL_MODE_COUNTER << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 151 | #define MXC_S_TMR_CTRL_MODE_PWM ((uint32_t)(MXC_V_TMR_CTRL_MODE_PWM << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 152 | #define MXC_S_TMR_CTRL_MODE_CAPTURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_CAPTURE << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 153 | #define MXC_S_TMR_CTRL_MODE_COMPARE ((uint32_t)(MXC_V_TMR_CTRL_MODE_COMPARE << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 154 | #define MXC_S_TMR_CTRL_MODE_GATED ((uint32_t)(MXC_V_TMR_CTRL_MODE_GATED << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 155 | #define MXC_S_TMR_CTRL_MODE_MEASURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_MEASURE << MXC_F_TMR_CTRL_MODE_POS)) |
<> | 150:02e0a0aed4ec | 156 | |
<> | 150:02e0a0aed4ec | 157 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(0x00000000UL)) |
<> | 150:02e0a0aed4ec | 158 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(0x00000001UL)) |
<> | 150:02e0a0aed4ec | 159 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(0x00000002UL)) |
<> | 150:02e0a0aed4ec | 160 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(0x00000003UL)) |
<> | 150:02e0a0aed4ec | 161 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(0x00000004UL)) |
<> | 150:02e0a0aed4ec | 162 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(0x00000005UL)) |
<> | 150:02e0a0aed4ec | 163 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(0x00000006UL)) |
<> | 150:02e0a0aed4ec | 164 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(0x00000007UL)) |
<> | 150:02e0a0aed4ec | 165 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(0x00000008UL)) |
<> | 150:02e0a0aed4ec | 166 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(0x00000009UL)) |
<> | 150:02e0a0aed4ec | 167 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(0x0000000AUL)) |
<> | 150:02e0a0aed4ec | 168 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(0x0000000BUL)) |
<> | 150:02e0a0aed4ec | 169 | #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(0x0000000CUL)) |
<> | 150:02e0a0aed4ec | 170 | |
<> | 150:02e0a0aed4ec | 171 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 172 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 173 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 174 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 175 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 176 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 177 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 178 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 179 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 180 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 181 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 182 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 183 | #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 << MXC_F_TMR_CTRL_PRESCALE_POS)) |
<> | 150:02e0a0aed4ec | 184 | |
<> | 150:02e0a0aed4ec | 185 | |
<> | 150:02e0a0aed4ec | 186 | /* |
<> | 150:02e0a0aed4ec | 187 | * These two 1-bit fields replace the standard 3-bit mode field when the associated TMR module |
<> | 150:02e0a0aed4ec | 188 | * is in dual 16-bit timer mode. |
<> | 150:02e0a0aed4ec | 189 | */ |
<> | 150:02e0a0aed4ec | 190 | |
<> | 150:02e0a0aed4ec | 191 | #define MXC_F_TMR_CTRL_MODE_16_0_POS 0 |
<> | 150:02e0a0aed4ec | 192 | #define MXC_F_TMR_CTRL_MODE_16_0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_0_POS)) |
<> | 150:02e0a0aed4ec | 193 | |
<> | 150:02e0a0aed4ec | 194 | #define MXC_F_TMR_CTRL_MODE_16_1_POS 1 |
<> | 150:02e0a0aed4ec | 195 | #define MXC_F_TMR_CTRL_MODE_16_1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_1_POS)) |
<> | 150:02e0a0aed4ec | 196 | |
<> | 150:02e0a0aed4ec | 197 | |
<> | 150:02e0a0aed4ec | 198 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 199 | } |
<> | 150:02e0a0aed4ec | 200 | #endif |
<> | 150:02e0a0aed4ec | 201 | |
<> | 150:02e0a0aed4ec | 202 | #endif /* _MXC_TMR_REGS_H_ */ |
<> | 150:02e0a0aed4ec | 203 |