Amit Gandhi / sensen_copy_2

t

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32625/device/rtc_regs.h@150:02e0a0aed4ec, 2016-11-08 (annotated)

Committer:
<>
Date:
Tue Nov 08 17:45:16 2016 +0000
Revision:
150:02e0a0aed4ec
This updates the lib to the mbed lib v129

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 ******************************************************************************/
<> 150:02e0a0aed4ec 32
<> 150:02e0a0aed4ec 33 #ifndef _MXC_RTC_REGS_H_
<> 150:02e0a0aed4ec 34 #define _MXC_RTC_REGS_H_
<> 150:02e0a0aed4ec 35
<> 150:02e0a0aed4ec 36 #ifdef __cplusplus
<> 150:02e0a0aed4ec 37 extern "C" {
<> 150:02e0a0aed4ec 38 #endif
<> 150:02e0a0aed4ec 39
<> 150:02e0a0aed4ec 40 #include <stdint.h>
<> 150:02e0a0aed4ec 41 #include "mxc_device.h"
<> 150:02e0a0aed4ec 42
<> 150:02e0a0aed4ec 43 /*
<> 150:02e0a0aed4ec 44 If types are not defined elsewhere (CMSIS) define them here
<> 150:02e0a0aed4ec 45 */
<> 150:02e0a0aed4ec 46 #ifndef __IO
<> 150:02e0a0aed4ec 47 #define __IO volatile
<> 150:02e0a0aed4ec 48 #endif
<> 150:02e0a0aed4ec 49 #ifndef __I
<> 150:02e0a0aed4ec 50 #define __I volatile const
<> 150:02e0a0aed4ec 51 #endif
<> 150:02e0a0aed4ec 52 #ifndef __O
<> 150:02e0a0aed4ec 53 #define __O volatile
<> 150:02e0a0aed4ec 54 #endif
<> 150:02e0a0aed4ec 55
<> 150:02e0a0aed4ec 56
<> 150:02e0a0aed4ec 57 /*
<> 150:02e0a0aed4ec 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
<> 150:02e0a0aed4ec 59 access to each register in module.
<> 150:02e0a0aed4ec 60 */
<> 150:02e0a0aed4ec 61
<> 150:02e0a0aed4ec 62 /* Offset Register Description
<> 150:02e0a0aed4ec 63 ============= ============================================================================ */
<> 150:02e0a0aed4ec 64 typedef struct {
<> 150:02e0a0aed4ec 65 __IO uint32_t ctrl; /* 0x0000 RTC Timer Control */
<> 150:02e0a0aed4ec 66 __IO uint32_t timer; /* 0x0004 RTC Timer Count Value */
<> 150:02e0a0aed4ec 67 __IO uint32_t comp[2]; /* 0x0008-0x000C RTC Time of Day Alarm [0..1] Compare Register */
<> 150:02e0a0aed4ec 68 __IO uint32_t flags; /* 0x0010 CPU Interrupt and RTC Domain Flags */
<> 150:02e0a0aed4ec 69 __IO uint32_t snz_val; /* 0x0014 RTC Timer Alarm Snooze Value */
<> 150:02e0a0aed4ec 70 __IO uint32_t inten; /* 0x0018 Interrupt Enable Controls */
<> 150:02e0a0aed4ec 71 __IO uint32_t prescale; /* 0x001C RTC Timer Prescale Setting */
<> 150:02e0a0aed4ec 72 __I uint32_t rsv020; /* 0x0020 */
<> 150:02e0a0aed4ec 73 __IO uint32_t prescale_mask; /* 0x0024 RTC Timer Prescale Compare Mask */
<> 150:02e0a0aed4ec 74 __IO uint32_t trim_ctrl; /* 0x0028 RTC Timer Trim Controls */
<> 150:02e0a0aed4ec 75 __IO uint32_t trim_value; /* 0x002C RTC Timer Trim Adjustment Interval */
<> 150:02e0a0aed4ec 76 } mxc_rtctmr_regs_t;
<> 150:02e0a0aed4ec 77
<> 150:02e0a0aed4ec 78
<> 150:02e0a0aed4ec 79 /* Offset Register Description
<> 150:02e0a0aed4ec 80 ============= ============================================================================ */
<> 150:02e0a0aed4ec 81 typedef struct {
<> 150:02e0a0aed4ec 82 __IO uint32_t nano_cntr; /* 0x0000 Nano Oscillator Counter Read Register */
<> 150:02e0a0aed4ec 83 __IO uint32_t clk_ctrl; /* 0x0004 RTC Clock Control Settings */
<> 150:02e0a0aed4ec 84 __I uint32_t rsv008; /* 0x0008 */
<> 150:02e0a0aed4ec 85 __IO uint32_t osc_ctrl; /* 0x000C RTC Oscillator Control */
<> 150:02e0a0aed4ec 86 } mxc_rtccfg_regs_t;
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88
<> 150:02e0a0aed4ec 89 /*
<> 150:02e0a0aed4ec 90 Register offsets for module RTC.
<> 150:02e0a0aed4ec 91 */
<> 150:02e0a0aed4ec 92
<> 150:02e0a0aed4ec 93 #define MXC_R_RTCTMR_OFFS_CTRL ((uint32_t)0x00000000UL)
<> 150:02e0a0aed4ec 94 #define MXC_R_RTCTMR_OFFS_TIMER ((uint32_t)0x00000004UL)
<> 150:02e0a0aed4ec 95 #define MXC_R_RTCTMR_OFFS_COMP0 ((uint32_t)0x00000008UL)
<> 150:02e0a0aed4ec 96 #define MXC_R_RTCTMR_OFFS_COMP1 ((uint32_t)0x0000000CUL)
<> 150:02e0a0aed4ec 97 #define MXC_R_RTCTMR_OFFS_FLAGS ((uint32_t)0x00000010UL)
<> 150:02e0a0aed4ec 98 #define MXC_R_RTCTMR_OFFS_SNZ_VAL ((uint32_t)0x00000014UL)
<> 150:02e0a0aed4ec 99 #define MXC_R_RTCTMR_OFFS_INTEN ((uint32_t)0x00000018UL)
<> 150:02e0a0aed4ec 100 #define MXC_R_RTCTMR_OFFS_PRESCALE ((uint32_t)0x0000001CUL)
<> 150:02e0a0aed4ec 101 #define MXC_R_RTCTMR_OFFS_PRESCALE_MASK ((uint32_t)0x00000024UL)
<> 150:02e0a0aed4ec 102 #define MXC_R_RTCTMR_OFFS_TRIM_CTRL ((uint32_t)0x00000028UL)
<> 150:02e0a0aed4ec 103 #define MXC_R_RTCTMR_OFFS_TRIM_VALUE ((uint32_t)0x0000002CUL)
<> 150:02e0a0aed4ec 104 #define MXC_R_RTCCFG_OFFS_NANO_CNTR ((uint32_t)0x00000000UL)
<> 150:02e0a0aed4ec 105 #define MXC_R_RTCCFG_OFFS_CLK_CTRL ((uint32_t)0x00000004UL)
<> 150:02e0a0aed4ec 106 #define MXC_R_RTCCFG_OFFS_OSC_CTRL ((uint32_t)0x0000000CUL)
<> 150:02e0a0aed4ec 107
<> 150:02e0a0aed4ec 108
<> 150:02e0a0aed4ec 109 /*
<> 150:02e0a0aed4ec 110 Field positions and masks for module RTC.
<> 150:02e0a0aed4ec 111 */
<> 150:02e0a0aed4ec 112
<> 150:02e0a0aed4ec 113 #define MXC_F_RTC_CTRL_ENABLE_POS 0
<> 150:02e0a0aed4ec 114 #define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ENABLE_POS))
<> 150:02e0a0aed4ec 115 #define MXC_F_RTC_CTRL_CLEAR_POS 1
<> 150:02e0a0aed4ec 116 #define MXC_F_RTC_CTRL_CLEAR ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLEAR_POS))
<> 150:02e0a0aed4ec 117 #define MXC_F_RTC_CTRL_PENDING_POS 2
<> 150:02e0a0aed4ec 118 #define MXC_F_RTC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PENDING_POS))
<> 150:02e0a0aed4ec 119 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS 3
<> 150:02e0a0aed4ec 120 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS))
<> 150:02e0a0aed4ec 121 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS 4
<> 150:02e0a0aed4ec 122 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS))
<> 150:02e0a0aed4ec 123 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS 5
<> 150:02e0a0aed4ec 124 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS))
<> 150:02e0a0aed4ec 125 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS 6
<> 150:02e0a0aed4ec 126 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE ((uint32_t)(0x00000003UL << MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS))
<> 150:02e0a0aed4ec 127 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS 16
<> 150:02e0a0aed4ec 128 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS))
<> 150:02e0a0aed4ec 129 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS 17
<> 150:02e0a0aed4ec 130 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS))
<> 150:02e0a0aed4ec 131 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS 18
<> 150:02e0a0aed4ec 132 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS))
<> 150:02e0a0aed4ec 133 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS 19
<> 150:02e0a0aed4ec 134 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS))
<> 150:02e0a0aed4ec 135 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS 20
<> 150:02e0a0aed4ec 136 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS))
<> 150:02e0a0aed4ec 137 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS 21
<> 150:02e0a0aed4ec 138 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS))
<> 150:02e0a0aed4ec 139 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS 22
<> 150:02e0a0aed4ec 140 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS))
<> 150:02e0a0aed4ec 141 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS 23
<> 150:02e0a0aed4ec 142 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS))
<> 150:02e0a0aed4ec 143 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS 24
<> 150:02e0a0aed4ec 144 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS))
<> 150:02e0a0aed4ec 145 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS 25
<> 150:02e0a0aed4ec 146 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS))
<> 150:02e0a0aed4ec 147 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS 26
<> 150:02e0a0aed4ec 148 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS))
<> 150:02e0a0aed4ec 149 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS 27
<> 150:02e0a0aed4ec 150 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS))
<> 150:02e0a0aed4ec 151 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS 28
<> 150:02e0a0aed4ec 152 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS))
<> 150:02e0a0aed4ec 153 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS 29
<> 150:02e0a0aed4ec 154 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS))
<> 150:02e0a0aed4ec 155 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS 30
<> 150:02e0a0aed4ec 156 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0 ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS))
<> 150:02e0a0aed4ec 157
<> 150:02e0a0aed4ec 158 #define MXC_F_RTC_FLAGS_COMP0_POS 0
<> 150:02e0a0aed4ec 159 #define MXC_F_RTC_FLAGS_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_POS))
<> 150:02e0a0aed4ec 160 #define MXC_F_RTC_FLAGS_COMP1_POS 1
<> 150:02e0a0aed4ec 161 #define MXC_F_RTC_FLAGS_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_POS))
<> 150:02e0a0aed4ec 162 #define MXC_F_RTC_FLAGS_PRESCALE_COMP_POS 2
<> 150:02e0a0aed4ec 163 #define MXC_F_RTC_FLAGS_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCALE_COMP_POS))
<> 150:02e0a0aed4ec 164 #define MXC_F_RTC_FLAGS_OVERFLOW_POS 3
<> 150:02e0a0aed4ec 165 #define MXC_F_RTC_FLAGS_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_POS))
<> 150:02e0a0aed4ec 166 #define MXC_F_RTC_FLAGS_TRIM_POS 4
<> 150:02e0a0aed4ec 167 #define MXC_F_RTC_FLAGS_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_POS))
<> 150:02e0a0aed4ec 168 #define MXC_F_RTC_FLAGS_SNOOZE_POS 5
<> 150:02e0a0aed4ec 169 #define MXC_F_RTC_FLAGS_SNOOZE ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_POS))
<> 150:02e0a0aed4ec 170 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS 8
<> 150:02e0a0aed4ec 171 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS))
<> 150:02e0a0aed4ec 172 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS 9
<> 150:02e0a0aed4ec 173 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS))
<> 150:02e0a0aed4ec 174 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS 10
<> 150:02e0a0aed4ec 175 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS))
<> 150:02e0a0aed4ec 176 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS 11
<> 150:02e0a0aed4ec 177 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS))
<> 150:02e0a0aed4ec 178 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS 12
<> 150:02e0a0aed4ec 179 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS))
<> 150:02e0a0aed4ec 180 #define MXC_F_RTC_FLAGS_SNOOZE_A_POS 28
<> 150:02e0a0aed4ec 181 #define MXC_F_RTC_FLAGS_SNOOZE_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_A_POS))
<> 150:02e0a0aed4ec 182 #define MXC_F_RTC_FLAGS_SNOOZE_B_POS 29
<> 150:02e0a0aed4ec 183 #define MXC_F_RTC_FLAGS_SNOOZE_B ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_B_POS))
<> 150:02e0a0aed4ec 184 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS 31
<> 150:02e0a0aed4ec 185 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS))
<> 150:02e0a0aed4ec 186
<> 150:02e0a0aed4ec 187 #define MXC_F_RTC_SNZ_VAL_VALUE_POS 0
<> 150:02e0a0aed4ec 188 #define MXC_F_RTC_SNZ_VAL_VALUE ((uint32_t)(0x000003FFUL << MXC_F_RTC_SNZ_VAL_VALUE_POS))
<> 150:02e0a0aed4ec 189
<> 150:02e0a0aed4ec 190 #define MXC_F_RTC_INTEN_COMP0_POS 0
<> 150:02e0a0aed4ec 191 #define MXC_F_RTC_INTEN_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP0_POS))
<> 150:02e0a0aed4ec 192 #define MXC_F_RTC_INTEN_COMP1_POS 1
<> 150:02e0a0aed4ec 193 #define MXC_F_RTC_INTEN_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP1_POS))
<> 150:02e0a0aed4ec 194 #define MXC_F_RTC_INTEN_PRESCALE_COMP_POS 2
<> 150:02e0a0aed4ec 195 #define MXC_F_RTC_INTEN_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_PRESCALE_COMP_POS))
<> 150:02e0a0aed4ec 196 #define MXC_F_RTC_INTEN_OVERFLOW_POS 3
<> 150:02e0a0aed4ec 197 #define MXC_F_RTC_INTEN_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_OVERFLOW_POS))
<> 150:02e0a0aed4ec 198 #define MXC_F_RTC_INTEN_TRIM_POS 4
<> 150:02e0a0aed4ec 199 #define MXC_F_RTC_INTEN_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_TRIM_POS))
<> 150:02e0a0aed4ec 200
<> 150:02e0a0aed4ec 201 #define MXC_F_RTC_PRESCALE_PRESCALE_POS 0
<> 150:02e0a0aed4ec 202 #define MXC_F_RTC_PRESCALE_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_PRESCALE_POS))
<> 150:02e0a0aed4ec 203
<> 150:02e0a0aed4ec 204 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS 0
<> 150:02e0a0aed4ec 205 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS))
<> 150:02e0a0aed4ec 206
<> 150:02e0a0aed4ec 207 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS 0
<> 150:02e0a0aed4ec 208 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS))
<> 150:02e0a0aed4ec 209 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS 1
<> 150:02e0a0aed4ec 210 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS))
<> 150:02e0a0aed4ec 211 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS 2
<> 150:02e0a0aed4ec 212 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS))
<> 150:02e0a0aed4ec 213
<> 150:02e0a0aed4ec 214 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS 0
<> 150:02e0a0aed4ec 215 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE ((uint32_t)(0x0003FFFFUL << MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS))
<> 150:02e0a0aed4ec 216 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS 18
<> 150:02e0a0aed4ec 217 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS))
<> 150:02e0a0aed4ec 218
<> 150:02e0a0aed4ec 219 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS 0
<> 150:02e0a0aed4ec 220 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER ((uint32_t)(0x0000FFFFUL << MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS))
<> 150:02e0a0aed4ec 221
<> 150:02e0a0aed4ec 222 #define MXC_F_RTC_CLK_CTRL_OSC1_EN_POS 0
<> 150:02e0a0aed4ec 223 #define MXC_F_RTC_CLK_CTRL_OSC1_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC1_EN_POS))
<> 150:02e0a0aed4ec 224 #define MXC_F_RTC_CLK_CTRL_OSC2_EN_POS 1
<> 150:02e0a0aed4ec 225 #define MXC_F_RTC_CLK_CTRL_OSC2_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC2_EN_POS))
<> 150:02e0a0aed4ec 226 #define MXC_F_RTC_CLK_CTRL_NANO_EN_POS 2
<> 150:02e0a0aed4ec 227 #define MXC_F_RTC_CLK_CTRL_NANO_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_NANO_EN_POS))
<> 150:02e0a0aed4ec 228
<> 150:02e0a0aed4ec 229 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS 0
<> 150:02e0a0aed4ec 230 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS))
<> 150:02e0a0aed4ec 231 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS 1
<> 150:02e0a0aed4ec 232 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS))
<> 150:02e0a0aed4ec 233 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS 2
<> 150:02e0a0aed4ec 234 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS))
<> 150:02e0a0aed4ec 235 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS 3
<> 150:02e0a0aed4ec 236 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS))
<> 150:02e0a0aed4ec 237 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS 14
<> 150:02e0a0aed4ec 238 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS))
<> 150:02e0a0aed4ec 239
<> 150:02e0a0aed4ec 240 /*
<> 150:02e0a0aed4ec 241 Field values
<> 150:02e0a0aed4ec 242 */
<> 150:02e0a0aed4ec 243
<> 150:02e0a0aed4ec 244 #define MXC_V_RTC_CTRL_SNOOZE_DISABLE ((uint32_t)(0x00000000UL))
<> 150:02e0a0aed4ec 245 #define MXC_V_RTC_CTRL_SNOOZE_MODE_A ((uint32_t)(0x00000001UL))
<> 150:02e0a0aed4ec 246 #define MXC_V_RTC_CTRL_SNOOZE_MODE_B ((uint32_t)(0x00000002UL))
<> 150:02e0a0aed4ec 247
<> 150:02e0a0aed4ec 248 #define MXC_V_RTC_PRESCALE_DIV_2_0 ((uint32_t)(0x00000000UL))
<> 150:02e0a0aed4ec 249 #define MXC_V_RTC_PRESCALE_DIV_2_1 ((uint32_t)(0x00000001UL))
<> 150:02e0a0aed4ec 250 #define MXC_V_RTC_PRESCALE_DIV_2_2 ((uint32_t)(0x00000002UL))
<> 150:02e0a0aed4ec 251 #define MXC_V_RTC_PRESCALE_DIV_2_3 ((uint32_t)(0x00000003UL))
<> 150:02e0a0aed4ec 252 #define MXC_V_RTC_PRESCALE_DIV_2_4 ((uint32_t)(0x00000004UL))
<> 150:02e0a0aed4ec 253 #define MXC_V_RTC_PRESCALE_DIV_2_5 ((uint32_t)(0x00000005UL))
<> 150:02e0a0aed4ec 254 #define MXC_V_RTC_PRESCALE_DIV_2_6 ((uint32_t)(0x00000006UL))
<> 150:02e0a0aed4ec 255 #define MXC_V_RTC_PRESCALE_DIV_2_7 ((uint32_t)(0x00000007UL))
<> 150:02e0a0aed4ec 256 #define MXC_V_RTC_PRESCALE_DIV_2_8 ((uint32_t)(0x00000008UL))
<> 150:02e0a0aed4ec 257 #define MXC_V_RTC_PRESCALE_DIV_2_9 ((uint32_t)(0x00000009UL))
<> 150:02e0a0aed4ec 258 #define MXC_V_RTC_PRESCALE_DIV_2_10 ((uint32_t)(0x0000000AUL))
<> 150:02e0a0aed4ec 259 #define MXC_V_RTC_PRESCALE_DIV_2_11 ((uint32_t)(0x0000000BUL))
<> 150:02e0a0aed4ec 260 #define MXC_V_RTC_PRESCALE_DIV_2_12 ((uint32_t)(0x0000000CUL))
<> 150:02e0a0aed4ec 261
<> 150:02e0a0aed4ec 262
<> 150:02e0a0aed4ec 263 #ifdef __cplusplus
<> 150:02e0a0aed4ec 264 }
<> 150:02e0a0aed4ec 265 #endif
<> 150:02e0a0aed4ec 266
<> 150:02e0a0aed4ec 267 #endif /* _MXC_RTC_REGS_H_ */
<> 150:02e0a0aed4ec 268