t
Fork of mbed-dev by
Diff: targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_stm32f4xx.c
- Revision:
- 167:e84263d55307
- Parent:
- 160:d5399cc887bb
--- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_stm32f4xx.c Thu Jun 08 15:02:37 2017 +0100 +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_stm32f4xx.c Wed Jun 21 17:46:44 2017 +0100 @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32f4xx.c * @author MCD Application Team - * @version V2.5.0 - * @date 22-April-2016 + * @version V2.6.1 + * @date 14-February-2017 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. * * This file provides two functions and one global variable to be called from @@ -79,7 +79,6 @@ #include "stm32f4xx.h" -#include "hal_tick.h" #include "nvic_addr.h" #if !defined (HSE_VALUE) @@ -157,7 +156,7 @@ */ uint32_t SystemCoreClock = 168000000; const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; - +const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; /** * @} */ @@ -211,18 +210,6 @@ SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ - /* Configure the Cube driver */ - SystemCoreClock = 16000000; // At this stage the HSI is used as system clock - HAL_Init(); - - /* Configure the System clock source, PLL Multiplier and Divider factors, - AHB/APBx prescalers and Flash settings */ - SetSysClock(); - SystemCoreClockUpdate(); - - /* Reset the timer to avoid issues after the RAM initialization */ - TIM_MST_RESET_ON; - TIM_MST_RESET_OFF; } /** @@ -310,8 +297,8 @@ } #if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM) -#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ - defined(STM32F469xx) || defined(STM32F479xx) +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) /** * @brief Setup the external memory controller. * Called in startup_stm32f4xx.s before jump to main. @@ -786,7 +773,7 @@ RCC_OscInitTypeDef RCC_OscInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct; - __PWR_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); @@ -824,7 +811,7 @@ RCC_OscInitTypeDef RCC_OscInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct; - __PWR_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); @@ -838,7 +825,7 @@ RCC_OscInitStruct.PLL.PLLQ = 7; HAL_RCC_OscConfig(&RCC_OscInitStruct); - HAL_PWREx_ActivateOverDrive(); + HAL_PWREx_EnableOverDrive(); RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1 |RCC_CLOCKTYPE_PCLK2;