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targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 151:5eaa88a5bcc7
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /** |
<> | 149:156823d33999 | 2 | ****************************************************************************** |
<> | 149:156823d33999 | 3 | * @file trim_map.h |
<> | 149:156823d33999 | 4 | * @brief trim register map |
<> | 149:156823d33999 | 5 | * @internal |
<> | 149:156823d33999 | 6 | * @author ON Semiconductor |
<> | 149:156823d33999 | 7 | * $Rev: 3727 $ |
<> | 149:156823d33999 | 8 | * $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $ |
<> | 149:156823d33999 | 9 | ****************************************************************************** |
<> | 149:156823d33999 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
<> | 149:156823d33999 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
<> | 149:156823d33999 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
<> | 149:156823d33999 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
<> | 149:156823d33999 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
<> | 149:156823d33999 | 15 | * if applicable the software license agreement. Do not use this software and/or |
<> | 149:156823d33999 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
<> | 149:156823d33999 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
<> | 149:156823d33999 | 18 | * terms and conditions. |
<> | 149:156823d33999 | 19 | * |
<> | 149:156823d33999 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 149:156823d33999 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 149:156823d33999 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 149:156823d33999 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 149:156823d33999 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 149:156823d33999 | 25 | * @endinternal |
<> | 149:156823d33999 | 26 | * |
<> | 149:156823d33999 | 27 | * @ingroup trim |
<> | 149:156823d33999 | 28 | * |
<> | 149:156823d33999 | 29 | * @details |
<> | 149:156823d33999 | 30 | * <p> |
<> | 149:156823d33999 | 31 | * Rf and Analog control hw module register map |
<> | 149:156823d33999 | 32 | * </p> |
<> | 149:156823d33999 | 33 | */ |
<> | 149:156823d33999 | 34 | |
<> | 149:156823d33999 | 35 | #ifndef TRIM_MAP_H_ |
<> | 149:156823d33999 | 36 | #define TRIM_MAP_H_ |
<> | 149:156823d33999 | 37 | |
<> | 149:156823d33999 | 38 | /************************************************************************************************* |
<> | 149:156823d33999 | 39 | * * |
<> | 149:156823d33999 | 40 | * Header files * |
<> | 149:156823d33999 | 41 | * * |
<> | 149:156823d33999 | 42 | *************************************************************************************************/ |
<> | 149:156823d33999 | 43 | |
<> | 149:156823d33999 | 44 | #include "architecture.h" |
<> | 149:156823d33999 | 45 | |
<> | 149:156823d33999 | 46 | /************************************************************************************************** |
<> | 149:156823d33999 | 47 | * * |
<> | 149:156823d33999 | 48 | * Type definitions * |
<> | 149:156823d33999 | 49 | * * |
<> | 149:156823d33999 | 50 | **************************************************************************************************/ |
<> | 149:156823d33999 | 51 | |
<> | 149:156823d33999 | 52 | /** trim register map */ |
<> | 150:02e0a0aed4ec | 53 | typedef struct { |
<> | 150:02e0a0aed4ec | 54 | __I uint32_t PAD0; /**< 0x1FA0 */ |
<> | 150:02e0a0aed4ec | 55 | __I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */ |
<> | 150:02e0a0aed4ec | 56 | __I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */ |
<> | 150:02e0a0aed4ec | 57 | __I uint32_t TRIM_32K_EXT; /**< 0x1FAC */ |
<> | 150:02e0a0aed4ec | 58 | __I uint32_t TRIM_32M_EXT; /**< 0x1FB0 */ |
<> | 150:02e0a0aed4ec | 59 | __I uint32_t FVVDH_COMP_TH; /**< 0x1FB4 */ |
<> | 149:156823d33999 | 60 | union { |
<> | 150:02e0a0aed4ec | 61 | struct { |
<> | 149:156823d33999 | 62 | __I uint32_t CHANNEL11:4; |
<> | 149:156823d33999 | 63 | __I uint32_t CHANNEL12:4; |
<> | 149:156823d33999 | 64 | __I uint32_t CHANNEL13:4; |
<> | 149:156823d33999 | 65 | __I uint32_t CHANNEL14:4; |
<> | 149:156823d33999 | 66 | __I uint32_t CHANNEL15:4; |
<> | 149:156823d33999 | 67 | __I uint32_t CHANNEL16:4; |
<> | 149:156823d33999 | 68 | __I uint32_t CHANNEL17:4; |
<> | 149:156823d33999 | 69 | __I uint32_t CHANNEL18:4; |
<> | 149:156823d33999 | 70 | } BITS; |
<> | 149:156823d33999 | 71 | __I uint32_t WORD; |
<> | 149:156823d33999 | 72 | } TX_VCO_LUT1; /**< 0x1FB8 */ |
<> | 149:156823d33999 | 73 | union { |
<> | 149:156823d33999 | 74 | struct { |
<> | 149:156823d33999 | 75 | __I uint32_t CHANNEL19:4; |
<> | 149:156823d33999 | 76 | __I uint32_t CHANNEL20:4; |
<> | 149:156823d33999 | 77 | __I uint32_t CHANNEL21:4; |
<> | 149:156823d33999 | 78 | __I uint32_t CHANNEL22:4; |
<> | 149:156823d33999 | 79 | __I uint32_t CHANNEL23:4; |
<> | 149:156823d33999 | 80 | __I uint32_t CHANNEL24:4; |
<> | 149:156823d33999 | 81 | __I uint32_t CHANNEL25:4; |
<> | 149:156823d33999 | 82 | __I uint32_t CHANNEL26:4; |
<> | 149:156823d33999 | 83 | } BITS; |
<> | 149:156823d33999 | 84 | __I uint32_t WORD; |
<> | 149:156823d33999 | 85 | } TX_VCO_LUT2; /**< 0x1FBC */ |
<> | 149:156823d33999 | 86 | union { |
<> | 149:156823d33999 | 87 | struct { |
<> | 149:156823d33999 | 88 | __I uint32_t CHANNEL11:4; |
<> | 149:156823d33999 | 89 | __I uint32_t CHANNEL12:4; |
<> | 149:156823d33999 | 90 | __I uint32_t CHANNEL13:4; |
<> | 149:156823d33999 | 91 | __I uint32_t CHANNEL14:4; |
<> | 149:156823d33999 | 92 | __I uint32_t CHANNEL15:4; |
<> | 149:156823d33999 | 93 | __I uint32_t CHANNEL16:4; |
<> | 149:156823d33999 | 94 | __I uint32_t CHANNEL17:4; |
<> | 149:156823d33999 | 95 | __I uint32_t CHANNEL18:4; |
<> | 149:156823d33999 | 96 | } BITS; |
<> | 149:156823d33999 | 97 | __I uint32_t WORD; |
<> | 149:156823d33999 | 98 | } RX_VCO_LUT1; /**< 0x1FC0 */ |
<> | 149:156823d33999 | 99 | union { |
<> | 149:156823d33999 | 100 | struct { |
<> | 149:156823d33999 | 101 | __I uint32_t CHANNEL19:4; |
<> | 149:156823d33999 | 102 | __I uint32_t CHANNEL20:4; |
<> | 149:156823d33999 | 103 | __I uint32_t CHANNEL21:4; |
<> | 149:156823d33999 | 104 | __I uint32_t CHANNEL22:4; |
<> | 149:156823d33999 | 105 | __I uint32_t CHANNEL23:4; |
<> | 149:156823d33999 | 106 | __I uint32_t CHANNEL24:4; |
<> | 149:156823d33999 | 107 | __I uint32_t CHANNEL25:4; |
<> | 149:156823d33999 | 108 | __I uint32_t CHANNEL26:4; |
<> | 149:156823d33999 | 109 | } BITS; |
<> | 149:156823d33999 | 110 | __I uint32_t WORD; |
<> | 149:156823d33999 | 111 | } RX_VCO_LUT2; /**< 0x1FC4 */ |
<> | 149:156823d33999 | 112 | __I uint32_t ON_RESERVED0; /**< 0x1FC8 */ |
<> | 149:156823d33999 | 113 | __I uint32_t ON_RESERVED1; /**< 0x1FCC */ |
<> | 149:156823d33999 | 114 | __I uint32_t ADC_OFFSET_TRIM; /**< 0x1FD0 */ |
<> | 149:156823d33999 | 115 | __I uint32_t TX_PRE_CHIPS; /**< 0x1FD4 */ |
<> | 151:5eaa88a5bcc7 | 116 | __I uint32_t TX_TRIM; /**< 0x1FD8 */ |
<> | 149:156823d33999 | 117 | __I uint32_t PLL_VCO_TAP_LOCATION; /**< 0x1FDC */ |
<> | 149:156823d33999 | 118 | __I uint32_t PLL_TRIM; /**< 0x1FE0 */ |
<> | 149:156823d33999 | 119 | __I uint32_t RSSI_OFFSET; /**< 0x1FE4 */ |
<> | 149:156823d33999 | 120 | __I uint32_t RX_CHAIN_TRIM; /**< 0x1FE8 */ |
<> | 149:156823d33999 | 121 | __I uint32_t PMU_TRIM; /**< 0x1FEC */ |
<> | 149:156823d33999 | 122 | __I uint32_t WR_SEED_RD_RAND; /**< 0x1FF0 */ |
<> | 149:156823d33999 | 123 | __I uint32_t WAFER_LOCATION; /**< 0x1FF4 */ |
<> | 149:156823d33999 | 124 | __I uint32_t LOT_NUMBER; /**< 0x1FF8 */ |
<> | 149:156823d33999 | 125 | __I uint32_t REVISION_CODE; /**< 0x1FFC */ |
<> | 149:156823d33999 | 126 | } TrimReg_t, *TrimReg_pt; |
<> | 149:156823d33999 | 127 | |
<> | 151:5eaa88a5bcc7 | 128 | |
<> | 151:5eaa88a5bcc7 | 129 | /** User defined trim register map */ |
<> | 151:5eaa88a5bcc7 | 130 | typedef struct { |
<> | 151:5eaa88a5bcc7 | 131 | __IO uint32_t MAC_ADDRESS_LOW; /**< 0x2800 */ |
<> | 151:5eaa88a5bcc7 | 132 | __IO uint32_t MAC_ADDRESS_HIGH; /**< 0x2804 */ |
<> | 151:5eaa88a5bcc7 | 133 | __IO uint32_t TRIM_32K_EXT; /**< 0x2808 */ |
<> | 151:5eaa88a5bcc7 | 134 | __IO uint32_t TRIM_32M_EXT; /**< 0x280C */ |
<> | 151:5eaa88a5bcc7 | 135 | __IO uint32_t RSSI_OFFSET; /**< 0x2810 */ |
<> | 151:5eaa88a5bcc7 | 136 | __IO uint32_t TX_TRIM; /**< 0x2814 */ |
<> | 151:5eaa88a5bcc7 | 137 | } UserTrimReg_t, *UserTrimReg_pt; |
<> | 149:156823d33999 | 138 | #endif /* TRIM_MAP_H_ */ |