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targets/TARGET_ONSEMI/TARGET_NCS36510/spi.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 149:156823d33999
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /** |
<> | 149:156823d33999 | 2 | ****************************************************************************** |
<> | 149:156823d33999 | 3 | * @file spi.h |
<> | 149:156823d33999 | 4 | * @brief Inlcude file of a SPI master driver |
<> | 149:156823d33999 | 5 | * @internal |
<> | 149:156823d33999 | 6 | * @author ON Semiconductor |
<> | 149:156823d33999 | 7 | * @version $Rev: $ |
<> | 149:156823d33999 | 8 | * @date $Date: 2016-02-05 $ |
<> | 149:156823d33999 | 9 | ****************************************************************************** |
<> | 149:156823d33999 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
<> | 149:156823d33999 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
<> | 149:156823d33999 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
<> | 149:156823d33999 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
<> | 149:156823d33999 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
<> | 149:156823d33999 | 15 | * if applicable the software license agreement. Do not use this software and/or |
<> | 149:156823d33999 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
<> | 149:156823d33999 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
<> | 149:156823d33999 | 18 | * terms and conditions. |
<> | 149:156823d33999 | 19 | * |
<> | 149:156823d33999 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 149:156823d33999 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 149:156823d33999 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 149:156823d33999 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 149:156823d33999 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 149:156823d33999 | 25 | * @endinternal |
<> | 149:156823d33999 | 26 | * |
<> | 149:156823d33999 | 27 | * @ingroup spi_h |
<> | 149:156823d33999 | 28 | * |
<> | 149:156823d33999 | 29 | * @details |
<> | 149:156823d33999 | 30 | * |
<> | 149:156823d33999 | 31 | */ |
<> | 149:156823d33999 | 32 | #ifndef SPI_H_ |
<> | 149:156823d33999 | 33 | #define SPI_H_ |
<> | 149:156823d33999 | 34 | |
<> | 149:156823d33999 | 35 | #include "device.h" |
<> | 149:156823d33999 | 36 | #include "spi_api.h" |
<> | 149:156823d33999 | 37 | |
<> | 149:156823d33999 | 38 | #if DEVICE_SPI |
<> | 149:156823d33999 | 39 | |
<> | 149:156823d33999 | 40 | #ifdef __cplusplus |
<> | 149:156823d33999 | 41 | extern "C" { |
<> | 149:156823d33999 | 42 | #endif |
<> | 149:156823d33999 | 43 | |
<> | 149:156823d33999 | 44 | /* Miscellaneous I/O and control operations codes */ |
<> | 149:156823d33999 | 45 | #define SPI_IPC7207_IOCTL_GET_SLAVE_SELECT (0x1) /**< <b>Ioctl request code</b>: Reading slaveSelect register */ |
<> | 149:156823d33999 | 46 | #define SPI_IPC7207_IOCTL_SET_SLAVE_SELECT (0x2) /**< <b>Ioctl request code</b>: Setting slaveSelect register */ |
<> | 149:156823d33999 | 47 | #define SPI_IPC7207_IOCTL_FLUSH (0x3) /**< <b>Ioctl request code</b>: Flushin FIFOs and serial shift registers */ |
<> | 149:156823d33999 | 48 | |
<> | 149:156823d33999 | 49 | /* Control register bit positions */ |
<> | 149:156823d33999 | 50 | #define SPI_WORD_WIDTH_BIT_POS 6 |
<> | 149:156823d33999 | 51 | #define SPI_SLAVE_MASTER_BIT_POS 5 |
<> | 149:156823d33999 | 52 | #define SPI_CPOL_BIT_POS 4 |
<> | 149:156823d33999 | 53 | #define SPI_CPHA_BIT_POS 3 |
<> | 149:156823d33999 | 54 | #define SPI_ENDIAN_BIT_POS 2 |
<> | 149:156823d33999 | 55 | #define SPI_SAMPLE_EDGE_BIT_POS 1 |
<> | 149:156823d33999 | 56 | #define SPI_PORT_ENABLE_BIT_POS 0 |
<> | 149:156823d33999 | 57 | |
<> | 149:156823d33999 | 58 | /* COntrol register bits */ |
<> | 149:156823d33999 | 59 | #define SPI_ENDIAN_MSB_FIRST 1 |
<> | 149:156823d33999 | 60 | #define SPI_CPOL_IDLE_LOW 0 |
<> | 149:156823d33999 | 61 | #define SPI_CPHA_BEFORE_1ST_EDGE 0 |
<> | 149:156823d33999 | 62 | #define SPI_MASTER_MODE 1 |
<> | 149:156823d33999 | 63 | #define SPI_WORD_WIDTH_8_BITS 0 |
<> | 149:156823d33999 | 64 | #define SPI_SAMPLE_OPP_CLK_EDGE_DATA 0 |
<> | 149:156823d33999 | 65 | #define SPI_SLAVE_SELECT_NORM_BEHAVE 0 |
<> | 149:156823d33999 | 66 | #define SPI_PORT_ENABLE 1 |
<> | 149:156823d33999 | 67 | |
<> | 149:156823d33999 | 68 | #define SPI_SLAVE_SELECT_DEFAULT 0x10 |
<> | 149:156823d33999 | 69 | |
<> | 149:156823d33999 | 70 | #define SPI_DEFAULT_CONFIG 0x25 |
<> | 149:156823d33999 | 71 | |
<> | 149:156823d33999 | 72 | #define SPI_DEFAULT_SPEED 1000000 |
<> | 149:156823d33999 | 73 | #define SPI_BYTE_MASK 0xFF |
<> | 149:156823d33999 | 74 | |
<> | 149:156823d33999 | 75 | extern void fSpiInit(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel); |
<> | 149:156823d33999 | 76 | extern void fSpiClose(spi_t *obj); |
<> | 149:156823d33999 | 77 | extern int fSpiWriteB(spi_t *obj, uint32_t const buf); |
<> | 149:156823d33999 | 78 | |
<> | 149:156823d33999 | 79 | #ifdef __cplusplus |
<> | 149:156823d33999 | 80 | } |
<> | 149:156823d33999 | 81 | #endif /* __cplusplus */ |
<> | 149:156823d33999 | 82 | |
<> | 149:156823d33999 | 83 | #endif /* DEVICE_SPI */ |
<> | 149:156823d33999 | 84 | |
<> | 149:156823d33999 | 85 | #endif /* SPI_H_ */ |