Amit Gandhi / sensen_copy_2

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targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/startup_NCS36510.s@178:c26431f84b0d, 2017-11-09 (annotated)

Committer:
amithy
Date:
Thu Nov 09 22:14:37 2017 +0000
Revision:
178:c26431f84b0d
Parent:
149:156823d33999 
test export

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* File: startup_ncs36510.S
<> 149:156823d33999 2 * Purpose: startup file for Cortex-M3 devices. Should use with
<> 149:156823d33999 3 * GCC for ARM Embedded Processors
<> 149:156823d33999 4 * Version: V2.00
<> 149:156823d33999 5 * Date: 15 Jan 2016
<> 149:156823d33999 6 *
<> 149:156823d33999 7 */
<> 149:156823d33999 8 /* Copyright (c) 2011 - 2014 ARM LIMITED
<> 149:156823d33999 9
<> 149:156823d33999 10 All rights reserved.
<> 149:156823d33999 11 Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 12 modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 13 - Redistributions of source code must retain the above copyright
<> 149:156823d33999 14 notice, this list of conditions and the following disclaimer.
<> 149:156823d33999 15 - Redistributions in binary form must reproduce the above copyright
<> 149:156823d33999 16 notice, this list of conditions and the following disclaimer in the
<> 149:156823d33999 17 documentation and/or other materials provided with the distribution.
<> 149:156823d33999 18 - Neither the name of ARM nor the names of its contributors may be used
<> 149:156823d33999 19 to endorse or promote products derived from this software without
<> 149:156823d33999 20 specific prior written permission.
<> 149:156823d33999 21 *
<> 149:156823d33999 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
<> 149:156823d33999 25 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
<> 149:156823d33999 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
<> 149:156823d33999 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
<> 149:156823d33999 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
<> 149:156823d33999 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
<> 149:156823d33999 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
<> 149:156823d33999 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
<> 149:156823d33999 32 POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 33 ---------------------------------------------------------------------------*/
<> 149:156823d33999 34
<> 149:156823d33999 35
<> 149:156823d33999 36 .syntax unified
<> 149:156823d33999 37 .arch armv7-m
<> 149:156823d33999 38
<> 149:156823d33999 39 .section .stack
<> 149:156823d33999 40 .align 3
<> 149:156823d33999 41 #ifdef __STACK_SIZE
<> 149:156823d33999 42 .equ Stack_Size, __STACK_SIZE
<> 149:156823d33999 43 #else
<> 149:156823d33999 44 .equ Stack_Size, 0x400
<> 149:156823d33999 45 #endif
<> 149:156823d33999 46 .globl __StackTop
<> 149:156823d33999 47 .globl __StackLimit
<> 149:156823d33999 48 __StackLimit:
<> 149:156823d33999 49 .space Stack_Size
<> 149:156823d33999 50 .size __StackLimit, . - __StackLimit
<> 149:156823d33999 51 __StackTop:
<> 149:156823d33999 52 .size __StackTop, . - __StackTop
<> 149:156823d33999 53
<> 149:156823d33999 54 .section .heap
<> 149:156823d33999 55 .align 3
<> 149:156823d33999 56 #ifdef __HEAP_SIZE
<> 149:156823d33999 57 .equ Heap_Size, __HEAP_SIZE
<> 149:156823d33999 58 #else
<> 149:156823d33999 59 .equ Heap_Size, 0x400
<> 149:156823d33999 60 #endif
<> 149:156823d33999 61 .globl __HeapBase
<> 149:156823d33999 62 .globl __HeapLimit
<> 149:156823d33999 63 __HeapBase:
<> 149:156823d33999 64 .space Heap_Size
<> 149:156823d33999 65 .size __HeapBase, . - __HeapBase
<> 149:156823d33999 66 __HeapLimit:
<> 149:156823d33999 67 .size __HeapLimit, . - __HeapLimit
<> 149:156823d33999 68
<> 149:156823d33999 69 .section .vector_table,"a",%progbits
<> 149:156823d33999 70 .align 2
<> 149:156823d33999 71 .globl __Vectors
<> 149:156823d33999 72 __Vectors:
<> 149:156823d33999 73 .long __StackTop /* Top of Stack */
<> 149:156823d33999 74 .long Reset_Handler /* Reset Handler */
<> 149:156823d33999 75 .long NMI_Handler /* NMI Handler */
<> 149:156823d33999 76 .long HardFault_Handler /* Hard Fault Handler */
<> 149:156823d33999 77 .long MemManage_Handler /* MPU Fault Handler */
<> 149:156823d33999 78 .long BusFault_Handler /* Bus Fault Handler */
<> 149:156823d33999 79 .long UsageFault_Handler /* Usage Fault Handler */
<> 149:156823d33999 80 .long 0 /* Reserved */
<> 149:156823d33999 81 .long 0 /* Reserved */
<> 149:156823d33999 82 .long 0 /* Reserved */
<> 149:156823d33999 83 .long 0 /* Reserved */
<> 149:156823d33999 84 .long SVC_Handler /* SVCall Handler */
<> 149:156823d33999 85 .long DebugMon_Handler /* Debug Monitor Handler */
<> 149:156823d33999 86 .long 0 /* Reserved */
<> 149:156823d33999 87 .long PendSV_Handler /* PendSV Handler */
<> 149:156823d33999 88 .long SysTick_Handler /* SysTick Handler */
<> 149:156823d33999 89
<> 149:156823d33999 90 /* External Interrupts */
<> 149:156823d33999 91 .long fIrqTim0Handler
<> 149:156823d33999 92 .long fIrqTim1Handler
<> 149:156823d33999 93 .long fIrqTim2Handler
<> 149:156823d33999 94 .long fIrqUart1Handler
<> 149:156823d33999 95 .long fIrqSpiHandler
<> 149:156823d33999 96 .long fIrqI2CHandler
<> 149:156823d33999 97 .long fIrqGpioHandler
<> 149:156823d33999 98 .long fIrqRtcHandler
<> 149:156823d33999 99 .long fIrqFlashHandler
<> 149:156823d33999 100 .long fIrqMacHwHandler
<> 149:156823d33999 101 .long fIrqAesHandler
<> 149:156823d33999 102 .long fIrqAdcHandler
<> 149:156823d33999 103 .long fIrqClockCalHandler
<> 149:156823d33999 104 .long fIrqUart2Handler
<> 149:156823d33999 105 .long fIrqUviHandler
<> 149:156823d33999 106 .long fIrqDmaHandler
<> 149:156823d33999 107 .long fIrqDbgPwrUpHandler
<> 149:156823d33999 108 .long fIrqSpi2Handler
<> 149:156823d33999 109 .long fIrqI2C2Handler
<> 149:156823d33999 110 .long fIrqFVDDHCompHandler
<> 149:156823d33999 111
<> 149:156823d33999 112 .size __Vectors, . - __Vectors
<> 149:156823d33999 113
<> 149:156823d33999 114 .section .text.Reset_Handler
<> 149:156823d33999 115 .thumb
<> 149:156823d33999 116 .thumb_func
<> 149:156823d33999 117 .align 2
<> 149:156823d33999 118 .globl Reset_Handler
<> 149:156823d33999 119 .type Reset_Handler, %function
<> 149:156823d33999 120 Reset_Handler:
<> 149:156823d33999 121 /* Loop to copy data from read only memory to RAM. The ranges
<> 149:156823d33999 122 * of copy from/to are specified by following symbols evaluated in
<> 149:156823d33999 123 * linker script.
<> 149:156823d33999 124 * __etext: End of code section, i.e., begin of data sections to copy from.
<> 149:156823d33999 125 * __data_start__/__data_end__: RAM address range that data should be
<> 149:156823d33999 126 * copied to. Both must be aligned to 4 bytes boundary. */
<> 149:156823d33999 127
<> 149:156823d33999 128 disable_watchdog:
<> 149:156823d33999 129 /*MPL - Need to implement?! */
<> 149:156823d33999 130
<> 149:156823d33999 131 ldr r1, =__etext
<> 149:156823d33999 132 ldr r2, =__data_start__
<> 149:156823d33999 133 ldr r3, =__data_end__
<> 149:156823d33999 134
<> 149:156823d33999 135 subs r3, r2
<> 149:156823d33999 136 ble .Lflash_to_ram_loop_end
<> 149:156823d33999 137
<> 149:156823d33999 138 movs r4, 0
<> 149:156823d33999 139 .Lflash_to_ram_loop:
<> 149:156823d33999 140 ldr r0, [r1,r4]
<> 149:156823d33999 141 str r0, [r2,r4]
<> 149:156823d33999 142 adds r4, 4
<> 149:156823d33999 143 cmp r4, r3
<> 149:156823d33999 144 blt .Lflash_to_ram_loop
<> 149:156823d33999 145 .Lflash_to_ram_loop_end:
<> 149:156823d33999 146
<> 149:156823d33999 147 ldr r0, =SystemInit
<> 149:156823d33999 148 blx r0
<> 149:156823d33999 149 /* TODO - Uncomment when uvisor support is added */
<> 149:156823d33999 150 /*
<> 149:156823d33999 151 ldr r0, =uvisor_init
<> 149:156823d33999 152 blx r0
<> 149:156823d33999 153 */
<> 149:156823d33999 154 ldr r0, =_start
<> 149:156823d33999 155 bx r0
<> 149:156823d33999 156 .pool
<> 149:156823d33999 157 .size Reset_Handler, . - Reset_Handler
<> 149:156823d33999 158
<> 149:156823d33999 159 .text
<> 149:156823d33999 160 /* Macro to define default handlers. Default handler
<> 149:156823d33999 161 * will be weak symbol and just dead loops. They can be
<> 149:156823d33999 162 * overwritten by other handlers */
<> 149:156823d33999 163 .macro def_default_handler handler_name
<> 149:156823d33999 164 .align 1
<> 149:156823d33999 165 .thumb_func
<> 149:156823d33999 166 .weak \handler_name
<> 149:156823d33999 167 .type \handler_name, %function
<> 149:156823d33999 168 \handler_name :
<> 149:156823d33999 169 b .
<> 149:156823d33999 170 .size \handler_name, . - \handler_name
<> 149:156823d33999 171 .endm
<> 149:156823d33999 172
<> 149:156823d33999 173 /* Exception Handlers */
<> 149:156823d33999 174
<> 149:156823d33999 175 def_default_handler NMI_Handler
<> 149:156823d33999 176 def_default_handler HardFault_Handler
<> 149:156823d33999 177 def_default_handler MemManage_Handler
<> 149:156823d33999 178 def_default_handler BusFault_Handler
<> 149:156823d33999 179 def_default_handler UsageFault_Handler
<> 149:156823d33999 180 def_default_handler SVC_Handler
<> 149:156823d33999 181 def_default_handler DebugMon_Handler
<> 149:156823d33999 182 def_default_handler PendSV_Handler
<> 149:156823d33999 183 def_default_handler SysTick_Handler
<> 149:156823d33999 184 def_default_handler Default_Handler
<> 149:156823d33999 185
<> 149:156823d33999 186 .macro def_irq_default_handler handler_name
<> 149:156823d33999 187 .weak \handler_name
<> 149:156823d33999 188 .set \handler_name, Default_Handler
<> 149:156823d33999 189 .endm
<> 149:156823d33999 190
<> 149:156823d33999 191 /* IRQ Handlers */
<> 149:156823d33999 192 def_irq_default_handler fIrqTim0Handler
<> 149:156823d33999 193 def_irq_default_handler fIrqTim1Handler
<> 149:156823d33999 194 def_irq_default_handler fIrqTim2Handler
<> 149:156823d33999 195 def_irq_default_handler fIrqUart1Handler
<> 149:156823d33999 196 def_irq_default_handler fIrqSpiHandler
<> 149:156823d33999 197 def_irq_default_handler fIrqI2CHandler
<> 149:156823d33999 198 def_irq_default_handler fIrqGpioHandler
<> 149:156823d33999 199 def_irq_default_handler fIrqRtcHandler
<> 149:156823d33999 200 def_irq_default_handler fIrqFlashHandler
<> 149:156823d33999 201 def_irq_default_handler fIrqMacHwHandler
<> 149:156823d33999 202 def_irq_default_handler fIrqAesHandler
<> 149:156823d33999 203 def_irq_default_handler fIrqAdcHandler
<> 149:156823d33999 204 def_irq_default_handler fIrqClockCalHandler
<> 149:156823d33999 205 def_irq_default_handler fIrqUart2Handler
<> 149:156823d33999 206 def_irq_default_handler fIrqUviHandler
<> 149:156823d33999 207 def_irq_default_handler fIrqDmaHandler
<> 149:156823d33999 208 def_irq_default_handler fIrqDbgPwrUpHandler
<> 149:156823d33999 209 def_irq_default_handler fIrqSpi2Handler
<> 149:156823d33999 210 def_irq_default_handler fIrqI2C2Handler
<> 149:156823d33999 211 def_irq_default_handler fIrqFVDDHCompHandler
<> 149:156823d33999 212 def_irq_default_handler DefaultISR
<> 149:156823d33999 213
<> 149:156823d33999 214 .end