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targets/TARGET_NXP/TARGET_LPC23XX/PeripheralNames.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 149:156823d33999
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
<> | 144:ef7eb2e8f9f7 | 17 | #define MBED_PERIPHERALNAMES_H |
<> | 144:ef7eb2e8f9f7 | 18 | |
<> | 144:ef7eb2e8f9f7 | 19 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 22 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 23 | #endif |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 26 | UART_0 = (int)LPC_UART0_BASE, |
<> | 144:ef7eb2e8f9f7 | 27 | UART_1 = (int)LPC_UART1_BASE, |
<> | 144:ef7eb2e8f9f7 | 28 | UART_2 = (int)LPC_UART2_BASE, |
<> | 144:ef7eb2e8f9f7 | 29 | UART_3 = (int)LPC_UART3_BASE |
<> | 144:ef7eb2e8f9f7 | 30 | } UARTName; |
<> | 144:ef7eb2e8f9f7 | 31 | |
<> | 144:ef7eb2e8f9f7 | 32 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 33 | ADC0_0 = 0, |
<> | 144:ef7eb2e8f9f7 | 34 | ADC0_1, |
<> | 144:ef7eb2e8f9f7 | 35 | ADC0_2, |
<> | 144:ef7eb2e8f9f7 | 36 | ADC0_3, |
<> | 144:ef7eb2e8f9f7 | 37 | ADC0_4, |
<> | 144:ef7eb2e8f9f7 | 38 | ADC0_5, |
<> | 144:ef7eb2e8f9f7 | 39 | ADC0_6, |
<> | 144:ef7eb2e8f9f7 | 40 | ADC0_7 |
<> | 144:ef7eb2e8f9f7 | 41 | } ADCName; |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 44 | DAC_0 = 0 |
<> | 144:ef7eb2e8f9f7 | 45 | } DACName; |
<> | 144:ef7eb2e8f9f7 | 46 | |
<> | 144:ef7eb2e8f9f7 | 47 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 48 | SPI_0 = (int)LPC_SSP0_BASE, |
<> | 144:ef7eb2e8f9f7 | 49 | SPI_1 = (int)LPC_SSP1_BASE |
<> | 144:ef7eb2e8f9f7 | 50 | } SPIName; |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 53 | I2C_0 = (int)LPC_I2C0_BASE, |
<> | 144:ef7eb2e8f9f7 | 54 | I2C_1 = (int)LPC_I2C1_BASE, |
<> | 144:ef7eb2e8f9f7 | 55 | I2C_2 = (int)LPC_I2C2_BASE |
<> | 144:ef7eb2e8f9f7 | 56 | } I2CName; |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 59 | PWM_1 = 1, |
<> | 144:ef7eb2e8f9f7 | 60 | PWM_2, |
<> | 144:ef7eb2e8f9f7 | 61 | PWM_3, |
<> | 144:ef7eb2e8f9f7 | 62 | PWM_4, |
<> | 144:ef7eb2e8f9f7 | 63 | PWM_5, |
<> | 144:ef7eb2e8f9f7 | 64 | PWM_6 |
<> | 144:ef7eb2e8f9f7 | 65 | } PWMName; |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | typedef enum { |
<> | 144:ef7eb2e8f9f7 | 68 | CAN_1 = (int)LPC_CAN1_BASE, |
<> | 144:ef7eb2e8f9f7 | 69 | CAN_2 = (int)LPC_CAN2_BASE |
<> | 144:ef7eb2e8f9f7 | 70 | } CANName; |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | #define STDIO_UART_TX USBTX |
<> | 144:ef7eb2e8f9f7 | 73 | #define STDIO_UART_RX USBRX |
<> | 144:ef7eb2e8f9f7 | 74 | #define STDIO_UART UART_0 |
<> | 144:ef7eb2e8f9f7 | 75 | |
<> | 144:ef7eb2e8f9f7 | 76 | // Default peripherals |
<> | 144:ef7eb2e8f9f7 | 77 | #define MBED_SPI0 p5, p6, p7, p8 |
<> | 144:ef7eb2e8f9f7 | 78 | #define MBED_SPI1 p11, p12, p13, p14 |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | #define MBED_UART0 p9, p10 |
<> | 144:ef7eb2e8f9f7 | 81 | #define MBED_UART1 p13, p14 |
<> | 144:ef7eb2e8f9f7 | 82 | #define MBED_UART2 p28, p27 |
<> | 144:ef7eb2e8f9f7 | 83 | #define MBED_UARTUSB USBTX, USBRX |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | #define MBED_I2C0 p28, p27 |
<> | 144:ef7eb2e8f9f7 | 86 | #define MBED_I2C1 p9, p10 |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | #define MBED_CAN0 p30, p29 |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | #define MBED_ANALOGOUT0 p18 |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | #define MBED_ANALOGIN0 p15 |
<> | 144:ef7eb2e8f9f7 | 93 | #define MBED_ANALOGIN1 p16 |
<> | 144:ef7eb2e8f9f7 | 94 | #define MBED_ANALOGIN2 p17 |
<> | 144:ef7eb2e8f9f7 | 95 | #define MBED_ANALOGIN3 p18 |
<> | 144:ef7eb2e8f9f7 | 96 | #define MBED_ANALOGIN4 p19 |
<> | 144:ef7eb2e8f9f7 | 97 | #define MBED_ANALOGIN5 p20 |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | #define MBED_PWMOUT0 p26 |
<> | 144:ef7eb2e8f9f7 | 100 | #define MBED_PWMOUT1 p25 |
<> | 144:ef7eb2e8f9f7 | 101 | #define MBED_PWMOUT2 p24 |
<> | 144:ef7eb2e8f9f7 | 102 | #define MBED_PWMOUT3 p23 |
<> | 144:ef7eb2e8f9f7 | 103 | #define MBED_PWMOUT4 p22 |
<> | 144:ef7eb2e8f9f7 | 104 | #define MBED_PWMOUT5 p21 |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 107 | } |
<> | 144:ef7eb2e8f9f7 | 108 | #endif |
<> | 144:ef7eb2e8f9f7 | 109 | |
<> | 144:ef7eb2e8f9f7 | 110 | #endif |