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targets/TARGET_Maxim/TARGET_MAX32630/rtc_api.c@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 157:ff67d9f36b67
- Child:
- 165:e614a9f1c9e2
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 157:ff67d9f36b67 | 1 | /******************************************************************************* |
<> | 157:ff67d9f36b67 | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 157:ff67d9f36b67 | 3 | * |
<> | 157:ff67d9f36b67 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 157:ff67d9f36b67 | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 157:ff67d9f36b67 | 6 | * to deal in the Software without restriction, including without limitation |
<> | 157:ff67d9f36b67 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 157:ff67d9f36b67 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 157:ff67d9f36b67 | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 157:ff67d9f36b67 | 10 | * |
<> | 157:ff67d9f36b67 | 11 | * The above copyright notice and this permission notice shall be included |
<> | 157:ff67d9f36b67 | 12 | * in all copies or substantial portions of the Software. |
<> | 157:ff67d9f36b67 | 13 | * |
<> | 157:ff67d9f36b67 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 157:ff67d9f36b67 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 157:ff67d9f36b67 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 157:ff67d9f36b67 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 157:ff67d9f36b67 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 157:ff67d9f36b67 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 157:ff67d9f36b67 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 157:ff67d9f36b67 | 21 | * |
<> | 157:ff67d9f36b67 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 157:ff67d9f36b67 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 157:ff67d9f36b67 | 24 | * Products, Inc. Branding Policy. |
<> | 157:ff67d9f36b67 | 25 | * |
<> | 157:ff67d9f36b67 | 26 | * The mere transfer of this software does not imply any licenses |
<> | 157:ff67d9f36b67 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 157:ff67d9f36b67 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 157:ff67d9f36b67 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 157:ff67d9f36b67 | 30 | * ownership rights. |
<> | 157:ff67d9f36b67 | 31 | ******************************************************************************* |
<> | 157:ff67d9f36b67 | 32 | */ |
<> | 157:ff67d9f36b67 | 33 | |
<> | 157:ff67d9f36b67 | 34 | #include "rtc_api.h" |
<> | 157:ff67d9f36b67 | 35 | #include "lp_ticker_api.h" |
<> | 157:ff67d9f36b67 | 36 | #include "rtc.h" |
<> | 157:ff67d9f36b67 | 37 | #include "lp.h" |
<> | 157:ff67d9f36b67 | 38 | |
<> | 157:ff67d9f36b67 | 39 | #define PRESCALE_VAL RTC_PRESCALE_DIV_2_0 // Set the divider for the 4kHz clock |
<> | 157:ff67d9f36b67 | 40 | #define SHIFT_AMT (RTC_PRESCALE_DIV_2_12 - PRESCALE_VAL) |
<> | 157:ff67d9f36b67 | 41 | |
<> | 157:ff67d9f36b67 | 42 | #define WINDOW 1000 |
<> | 157:ff67d9f36b67 | 43 | |
<> | 157:ff67d9f36b67 | 44 | static int rtc_inited = 0; |
<> | 157:ff67d9f36b67 | 45 | static volatile uint32_t overflow_cnt = 0; |
<> | 157:ff67d9f36b67 | 46 | |
<> | 157:ff67d9f36b67 | 47 | static uint64_t rtc_read64(void); |
<> | 157:ff67d9f36b67 | 48 | |
<> | 157:ff67d9f36b67 | 49 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 50 | static void overflow_handler(void) |
<> | 157:ff67d9f36b67 | 51 | { |
<> | 157:ff67d9f36b67 | 52 | overflow_cnt++; |
<> | 157:ff67d9f36b67 | 53 | RTC_ClearFlags(MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS); |
<> | 157:ff67d9f36b67 | 54 | } |
<> | 157:ff67d9f36b67 | 55 | |
<> | 157:ff67d9f36b67 | 56 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 57 | void rtc_init(void) |
<> | 157:ff67d9f36b67 | 58 | { |
<> | 157:ff67d9f36b67 | 59 | if (rtc_inited) { |
<> | 157:ff67d9f36b67 | 60 | return; |
<> | 157:ff67d9f36b67 | 61 | } |
<> | 157:ff67d9f36b67 | 62 | rtc_inited = 1; |
<> | 157:ff67d9f36b67 | 63 | |
<> | 157:ff67d9f36b67 | 64 | overflow_cnt = 0; |
<> | 157:ff67d9f36b67 | 65 | |
<> | 157:ff67d9f36b67 | 66 | /* Enable power for RTC for all LPx states */ |
<> | 157:ff67d9f36b67 | 67 | MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | |
<> | 157:ff67d9f36b67 | 68 | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP); |
<> | 157:ff67d9f36b67 | 69 | |
<> | 157:ff67d9f36b67 | 70 | /* Enable clock to synchronizers */ |
<> | 157:ff67d9f36b67 | 71 | CLKMAN_SetClkScale(CLKMAN_CLK_SYNC, CLKMAN_SCALE_DIV_1); |
<> | 157:ff67d9f36b67 | 72 | |
<> | 157:ff67d9f36b67 | 73 | // Prepare interrupt handlers |
<> | 157:ff67d9f36b67 | 74 | NVIC_SetVector(RTC0_IRQn, lp_ticker_irq_handler); |
<> | 157:ff67d9f36b67 | 75 | NVIC_EnableIRQ(RTC0_IRQn); |
<> | 157:ff67d9f36b67 | 76 | NVIC_SetVector(RTC3_IRQn, overflow_handler); |
<> | 157:ff67d9f36b67 | 77 | NVIC_EnableIRQ(RTC3_IRQn); |
<> | 157:ff67d9f36b67 | 78 | |
<> | 157:ff67d9f36b67 | 79 | // Enable wakeup on RTC rollover |
<> | 157:ff67d9f36b67 | 80 | LP_ConfigRTCWakeUp(0, 0, 0, 1); |
<> | 157:ff67d9f36b67 | 81 | |
<> | 157:ff67d9f36b67 | 82 | /* RTC registers are only reset on a power cycle. Do not reconfigure the RTC |
<> | 157:ff67d9f36b67 | 83 | * if it is already running. |
<> | 157:ff67d9f36b67 | 84 | */ |
<> | 157:ff67d9f36b67 | 85 | if (!RTC_IsActive()) { |
<> | 157:ff67d9f36b67 | 86 | rtc_cfg_t cfg = {0}; |
<> | 157:ff67d9f36b67 | 87 | cfg.prescaler = PRESCALE_VAL; |
<> | 157:ff67d9f36b67 | 88 | cfg.snoozeMode = RTC_SNOOZE_DISABLE; |
<> | 157:ff67d9f36b67 | 89 | |
<> | 157:ff67d9f36b67 | 90 | int retval = RTC_Init(&cfg); |
<> | 157:ff67d9f36b67 | 91 | MBED_ASSERT(retval == E_NO_ERROR); |
<> | 157:ff67d9f36b67 | 92 | |
<> | 157:ff67d9f36b67 | 93 | RTC_EnableINT(MXC_F_RTC_FLAGS_OVERFLOW); |
<> | 157:ff67d9f36b67 | 94 | RTC_Start(); |
<> | 157:ff67d9f36b67 | 95 | } |
<> | 157:ff67d9f36b67 | 96 | } |
<> | 157:ff67d9f36b67 | 97 | |
<> | 157:ff67d9f36b67 | 98 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 99 | void lp_ticker_init(void) |
<> | 157:ff67d9f36b67 | 100 | { |
<> | 157:ff67d9f36b67 | 101 | rtc_init(); |
<> | 157:ff67d9f36b67 | 102 | } |
<> | 157:ff67d9f36b67 | 103 | |
<> | 157:ff67d9f36b67 | 104 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 105 | void rtc_free(void) |
<> | 157:ff67d9f36b67 | 106 | { |
<> | 157:ff67d9f36b67 | 107 | if (RTC_IsActive()) { |
<> | 157:ff67d9f36b67 | 108 | // Clear and disable RTC |
<> | 157:ff67d9f36b67 | 109 | MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_CLEAR; |
<> | 157:ff67d9f36b67 | 110 | RTC_Stop(); |
<> | 157:ff67d9f36b67 | 111 | } |
<> | 157:ff67d9f36b67 | 112 | } |
<> | 157:ff67d9f36b67 | 113 | |
<> | 157:ff67d9f36b67 | 114 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 115 | int rtc_isenabled(void) |
<> | 157:ff67d9f36b67 | 116 | { |
<> | 157:ff67d9f36b67 | 117 | return RTC_IsActive(); |
<> | 157:ff67d9f36b67 | 118 | } |
<> | 157:ff67d9f36b67 | 119 | |
<> | 157:ff67d9f36b67 | 120 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 121 | time_t rtc_read(void) |
<> | 157:ff67d9f36b67 | 122 | { |
<> | 157:ff67d9f36b67 | 123 | uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt; |
<> | 157:ff67d9f36b67 | 124 | uint32_t ovf1, ovf2; |
<> | 157:ff67d9f36b67 | 125 | |
<> | 157:ff67d9f36b67 | 126 | // Make sure RTC is setup before trying to read |
<> | 157:ff67d9f36b67 | 127 | if (!rtc_inited) { |
<> | 157:ff67d9f36b67 | 128 | rtc_init(); |
<> | 157:ff67d9f36b67 | 129 | } |
<> | 157:ff67d9f36b67 | 130 | |
<> | 157:ff67d9f36b67 | 131 | // Ensure coherency between overflow_cnt and timer |
<> | 157:ff67d9f36b67 | 132 | do { |
<> | 157:ff67d9f36b67 | 133 | ovf_cnt_1 = overflow_cnt; |
<> | 157:ff67d9f36b67 | 134 | ovf1 = RTC_GetFlags() & MXC_F_RTC_FLAGS_OVERFLOW; |
<> | 157:ff67d9f36b67 | 135 | timer_cnt = RTC_GetCount(); |
<> | 157:ff67d9f36b67 | 136 | ovf2 = RTC_GetFlags() & MXC_F_RTC_FLAGS_OVERFLOW; |
<> | 157:ff67d9f36b67 | 137 | ovf_cnt_2 = overflow_cnt; |
<> | 157:ff67d9f36b67 | 138 | } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2)); |
<> | 157:ff67d9f36b67 | 139 | |
<> | 157:ff67d9f36b67 | 140 | // Account for an unserviced interrupt |
<> | 157:ff67d9f36b67 | 141 | if (ovf1) { |
<> | 157:ff67d9f36b67 | 142 | ovf_cnt_1++; |
<> | 157:ff67d9f36b67 | 143 | } |
<> | 157:ff67d9f36b67 | 144 | |
<> | 157:ff67d9f36b67 | 145 | return (timer_cnt >> SHIFT_AMT) + (ovf_cnt_1 << (32 - SHIFT_AMT)); |
<> | 157:ff67d9f36b67 | 146 | } |
<> | 157:ff67d9f36b67 | 147 | |
<> | 157:ff67d9f36b67 | 148 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 149 | static uint64_t rtc_read64(void) |
<> | 157:ff67d9f36b67 | 150 | { |
<> | 157:ff67d9f36b67 | 151 | uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt; |
<> | 157:ff67d9f36b67 | 152 | uint32_t ovf1, ovf2; |
<> | 157:ff67d9f36b67 | 153 | uint64_t current_us; |
<> | 157:ff67d9f36b67 | 154 | |
<> | 157:ff67d9f36b67 | 155 | // Make sure RTC is setup before trying to read |
<> | 157:ff67d9f36b67 | 156 | if (!rtc_inited) { |
<> | 157:ff67d9f36b67 | 157 | rtc_init(); |
<> | 157:ff67d9f36b67 | 158 | } |
<> | 157:ff67d9f36b67 | 159 | |
<> | 157:ff67d9f36b67 | 160 | // Ensure coherency between overflow_cnt and timer |
<> | 157:ff67d9f36b67 | 161 | do { |
<> | 157:ff67d9f36b67 | 162 | ovf_cnt_1 = overflow_cnt; |
<> | 157:ff67d9f36b67 | 163 | ovf1 = RTC_GetFlags() & MXC_F_RTC_FLAGS_OVERFLOW; |
<> | 157:ff67d9f36b67 | 164 | timer_cnt = RTC_GetCount(); |
<> | 157:ff67d9f36b67 | 165 | ovf2 = RTC_GetFlags() & MXC_F_RTC_FLAGS_OVERFLOW; |
<> | 157:ff67d9f36b67 | 166 | ovf_cnt_2 = overflow_cnt; |
<> | 157:ff67d9f36b67 | 167 | } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2)); |
<> | 157:ff67d9f36b67 | 168 | |
<> | 157:ff67d9f36b67 | 169 | // Account for an unserviced interrupt |
<> | 157:ff67d9f36b67 | 170 | if (ovf1) { |
<> | 157:ff67d9f36b67 | 171 | ovf_cnt_1++; |
<> | 157:ff67d9f36b67 | 172 | } |
<> | 157:ff67d9f36b67 | 173 | |
<> | 157:ff67d9f36b67 | 174 | current_us = (((uint64_t)timer_cnt * 1000000) >> SHIFT_AMT) + (((uint64_t)ovf_cnt_1 * 1000000) << (32 - SHIFT_AMT)); |
<> | 157:ff67d9f36b67 | 175 | |
<> | 157:ff67d9f36b67 | 176 | return current_us; |
<> | 157:ff67d9f36b67 | 177 | } |
<> | 157:ff67d9f36b67 | 178 | |
<> | 157:ff67d9f36b67 | 179 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 180 | void rtc_write(time_t t) |
<> | 157:ff67d9f36b67 | 181 | { |
<> | 157:ff67d9f36b67 | 182 | // Make sure RTC is setup before accessing |
<> | 157:ff67d9f36b67 | 183 | if (!rtc_inited) { |
<> | 157:ff67d9f36b67 | 184 | rtc_init(); |
<> | 157:ff67d9f36b67 | 185 | } |
<> | 157:ff67d9f36b67 | 186 | |
<> | 157:ff67d9f36b67 | 187 | RTC_Stop(); |
<> | 157:ff67d9f36b67 | 188 | RTC_SetCount(t << SHIFT_AMT); |
<> | 157:ff67d9f36b67 | 189 | overflow_cnt = t >> (32 - SHIFT_AMT); |
<> | 157:ff67d9f36b67 | 190 | RTC_Start(); |
<> | 157:ff67d9f36b67 | 191 | } |
<> | 157:ff67d9f36b67 | 192 | |
<> | 157:ff67d9f36b67 | 193 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 194 | void lp_ticker_set_interrupt(timestamp_t timestamp) |
<> | 157:ff67d9f36b67 | 195 | { |
<> | 157:ff67d9f36b67 | 196 | uint32_t comp_value; |
<> | 157:ff67d9f36b67 | 197 | uint64_t curr_ts64; |
<> | 157:ff67d9f36b67 | 198 | uint64_t ts64; |
<> | 157:ff67d9f36b67 | 199 | |
<> | 157:ff67d9f36b67 | 200 | // Note: interrupts are disabled before this function is called. |
<> | 157:ff67d9f36b67 | 201 | |
<> | 157:ff67d9f36b67 | 202 | // Disable the alarm while it is prepared |
<> | 157:ff67d9f36b67 | 203 | RTC_DisableINT(MXC_F_RTC_INTEN_COMP0); |
<> | 157:ff67d9f36b67 | 204 | |
<> | 157:ff67d9f36b67 | 205 | curr_ts64 = rtc_read64(); |
<> | 157:ff67d9f36b67 | 206 | ts64 = (uint64_t)timestamp | (curr_ts64 & 0xFFFFFFFF00000000ULL); |
<> | 157:ff67d9f36b67 | 207 | |
<> | 157:ff67d9f36b67 | 208 | // If this event is older than a recent window, it must be in the future |
<> | 157:ff67d9f36b67 | 209 | if ((ts64 < (curr_ts64 - WINDOW)) && ((curr_ts64 - WINDOW) < curr_ts64)) { |
<> | 157:ff67d9f36b67 | 210 | ts64 += 0x100000000ULL; |
<> | 157:ff67d9f36b67 | 211 | } |
<> | 157:ff67d9f36b67 | 212 | |
<> | 157:ff67d9f36b67 | 213 | uint32_t timer = RTC_GetCount(); |
<> | 157:ff67d9f36b67 | 214 | if (ts64 <= curr_ts64) { |
<> | 157:ff67d9f36b67 | 215 | // This event has already occurred. Set the alarm to expire immediately. |
<> | 157:ff67d9f36b67 | 216 | comp_value = timer + 1; |
<> | 157:ff67d9f36b67 | 217 | } else { |
<> | 157:ff67d9f36b67 | 218 | comp_value = (ts64 << SHIFT_AMT) / 1000000; |
<> | 157:ff67d9f36b67 | 219 | } |
<> | 157:ff67d9f36b67 | 220 | |
<> | 157:ff67d9f36b67 | 221 | // Ensure that the compare value is far enough in the future to guarantee the interrupt occurs. |
<> | 157:ff67d9f36b67 | 222 | if ((comp_value < (timer + 2)) && (comp_value > (timer - 10))) { |
<> | 157:ff67d9f36b67 | 223 | comp_value = timer + 2; |
<> | 157:ff67d9f36b67 | 224 | } |
<> | 157:ff67d9f36b67 | 225 | |
<> | 157:ff67d9f36b67 | 226 | MXC_RTCTMR->comp[0] = comp_value; |
<> | 157:ff67d9f36b67 | 227 | MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS; |
<> | 157:ff67d9f36b67 | 228 | RTC_EnableINT(MXC_F_RTC_INTEN_COMP0); |
<> | 157:ff67d9f36b67 | 229 | |
<> | 157:ff67d9f36b67 | 230 | // Enable wakeup from RTC |
<> | 157:ff67d9f36b67 | 231 | LP_ConfigRTCWakeUp(1, 0, 0, 1); |
<> | 157:ff67d9f36b67 | 232 | |
<> | 157:ff67d9f36b67 | 233 | // Wait for pending transactions |
<> | 157:ff67d9f36b67 | 234 | while (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING); |
<> | 157:ff67d9f36b67 | 235 | } |
<> | 157:ff67d9f36b67 | 236 | |
<> | 157:ff67d9f36b67 | 237 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 238 | inline void lp_ticker_disable_interrupt(void) |
<> | 157:ff67d9f36b67 | 239 | { |
<> | 157:ff67d9f36b67 | 240 | RTC_DisableINT(MXC_F_RTC_INTEN_COMP0); |
<> | 157:ff67d9f36b67 | 241 | } |
<> | 157:ff67d9f36b67 | 242 | |
<> | 157:ff67d9f36b67 | 243 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 244 | inline void lp_ticker_clear_interrupt(void) |
<> | 157:ff67d9f36b67 | 245 | { |
<> | 157:ff67d9f36b67 | 246 | RTC_ClearFlags(MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS); |
<> | 157:ff67d9f36b67 | 247 | } |
<> | 157:ff67d9f36b67 | 248 | |
<> | 157:ff67d9f36b67 | 249 | //****************************************************************************** |
<> | 157:ff67d9f36b67 | 250 | inline uint32_t lp_ticker_read(void) |
<> | 157:ff67d9f36b67 | 251 | { |
<> | 157:ff67d9f36b67 | 252 | return rtc_read64(); |
<> | 157:ff67d9f36b67 | 253 | } |