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targets/TARGET_Maxim/TARGET_MAX32625/mxc/rtc.h@178:c26431f84b0d, 2017-11-09 (annotated)

Committer:
amithy
Date:
Thu Nov 09 22:14:37 2017 +0000
Revision:
178:c26431f84b0d
Parent:
150:02e0a0aed4ec 
test export

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<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * $Date: 2016-03-21 10:05:23 -0500 (Mon, 21 Mar 2016) $
<> 150:02e0a0aed4ec 33 * $Revision: 22008 $
<> 150:02e0a0aed4ec 34 *
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36
<> 150:02e0a0aed4ec 37 /**
<> 150:02e0a0aed4ec 38 * @file rtc.h
<> 150:02e0a0aed4ec 39 * @addtogroup rtc Real-time Clock
<> 150:02e0a0aed4ec 40 * @{
<> 150:02e0a0aed4ec 41 * @brief This is the high level API for the real-time clock module
<> 150:02e0a0aed4ec 42 */
<> 150:02e0a0aed4ec 43
<> 150:02e0a0aed4ec 44 #ifndef _RTC_H
<> 150:02e0a0aed4ec 45 #define _RTC_H
<> 150:02e0a0aed4ec 46
<> 150:02e0a0aed4ec 47 #include "mxc_config.h"
<> 150:02e0a0aed4ec 48 #include "rtc_regs.h"
<> 150:02e0a0aed4ec 49
<> 150:02e0a0aed4ec 50 #ifdef __cplusplus
<> 150:02e0a0aed4ec 51 extern "C" {
<> 150:02e0a0aed4ec 52 #endif
<> 150:02e0a0aed4ec 53
<> 150:02e0a0aed4ec 54 /// @enum rtc_prescale_t Defines clock divider for 4096Hz input clock.
<> 150:02e0a0aed4ec 55 typedef enum {
<> 150:02e0a0aed4ec 56 RTC_PRESCALE_DIV_2_0 = MXC_V_RTC_PRESCALE_DIV_2_0, ///< (4.096kHz) divide input clock by \f$ 2^{0} = 1 \f$ (0x001)
<> 150:02e0a0aed4ec 57 RTC_PRESCALE_DIV_2_1 = MXC_V_RTC_PRESCALE_DIV_2_1, ///< (2.048kHz) divide input clock by \f$ 2^{1} = 2 \f$ (0x002)
<> 150:02e0a0aed4ec 58 RTC_PRESCALE_DIV_2_2 = MXC_V_RTC_PRESCALE_DIV_2_2, ///< (1.024kHz) divide input clock by \f$ 2^{2} = 4 \f$
<> 150:02e0a0aed4ec 59 RTC_PRESCALE_DIV_2_3 = MXC_V_RTC_PRESCALE_DIV_2_3, ///< (512Hz) divide input clock by \f$ 2^{3} = 8 \f$
<> 150:02e0a0aed4ec 60 RTC_PRESCALE_DIV_2_4 = MXC_V_RTC_PRESCALE_DIV_2_4, ///< (256Hz) divide input clock by \f$ 2^{4} = 16 \f$
<> 150:02e0a0aed4ec 61 RTC_PRESCALE_DIV_2_5 = MXC_V_RTC_PRESCALE_DIV_2_5, ///< (128Hz) divide input clock by \f$ 2^{5} = 32 \f$
<> 150:02e0a0aed4ec 62 RTC_PRESCALE_DIV_2_6 = MXC_V_RTC_PRESCALE_DIV_2_6, ///< (64Hz) divide input clock by \f$ 2^{6} = 64 \f$
<> 150:02e0a0aed4ec 63 RTC_PRESCALE_DIV_2_7 = MXC_V_RTC_PRESCALE_DIV_2_7, ///< (32Hz) divide input clock by \f$ 2^{7} = 128 \f$
<> 150:02e0a0aed4ec 64 RTC_PRESCALE_DIV_2_8 = MXC_V_RTC_PRESCALE_DIV_2_8, ///< (16Hz) divide input clock by \f$ 2^{8} = 256 \f$
<> 150:02e0a0aed4ec 65 RTC_PRESCALE_DIV_2_9 = MXC_V_RTC_PRESCALE_DIV_2_9, ///< (8Hz) divide input clock by \f$ 2^{9} = 512 \f$
<> 150:02e0a0aed4ec 66 RTC_PRESCALE_DIV_2_10 = MXC_V_RTC_PRESCALE_DIV_2_10, ///< (4Hz) divide input clock by \f$ 2^{10} = 1024 \f$
<> 150:02e0a0aed4ec 67 RTC_PRESCALE_DIV_2_11 = MXC_V_RTC_PRESCALE_DIV_2_11, ///< (2Hz) divide input clock by \f$ 2^{11} = 2048 \f$ (0x07FF)
<> 150:02e0a0aed4ec 68 RTC_PRESCALE_DIV_2_12 = MXC_V_RTC_PRESCALE_DIV_2_12, ///< (1Hz) divide input clock by \f$ 2^{12} = 4096 \f$ (0x0FFF)
<> 150:02e0a0aed4ec 69 } rtc_prescale_t;
<> 150:02e0a0aed4ec 70
<> 150:02e0a0aed4ec 71 /// @def RTC_CTRL_ACTIVE_TRANS Active Transaction Flags for the RTC
<> 150:02e0a0aed4ec 72 #define RTC_CTRL_ACTIVE_TRANS (MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE | \
<> 150:02e0a0aed4ec 73 MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE | \
<> 150:02e0a0aed4ec 74 MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE | \
<> 150:02e0a0aed4ec 75 MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE | \
<> 150:02e0a0aed4ec 76 MXC_F_RTC_CTRL_RTC_SET_ACTIVE | \
<> 150:02e0a0aed4ec 77 MXC_F_RTC_CTRL_RTC_CLR_ACTIVE | \
<> 150:02e0a0aed4ec 78 MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE | \
<> 150:02e0a0aed4ec 79 MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE | \
<> 150:02e0a0aed4ec 80 MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE | \
<> 150:02e0a0aed4ec 81 MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE | \
<> 150:02e0a0aed4ec 82 MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE | \
<> 150:02e0a0aed4ec 83 MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE | \
<> 150:02e0a0aed4ec 84 MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE | \
<> 150:02e0a0aed4ec 85 MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE | \
<> 150:02e0a0aed4ec 86 MXC_F_RTC_CTRL_ACTIVE_TRANS_0)
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88 /// @def RTC_FLAGS_CLEAR_ALL Number of RTC compare registers
<> 150:02e0a0aed4ec 89 #define RTC_FLAGS_CLEAR_ALL (MXC_F_RTC_FLAGS_COMP0 | \
<> 150:02e0a0aed4ec 90 MXC_F_RTC_FLAGS_COMP1| \
<> 150:02e0a0aed4ec 91 MXC_F_RTC_FLAGS_PRESCALE_COMP | \
<> 150:02e0a0aed4ec 92 MXC_F_RTC_FLAGS_OVERFLOW | \
<> 150:02e0a0aed4ec 93 MXC_F_RTC_FLAGS_TRIM)
<> 150:02e0a0aed4ec 94 /// @enum rtc_snooze_t Defines the snooze modes
<> 150:02e0a0aed4ec 95 typedef enum {
<> 150:02e0a0aed4ec 96 RTC_SNOOZE_DISABLE = MXC_V_RTC_CTRL_SNOOZE_DISABLE, ///< Snooze Mode Disabled
<> 150:02e0a0aed4ec 97 RTC_SNOOZE_MODE_A = MXC_V_RTC_CTRL_SNOOZE_MODE_A, ///< COMP1 = COMP1 + RTC_SNZ_VALUE when snooze flag is set
<> 150:02e0a0aed4ec 98 RTC_SNOOZE_MODE_B = MXC_V_RTC_CTRL_SNOOZE_MODE_B, ///< COMP1 = RTC_TIMER + RTC_SNZ_VALUE when snooze flag is set
<> 150:02e0a0aed4ec 99 } rtc_snooze_t; /// Defines the snooze modes
<> 150:02e0a0aed4ec 100
<> 150:02e0a0aed4ec 101 /// @def RTC_NUM_COMPARE Number of RTC compare registers
<> 150:02e0a0aed4ec 102 #define RTC_NUM_COMPARE 2
<> 150:02e0a0aed4ec 103
<> 150:02e0a0aed4ec 104 /// @brief A structure that represents the configuration of the RTC peripheral
<> 150:02e0a0aed4ec 105 typedef struct {
<> 150:02e0a0aed4ec 106 rtc_prescale_t prescaler; /// prescale value rtc_prescale_t
<> 150:02e0a0aed4ec 107 rtc_prescale_t prescalerMask; /// Mask value used to compare to the rtc prescale value, when the \f$ \big((Count_{prescaler}\,\&\,Prescale\,Mask) == 0\big) \f$, the prescale compare flag will be set.
<> 150:02e0a0aed4ec 108 uint32_t compareCount[RTC_NUM_COMPARE]; /// Values used for the RTC alarms. See RTC_SetCompare() and RTC_GetCompare()
<> 150:02e0a0aed4ec 109 uint32_t snoozeCount; /// The number of RTC ticks to snooze if enabled.
<> 150:02e0a0aed4ec 110 rtc_snooze_t snoozeMode; /// The desired snooze mode
<> 150:02e0a0aed4ec 111 } rtc_cfg_t;
<> 150:02e0a0aed4ec 112
<> 150:02e0a0aed4ec 113 /**
<> 150:02e0a0aed4ec 114 * @brief Initializes the RTC
<> 150:02e0a0aed4ec 115 * @note Must setup clocking and power prior to this function.
<> 150:02e0a0aed4ec 116 *
<> 150:02e0a0aed4ec 117 * @param cfg configuration
<> 150:02e0a0aed4ec 118 *
<> 150:02e0a0aed4ec 119 * @retval E_NO_ERROR if everything is successful
<> 150:02e0a0aed4ec 120 * @retval E_NULL_PTR if cfg pointer is NULL
<> 150:02e0a0aed4ec 121 * @retval E_INVALID if comparison index, prescaler mask or snooze mask are
<> 150:02e0a0aed4ec 122 * out of bounds
<> 150:02e0a0aed4ec 123 */
<> 150:02e0a0aed4ec 124 int RTC_Init(const rtc_cfg_t *cfg);
<> 150:02e0a0aed4ec 125
<> 150:02e0a0aed4ec 126 /**
<> 150:02e0a0aed4ec 127 * @brief Enable and start the real-time clock continuing from its current value
<> 150:02e0a0aed4ec 128 */
<> 150:02e0a0aed4ec 129 __STATIC_INLINE void RTC_Start(void)
<> 150:02e0a0aed4ec 130 {
<> 150:02e0a0aed4ec 131 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE;
<> 150:02e0a0aed4ec 132
<> 150:02e0a0aed4ec 133 //wait for pending actions to complete
<> 150:02e0a0aed4ec 134 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 135 }
<> 150:02e0a0aed4ec 136
<> 150:02e0a0aed4ec 137 /**
<> 150:02e0a0aed4ec 138 * @brief Disable and stop the real-time clock
<> 150:02e0a0aed4ec 139 */
<> 150:02e0a0aed4ec 140 __STATIC_INLINE void RTC_Stop(void)
<> 150:02e0a0aed4ec 141 {
<> 150:02e0a0aed4ec 142 MXC_RTCTMR->ctrl &= ~(MXC_F_RTC_CTRL_ENABLE);
<> 150:02e0a0aed4ec 143
<> 150:02e0a0aed4ec 144 //wait for pending actions to complete
<> 150:02e0a0aed4ec 145 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 146 }
<> 150:02e0a0aed4ec 147
<> 150:02e0a0aed4ec 148 /**
<> 150:02e0a0aed4ec 149 * @brief Determines if the RTC is running or not.
<> 150:02e0a0aed4ec 150 *
<> 150:02e0a0aed4ec 151 * @retval 0 if Disabled, Non-zero if Active
<> 150:02e0a0aed4ec 152 */
<> 150:02e0a0aed4ec 153 __STATIC_INLINE uint32_t RTC_IsActive(void)
<> 150:02e0a0aed4ec 154 {
<> 150:02e0a0aed4ec 155 return (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE);
<> 150:02e0a0aed4ec 156 }
<> 150:02e0a0aed4ec 157
<> 150:02e0a0aed4ec 158 /**
<> 150:02e0a0aed4ec 159 * @brief Set the current count of the RTC
<> 150:02e0a0aed4ec 160 *
<> 150:02e0a0aed4ec 161 * @param count count value to set current real-time count.
<> 150:02e0a0aed4ec 162 */
<> 150:02e0a0aed4ec 163 __STATIC_INLINE void RTC_SetCount(uint32_t count)
<> 150:02e0a0aed4ec 164 {
<> 150:02e0a0aed4ec 165 MXC_RTCTMR->timer = count;
<> 150:02e0a0aed4ec 166
<> 150:02e0a0aed4ec 167 //wait for pending actions to complete
<> 150:02e0a0aed4ec 168 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 169 }
<> 150:02e0a0aed4ec 170
<> 150:02e0a0aed4ec 171 /**
<> 150:02e0a0aed4ec 172 * @brief Get the current timer value of the RTC.
<> 150:02e0a0aed4ec 173 *
<> 150:02e0a0aed4ec 174 * @retval The value of the RTC counter.
<> 150:02e0a0aed4ec 175 */
<> 150:02e0a0aed4ec 176 __STATIC_INLINE uint32_t RTC_GetCount(void)
<> 150:02e0a0aed4ec 177 {
<> 150:02e0a0aed4ec 178 return (MXC_RTCTMR->timer);
<> 150:02e0a0aed4ec 179 }
<> 150:02e0a0aed4ec 180
<> 150:02e0a0aed4ec 181 /**
<> 150:02e0a0aed4ec 182 * @brief Set the comparator value
<> 150:02e0a0aed4ec 183 *
<> 150:02e0a0aed4ec 184 * @param compareIndex Index of comparator to set, see RTC_NUM_COMPARE
<> 150:02e0a0aed4ec 185 * for the total number of compare registers available.
<> 150:02e0a0aed4ec 186 * @param counts Unsigned 32-bit compare value to set.
<> 150:02e0a0aed4ec 187 * @retval E_NO_ERROR Compare count register set successfully for requested
<> 150:02e0a0aed4ec 188 * comparator.
<> 150:02e0a0aed4ec 189 * @retval E_INVALID compareIndex is \>= RTC_NUM_COMPARE.
<> 150:02e0a0aed4ec 190 */
<> 150:02e0a0aed4ec 191 int RTC_SetCompare(uint8_t compareIndex, uint32_t counts);
<> 150:02e0a0aed4ec 192
<> 150:02e0a0aed4ec 193 /**
<> 150:02e0a0aed4ec 194 * @brief Get the comparator value
<> 150:02e0a0aed4ec 195 *
<> 150:02e0a0aed4ec 196 * @param compareIndex Index of the comparator to get. See RTC_NUM_COMPARE
<> 150:02e0a0aed4ec 197 * for the total number of compare registers available.
<> 150:02e0a0aed4ec 198 *
<> 150:02e0a0aed4ec 199 * @retval uint32_t The current value of the specified compare register for the RTC
<> 150:02e0a0aed4ec 200 */
<> 150:02e0a0aed4ec 201 uint32_t RTC_GetCompare(uint8_t compareIndex);
<> 150:02e0a0aed4ec 202
<> 150:02e0a0aed4ec 203 /**
<> 150:02e0a0aed4ec 204 * @brief Set the prescale reload value for the real-time clock.
<> 150:02e0a0aed4ec 205 * @details The prescale reload value determines the number of 4kHz ticks
<> 150:02e0a0aed4ec 206 * occur before the timer is incremented. See @ref prescaler_val "Table"
<> 150:02e0a0aed4ec 207 * for accepted values and corresponding timer resolution.
<> 150:02e0a0aed4ec 208 *
<> 150:02e0a0aed4ec 209 * <table>
<> 150:02e0a0aed4ec 210 * <caption id="prescaler_val">Prescaler Settings and Corresponding RTC Resolutions</caption>
<> 150:02e0a0aed4ec 211 * <tr><th>PRESCALE <th>Prescale Reload <th>4kHz ticks in LSB <th>Min Timer Value (sec) <th> Max Timer Value (sec) <th>Max Timer Value (Days) <th> Max Timer Value (Years)
<> 150:02e0a0aed4ec 212 * <tr><td>0h <td> RTC_PRESCALE_DIV_2_0 <td> 1 <td> 0.00024 <td> 1048576 <td> 12 <td> 0.0
<> 150:02e0a0aed4ec 213 * <tr><td>1h <td> RTC_PRESCALE_DIV_2_1 <td> 2 <td> 0.00049 <td> 2097152 <td> 24 <td> 0.1
<> 150:02e0a0aed4ec 214 * <tr><td>2h <td> RTC_PRESCALE_DIV_2_2 <td> 4 <td> 0.00098 <td> 4194304 <td> 49 <td> 0.1
<> 150:02e0a0aed4ec 215 * <tr><td>3h <td> RTC_PRESCALE_DIV_2_3 <td> 8 <td> 0.00195 <td> 8388608 <td> 97 <td> 0.3
<> 150:02e0a0aed4ec 216 * <tr><td>4h <td> RTC_PRESCALE_DIV_2_4 <td> 16 <td> 0.00391 <td> 16777216 <td> 194 <td> 0.5
<> 150:02e0a0aed4ec 217 * <tr><td>5h <td> RTC_PRESCALE_DIV_2_5 <td> 32 <td> 0.00781 <td> 33554432 <td> 388 <td> 1.1
<> 150:02e0a0aed4ec 218 * <tr><td>6h <td> RTC_PRESCALE_DIV_2_6 <td> 64 <td> 0.01563 <td> 67108864 <td> 777 <td> 2.2
<> 150:02e0a0aed4ec 219 * <tr><td>7h <td> RTC_PRESCALE_DIV_2_7 <td> 128 <td> 0.03125 <td> 134217728 <td> 1553 <td> 4.4
<> 150:02e0a0aed4ec 220 * <tr><td>8h <td> RTC_PRESCALE_DIV_2_8 <td> 256 <td> 0.06250 <td> 268435456 <td> 3107 <td> 8.7
<> 150:02e0a0aed4ec 221 * <tr><td>9h <td> RTC_PRESCALE_DIV_2_9 <td> 512 <td> 0.12500 <td> 536870912 <td> 6214 <td> 17.5
<> 150:02e0a0aed4ec 222 * <tr><td>Ah <td> RTC_PRESCALE_DIV_2_10 <td> 1024 <td> 0.25000 <td> 1073741824 <td> 12428 <td> 34.9
<> 150:02e0a0aed4ec 223 * <tr><td>Bh <td> RTC_PRESCALE_DIV_2_11 <td> 2048 <td> 0.50000 <td> 2147483648 <td> 24855 <td> 69.8
<> 150:02e0a0aed4ec 224 * <tr><td>Ch <td> RTC_PRESCALE_DIV_2_12 <td> 4096 <td> 1.00000 <td> 4294967296 <td> 49710 <td> 139.6
<> 150:02e0a0aed4ec 225 * </table>
<> 150:02e0a0aed4ec 226 *
<> 150:02e0a0aed4ec 227 * @param prescaler Prescale value to set, see rtc_prescale_t.
<> 150:02e0a0aed4ec 228 */
<> 150:02e0a0aed4ec 229 __STATIC_INLINE void RTC_SetPrescaler(rtc_prescale_t prescaler)
<> 150:02e0a0aed4ec 230 {
<> 150:02e0a0aed4ec 231 MXC_RTCTMR->prescale = prescaler;
<> 150:02e0a0aed4ec 232
<> 150:02e0a0aed4ec 233 //wait for pending actions to complete
<> 150:02e0a0aed4ec 234 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 235 }
<> 150:02e0a0aed4ec 236
<> 150:02e0a0aed4ec 237 /**
<> 150:02e0a0aed4ec 238 * @brief Get the current value of the real-time clock prescaler.
<> 150:02e0a0aed4ec 239 *
<> 150:02e0a0aed4ec 240 * @retval rtc_prescale_t Returns the current RTC prescaler setting,
<> 150:02e0a0aed4ec 241 * See rtc_prescale_t for values of the prescaler.
<> 150:02e0a0aed4ec 242 */
<> 150:02e0a0aed4ec 243 __STATIC_INLINE rtc_prescale_t RTC_GetPrescaler(void)
<> 150:02e0a0aed4ec 244 {
<> 150:02e0a0aed4ec 245 return (rtc_prescale_t)(MXC_RTCTMR->prescale);
<> 150:02e0a0aed4ec 246 }
<> 150:02e0a0aed4ec 247
<> 150:02e0a0aed4ec 248 /**
<> 150:02e0a0aed4ec 249 * @brief Set the prescaler mask, which is used to set the RTC prescale counter
<> 150:02e0a0aed4ec 250 * compare flag when the prescaler timer matches the bits indicated
<> 150:02e0a0aed4ec 251 * by the mask.
<> 150:02e0a0aed4ec 252 * @param mask A bit mask that is used to set the prescale compare flag if the
<> 150:02e0a0aed4ec 253 * prescale timer has the corresponding bits set. @note This mask must
<> 150:02e0a0aed4ec 254 * be less than or equal to the prescaler reload value.
<> 150:02e0a0aed4ec 255 * See RTC_SetPrescaler()
<> 150:02e0a0aed4ec 256 * @details When \f$ \big((Count_{prescaler}\,\&\,Prescale\,Mask) == 0\big) \f$, the prescale compare flag is set
<> 150:02e0a0aed4ec 257 * @retval int Returns E_NO_ERROR if prescale value is valid and is set.
<> 150:02e0a0aed4ec 258 * @retval int Returns E_INVALID if mask is \> than prescaler value
<> 150:02e0a0aed4ec 259 */
<> 150:02e0a0aed4ec 260 __STATIC_INLINE int RTC_SetPrescalerMask(rtc_prescale_t mask)
<> 150:02e0a0aed4ec 261 {
<> 150:02e0a0aed4ec 262 if (mask > ((rtc_prescale_t)(MXC_RTCTMR->prescale))) {
<> 150:02e0a0aed4ec 263 return E_INVALID;
<> 150:02e0a0aed4ec 264 }
<> 150:02e0a0aed4ec 265 MXC_RTCTMR->prescale_mask = mask;
<> 150:02e0a0aed4ec 266
<> 150:02e0a0aed4ec 267 //wait for pending actions to complete
<> 150:02e0a0aed4ec 268 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 269 return E_NO_ERROR;
<> 150:02e0a0aed4ec 270 }
<> 150:02e0a0aed4ec 271
<> 150:02e0a0aed4ec 272 /**
<> 150:02e0a0aed4ec 273 * @brief Set the number of ticks for snooze mode. See RTC_Snooze().
<> 150:02e0a0aed4ec 274 * @param count Sets the count used for snoozing when snooze mode is enabled and
<> 150:02e0a0aed4ec 275 * the snooze flag is set.
<> 150:02e0a0aed4ec 276 * @retval E_NO_ERROR If snooze value is set correctly and value is valid.
<> 150:02e0a0aed4ec 277 * @retval E_INVALID If SnoozeCount exceeds maximum supported, see MXC_F_RTC_SNZ_VAL_VALUE
<> 150:02e0a0aed4ec 278 *
<> 150:02e0a0aed4ec 279 */
<> 150:02e0a0aed4ec 280 __STATIC_INLINE int RTC_SetSnoozeCount(uint32_t count)
<> 150:02e0a0aed4ec 281 {
<> 150:02e0a0aed4ec 282 // Check to make sure max value is not being exceeded
<> 150:02e0a0aed4ec 283 if (count > MXC_F_RTC_SNZ_VAL_VALUE)
<> 150:02e0a0aed4ec 284 return E_INVALID;
<> 150:02e0a0aed4ec 285
<> 150:02e0a0aed4ec 286 MXC_RTCTMR->snz_val = count;
<> 150:02e0a0aed4ec 287
<> 150:02e0a0aed4ec 288 //wait for pending actions to complete
<> 150:02e0a0aed4ec 289 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 290 return E_NO_ERROR;
<> 150:02e0a0aed4ec 291 }
<> 150:02e0a0aed4ec 292
<> 150:02e0a0aed4ec 293 /**
<> 150:02e0a0aed4ec 294 * @brief Gets the Snooze Count that is currently loaded in the RTC timer
<> 150:02e0a0aed4ec 295 * @details Returns the current value for the Snooze. This value is used as
<> 150:02e0a0aed4ec 296 * part of the snooze calculation depending on the snooze mode. @see RTC_SetSnoozeMode
<> 150:02e0a0aed4ec 297 * @retval uint32_t value of the snooze register
<> 150:02e0a0aed4ec 298 *
<> 150:02e0a0aed4ec 299 */
<> 150:02e0a0aed4ec 300 __STATIC_INLINE uint32_t RTC_GetSnoozeCount(void)
<> 150:02e0a0aed4ec 301 {
<> 150:02e0a0aed4ec 302 return MXC_RTCTMR->snz_val;
<> 150:02e0a0aed4ec 303 }
<> 150:02e0a0aed4ec 304
<> 150:02e0a0aed4ec 305 /**
<> 150:02e0a0aed4ec 306 * @brief Set the flags to activate the snooze
<> 150:02e0a0aed4ec 307 * @details Begins a snooze of the RTC. When this function is called
<> 150:02e0a0aed4ec 308 * the snooze count is determined based on the snooze mode.
<> 150:02e0a0aed4ec 309 * See RTC_GetCount() and RTC_SetSnoozeMode()
<> 150:02e0a0aed4ec 310 */
<> 150:02e0a0aed4ec 311 __STATIC_INLINE void RTC_Snooze(void)
<> 150:02e0a0aed4ec 312 {
<> 150:02e0a0aed4ec 313 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_SNOOZE_A | MXC_F_RTC_FLAGS_SNOOZE_B;
<> 150:02e0a0aed4ec 314
<> 150:02e0a0aed4ec 315 //wait for pending actions to complete
<> 150:02e0a0aed4ec 316 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 317 }
<> 150:02e0a0aed4ec 318
<> 150:02e0a0aed4ec 319 /**
<> 150:02e0a0aed4ec 320 * @brief Sets the Snooze Mode.
<> 150:02e0a0aed4ec 321 * @details <table>
<> 150:02e0a0aed4ec 322 * <caption id="snoozeModesTable">Snooze Modes</caption>
<> 150:02e0a0aed4ec 323 * <tr><th>Mode<th>Snooze Time Calculation
<> 150:02e0a0aed4ec 324 * <tr><td>RTC_SNOOZE_DISABLE<td>Snooze Disabled
<> 150:02e0a0aed4ec 325 * <tr><td>RTC_SNOOZE_MODE_A<td>\f$ compare1 = compare1 + snoozeCount \f$
<> 150:02e0a0aed4ec 326 * <tr><td>RTC_SNOOZE_MODE_B<td>\f$ compare1 = count + snoozeCount \f$
<> 150:02e0a0aed4ec 327 * </table>
<> 150:02e0a0aed4ec 328 * \a count is the value of the RTC counter when RTC_Snooze() is called to begin snooze
<> 150:02e0a0aed4ec 329 */
<> 150:02e0a0aed4ec 330 __STATIC_INLINE void RTC_SetSnoozeMode(rtc_snooze_t mode)
<> 150:02e0a0aed4ec 331 {
<> 150:02e0a0aed4ec 332 uint32_t ctrl;
<> 150:02e0a0aed4ec 333 // Get the control register and mask off the non-snooze bits
<> 150:02e0a0aed4ec 334 ctrl = (MXC_RTCTMR->ctrl & ~(MXC_F_RTC_CTRL_SNOOZE_ENABLE));
<> 150:02e0a0aed4ec 335 // set the requested snooze mode bits and save the settings
<> 150:02e0a0aed4ec 336 MXC_RTCTMR->ctrl = (ctrl | (mode << MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS));
<> 150:02e0a0aed4ec 337
<> 150:02e0a0aed4ec 338 //wait for pending actions to complete
<> 150:02e0a0aed4ec 339 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 340 }
<> 150:02e0a0aed4ec 341
<> 150:02e0a0aed4ec 342 /**
<> 150:02e0a0aed4ec 343 * @brief Enables the interrupts defined by the mask for the RTC.
<> 150:02e0a0aed4ec 344 * @details <table>
<> 150:02e0a0aed4ec 345 * <caption id="RTC_interrupts">RTC Interrupts</caption>
<> 150:02e0a0aed4ec 346 * <tr><th>Interrupt<th>Mask
<> 150:02e0a0aed4ec 347 * <tr><td>Compare 0<td>MXC_F_RTC_INTEN_COMP0
<> 150:02e0a0aed4ec 348 * <tr><td>Compare 1 \\ Snooze<td>MXC_F_RTC_INTEN_COMP1
<> 150:02e0a0aed4ec 349 * <tr><td>Prescale Comp<td>MXC_F_RTC_FLAGS_INTEN_COMP
<> 150:02e0a0aed4ec 350 * <tr><td>RTC Count Overflow<td>MXC_F_RTC_INTEN_OVERFLOW
<> 150:02e0a0aed4ec 351 * <tr><td>Trim<td>MXC_F_RTC_INTEN_TRIM
<> 150:02e0a0aed4ec 352 * </table>
<> 150:02e0a0aed4ec 353 * @param mask set the bits of the interrupts to enable
<> 150:02e0a0aed4ec 354 */
<> 150:02e0a0aed4ec 355 __STATIC_INLINE void RTC_EnableINT(uint32_t mask)
<> 150:02e0a0aed4ec 356 {
<> 150:02e0a0aed4ec 357 MXC_RTCTMR->inten |= mask;
<> 150:02e0a0aed4ec 358 }
<> 150:02e0a0aed4ec 359
<> 150:02e0a0aed4ec 360 /**
<> 150:02e0a0aed4ec 361 * @brief Disable RTC interrupts based on the mask, See @ref RTC_interrupts
<> 150:02e0a0aed4ec 362 *
<> 150:02e0a0aed4ec 363 * @param mask set the bits of the interrupts to disable
<> 150:02e0a0aed4ec 364 */
<> 150:02e0a0aed4ec 365 __STATIC_INLINE void RTC_DisableINT(uint32_t mask)
<> 150:02e0a0aed4ec 366 {
<> 150:02e0a0aed4ec 367 MXC_RTCTMR->inten &= ~mask;
<> 150:02e0a0aed4ec 368 }
<> 150:02e0a0aed4ec 369
<> 150:02e0a0aed4ec 370 /**
<> 150:02e0a0aed4ec 371 * @brief Gets the RTC's interrupt flags
<> 150:02e0a0aed4ec 372 *
<> 150:02e0a0aed4ec 373 * @retval uint32_t interrupt flags
<> 150:02e0a0aed4ec 374 */
<> 150:02e0a0aed4ec 375 __STATIC_INLINE uint32_t RTC_GetFlags(void)
<> 150:02e0a0aed4ec 376 {
<> 150:02e0a0aed4ec 377 return (MXC_RTCTMR->flags);
<> 150:02e0a0aed4ec 378 }
<> 150:02e0a0aed4ec 379
<> 150:02e0a0aed4ec 380 /**
<> 150:02e0a0aed4ec 381 * @brief Clears the RTC's interrupt flags based on the mask provided
<> 150:02e0a0aed4ec 382 *
<> 150:02e0a0aed4ec 383 * @param mask masked used to clear individual interrupt flags
<> 150:02e0a0aed4ec 384 */
<> 150:02e0a0aed4ec 385 __STATIC_INLINE void RTC_ClearFlags(uint32_t mask)
<> 150:02e0a0aed4ec 386 {
<> 150:02e0a0aed4ec 387 MXC_RTCTMR->flags = mask;
<> 150:02e0a0aed4ec 388
<> 150:02e0a0aed4ec 389 //wait for pending actions to complete
<> 150:02e0a0aed4ec 390 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
<> 150:02e0a0aed4ec 391 }
<> 150:02e0a0aed4ec 392
<> 150:02e0a0aed4ec 393 /**
<> 150:02e0a0aed4ec 394 * @brief Gets the active transaction flags
<> 150:02e0a0aed4ec 395 *
<> 150:02e0a0aed4ec 396 * @retval 0 = no active transactions , nonzero = active transactions bits
<> 150:02e0a0aed4ec 397 */
<> 150:02e0a0aed4ec 398 __STATIC_INLINE uint32_t RTC_GetActiveTrans(void)
<> 150:02e0a0aed4ec 399 {
<> 150:02e0a0aed4ec 400 return (MXC_RTCTMR->ctrl & RTC_CTRL_ACTIVE_TRANS);
<> 150:02e0a0aed4ec 401 }
<> 150:02e0a0aed4ec 402
<> 150:02e0a0aed4ec 403 /**
<> 150:02e0a0aed4ec 404 * @brief Sets the trim value and trim slow/fast option
<> 150:02e0a0aed4ec 405 * @note Ensure RTC is disabled prior to calling this function
<> 150:02e0a0aed4ec 406 *
<> 150:02e0a0aed4ec 407 * @param trim trim value - maximum trim value setting of 0x03FFFF
<> 150:02e0a0aed4ec 408 * @param trimSlow 1 = trim slow, 0 = trim fast
<> 150:02e0a0aed4ec 409 *
<> 150:02e0a0aed4ec 410 * @retval E_NO_ERROR Trim value is valid and set.
<> 150:02e0a0aed4ec 411 * @retval E_INVALID Trim value exceeds max trim.
<> 150:02e0a0aed4ec 412 * @retval E_BAD_STATE RTC is not disabled.
<> 150:02e0a0aed4ec 413 *
<> 150:02e0a0aed4ec 414 */
<> 150:02e0a0aed4ec 415 int RTC_SetTrim(uint32_t trim, uint8_t trimSlow);
<> 150:02e0a0aed4ec 416
<> 150:02e0a0aed4ec 417 /**
<> 150:02e0a0aed4ec 418 * @brief Gets the trim value currently set
<> 150:02e0a0aed4ec 419 * @note Ensure RTC is disabled prior to calling this function
<> 150:02e0a0aed4ec 420 *
<> 150:02e0a0aed4ec 421 * @retval uint32_t Current trim value of RTC.
<> 150:02e0a0aed4ec 422 */
<> 150:02e0a0aed4ec 423 uint32_t RTC_GetTrim(void);
<> 150:02e0a0aed4ec 424
<> 150:02e0a0aed4ec 425 /**
<> 150:02e0a0aed4ec 426 * @brief Enabled the trim.
<> 150:02e0a0aed4ec 427 * @note Ensure RTC is disabled prior to calling this function
<> 150:02e0a0aed4ec 428 * @retval E_NO_ERROR Trim enabled
<> 150:02e0a0aed4ec 429 * @retval E_INVALID
<> 150:02e0a0aed4ec 430 */
<> 150:02e0a0aed4ec 431 int RTC_TrimEnable(void);
<> 150:02e0a0aed4ec 432
<> 150:02e0a0aed4ec 433 /**
<> 150:02e0a0aed4ec 434 * @brief Disable the trim.
<> 150:02e0a0aed4ec 435 */
<> 150:02e0a0aed4ec 436 void RTC_TrimDisable(void);
<> 150:02e0a0aed4ec 437
<> 150:02e0a0aed4ec 438 /**
<> 150:02e0a0aed4ec 439 * @}
<> 150:02e0a0aed4ec 440 */
<> 150:02e0a0aed4ec 441
<> 150:02e0a0aed4ec 442 #ifdef __cplusplus
<> 150:02e0a0aed4ec 443 }
<> 150:02e0a0aed4ec 444 #endif
<> 150:02e0a0aed4ec 445
<> 150:02e0a0aed4ec 446 #endif /* _RTC_H */