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targets/TARGET_Maxim/TARGET_MAX32625/mxc/i2cm.h@178:c26431f84b0d, 2017-11-09 (annotated)

Committer:
amithy
Date:
Thu Nov 09 22:14:37 2017 +0000
Revision:
178:c26431f84b0d
Parent:
150:02e0a0aed4ec 
test export

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<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * $Date: 2016-04-27 11:55:43 -0500 (Wed, 27 Apr 2016) $
<> 150:02e0a0aed4ec 33 * $Revision: 22541 $
<> 150:02e0a0aed4ec 34 *
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36
<> 150:02e0a0aed4ec 37 /**
<> 150:02e0a0aed4ec 38 * @file i2cm.h
<> 150:02e0a0aed4ec 39 * @brief I2C Master driver header file.
<> 150:02e0a0aed4ec 40 */
<> 150:02e0a0aed4ec 41
<> 150:02e0a0aed4ec 42 #ifndef _I2CM_H_
<> 150:02e0a0aed4ec 43 #define _I2CM_H_
<> 150:02e0a0aed4ec 44
<> 150:02e0a0aed4ec 45 /***** Includes *****/
<> 150:02e0a0aed4ec 46 #include "mxc_config.h"
<> 150:02e0a0aed4ec 47 #include "mxc_sys.h"
<> 150:02e0a0aed4ec 48 #include "i2cm_regs.h"
<> 150:02e0a0aed4ec 49
<> 150:02e0a0aed4ec 50 #ifdef __cplusplus
<> 150:02e0a0aed4ec 51 extern "C" {
<> 150:02e0a0aed4ec 52 #endif
<> 150:02e0a0aed4ec 53
<> 150:02e0a0aed4ec 54 /***** Definitions *****/
<> 150:02e0a0aed4ec 55
<> 150:02e0a0aed4ec 56 /// @brief I2CM frequencies.
<> 150:02e0a0aed4ec 57 typedef enum {
<> 150:02e0a0aed4ec 58 I2CM_SPEED_100KHZ = 100000,
<> 150:02e0a0aed4ec 59 I2CM_SPEED_400KHZ = 400000
<> 150:02e0a0aed4ec 60 } i2cm_speed_t;
<> 150:02e0a0aed4ec 61
<> 150:02e0a0aed4ec 62 /// @brief I2CM Transaction request.
<> 150:02e0a0aed4ec 63 typedef struct i2cm_req i2cm_req_t;
<> 150:02e0a0aed4ec 64 struct i2cm_req {
<> 150:02e0a0aed4ec 65
<> 150:02e0a0aed4ec 66 /**
<> 150:02e0a0aed4ec 67 * @details Only supports 7-bit addressing. Driver will shift the address and
<> 150:02e0a0aed4ec 68 * add the read bit when necessary.
<> 150:02e0a0aed4ec 69 */
<> 150:02e0a0aed4ec 70 uint8_t addr;
<> 150:02e0a0aed4ec 71 const uint8_t *cmd_data; ///< Optional command data to write before reading.
<> 150:02e0a0aed4ec 72 uint32_t cmd_len; ///< Number of bytes in command.
<> 150:02e0a0aed4ec 73 uint8_t *data; ///< Data to write or read.
<> 150:02e0a0aed4ec 74 uint32_t data_len; ///< Length of data.
<> 150:02e0a0aed4ec 75 uint32_t cmd_num; ///< Number of command bytes sent
<> 150:02e0a0aed4ec 76 uint32_t data_num; ///< Number of data bytes sent
<> 150:02e0a0aed4ec 77
<> 150:02e0a0aed4ec 78 /**
<> 150:02e0a0aed4ec 79 * @brief Callback for asynchronous request.
<> 150:02e0a0aed4ec 80 * @param i2cm_req_t* Pointer to the transaction request.
<> 150:02e0a0aed4ec 81 * @param int Error code.
<> 150:02e0a0aed4ec 82 */
<> 150:02e0a0aed4ec 83 void (*callback)(i2cm_req_t*, int);
<> 150:02e0a0aed4ec 84 };
<> 150:02e0a0aed4ec 85
<> 150:02e0a0aed4ec 86 /***** Globals *****/
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88 /***** Function Prototypes *****/
<> 150:02e0a0aed4ec 89
<> 150:02e0a0aed4ec 90 /**
<> 150:02e0a0aed4ec 91 * @brief Initialize I2CM module.
<> 150:02e0a0aed4ec 92 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 93 * @param cfg Pointer to I2CM configuration.
<> 150:02e0a0aed4ec 94 * @param speed I2CM frequency.
<> 150:02e0a0aed4ec 95 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 96 */
<> 150:02e0a0aed4ec 97 int I2CM_Init(mxc_i2cm_regs_t *i2cm, const sys_cfg_i2cm_t *sys_cfg, i2cm_speed_t speed);
<> 150:02e0a0aed4ec 98
<> 150:02e0a0aed4ec 99 /**
<> 150:02e0a0aed4ec 100 * @brief Shutdown I2CM module.
<> 150:02e0a0aed4ec 101 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 102 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 103 */
<> 150:02e0a0aed4ec 104 int I2CM_Shutdown(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 105
<> 150:02e0a0aed4ec 106 /**
<> 150:02e0a0aed4ec 107 * @brief Read I2CM data. Will block until transaction is complete.
<> 150:02e0a0aed4ec 108 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 109 * @param addr I2C address of the slave.
<> 150:02e0a0aed4ec 110 * @param cmd_data Data to write before reading.
<> 150:02e0a0aed4ec 111 * @param cmd_len Number of bytes to write before reading.
<> 150:02e0a0aed4ec 112 * @param data Where to store read data.
<> 150:02e0a0aed4ec 113 * @param len Number of bytes to read.
<> 150:02e0a0aed4ec 114 * @details Command is an optional feature where the master will write the cmd_data
<> 150:02e0a0aed4ec 115 * before reading from the slave. If command is undesired, leave the pointer
<> 150:02e0a0aed4ec 116 * NULL and cmd_len 0. If there is a command, the master will send a
<> 150:02e0a0aed4ec 117 repeated start before reading. Will block until transaction has completed.
<> 150:02e0a0aed4ec 118 * @returns Bytes transacted if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 119 */
<> 150:02e0a0aed4ec 120 int I2CM_Read(mxc_i2cm_regs_t *i2cm, uint8_t addr, const uint8_t *cmd_data,
<> 150:02e0a0aed4ec 121 uint32_t cmd_len, uint8_t* data, uint32_t len);
<> 150:02e0a0aed4ec 122
<> 150:02e0a0aed4ec 123 /**
<> 150:02e0a0aed4ec 124 * @brief Write I2CM data. Will block until transaction is complete.
<> 150:02e0a0aed4ec 125 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 126 * @param addr I2C address of the slave.
<> 150:02e0a0aed4ec 127 * @param cmd_data Data to write before writing data.
<> 150:02e0a0aed4ec 128 * @param cmd_len Number of bytes to write before writing data.
<> 150:02e0a0aed4ec 129 * @param data Data to be written.
<> 150:02e0a0aed4ec 130 * @param len Number of bytes to Write.
<> 150:02e0a0aed4ec 131 * @details Command is an optional feature where the master will write the cmd_data
<> 150:02e0a0aed4ec 132 * before writing to the slave. If command is undesired, leave the pointer
<> 150:02e0a0aed4ec 133 * NULL and cmd_len 0. If there is a command, the master will send a
<> 150:02e0a0aed4ec 134 repeated start before writing again. Will block until transaction has completed.
<> 150:02e0a0aed4ec 135 * @returns Bytes transacted if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 136 */
<> 150:02e0a0aed4ec 137 int I2CM_Write(mxc_i2cm_regs_t *i2cm, uint8_t addr, const uint8_t *cmd_data,
<> 150:02e0a0aed4ec 138 uint32_t cmd_len, uint8_t* data, uint32_t len);
<> 150:02e0a0aed4ec 139
<> 150:02e0a0aed4ec 140 /**
<> 150:02e0a0aed4ec 141 * @brief Asynchronously read I2CM data.
<> 150:02e0a0aed4ec 142 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 143 * @param req Request for an I2CM transaction.
<> 150:02e0a0aed4ec 144 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 145 */
<> 150:02e0a0aed4ec 146 int I2CM_ReadAsync(mxc_i2cm_regs_t *i2cm, i2cm_req_t *req);
<> 150:02e0a0aed4ec 147
<> 150:02e0a0aed4ec 148 /**
<> 150:02e0a0aed4ec 149 * @brief Asynchronously write I2CM data.
<> 150:02e0a0aed4ec 150 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 151 * @param req Request for an I2CM transaction.
<> 150:02e0a0aed4ec 152 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
<> 150:02e0a0aed4ec 153 */
<> 150:02e0a0aed4ec 154 int I2CM_WriteAsync(mxc_i2cm_regs_t *i2cm, i2cm_req_t *req);
<> 150:02e0a0aed4ec 155
<> 150:02e0a0aed4ec 156 /**
<> 150:02e0a0aed4ec 157 * @brief Abort asynchronous request.
<> 150:02e0a0aed4ec 158 * @param req Pointer to request for a I2CM transaction.
<> 150:02e0a0aed4ec 159 * @note Will call the callback for the request.
<> 150:02e0a0aed4ec 160 * @returns #E_NO_ERROR if request aborted, error if unsuccessful.
<> 150:02e0a0aed4ec 161 */
<> 150:02e0a0aed4ec 162 int I2CM_AbortAsync(i2cm_req_t *req);
<> 150:02e0a0aed4ec 163
<> 150:02e0a0aed4ec 164 /**
<> 150:02e0a0aed4ec 165 * @brief I2CM interrupt handler.
<> 150:02e0a0aed4ec 166 * @details This function should be called by the application from the interrupt
<> 150:02e0a0aed4ec 167 * handler if I2CM interrupts are enabled. Alternately, this function
<> 150:02e0a0aed4ec 168 * can be periodically called by the application if I2CM interrupts are
<> 150:02e0a0aed4ec 169 * disabled.
<> 150:02e0a0aed4ec 170 * @param i2cm Base address of the I2CM module.
<> 150:02e0a0aed4ec 171 */
<> 150:02e0a0aed4ec 172 void I2CM_Handler(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 173
<> 150:02e0a0aed4ec 174 /**
<> 150:02e0a0aed4ec 175 * @brief Checks to see if the I2CM is busy.
<> 150:02e0a0aed4ec 176 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 177 * @returns #E_NO_ERROR if idle, #E_BUSY if in use.
<> 150:02e0a0aed4ec 178 */
<> 150:02e0a0aed4ec 179 int I2CM_Busy(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 180
<> 150:02e0a0aed4ec 181 /**
<> 150:02e0a0aed4ec 182 * @brief Attempt to prepare the I2CM for sleep.
<> 150:02e0a0aed4ec 183 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 184 * @details Checks for any ongoing transactions. Disables interrupts if the I2CM
<> 150:02e0a0aed4ec 185 is idle.
<> 150:02e0a0aed4ec 186 * @returns #E_NO_ERROR if ready to sleep, #E_BUSY if not ready for sleep.
<> 150:02e0a0aed4ec 187 */
<> 150:02e0a0aed4ec 188 int I2CM_PrepForSleep(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 189
<> 150:02e0a0aed4ec 190 /**
<> 150:02e0a0aed4ec 191 * @brief Check the I2C bus.
<> 150:02e0a0aed4ec 192 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 193 * @details Checks the I2CM bus to determine if there is any other master using
<> 150:02e0a0aed4ec 194 * the bus.
<> 150:02e0a0aed4ec 195 * @returns #E_NO_ERROR if SCL and SDA are high, #E_BUSY otherwise.
<> 150:02e0a0aed4ec 196 */
<> 150:02e0a0aed4ec 197 int I2CM_BusCheck(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 198
<> 150:02e0a0aed4ec 199 /**
<> 150:02e0a0aed4ec 200 * @brief Drain all of the data in the RXFIFO.
<> 150:02e0a0aed4ec 201 * @param i2cm Pointer to UART regs.
<> 150:02e0a0aed4ec 202 */
<> 150:02e0a0aed4ec 203 __STATIC_INLINE void I2CM_DrainRX(mxc_i2cm_regs_t *i2cm)
<> 150:02e0a0aed4ec 204 {
<> 150:02e0a0aed4ec 205 i2cm->ctrl &= ~(MXC_F_I2CM_CTRL_RX_FIFO_EN);
<> 150:02e0a0aed4ec 206 i2cm->ctrl |= MXC_F_I2CM_CTRL_RX_FIFO_EN;
<> 150:02e0a0aed4ec 207 }
<> 150:02e0a0aed4ec 208
<> 150:02e0a0aed4ec 209 /**
<> 150:02e0a0aed4ec 210 * @brief Drain all of the data in the TXFIFO.
<> 150:02e0a0aed4ec 211 * @param i2cm Pointer to UART regs.
<> 150:02e0a0aed4ec 212 */
<> 150:02e0a0aed4ec 213 __STATIC_INLINE void I2CM_DrainTX(mxc_i2cm_regs_t *i2cm)
<> 150:02e0a0aed4ec 214 {
<> 150:02e0a0aed4ec 215 i2cm->ctrl &= ~(MXC_F_I2CM_CTRL_TX_FIFO_EN);
<> 150:02e0a0aed4ec 216 i2cm->ctrl |= MXC_F_I2CM_CTRL_TX_FIFO_EN;
<> 150:02e0a0aed4ec 217 }
<> 150:02e0a0aed4ec 218
<> 150:02e0a0aed4ec 219 /**
<> 150:02e0a0aed4ec 220 * @brief Clear interrupt flags.
<> 150:02e0a0aed4ec 221 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 222 * @param mask Mask of interrupts to clear.
<> 150:02e0a0aed4ec 223 */
<> 150:02e0a0aed4ec 224 __STATIC_INLINE void I2CM_ClearFlags(mxc_i2cm_regs_t *i2cm, uint32_t mask)
<> 150:02e0a0aed4ec 225 {
<> 150:02e0a0aed4ec 226 i2cm->intfl = mask;
<> 150:02e0a0aed4ec 227 }
<> 150:02e0a0aed4ec 228
<> 150:02e0a0aed4ec 229 /**
<> 150:02e0a0aed4ec 230 * @brief Get interrupt flags.
<> 150:02e0a0aed4ec 231 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 232 * @returns Mask of active flags.
<> 150:02e0a0aed4ec 233 */
<> 150:02e0a0aed4ec 234 __STATIC_INLINE unsigned I2CM_GetFlags(mxc_i2cm_regs_t *i2cm)
<> 150:02e0a0aed4ec 235 {
<> 150:02e0a0aed4ec 236 return(i2cm->intfl);
<> 150:02e0a0aed4ec 237 }
<> 150:02e0a0aed4ec 238 /**
<> 150:02e0a0aed4ec 239 * @brief Set the I2C Frequency
<> 150:02e0a0aed4ec 240 * @param i2cm Pointer to I2CM regs.
<> 150:02e0a0aed4ec 241 * @param speed speed in Hz
<> 150:02e0a0aed4ec 242 * @details sets the registers for the proper frequency
<> 150:02e0a0aed4ec 243 * @returns #E_NO_ERROR if Frequency is supported, #E_NOT_Supported otherwise.
<> 150:02e0a0aed4ec 244 */
<> 150:02e0a0aed4ec 245 int I2CM_SetFrequency(mxc_i2cm_regs_t *i2cm, int speed);
<> 150:02e0a0aed4ec 246
<> 150:02e0a0aed4ec 247 void I2CM_Recover(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 248 int I2CM_WriteTxFifo(mxc_i2cm_regs_t *regs, mxc_i2cm_fifo_regs_t *fifo, const uint16_t data);
<> 150:02e0a0aed4ec 249 int I2CM_TxInProgress(mxc_i2cm_regs_t *i2cm);
<> 150:02e0a0aed4ec 250 int I2CM_Tx(mxc_i2cm_regs_t *i2cm, mxc_i2cm_fifo_regs_t *fifo, uint8_t addr, const uint8_t *data, uint32_t len, uint8_t stop);
<> 150:02e0a0aed4ec 251 int I2CM_Rx(mxc_i2cm_regs_t *i2cm, mxc_i2cm_fifo_regs_t *fifo, uint8_t addr, uint8_t *data, uint32_t len);
<> 150:02e0a0aed4ec 252
<> 150:02e0a0aed4ec 253 #ifdef __cplusplus
<> 150:02e0a0aed4ec 254 }
<> 150:02e0a0aed4ec 255 #endif
<> 150:02e0a0aed4ec 256
<> 150:02e0a0aed4ec 257 #endif /* _I2CM_H_ */