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targets/TARGET_Maxim/TARGET_MAX32625/mxc/adc.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 150:02e0a0aed4ec
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 150:02e0a0aed4ec | 1 | /** |
<> | 150:02e0a0aed4ec | 2 | * @file adc.h |
<> | 150:02e0a0aed4ec | 3 | * @brief Analog to Digital Converter function prototypes and data types. |
<> | 150:02e0a0aed4ec | 4 | */ |
<> | 150:02e0a0aed4ec | 5 | |
<> | 150:02e0a0aed4ec | 6 | /* **************************************************************************** |
<> | 150:02e0a0aed4ec | 7 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 8 | * |
<> | 150:02e0a0aed4ec | 9 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 10 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 11 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 13 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 14 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 15 | * |
<> | 150:02e0a0aed4ec | 16 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 17 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 18 | * |
<> | 150:02e0a0aed4ec | 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 22 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 23 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 25 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 26 | * |
<> | 150:02e0a0aed4ec | 27 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 28 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 29 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 30 | * |
<> | 150:02e0a0aed4ec | 31 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 32 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 33 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 34 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 35 | * ownership rights. |
<> | 150:02e0a0aed4ec | 36 | * |
<> | 150:02e0a0aed4ec | 37 | * $Date: 2016-08-04 16:21:09 -0500 (Thu, 04 Aug 2016) $ |
<> | 150:02e0a0aed4ec | 38 | * $Revision: 23947 $ |
<> | 150:02e0a0aed4ec | 39 | * |
<> | 150:02e0a0aed4ec | 40 | *************************************************************************** */ |
<> | 150:02e0a0aed4ec | 41 | |
<> | 150:02e0a0aed4ec | 42 | /* Define to prevent redundant inclusion */ |
<> | 150:02e0a0aed4ec | 43 | #ifndef _ADC_H |
<> | 150:02e0a0aed4ec | 44 | #define _ADC_H |
<> | 150:02e0a0aed4ec | 45 | |
<> | 150:02e0a0aed4ec | 46 | /* **** Includes **** */ |
<> | 150:02e0a0aed4ec | 47 | #include <stdint.h> |
<> | 150:02e0a0aed4ec | 48 | #include "adc_regs.h" |
<> | 150:02e0a0aed4ec | 49 | |
<> | 150:02e0a0aed4ec | 50 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 51 | extern "C" { |
<> | 150:02e0a0aed4ec | 52 | #endif |
<> | 150:02e0a0aed4ec | 53 | |
<> | 150:02e0a0aed4ec | 54 | /* Doxy group definition for this peripheral module */ |
<> | 150:02e0a0aed4ec | 55 | |
<> | 150:02e0a0aed4ec | 56 | /** |
<> | 150:02e0a0aed4ec | 57 | * @defgroup adc Analog to Digital Converter (ADC) |
<> | 150:02e0a0aed4ec | 58 | * @ingroup periphlibs |
<> | 150:02e0a0aed4ec | 59 | * @{ |
<> | 150:02e0a0aed4ec | 60 | */ |
<> | 150:02e0a0aed4ec | 61 | |
<> | 150:02e0a0aed4ec | 62 | /* **** Definitions **** */ |
<> | 150:02e0a0aed4ec | 63 | |
<> | 150:02e0a0aed4ec | 64 | /** |
<> | 150:02e0a0aed4ec | 65 | * Enumeration type for ADC Channel Selection. See \ref ADC_CHSEL_values "ADC Channel Select Values" for additional information. |
<> | 150:02e0a0aed4ec | 66 | */ |
<> | 150:02e0a0aed4ec | 67 | typedef enum { |
<> | 150:02e0a0aed4ec | 68 | ADC_CH_0 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0, /**< Channel 0 Select */ |
<> | 150:02e0a0aed4ec | 69 | ADC_CH_1 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1, /**< Channel 1 Select */ |
<> | 150:02e0a0aed4ec | 70 | ADC_CH_2 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN2, /**< Channel 2 Select */ |
<> | 150:02e0a0aed4ec | 71 | ADC_CH_3 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN3, /**< Channel 3 Select */ |
<> | 150:02e0a0aed4ec | 72 | ADC_CH_0_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0_DIV_5, /**< Channel 0 divided by 5 */ |
<> | 150:02e0a0aed4ec | 73 | ADC_CH_1_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1_DIV_5, /**< Channel 1 divided by 5 */ |
<> | 150:02e0a0aed4ec | 74 | ADC_CH_VDDB_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDB_DIV_4, /**< VDDB divided by 4 */ |
<> | 150:02e0a0aed4ec | 75 | ADC_CH_VDD18 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD18, /**< VDD18 input select */ |
<> | 150:02e0a0aed4ec | 76 | ADC_CH_VDD12 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD12, /**< VDD12 input select */ |
<> | 150:02e0a0aed4ec | 77 | ADC_CH_VRTC_DIV_2 = MXC_V_ADC_CTRL_ADC_CHSEL_VRTC_DIV_2, /**< VRTC divided by 2 */ |
<> | 150:02e0a0aed4ec | 78 | ADC_CH_TMON = MXC_V_ADC_CTRL_ADC_CHSEL_TMON, /**< TMON input select */ |
<> | 150:02e0a0aed4ec | 79 | #if (MXC_ADC_REV > 0) |
<> | 150:02e0a0aed4ec | 80 | ADC_CH_VDDIO_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIO_DIV_4, /**< VDDIO divided by 4 select */ |
<> | 150:02e0a0aed4ec | 81 | ADC_CH_VDDIOH_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIOH_DIV_4, /**< VDDIOH divided by 4 select */ |
<> | 150:02e0a0aed4ec | 82 | #endif |
<> | 150:02e0a0aed4ec | 83 | ADC_CH_MAX /**< Max enum value for channel selection */ |
<> | 150:02e0a0aed4ec | 84 | } mxc_adc_chsel_t; |
<> | 150:02e0a0aed4ec | 85 | |
<> | 150:02e0a0aed4ec | 86 | /** |
<> | 150:02e0a0aed4ec | 87 | * Enumeration type for the ADC limit register to set |
<> | 150:02e0a0aed4ec | 88 | */ |
<> | 150:02e0a0aed4ec | 89 | typedef enum { |
<> | 150:02e0a0aed4ec | 90 | ADC_LIMIT_0 = 0, /**< ADC Limit Register 0 */ |
<> | 150:02e0a0aed4ec | 91 | ADC_LIMIT_1 = 1, /**< ADC Limit Register 1 */ |
<> | 150:02e0a0aed4ec | 92 | ADC_LIMIT_2 = 2, /**< ADC Limit Register 2 */ |
<> | 150:02e0a0aed4ec | 93 | ADC_LIMIT_3 = 3, /**< ADC Limit Register 3 */ |
<> | 150:02e0a0aed4ec | 94 | ADC_LIMIT_MAX /**< Number of Limit registers */ |
<> | 150:02e0a0aed4ec | 95 | } mxc_adc_limitsel_t; |
<> | 150:02e0a0aed4ec | 96 | |
<> | 150:02e0a0aed4ec | 97 | ///@cond |
<> | 150:02e0a0aed4ec | 98 | /** |
<> | 150:02e0a0aed4ec | 99 | * Mask for all Interrupt Flag Fields |
<> | 150:02e0a0aed4ec | 100 | */ |
<> | 150:02e0a0aed4ec | 101 | #define ADC_IF_MASK (0xffffffffUL << MXC_F_ADC_INTR_ADC_DONE_IF_POS) |
<> | 150:02e0a0aed4ec | 102 | |
<> | 150:02e0a0aed4ec | 103 | /** |
<> | 150:02e0a0aed4ec | 104 | * Mask for all Interrupt Enable Fields |
<> | 150:02e0a0aed4ec | 105 | */ |
<> | 150:02e0a0aed4ec | 106 | #define ADC_IE_MASK (0xffffffffUL >> MXC_F_ADC_INTR_ADC_DONE_IF_POS) |
<> | 150:02e0a0aed4ec | 107 | ///@endcond |
<> | 150:02e0a0aed4ec | 108 | |
<> | 150:02e0a0aed4ec | 109 | /* **** Function Prototypes **** */ |
<> | 150:02e0a0aed4ec | 110 | |
<> | 150:02e0a0aed4ec | 111 | /** |
<> | 150:02e0a0aed4ec | 112 | * @brief Initialize the ADC hardware |
<> | 150:02e0a0aed4ec | 113 | * |
<> | 150:02e0a0aed4ec | 114 | * @return #E_NO_ERROR if successful |
<> | 150:02e0a0aed4ec | 115 | */ |
<> | 150:02e0a0aed4ec | 116 | int ADC_Init(void); |
<> | 150:02e0a0aed4ec | 117 | |
<> | 150:02e0a0aed4ec | 118 | /** |
<> | 150:02e0a0aed4ec | 119 | * @brief Start ADC conversion on the selected channel |
<> | 150:02e0a0aed4ec | 120 | * |
<> | 150:02e0a0aed4ec | 121 | * @param channel Channel select from #mxc_adc_chsel_t |
<> | 150:02e0a0aed4ec | 122 | * @param adc_scale Enable the ADC input scaling mode if non-zero |
<> | 150:02e0a0aed4ec | 123 | * @param bypass Bypass input buffer stage if non-zero |
<> | 150:02e0a0aed4ec | 124 | */ |
<> | 150:02e0a0aed4ec | 125 | void ADC_StartConvert(mxc_adc_chsel_t channel, unsigned int adc_scale, unsigned int bypass); |
<> | 150:02e0a0aed4ec | 126 | |
<> | 150:02e0a0aed4ec | 127 | /** |
<> | 150:02e0a0aed4ec | 128 | * @brief Gets the result from the previous ADC conversion |
<> | 150:02e0a0aed4ec | 129 | * |
<> | 150:02e0a0aed4ec | 130 | * @param outdata Pointer to store the ADC data conversion |
<> | 150:02e0a0aed4ec | 131 | * result. |
<> | 150:02e0a0aed4ec | 132 | * @return #E_OVERFLOW ADC overflow error |
<> | 150:02e0a0aed4ec | 133 | * @return #E_NO_ERROR Data returned in outdata parameter |
<> | 150:02e0a0aed4ec | 134 | */ |
<> | 150:02e0a0aed4ec | 135 | int ADC_GetData(uint16_t *outdata); |
<> | 150:02e0a0aed4ec | 136 | |
<> | 150:02e0a0aed4ec | 137 | /** |
<> | 150:02e0a0aed4ec | 138 | * @brief Set the data limits for an ADC channel monitor |
<> | 150:02e0a0aed4ec | 139 | * |
<> | 150:02e0a0aed4ec | 140 | * @param unit Which data limit unit to configure |
<> | 150:02e0a0aed4ec | 141 | * @param channel Channel select from mxc_adc_chsel_t |
<> | 150:02e0a0aed4ec | 142 | * @param low_enable Enable the lower limit on this monitor |
<> | 150:02e0a0aed4ec | 143 | * @param low_limit Value for lower limit monitor |
<> | 150:02e0a0aed4ec | 144 | * @param high_enable Enable the upper limit on this monitor |
<> | 150:02e0a0aed4ec | 145 | * @param high_limit Value for upper limit monitor |
<> | 150:02e0a0aed4ec | 146 | * |
<> | 150:02e0a0aed4ec | 147 | * @return #E_BAD_PARAM ADC limit or channel greater than supported |
<> | 150:02e0a0aed4ec | 148 | * @return #E_NO_ERROR ADC limit set successfully |
<> | 150:02e0a0aed4ec | 149 | */ |
<> | 150:02e0a0aed4ec | 150 | int ADC_SetLimit(mxc_adc_limitsel_t unit, mxc_adc_chsel_t channel, |
<> | 150:02e0a0aed4ec | 151 | unsigned int low_enable, unsigned int low_limit, |
<> | 150:02e0a0aed4ec | 152 | unsigned int high_enable, unsigned int high_limit); |
<> | 150:02e0a0aed4ec | 153 | |
<> | 150:02e0a0aed4ec | 154 | /** |
<> | 150:02e0a0aed4ec | 155 | * @brief Get interrupt flags |
<> | 150:02e0a0aed4ec | 156 | * |
<> | 150:02e0a0aed4ec | 157 | * @return ADC Interrupt flags bit mask. See the @ref ADC_INTR_IF_Register |
<> | 150:02e0a0aed4ec | 158 | * "ADC_INTR Register" for the interrupt flag masks. |
<> | 150:02e0a0aed4ec | 159 | */ |
<> | 150:02e0a0aed4ec | 160 | __STATIC_INLINE uint32_t ADC_GetFlags() |
<> | 150:02e0a0aed4ec | 161 | { |
<> | 150:02e0a0aed4ec | 162 | return (MXC_ADC->intr & ADC_IF_MASK); |
<> | 150:02e0a0aed4ec | 163 | } |
<> | 150:02e0a0aed4ec | 164 | |
<> | 150:02e0a0aed4ec | 165 | /** |
<> | 150:02e0a0aed4ec | 166 | * @brief Clear interrupt flag(s) using the mask parameter. All bits set in |
<> | 150:02e0a0aed4ec | 167 | * the parameter will be cleared. |
<> | 150:02e0a0aed4ec | 168 | * |
<> | 150:02e0a0aed4ec | 169 | * @param mask Interrupt flags to clear. See the @ref ADC_INTR_IF_Register |
<> | 150:02e0a0aed4ec | 170 | * "ADC_INTR Register" for the interrupt flag masks. |
<> | 150:02e0a0aed4ec | 171 | */ |
<> | 150:02e0a0aed4ec | 172 | __STATIC_INLINE void ADC_ClearFlags(uint32_t mask) |
<> | 150:02e0a0aed4ec | 173 | { |
<> | 150:02e0a0aed4ec | 174 | MXC_ADC->intr = ((MXC_ADC->intr & ADC_IF_MASK) | mask); |
<> | 150:02e0a0aed4ec | 175 | } |
<> | 150:02e0a0aed4ec | 176 | |
<> | 150:02e0a0aed4ec | 177 | /** |
<> | 150:02e0a0aed4ec | 178 | * @brief Get the Status of the ADC |
<> | 150:02e0a0aed4ec | 179 | * |
<> | 150:02e0a0aed4ec | 180 | * @return ADC status register. See @ref ADC_STATUS_Register "ADC_STATUS |
<> | 150:02e0a0aed4ec | 181 | * Register" for details. |
<> | 150:02e0a0aed4ec | 182 | */ |
<> | 150:02e0a0aed4ec | 183 | __STATIC_INLINE uint32_t ADC_GetStatus() |
<> | 150:02e0a0aed4ec | 184 | { |
<> | 150:02e0a0aed4ec | 185 | return (MXC_ADC->status); |
<> | 150:02e0a0aed4ec | 186 | } |
<> | 150:02e0a0aed4ec | 187 | |
<> | 150:02e0a0aed4ec | 188 | /** |
<> | 150:02e0a0aed4ec | 189 | * @brief Enables the ADC interrupts specified by the mask parameter |
<> | 150:02e0a0aed4ec | 190 | * |
<> | 150:02e0a0aed4ec | 191 | * @param mask ADC interrupts to enable. See @ref ADC_INTR_IE_Register |
<> | 150:02e0a0aed4ec | 192 | * "ADC_INTR Register" for the interrupt enable bit masks. |
<> | 150:02e0a0aed4ec | 193 | */ |
<> | 150:02e0a0aed4ec | 194 | __STATIC_INLINE void ADC_EnableINT(uint32_t mask) |
<> | 150:02e0a0aed4ec | 195 | { |
<> | 150:02e0a0aed4ec | 196 | MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) | mask); |
<> | 150:02e0a0aed4ec | 197 | } |
<> | 150:02e0a0aed4ec | 198 | |
<> | 150:02e0a0aed4ec | 199 | /** |
<> | 150:02e0a0aed4ec | 200 | * @brief Disable ADC interrupts based on mask |
<> | 150:02e0a0aed4ec | 201 | * |
<> | 150:02e0a0aed4ec | 202 | * @param mask ADC interrupts to disable. See @ref ADC_INTR_IE_Register |
<> | 150:02e0a0aed4ec | 203 | * "ADC_INTR Register" for the interrupt enable bit masks. |
<> | 150:02e0a0aed4ec | 204 | */ |
<> | 150:02e0a0aed4ec | 205 | __STATIC_INLINE void ADC_DisableINT(uint32_t mask) |
<> | 150:02e0a0aed4ec | 206 | { |
<> | 150:02e0a0aed4ec | 207 | MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) & ~mask); |
<> | 150:02e0a0aed4ec | 208 | } |
<> | 150:02e0a0aed4ec | 209 | |
<> | 150:02e0a0aed4ec | 210 | /**@} end of group adc */ |
<> | 150:02e0a0aed4ec | 211 | |
<> | 150:02e0a0aed4ec | 212 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 213 | } |
<> | 150:02e0a0aed4ec | 214 | #endif |
<> | 150:02e0a0aed4ec | 215 | |
<> | 150:02e0a0aed4ec | 216 | #endif /* _ADC_H */ |