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targets/TARGET_Maxim/TARGET_MAX32625/device/maa_regs.h@178:c26431f84b0d, 2017-11-09 (annotated)
- Committer:
- amithy
- Date:
- Thu Nov 09 22:14:37 2017 +0000
- Revision:
- 178:c26431f84b0d
- Parent:
- 150:02e0a0aed4ec
test export
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 150:02e0a0aed4ec | 1 | /******************************************************************************* |
<> | 150:02e0a0aed4ec | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 6 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 10 | * |
<> | 150:02e0a0aed4ec | 11 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 12 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 13 | * |
<> | 150:02e0a0aed4ec | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 21 | * |
<> | 150:02e0a0aed4ec | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 24 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 25 | * |
<> | 150:02e0a0aed4ec | 26 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 30 | * ownership rights. |
<> | 150:02e0a0aed4ec | 31 | ******************************************************************************/ |
<> | 150:02e0a0aed4ec | 32 | |
<> | 150:02e0a0aed4ec | 33 | #ifndef _MXC_MAA_REGS_H_ |
<> | 150:02e0a0aed4ec | 34 | #define _MXC_MAA_REGS_H_ |
<> | 150:02e0a0aed4ec | 35 | |
<> | 150:02e0a0aed4ec | 36 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 37 | extern "C" { |
<> | 150:02e0a0aed4ec | 38 | #endif |
<> | 150:02e0a0aed4ec | 39 | |
<> | 150:02e0a0aed4ec | 40 | #include <stdint.h> |
<> | 150:02e0a0aed4ec | 41 | #include "mxc_device.h" |
<> | 150:02e0a0aed4ec | 42 | |
<> | 150:02e0a0aed4ec | 43 | /* |
<> | 150:02e0a0aed4ec | 44 | If types are not defined elsewhere (CMSIS) define them here |
<> | 150:02e0a0aed4ec | 45 | */ |
<> | 150:02e0a0aed4ec | 46 | #ifndef __IO |
<> | 150:02e0a0aed4ec | 47 | #define __IO volatile |
<> | 150:02e0a0aed4ec | 48 | #endif |
<> | 150:02e0a0aed4ec | 49 | #ifndef __I |
<> | 150:02e0a0aed4ec | 50 | #define __I volatile const |
<> | 150:02e0a0aed4ec | 51 | #endif |
<> | 150:02e0a0aed4ec | 52 | #ifndef __O |
<> | 150:02e0a0aed4ec | 53 | #define __O volatile |
<> | 150:02e0a0aed4ec | 54 | #endif |
<> | 150:02e0a0aed4ec | 55 | |
<> | 150:02e0a0aed4ec | 56 | |
<> | 150:02e0a0aed4ec | 57 | /* |
<> | 150:02e0a0aed4ec | 58 | Typedefed structure(s) for module registers (per instance or section) with direct 32-bit |
<> | 150:02e0a0aed4ec | 59 | access to each register in module. |
<> | 150:02e0a0aed4ec | 60 | */ |
<> | 150:02e0a0aed4ec | 61 | |
<> | 150:02e0a0aed4ec | 62 | /* Offset Register Description |
<> | 150:02e0a0aed4ec | 63 | ============= ============================================================================ */ |
<> | 150:02e0a0aed4ec | 64 | typedef struct { |
<> | 150:02e0a0aed4ec | 65 | __IO uint32_t ctrl; /* 0x0000 MAA Control, Configuration and Status */ |
<> | 150:02e0a0aed4ec | 66 | __IO uint32_t maws; /* 0x0004 MAA Word (Operand) Size, Big/Little Endian Mode Select */ |
<> | 150:02e0a0aed4ec | 67 | } mxc_maa_regs_t; |
<> | 150:02e0a0aed4ec | 68 | |
<> | 150:02e0a0aed4ec | 69 | |
<> | 150:02e0a0aed4ec | 70 | /* Offset Register Description |
<> | 150:02e0a0aed4ec | 71 | ============= ============================================================================ */ |
<> | 150:02e0a0aed4ec | 72 | typedef struct { |
<> | 150:02e0a0aed4ec | 73 | __IO uint32_t seg0[32]; /* 0x0000-0x007C [128 bytes] MAA Memory Segment 0 */ |
<> | 150:02e0a0aed4ec | 74 | __IO uint32_t seg1[32]; /* 0x0080-0x00FC [128 bytes] MAA Memory Segment 1 */ |
<> | 150:02e0a0aed4ec | 75 | __IO uint32_t seg2[32]; /* 0x0100-0x017C [128 bytes] MAA Memory Segment 2 */ |
<> | 150:02e0a0aed4ec | 76 | __IO uint32_t seg3[32]; /* 0x0180-0x01FC [128 bytes] MAA Memory Segment 3 */ |
<> | 150:02e0a0aed4ec | 77 | __IO uint32_t seg4[32]; /* 0x0200-0x027C [128 bytes] MAA Memory Segment 4 */ |
<> | 150:02e0a0aed4ec | 78 | __IO uint32_t seg5[32]; /* 0x0280-0x02FC [128 bytes] MAA Memory Segment 5 */ |
<> | 150:02e0a0aed4ec | 79 | } mxc_maa_mem_regs_t; |
<> | 150:02e0a0aed4ec | 80 | |
<> | 150:02e0a0aed4ec | 81 | |
<> | 150:02e0a0aed4ec | 82 | /* |
<> | 150:02e0a0aed4ec | 83 | Register offsets for module MAA. |
<> | 150:02e0a0aed4ec | 84 | */ |
<> | 150:02e0a0aed4ec | 85 | |
<> | 150:02e0a0aed4ec | 86 | #define MXC_R_MAA_OFFS_CTRL ((uint32_t)0x00000000UL) |
<> | 150:02e0a0aed4ec | 87 | #define MXC_R_MAA_OFFS_MAWS ((uint32_t)0x00000004UL) |
<> | 150:02e0a0aed4ec | 88 | #define MXC_R_MAA_MEM_OFFS_SEG0 ((uint32_t)0x00000000UL) |
<> | 150:02e0a0aed4ec | 89 | #define MXC_R_MAA_MEM_OFFS_SEG1 ((uint32_t)0x00000080UL) |
<> | 150:02e0a0aed4ec | 90 | #define MXC_R_MAA_MEM_OFFS_SEG2 ((uint32_t)0x00000100UL) |
<> | 150:02e0a0aed4ec | 91 | #define MXC_R_MAA_MEM_OFFS_SEG3 ((uint32_t)0x00000180UL) |
<> | 150:02e0a0aed4ec | 92 | #define MXC_R_MAA_MEM_OFFS_SEG4 ((uint32_t)0x00000200UL) |
<> | 150:02e0a0aed4ec | 93 | #define MXC_R_MAA_MEM_OFFS_SEG5 ((uint32_t)0x00000280UL) |
<> | 150:02e0a0aed4ec | 94 | |
<> | 150:02e0a0aed4ec | 95 | |
<> | 150:02e0a0aed4ec | 96 | /* |
<> | 150:02e0a0aed4ec | 97 | Field positions and masks for module MAA. |
<> | 150:02e0a0aed4ec | 98 | */ |
<> | 150:02e0a0aed4ec | 99 | |
<> | 150:02e0a0aed4ec | 100 | #define MXC_F_MAA_CTRL_START_POS 0 |
<> | 150:02e0a0aed4ec | 101 | #define MXC_F_MAA_CTRL_START ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_START_POS)) |
<> | 150:02e0a0aed4ec | 102 | #define MXC_F_MAA_CTRL_OPSEL_POS 1 |
<> | 150:02e0a0aed4ec | 103 | #define MXC_F_MAA_CTRL_OPSEL ((uint32_t)(0x00000007UL << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 104 | #define MXC_F_MAA_CTRL_OCALC_POS 4 |
<> | 150:02e0a0aed4ec | 105 | #define MXC_F_MAA_CTRL_OCALC ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_OCALC_POS)) |
<> | 150:02e0a0aed4ec | 106 | #define MXC_F_MAA_CTRL_IF_DONE_POS 5 |
<> | 150:02e0a0aed4ec | 107 | #define MXC_F_MAA_CTRL_IF_DONE ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_DONE_POS)) |
<> | 150:02e0a0aed4ec | 108 | #define MXC_F_MAA_CTRL_INTEN_POS 6 |
<> | 150:02e0a0aed4ec | 109 | #define MXC_F_MAA_CTRL_INTEN ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_INTEN_POS)) |
<> | 150:02e0a0aed4ec | 110 | #define MXC_F_MAA_CTRL_IF_ERROR_POS 7 |
<> | 150:02e0a0aed4ec | 111 | #define MXC_F_MAA_CTRL_IF_ERROR ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_ERROR_POS)) |
<> | 150:02e0a0aed4ec | 112 | #define MXC_F_MAA_CTRL_OFS_A_POS 8 |
<> | 150:02e0a0aed4ec | 113 | #define MXC_F_MAA_CTRL_OFS_A ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_A_POS)) |
<> | 150:02e0a0aed4ec | 114 | #define MXC_F_MAA_CTRL_OFS_B_POS 10 |
<> | 150:02e0a0aed4ec | 115 | #define MXC_F_MAA_CTRL_OFS_B ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_B_POS)) |
<> | 150:02e0a0aed4ec | 116 | #define MXC_F_MAA_CTRL_OFS_EXP_POS 12 |
<> | 150:02e0a0aed4ec | 117 | #define MXC_F_MAA_CTRL_OFS_EXP ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_EXP_POS)) |
<> | 150:02e0a0aed4ec | 118 | #define MXC_F_MAA_CTRL_OFS_MOD_POS 14 |
<> | 150:02e0a0aed4ec | 119 | #define MXC_F_MAA_CTRL_OFS_MOD ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_MOD_POS)) |
<> | 150:02e0a0aed4ec | 120 | #define MXC_F_MAA_CTRL_SEG_A_POS 16 |
<> | 150:02e0a0aed4ec | 121 | #define MXC_F_MAA_CTRL_SEG_A ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_A_POS)) |
<> | 150:02e0a0aed4ec | 122 | #define MXC_F_MAA_CTRL_SEG_B_POS 20 |
<> | 150:02e0a0aed4ec | 123 | #define MXC_F_MAA_CTRL_SEG_B ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_B_POS)) |
<> | 150:02e0a0aed4ec | 124 | #define MXC_F_MAA_CTRL_SEG_RES_POS 24 |
<> | 150:02e0a0aed4ec | 125 | #define MXC_F_MAA_CTRL_SEG_RES ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_RES_POS)) |
<> | 150:02e0a0aed4ec | 126 | #define MXC_F_MAA_CTRL_SEG_TMP_POS 28 |
<> | 150:02e0a0aed4ec | 127 | #define MXC_F_MAA_CTRL_SEG_TMP ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_TMP_POS)) |
<> | 150:02e0a0aed4ec | 128 | |
<> | 150:02e0a0aed4ec | 129 | #define MXC_F_MAA_MAWS_MODLEN_POS 0 |
<> | 150:02e0a0aed4ec | 130 | #define MXC_F_MAA_MAWS_MODLEN ((uint32_t)(0x000007FFUL << MXC_F_MAA_MAWS_MODLEN_POS)) |
<> | 150:02e0a0aed4ec | 131 | #define MXC_F_MAA_MAWS_BYTESWAP_POS 15 |
<> | 150:02e0a0aed4ec | 132 | #define MXC_F_MAA_MAWS_BYTESWAP ((uint32_t)(0x00000001UL << MXC_F_MAA_MAWS_BYTESWAP_POS)) |
<> | 150:02e0a0aed4ec | 133 | |
<> | 150:02e0a0aed4ec | 134 | |
<> | 150:02e0a0aed4ec | 135 | |
<> | 150:02e0a0aed4ec | 136 | /* |
<> | 150:02e0a0aed4ec | 137 | Field values and shifted values for module MAA. |
<> | 150:02e0a0aed4ec | 138 | */ |
<> | 150:02e0a0aed4ec | 139 | |
<> | 150:02e0a0aed4ec | 140 | #define MXC_V_MAA_OPSEL_EXP ((uint32_t)(0x00000000UL)) |
<> | 150:02e0a0aed4ec | 141 | #define MXC_V_MAA_OPSEL_SQR ((uint32_t)(0x00000001UL)) |
<> | 150:02e0a0aed4ec | 142 | #define MXC_V_MAA_OPSEL_MUL ((uint32_t)(0x00000002UL)) |
<> | 150:02e0a0aed4ec | 143 | #define MXC_V_MAA_OPSEL_SQRMUL ((uint32_t)(0x00000003UL)) |
<> | 150:02e0a0aed4ec | 144 | #define MXC_V_MAA_OPSEL_ADD ((uint32_t)(0x00000004UL)) |
<> | 150:02e0a0aed4ec | 145 | #define MXC_V_MAA_OPSEL_SUB ((uint32_t)(0x00000005UL)) |
<> | 150:02e0a0aed4ec | 146 | |
<> | 150:02e0a0aed4ec | 147 | #define MXC_S_MAA_OPSEL_EXP ((uint32_t)(MXC_V_MAA_OPSEL_EXP << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 148 | #define MXC_S_MAA_OPSEL_SQR ((uint32_t)(MXC_V_MAA_OPSEL_SQR << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 149 | #define MXC_S_MAA_OPSEL_MUL ((uint32_t)(MXC_V_MAA_OPSEL_MUL << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 150 | #define MXC_S_MAA_OPSEL_SQRMUL ((uint32_t)(MXC_V_MAA_OPSEL_SQRMUL << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 151 | #define MXC_S_MAA_OPSEL_ADD ((uint32_t)(MXC_V_MAA_OPSEL_ADD << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 152 | #define MXC_S_MAA_OPSEL_SUB ((uint32_t)(MXC_V_MAA_OPSEL_SUB << MXC_F_MAA_CTRL_OPSEL_POS)) |
<> | 150:02e0a0aed4ec | 153 | |
<> | 150:02e0a0aed4ec | 154 | |
<> | 150:02e0a0aed4ec | 155 | |
<> | 150:02e0a0aed4ec | 156 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 157 | } |
<> | 150:02e0a0aed4ec | 158 | #endif |
<> | 150:02e0a0aed4ec | 159 | |
<> | 150:02e0a0aed4ec | 160 | #endif /* _MXC_MAA_REGS_H_ */ |
<> | 150:02e0a0aed4ec | 161 |