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targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c@141:a2b798ec44f6, 2016-05-24 (annotated)
- Committer:
- mbed_official
- Date:
- Tue May 24 13:30:14 2016 +0100
- Revision:
- 141:a2b798ec44f6
- Parent:
- 119:3921aeca8633
- Child:
- 144:ef7eb2e8f9f7
Synchronized with git revision b32f7a9aaf404cba2342b4f3cf268c581046626b
Full URL: https://github.com/mbedmicro/mbed/commit/b32f7a9aaf404cba2342b4f3cf268c581046626b/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (c) 2006-2015 ARM Limited |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 6 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 7 | * |
bogdanm | 0:9b334a45a8ff | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 13 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 14 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 15 | */ |
bogdanm | 0:9b334a45a8ff | 16 | // math.h required for floating point operations for baud rate calculation |
bogdanm | 0:9b334a45a8ff | 17 | #include "mbed_assert.h" |
bogdanm | 0:9b334a45a8ff | 18 | #include <math.h> |
bogdanm | 0:9b334a45a8ff | 19 | #include <string.h> |
bogdanm | 0:9b334a45a8ff | 20 | #include <stdlib.h> |
bogdanm | 0:9b334a45a8ff | 21 | |
bogdanm | 0:9b334a45a8ff | 22 | #include "serial_api.h" |
bogdanm | 0:9b334a45a8ff | 23 | #include "cmsis.h" |
bogdanm | 0:9b334a45a8ff | 24 | #include "pinmap.h" |
bogdanm | 0:9b334a45a8ff | 25 | #include "gpio_api.h" |
bogdanm | 0:9b334a45a8ff | 26 | |
bogdanm | 0:9b334a45a8ff | 27 | #include "scif_iodefine.h" |
bogdanm | 0:9b334a45a8ff | 28 | #include "cpg_iodefine.h" |
bogdanm | 0:9b334a45a8ff | 29 | |
bogdanm | 0:9b334a45a8ff | 30 | /****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 31 | * INITIALIZATION |
bogdanm | 0:9b334a45a8ff | 32 | ******************************************************************************/ |
bogdanm | 0:9b334a45a8ff | 33 | #define PCLK (66666666) // Define the peripheral clock P1 frequency. |
bogdanm | 0:9b334a45a8ff | 34 | |
bogdanm | 0:9b334a45a8ff | 35 | #define UART_NUM 8 |
mbed_official | 119:3921aeca8633 | 36 | #define IRQ_NUM 4 |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | static void uart0_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 39 | static void uart1_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 40 | static void uart2_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 41 | static void uart3_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 42 | static void uart4_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 43 | static void uart5_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 44 | static void uart6_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 45 | static void uart7_tx_irq(void); |
bogdanm | 0:9b334a45a8ff | 46 | static void uart0_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 47 | static void uart1_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 48 | static void uart2_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 49 | static void uart3_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 50 | static void uart4_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 51 | static void uart5_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 52 | static void uart6_rx_irq(void); |
bogdanm | 0:9b334a45a8ff | 53 | static void uart7_rx_irq(void); |
mbed_official | 119:3921aeca8633 | 54 | static void uart0_er_irq(void); |
mbed_official | 119:3921aeca8633 | 55 | static void uart1_er_irq(void); |
mbed_official | 119:3921aeca8633 | 56 | static void uart2_er_irq(void); |
mbed_official | 119:3921aeca8633 | 57 | static void uart3_er_irq(void); |
mbed_official | 119:3921aeca8633 | 58 | static void uart4_er_irq(void); |
mbed_official | 119:3921aeca8633 | 59 | static void uart5_er_irq(void); |
mbed_official | 119:3921aeca8633 | 60 | static void uart6_er_irq(void); |
mbed_official | 119:3921aeca8633 | 61 | static void uart7_er_irq(void); |
bogdanm | 0:9b334a45a8ff | 62 | |
mbed_official | 119:3921aeca8633 | 63 | static void serial_put_done(serial_t *obj); |
mbed_official | 119:3921aeca8633 | 64 | static uint8_t serial_available_buffer(serial_t *obj); |
mbed_official | 119:3921aeca8633 | 65 | static void serial_irq_err_set(serial_t *obj, uint32_t enable); |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | static const PinMap PinMap_UART_TX[] = { |
bogdanm | 0:9b334a45a8ff | 68 | {P2_14 , UART0, 6}, |
bogdanm | 0:9b334a45a8ff | 69 | {P2_5 , UART1, 6}, |
bogdanm | 0:9b334a45a8ff | 70 | {P4_12 , UART1, 7}, |
bogdanm | 0:9b334a45a8ff | 71 | {P6_3 , UART2, 7}, |
bogdanm | 0:9b334a45a8ff | 72 | {P4_14 , UART2, 7}, |
bogdanm | 0:9b334a45a8ff | 73 | {P5_3 , UART3, 5}, |
bogdanm | 0:9b334a45a8ff | 74 | {P8_8 , UART3, 7}, |
bogdanm | 0:9b334a45a8ff | 75 | {P5_0 , UART4, 5}, |
bogdanm | 0:9b334a45a8ff | 76 | {P8_14 , UART4, 7}, |
bogdanm | 0:9b334a45a8ff | 77 | {P8_13 , UART5, 5}, |
bogdanm | 0:9b334a45a8ff | 78 | {P11_10, UART5, 3}, |
bogdanm | 0:9b334a45a8ff | 79 | {P6_6 , UART5, 5}, |
bogdanm | 0:9b334a45a8ff | 80 | {P5_6 , UART6, 5}, |
bogdanm | 0:9b334a45a8ff | 81 | {P11_1 , UART6, 4}, |
bogdanm | 0:9b334a45a8ff | 82 | {P7_4 , UART7, 4}, |
bogdanm | 0:9b334a45a8ff | 83 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 84 | }; |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | static const PinMap PinMap_UART_RX[] = { |
bogdanm | 0:9b334a45a8ff | 87 | {P2_15 , UART0, 6}, |
bogdanm | 0:9b334a45a8ff | 88 | {P2_6 , UART1, 6}, |
bogdanm | 0:9b334a45a8ff | 89 | {P4_13 , UART1, 7}, |
bogdanm | 0:9b334a45a8ff | 90 | {P6_2 , UART2, 7}, |
bogdanm | 0:9b334a45a8ff | 91 | {P4_15 , UART2, 7}, |
bogdanm | 0:9b334a45a8ff | 92 | {P5_4 , UART3, 5}, |
bogdanm | 0:9b334a45a8ff | 93 | {P8_9 , UART3, 7}, |
bogdanm | 0:9b334a45a8ff | 94 | {P5_1 , UART4, 5}, |
bogdanm | 0:9b334a45a8ff | 95 | {P8_15 , UART4, 7}, |
bogdanm | 0:9b334a45a8ff | 96 | {P8_11 , UART5, 5}, |
bogdanm | 0:9b334a45a8ff | 97 | {P11_11, UART5, 3}, |
bogdanm | 0:9b334a45a8ff | 98 | {P6_7 , UART5, 5}, |
bogdanm | 0:9b334a45a8ff | 99 | {P5_7 , UART6, 5}, |
bogdanm | 0:9b334a45a8ff | 100 | {P11_2 , UART6, 4}, |
bogdanm | 0:9b334a45a8ff | 101 | {P7_5 , UART7, 4}, |
bogdanm | 0:9b334a45a8ff | 102 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 103 | }; |
bogdanm | 0:9b334a45a8ff | 104 | |
bogdanm | 0:9b334a45a8ff | 105 | static const PinMap PinMap_UART_CTS[] = { |
bogdanm | 0:9b334a45a8ff | 106 | {P2_3 , UART1, 6}, |
bogdanm | 0:9b334a45a8ff | 107 | {P11_7 , UART5, 3}, |
bogdanm | 0:9b334a45a8ff | 108 | {P7_6 , UART7, 4}, |
bogdanm | 0:9b334a45a8ff | 109 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 110 | }; |
bogdanm | 0:9b334a45a8ff | 111 | static const PinMap PinMap_UART_RTS[] = { |
bogdanm | 0:9b334a45a8ff | 112 | {P2_7 , UART1, 6}, |
bogdanm | 0:9b334a45a8ff | 113 | {P11_8 , UART5, 3}, |
bogdanm | 0:9b334a45a8ff | 114 | {P7_7 , UART7, 4}, |
bogdanm | 0:9b334a45a8ff | 115 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 116 | }; |
bogdanm | 0:9b334a45a8ff | 117 | |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | |
bogdanm | 0:9b334a45a8ff | 120 | static const struct st_scif *SCIF[] = SCIF_ADDRESS_LIST; |
bogdanm | 0:9b334a45a8ff | 121 | static uart_irq_handler irq_handler; |
bogdanm | 0:9b334a45a8ff | 122 | |
bogdanm | 0:9b334a45a8ff | 123 | int stdio_uart_inited = 0; |
bogdanm | 0:9b334a45a8ff | 124 | serial_t stdio_uart; |
bogdanm | 0:9b334a45a8ff | 125 | |
bogdanm | 0:9b334a45a8ff | 126 | struct serial_global_data_s { |
bogdanm | 0:9b334a45a8ff | 127 | uint32_t serial_irq_id; |
bogdanm | 0:9b334a45a8ff | 128 | gpio_t sw_rts, sw_cts; |
mbed_official | 119:3921aeca8633 | 129 | uint8_t rx_irq_set_flow, rx_irq_set_api; |
mbed_official | 119:3921aeca8633 | 130 | serial_t *tranferring_obj, *receiving_obj; |
mbed_official | 119:3921aeca8633 | 131 | uint32_t async_tx_callback, async_rx_callback; |
mbed_official | 119:3921aeca8633 | 132 | int event, wanted_rx_events; |
bogdanm | 0:9b334a45a8ff | 133 | }; |
bogdanm | 0:9b334a45a8ff | 134 | |
bogdanm | 0:9b334a45a8ff | 135 | static struct serial_global_data_s uart_data[UART_NUM]; |
bogdanm | 0:9b334a45a8ff | 136 | |
bogdanm | 0:9b334a45a8ff | 137 | static const IRQn_Type irq_set_tbl[UART_NUM][IRQ_NUM] = { |
mbed_official | 119:3921aeca8633 | 138 | {SCIFRXI0_IRQn, SCIFTXI0_IRQn, SCIFBRI0_IRQn, SCIFERI0_IRQn}, |
mbed_official | 119:3921aeca8633 | 139 | {SCIFRXI1_IRQn, SCIFTXI1_IRQn, SCIFBRI1_IRQn, SCIFERI1_IRQn}, |
mbed_official | 119:3921aeca8633 | 140 | {SCIFRXI2_IRQn, SCIFTXI2_IRQn, SCIFBRI2_IRQn, SCIFERI2_IRQn}, |
mbed_official | 119:3921aeca8633 | 141 | {SCIFRXI3_IRQn, SCIFTXI3_IRQn, SCIFBRI3_IRQn, SCIFERI3_IRQn}, |
mbed_official | 119:3921aeca8633 | 142 | {SCIFRXI4_IRQn, SCIFTXI4_IRQn, SCIFBRI4_IRQn, SCIFERI4_IRQn}, |
mbed_official | 119:3921aeca8633 | 143 | {SCIFRXI5_IRQn, SCIFTXI5_IRQn, SCIFBRI5_IRQn, SCIFERI5_IRQn}, |
mbed_official | 119:3921aeca8633 | 144 | {SCIFRXI6_IRQn, SCIFTXI6_IRQn, SCIFBRI6_IRQn, SCIFERI6_IRQn}, |
mbed_official | 119:3921aeca8633 | 145 | {SCIFRXI7_IRQn, SCIFTXI7_IRQn, SCIFBRI7_IRQn, SCIFERI7_IRQn} |
bogdanm | 0:9b334a45a8ff | 146 | }; |
bogdanm | 0:9b334a45a8ff | 147 | |
bogdanm | 0:9b334a45a8ff | 148 | static const IRQHandler hander_set_tbl[UART_NUM][IRQ_NUM] = { |
mbed_official | 119:3921aeca8633 | 149 | {uart0_rx_irq, uart0_tx_irq, uart0_er_irq, uart0_er_irq}, |
mbed_official | 119:3921aeca8633 | 150 | {uart1_rx_irq, uart1_tx_irq, uart1_er_irq, uart1_er_irq}, |
mbed_official | 119:3921aeca8633 | 151 | {uart2_rx_irq, uart2_tx_irq, uart2_er_irq, uart2_er_irq}, |
mbed_official | 119:3921aeca8633 | 152 | {uart3_rx_irq, uart3_tx_irq, uart3_er_irq, uart3_er_irq}, |
mbed_official | 119:3921aeca8633 | 153 | {uart4_rx_irq, uart4_tx_irq, uart4_er_irq, uart4_er_irq}, |
mbed_official | 119:3921aeca8633 | 154 | {uart5_rx_irq, uart5_tx_irq, uart5_er_irq, uart5_er_irq}, |
mbed_official | 119:3921aeca8633 | 155 | {uart6_rx_irq, uart6_tx_irq, uart6_er_irq, uart6_er_irq}, |
mbed_official | 119:3921aeca8633 | 156 | {uart7_rx_irq, uart7_tx_irq, uart7_er_irq, uart7_er_irq} |
bogdanm | 0:9b334a45a8ff | 157 | }; |
bogdanm | 0:9b334a45a8ff | 158 | |
bogdanm | 0:9b334a45a8ff | 159 | static __IO uint16_t *SCSCR_MATCH[] = { |
bogdanm | 0:9b334a45a8ff | 160 | &SCSCR_0, |
bogdanm | 0:9b334a45a8ff | 161 | &SCSCR_1, |
bogdanm | 0:9b334a45a8ff | 162 | &SCSCR_2, |
bogdanm | 0:9b334a45a8ff | 163 | &SCSCR_3, |
bogdanm | 0:9b334a45a8ff | 164 | &SCSCR_4, |
bogdanm | 0:9b334a45a8ff | 165 | &SCSCR_5, |
bogdanm | 0:9b334a45a8ff | 166 | &SCSCR_6, |
bogdanm | 0:9b334a45a8ff | 167 | &SCSCR_7, |
bogdanm | 0:9b334a45a8ff | 168 | }; |
bogdanm | 0:9b334a45a8ff | 169 | |
bogdanm | 0:9b334a45a8ff | 170 | static __IO uint16_t *SCFSR_MATCH[] = { |
bogdanm | 0:9b334a45a8ff | 171 | &SCFSR_0, |
bogdanm | 0:9b334a45a8ff | 172 | &SCFSR_1, |
bogdanm | 0:9b334a45a8ff | 173 | &SCFSR_2, |
bogdanm | 0:9b334a45a8ff | 174 | &SCFSR_3, |
bogdanm | 0:9b334a45a8ff | 175 | &SCFSR_4, |
bogdanm | 0:9b334a45a8ff | 176 | &SCFSR_5, |
bogdanm | 0:9b334a45a8ff | 177 | &SCFSR_6, |
bogdanm | 0:9b334a45a8ff | 178 | &SCFSR_7, |
bogdanm | 0:9b334a45a8ff | 179 | }; |
bogdanm | 0:9b334a45a8ff | 180 | |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
bogdanm | 0:9b334a45a8ff | 183 | volatile uint8_t dummy ; |
bogdanm | 0:9b334a45a8ff | 184 | int is_stdio_uart = 0; |
bogdanm | 0:9b334a45a8ff | 185 | // determine the UART to use |
bogdanm | 0:9b334a45a8ff | 186 | uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX); |
bogdanm | 0:9b334a45a8ff | 187 | uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX); |
bogdanm | 0:9b334a45a8ff | 188 | uint32_t uart = pinmap_merge(uart_tx, uart_rx); |
bogdanm | 0:9b334a45a8ff | 189 | |
bogdanm | 0:9b334a45a8ff | 190 | MBED_ASSERT((int)uart != NC); |
bogdanm | 0:9b334a45a8ff | 191 | |
mbed_official | 119:3921aeca8633 | 192 | obj->serial.uart = (struct st_scif *)SCIF[uart]; |
bogdanm | 0:9b334a45a8ff | 193 | // enable power |
bogdanm | 0:9b334a45a8ff | 194 | switch (uart) { |
bogdanm | 0:9b334a45a8ff | 195 | case UART0: |
bogdanm | 0:9b334a45a8ff | 196 | CPG.STBCR4 &= ~(1 << 7); |
bogdanm | 0:9b334a45a8ff | 197 | break; |
bogdanm | 0:9b334a45a8ff | 198 | case UART1: |
bogdanm | 0:9b334a45a8ff | 199 | CPG.STBCR4 &= ~(1 << 6); |
bogdanm | 0:9b334a45a8ff | 200 | break; |
bogdanm | 0:9b334a45a8ff | 201 | case UART2: |
bogdanm | 0:9b334a45a8ff | 202 | CPG.STBCR4 &= ~(1 << 5); |
bogdanm | 0:9b334a45a8ff | 203 | break; |
bogdanm | 0:9b334a45a8ff | 204 | case UART3: |
bogdanm | 0:9b334a45a8ff | 205 | CPG.STBCR4 &= ~(1 << 4); |
bogdanm | 0:9b334a45a8ff | 206 | break; |
bogdanm | 0:9b334a45a8ff | 207 | case UART4: |
bogdanm | 0:9b334a45a8ff | 208 | CPG.STBCR4 &= ~(1 << 3); |
bogdanm | 0:9b334a45a8ff | 209 | break; |
bogdanm | 0:9b334a45a8ff | 210 | case UART5: |
bogdanm | 0:9b334a45a8ff | 211 | CPG.STBCR4 &= ~(1 << 2); |
bogdanm | 0:9b334a45a8ff | 212 | break; |
bogdanm | 0:9b334a45a8ff | 213 | case UART6: |
bogdanm | 0:9b334a45a8ff | 214 | CPG.STBCR4 &= ~(1 << 1); |
bogdanm | 0:9b334a45a8ff | 215 | break; |
bogdanm | 0:9b334a45a8ff | 216 | case UART7: |
bogdanm | 0:9b334a45a8ff | 217 | CPG.STBCR4 &= ~(1 << 0); |
bogdanm | 0:9b334a45a8ff | 218 | break; |
bogdanm | 0:9b334a45a8ff | 219 | } |
bogdanm | 0:9b334a45a8ff | 220 | dummy = CPG.STBCR4; |
bogdanm | 0:9b334a45a8ff | 221 | |
bogdanm | 0:9b334a45a8ff | 222 | /* ==== SCIF initial setting ==== */ |
bogdanm | 0:9b334a45a8ff | 223 | /* ---- Serial control register (SCSCR) setting ---- */ |
bogdanm | 0:9b334a45a8ff | 224 | /* B'00 : Internal CLK */ |
mbed_official | 119:3921aeca8633 | 225 | obj->serial.uart->SCSCR = 0x0000u; /* SCIF transmitting and receiving operations stop */ |
bogdanm | 0:9b334a45a8ff | 226 | |
bogdanm | 0:9b334a45a8ff | 227 | /* ---- FIFO control register (SCFCR) setting ---- */ |
bogdanm | 0:9b334a45a8ff | 228 | /* Transmit FIFO reset & Receive FIFO data register reset */ |
mbed_official | 119:3921aeca8633 | 229 | obj->serial.uart->SCFCR = 0x0006; |
bogdanm | 0:9b334a45a8ff | 230 | |
bogdanm | 0:9b334a45a8ff | 231 | /* ---- Serial status register (SCFSR) setting ---- */ |
mbed_official | 119:3921aeca8633 | 232 | dummy = obj->serial.uart->SCFSR; |
mbed_official | 119:3921aeca8633 | 233 | obj->serial.uart->SCFSR = (dummy & 0xFF6Cu); /* ER,BRK,DR bit clear */ |
bogdanm | 0:9b334a45a8ff | 234 | |
bogdanm | 0:9b334a45a8ff | 235 | /* ---- Line status register (SCLSR) setting ---- */ |
bogdanm | 0:9b334a45a8ff | 236 | /* ORER bit clear */ |
mbed_official | 119:3921aeca8633 | 237 | obj->serial.uart->SCLSR = 0; |
bogdanm | 0:9b334a45a8ff | 238 | |
bogdanm | 0:9b334a45a8ff | 239 | /* ---- Serial extension mode register (SCEMR) setting ---- |
bogdanm | 0:9b334a45a8ff | 240 | b7 BGDM - Baud rate generator double-speed mode : Normal mode |
bogdanm | 0:9b334a45a8ff | 241 | b0 ABCS - Base clock select in asynchronous mode : Base clock is 16 times the bit rate */ |
mbed_official | 119:3921aeca8633 | 242 | obj->serial.uart->SCEMR = 0x0000u; |
bogdanm | 0:9b334a45a8ff | 243 | |
bogdanm | 0:9b334a45a8ff | 244 | /* ---- Bit rate register (SCBRR) setting ---- */ |
bogdanm | 0:9b334a45a8ff | 245 | serial_baud (obj, 9600); |
bogdanm | 0:9b334a45a8ff | 246 | serial_format(obj, 8, ParityNone, 1); |
bogdanm | 0:9b334a45a8ff | 247 | |
bogdanm | 0:9b334a45a8ff | 248 | /* ---- FIFO control register (SCFCR) setting ---- */ |
mbed_official | 119:3921aeca8633 | 249 | obj->serial.uart->SCFCR = 0x0030u; |
bogdanm | 0:9b334a45a8ff | 250 | |
bogdanm | 0:9b334a45a8ff | 251 | /* ---- Serial port register (SCSPTR) setting ---- |
bogdanm | 0:9b334a45a8ff | 252 | b1 SPB2IO - Serial port break output : disabled |
bogdanm | 0:9b334a45a8ff | 253 | b0 SPB2DT - Serial port break data : High-level */ |
mbed_official | 119:3921aeca8633 | 254 | obj->serial.uart->SCSPTR = 0x0003u; // SPB2IO = 1, SPB2DT = 1 |
bogdanm | 0:9b334a45a8ff | 255 | |
bogdanm | 0:9b334a45a8ff | 256 | /* ---- Line status register (SCLSR) setting ---- |
bogdanm | 0:9b334a45a8ff | 257 | b0 ORER - Overrun error detect : clear */ |
bogdanm | 0:9b334a45a8ff | 258 | |
mbed_official | 119:3921aeca8633 | 259 | if (obj->serial.uart->SCLSR & 0x0001) { |
mbed_official | 119:3921aeca8633 | 260 | obj->serial.uart->SCLSR = 0u; // ORER clear |
bogdanm | 0:9b334a45a8ff | 261 | } |
bogdanm | 0:9b334a45a8ff | 262 | |
bogdanm | 0:9b334a45a8ff | 263 | // pinout the chosen uart |
bogdanm | 0:9b334a45a8ff | 264 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 0:9b334a45a8ff | 265 | pinmap_pinout(rx, PinMap_UART_RX); |
bogdanm | 0:9b334a45a8ff | 266 | |
bogdanm | 0:9b334a45a8ff | 267 | switch (uart) { |
bogdanm | 0:9b334a45a8ff | 268 | case UART0: |
mbed_official | 119:3921aeca8633 | 269 | obj->serial.index = 0; |
bogdanm | 0:9b334a45a8ff | 270 | break; |
bogdanm | 0:9b334a45a8ff | 271 | case UART1: |
mbed_official | 119:3921aeca8633 | 272 | obj->serial.index = 1; |
bogdanm | 0:9b334a45a8ff | 273 | break; |
bogdanm | 0:9b334a45a8ff | 274 | case UART2: |
mbed_official | 119:3921aeca8633 | 275 | obj->serial.index = 2; |
bogdanm | 0:9b334a45a8ff | 276 | break; |
bogdanm | 0:9b334a45a8ff | 277 | case UART3: |
mbed_official | 119:3921aeca8633 | 278 | obj->serial.index = 3; |
bogdanm | 0:9b334a45a8ff | 279 | break; |
bogdanm | 0:9b334a45a8ff | 280 | case UART4: |
mbed_official | 119:3921aeca8633 | 281 | obj->serial.index = 4; |
bogdanm | 0:9b334a45a8ff | 282 | break; |
bogdanm | 0:9b334a45a8ff | 283 | case UART5: |
mbed_official | 119:3921aeca8633 | 284 | obj->serial.index = 5; |
bogdanm | 0:9b334a45a8ff | 285 | break; |
bogdanm | 0:9b334a45a8ff | 286 | case UART6: |
mbed_official | 119:3921aeca8633 | 287 | obj->serial.index = 6; |
bogdanm | 0:9b334a45a8ff | 288 | break; |
bogdanm | 0:9b334a45a8ff | 289 | case UART7: |
mbed_official | 119:3921aeca8633 | 290 | obj->serial.index = 7; |
bogdanm | 0:9b334a45a8ff | 291 | break; |
bogdanm | 0:9b334a45a8ff | 292 | } |
mbed_official | 119:3921aeca8633 | 293 | uart_data[obj->serial.index].sw_rts.pin = NC; |
mbed_official | 119:3921aeca8633 | 294 | uart_data[obj->serial.index].sw_cts.pin = NC; |
bogdanm | 0:9b334a45a8ff | 295 | |
bogdanm | 0:9b334a45a8ff | 296 | /* ---- Serial control register (SCSCR) setting ---- */ |
bogdanm | 0:9b334a45a8ff | 297 | /* Setting the TE and RE bits enables the TxD and RxD pins to be used. */ |
mbed_official | 119:3921aeca8633 | 298 | obj->serial.uart->SCSCR = 0x0070; |
bogdanm | 0:9b334a45a8ff | 299 | |
bogdanm | 0:9b334a45a8ff | 300 | is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); |
bogdanm | 0:9b334a45a8ff | 301 | |
bogdanm | 0:9b334a45a8ff | 302 | if (is_stdio_uart) { |
bogdanm | 0:9b334a45a8ff | 303 | stdio_uart_inited = 1; |
bogdanm | 0:9b334a45a8ff | 304 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
bogdanm | 0:9b334a45a8ff | 305 | } |
bogdanm | 0:9b334a45a8ff | 306 | } |
bogdanm | 0:9b334a45a8ff | 307 | |
bogdanm | 0:9b334a45a8ff | 308 | void serial_free(serial_t *obj) { |
mbed_official | 119:3921aeca8633 | 309 | uart_data[obj->serial.index].serial_irq_id = 0; |
bogdanm | 0:9b334a45a8ff | 310 | } |
bogdanm | 0:9b334a45a8ff | 311 | |
bogdanm | 0:9b334a45a8ff | 312 | // serial_baud |
bogdanm | 0:9b334a45a8ff | 313 | // set the baud rate, taking in to account the current SystemFrequency |
bogdanm | 0:9b334a45a8ff | 314 | void serial_baud(serial_t *obj, int baudrate) { |
bogdanm | 0:9b334a45a8ff | 315 | uint16_t DL; |
bogdanm | 0:9b334a45a8ff | 316 | |
mbed_official | 119:3921aeca8633 | 317 | obj->serial.uart->SCSMR &= ~0x0003; |
bogdanm | 0:9b334a45a8ff | 318 | |
bogdanm | 0:9b334a45a8ff | 319 | if (baudrate > 32552) { |
mbed_official | 119:3921aeca8633 | 320 | obj->serial.uart->SCEMR = 0x0081; // BGDM = 1, ABCS = 1 |
bogdanm | 0:9b334a45a8ff | 321 | DL = PCLK / (8 * baudrate); |
bogdanm | 0:9b334a45a8ff | 322 | if (DL > 0) { |
bogdanm | 0:9b334a45a8ff | 323 | DL--; |
bogdanm | 0:9b334a45a8ff | 324 | } |
mbed_official | 119:3921aeca8633 | 325 | obj->serial.uart->SCBRR = (uint8_t)DL; |
bogdanm | 0:9b334a45a8ff | 326 | } else if (baudrate > 16276) { |
mbed_official | 119:3921aeca8633 | 327 | obj->serial.uart->SCEMR = 0x0080; // BGDM = 1 |
mbed_official | 119:3921aeca8633 | 328 | obj->serial.uart->SCBRR = PCLK / (16 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 329 | } else if (baudrate > 8138) { |
mbed_official | 119:3921aeca8633 | 330 | obj->serial.uart->SCEMR = 0x0000; |
mbed_official | 119:3921aeca8633 | 331 | obj->serial.uart->SCBRR = PCLK / (32 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 332 | } else if (baudrate > 4169) { |
mbed_official | 119:3921aeca8633 | 333 | obj->serial.uart->SCSMR |= 0x0001; |
mbed_official | 119:3921aeca8633 | 334 | obj->serial.uart->SCEMR = 0x0080; // BGDM = 1 |
mbed_official | 119:3921aeca8633 | 335 | obj->serial.uart->SCBRR = PCLK / (64 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 336 | } else if (baudrate > 2034) { |
mbed_official | 119:3921aeca8633 | 337 | obj->serial.uart->SCSMR |= 0x0001; |
mbed_official | 119:3921aeca8633 | 338 | obj->serial.uart->SCEMR = 0x0000; |
mbed_official | 119:3921aeca8633 | 339 | obj->serial.uart->SCBRR = PCLK / (128 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 340 | } else if (baudrate > 1017) { |
mbed_official | 119:3921aeca8633 | 341 | obj->serial.uart->SCSMR |= 0x0002; |
mbed_official | 119:3921aeca8633 | 342 | obj->serial.uart->SCEMR = 0x0080; // BGDM = 1 |
mbed_official | 119:3921aeca8633 | 343 | obj->serial.uart->SCBRR = PCLK / (256 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 344 | } else if (baudrate > 508) { |
mbed_official | 119:3921aeca8633 | 345 | obj->serial.uart->SCSMR |= 0x0002; |
mbed_official | 119:3921aeca8633 | 346 | obj->serial.uart->SCEMR = 0x0000; |
mbed_official | 119:3921aeca8633 | 347 | obj->serial.uart->SCBRR = PCLK / (512 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 348 | } else if (baudrate > 254) { |
mbed_official | 119:3921aeca8633 | 349 | obj->serial.uart->SCSMR |= 0x0003; |
mbed_official | 119:3921aeca8633 | 350 | obj->serial.uart->SCEMR = 0x0080; // BGDM = 1 |
mbed_official | 119:3921aeca8633 | 351 | obj->serial.uart->SCBRR = PCLK / (1024 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 352 | } else if (baudrate > 127) { |
mbed_official | 119:3921aeca8633 | 353 | obj->serial.uart->SCSMR |= 0x0003; |
mbed_official | 119:3921aeca8633 | 354 | obj->serial.uart->SCEMR = 0x0000; |
mbed_official | 119:3921aeca8633 | 355 | obj->serial.uart->SCBRR = PCLK / (2048 * baudrate) - 1; |
bogdanm | 0:9b334a45a8ff | 356 | } else { |
mbed_official | 119:3921aeca8633 | 357 | obj->serial.uart->SCSMR |= 0x0003; |
mbed_official | 119:3921aeca8633 | 358 | obj->serial.uart->SCEMR = 0x0000; |
mbed_official | 119:3921aeca8633 | 359 | obj->serial.uart->SCBRR = 0xFFu; |
bogdanm | 0:9b334a45a8ff | 360 | } |
bogdanm | 0:9b334a45a8ff | 361 | } |
bogdanm | 0:9b334a45a8ff | 362 | |
bogdanm | 0:9b334a45a8ff | 363 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
bogdanm | 0:9b334a45a8ff | 364 | int parity_enable; |
bogdanm | 0:9b334a45a8ff | 365 | int parity_select; |
bogdanm | 0:9b334a45a8ff | 366 | |
bogdanm | 0:9b334a45a8ff | 367 | MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits |
bogdanm | 0:9b334a45a8ff | 368 | MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 5: 5 data bits ... 3: 8 data bits |
bogdanm | 0:9b334a45a8ff | 369 | MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || |
bogdanm | 0:9b334a45a8ff | 370 | (parity == ParityForced1) || (parity == ParityForced0)); |
bogdanm | 0:9b334a45a8ff | 371 | |
bogdanm | 0:9b334a45a8ff | 372 | stop_bits = (stop_bits == 1)? 0: |
bogdanm | 0:9b334a45a8ff | 373 | (stop_bits == 2)? 1: |
bogdanm | 0:9b334a45a8ff | 374 | 0; // must not to be |
bogdanm | 0:9b334a45a8ff | 375 | |
bogdanm | 0:9b334a45a8ff | 376 | data_bits = (data_bits == 8)? 0: |
bogdanm | 0:9b334a45a8ff | 377 | (data_bits == 7)? 1: |
bogdanm | 0:9b334a45a8ff | 378 | 0; // must not to be |
bogdanm | 0:9b334a45a8ff | 379 | |
bogdanm | 0:9b334a45a8ff | 380 | switch (parity) { |
bogdanm | 0:9b334a45a8ff | 381 | case ParityNone: |
bogdanm | 0:9b334a45a8ff | 382 | parity_enable = 0; |
bogdanm | 0:9b334a45a8ff | 383 | parity_select = 0; |
bogdanm | 0:9b334a45a8ff | 384 | break; |
bogdanm | 0:9b334a45a8ff | 385 | case ParityOdd: |
bogdanm | 0:9b334a45a8ff | 386 | parity_enable = 1; |
bogdanm | 0:9b334a45a8ff | 387 | parity_select = 1; |
bogdanm | 0:9b334a45a8ff | 388 | break; |
bogdanm | 0:9b334a45a8ff | 389 | case ParityEven: |
bogdanm | 0:9b334a45a8ff | 390 | parity_enable = 1; |
bogdanm | 0:9b334a45a8ff | 391 | parity_select = 0; |
bogdanm | 0:9b334a45a8ff | 392 | break; |
bogdanm | 0:9b334a45a8ff | 393 | case ParityForced1: |
bogdanm | 0:9b334a45a8ff | 394 | case ParityForced0: |
bogdanm | 0:9b334a45a8ff | 395 | default: |
bogdanm | 0:9b334a45a8ff | 396 | parity_enable = 0; |
bogdanm | 0:9b334a45a8ff | 397 | parity_select = 0; |
bogdanm | 0:9b334a45a8ff | 398 | break; |
bogdanm | 0:9b334a45a8ff | 399 | } |
bogdanm | 0:9b334a45a8ff | 400 | |
mbed_official | 119:3921aeca8633 | 401 | obj->serial.uart->SCSMR = data_bits << 6 |
bogdanm | 0:9b334a45a8ff | 402 | | parity_enable << 5 |
bogdanm | 0:9b334a45a8ff | 403 | | parity_select << 4 |
bogdanm | 0:9b334a45a8ff | 404 | | stop_bits << 3; |
bogdanm | 0:9b334a45a8ff | 405 | } |
bogdanm | 0:9b334a45a8ff | 406 | |
bogdanm | 0:9b334a45a8ff | 407 | /****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 408 | * INTERRUPTS HANDLING |
bogdanm | 0:9b334a45a8ff | 409 | ******************************************************************************/ |
bogdanm | 0:9b334a45a8ff | 410 | |
bogdanm | 0:9b334a45a8ff | 411 | static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) { |
bogdanm | 0:9b334a45a8ff | 412 | __IO uint16_t *dmy_rd_scscr; |
bogdanm | 0:9b334a45a8ff | 413 | __IO uint16_t *dmy_rd_scfsr; |
mbed_official | 119:3921aeca8633 | 414 | serial_t *obj; |
mbed_official | 119:3921aeca8633 | 415 | int i; |
mbed_official | 119:3921aeca8633 | 416 | |
bogdanm | 0:9b334a45a8ff | 417 | dmy_rd_scscr = SCSCR_MATCH[index]; |
bogdanm | 0:9b334a45a8ff | 418 | *dmy_rd_scscr &= 0x007B; // Clear TIE and Write to bit15~8,2 is always 0 |
bogdanm | 0:9b334a45a8ff | 419 | dmy_rd_scfsr = SCFSR_MATCH[index]; |
mbed_official | 119:3921aeca8633 | 420 | *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0020); // Set TEND |
mbed_official | 119:3921aeca8633 | 421 | |
mbed_official | 119:3921aeca8633 | 422 | obj = uart_data[index].tranferring_obj; |
mbed_official | 119:3921aeca8633 | 423 | if (obj) { |
mbed_official | 119:3921aeca8633 | 424 | i = obj->tx_buff.length - obj->tx_buff.pos; |
mbed_official | 119:3921aeca8633 | 425 | if (0 < i) { |
mbed_official | 119:3921aeca8633 | 426 | if (serial_available_buffer(obj) < i) { |
mbed_official | 119:3921aeca8633 | 427 | i = serial_available_buffer(obj); |
mbed_official | 119:3921aeca8633 | 428 | } |
mbed_official | 119:3921aeca8633 | 429 | do { |
mbed_official | 119:3921aeca8633 | 430 | uint8_t c = *(uint8_t *)obj->tx_buff.buffer; |
mbed_official | 119:3921aeca8633 | 431 | obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1; |
mbed_official | 119:3921aeca8633 | 432 | ++obj->tx_buff.pos; |
mbed_official | 119:3921aeca8633 | 433 | obj->serial.uart->SCFTDR = c; |
mbed_official | 119:3921aeca8633 | 434 | } while (--i); |
mbed_official | 119:3921aeca8633 | 435 | serial_put_done(obj); |
mbed_official | 119:3921aeca8633 | 436 | } else { |
mbed_official | 119:3921aeca8633 | 437 | uart_data[index].tranferring_obj = NULL; |
mbed_official | 119:3921aeca8633 | 438 | uart_data[index].event = SERIAL_EVENT_TX_COMPLETE; |
mbed_official | 119:3921aeca8633 | 439 | ((void (*)())uart_data[index].async_tx_callback)(); |
mbed_official | 119:3921aeca8633 | 440 | } |
mbed_official | 119:3921aeca8633 | 441 | } |
mbed_official | 119:3921aeca8633 | 442 | |
bogdanm | 0:9b334a45a8ff | 443 | irq_handler(uart_data[index].serial_irq_id, TxIrq); |
bogdanm | 0:9b334a45a8ff | 444 | } |
bogdanm | 0:9b334a45a8ff | 445 | |
bogdanm | 0:9b334a45a8ff | 446 | static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) { |
bogdanm | 0:9b334a45a8ff | 447 | __IO uint16_t *dmy_rd_scscr; |
bogdanm | 0:9b334a45a8ff | 448 | __IO uint16_t *dmy_rd_scfsr; |
mbed_official | 119:3921aeca8633 | 449 | serial_t *obj; |
mbed_official | 119:3921aeca8633 | 450 | int c; |
mbed_official | 119:3921aeca8633 | 451 | |
bogdanm | 0:9b334a45a8ff | 452 | dmy_rd_scscr = SCSCR_MATCH[index]; |
bogdanm | 0:9b334a45a8ff | 453 | *dmy_rd_scscr &= 0x00B3; // Clear RIE,REIE and Write to bit15~8,2 is always 0 |
bogdanm | 0:9b334a45a8ff | 454 | dmy_rd_scfsr = SCFSR_MATCH[index]; |
bogdanm | 0:9b334a45a8ff | 455 | *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0003); // Clear RDF,DR |
mbed_official | 119:3921aeca8633 | 456 | |
mbed_official | 119:3921aeca8633 | 457 | obj = uart_data[index].receiving_obj; |
mbed_official | 119:3921aeca8633 | 458 | if (obj) { |
mbed_official | 119:3921aeca8633 | 459 | if (obj->serial.uart->SCLSR & 1) { |
mbed_official | 119:3921aeca8633 | 460 | if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_OVERRUN_ERROR) { |
mbed_official | 119:3921aeca8633 | 461 | serial_rx_abort_asynch(obj); |
mbed_official | 119:3921aeca8633 | 462 | uart_data[index].event = SERIAL_EVENT_RX_OVERRUN_ERROR; |
mbed_official | 119:3921aeca8633 | 463 | ((void (*)())uart_data[index].async_rx_callback)(); |
mbed_official | 119:3921aeca8633 | 464 | } |
mbed_official | 119:3921aeca8633 | 465 | return; |
mbed_official | 119:3921aeca8633 | 466 | } |
mbed_official | 119:3921aeca8633 | 467 | c = serial_getc(obj); |
mbed_official | 119:3921aeca8633 | 468 | if (c != -1) { |
mbed_official | 119:3921aeca8633 | 469 | ((uint8_t *)obj->rx_buff.buffer)[obj->rx_buff.pos] = c; |
mbed_official | 119:3921aeca8633 | 470 | ++obj->rx_buff.pos; |
mbed_official | 119:3921aeca8633 | 471 | if (c == obj->char_match && ! obj->char_found) { |
mbed_official | 119:3921aeca8633 | 472 | obj->char_found = 1; |
mbed_official | 119:3921aeca8633 | 473 | if (obj->rx_buff.pos == obj->rx_buff.length) { |
mbed_official | 119:3921aeca8633 | 474 | if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) { |
mbed_official | 119:3921aeca8633 | 475 | uart_data[index].event = SERIAL_EVENT_RX_COMPLETE; |
mbed_official | 119:3921aeca8633 | 476 | } |
mbed_official | 119:3921aeca8633 | 477 | } |
mbed_official | 119:3921aeca8633 | 478 | if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_CHARACTER_MATCH) { |
mbed_official | 119:3921aeca8633 | 479 | uart_data[index].event |= SERIAL_EVENT_RX_CHARACTER_MATCH; |
mbed_official | 119:3921aeca8633 | 480 | } |
mbed_official | 119:3921aeca8633 | 481 | if (uart_data[index].event) { |
mbed_official | 119:3921aeca8633 | 482 | uart_data[index].receiving_obj = NULL; |
mbed_official | 119:3921aeca8633 | 483 | ((void (*)())uart_data[index].async_rx_callback)(); |
mbed_official | 119:3921aeca8633 | 484 | } |
mbed_official | 119:3921aeca8633 | 485 | } else if (obj->rx_buff.pos == obj->rx_buff.length) { |
mbed_official | 119:3921aeca8633 | 486 | uart_data[index].receiving_obj = NULL; |
mbed_official | 119:3921aeca8633 | 487 | if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) { |
mbed_official | 119:3921aeca8633 | 488 | uart_data[index].event = SERIAL_EVENT_RX_COMPLETE; |
mbed_official | 119:3921aeca8633 | 489 | ((void (*)())uart_data[index].async_rx_callback)(); |
mbed_official | 119:3921aeca8633 | 490 | } |
mbed_official | 119:3921aeca8633 | 491 | } |
mbed_official | 119:3921aeca8633 | 492 | } else { |
mbed_official | 119:3921aeca8633 | 493 | serial_rx_abort_asynch(obj); |
mbed_official | 119:3921aeca8633 | 494 | if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) { |
mbed_official | 119:3921aeca8633 | 495 | uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR; |
mbed_official | 119:3921aeca8633 | 496 | if (obj->serial.uart->SCFSR & 1 << 2) { |
mbed_official | 119:3921aeca8633 | 497 | uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR; |
mbed_official | 119:3921aeca8633 | 498 | } else if (obj->serial.uart->SCFSR & 1 << 3) { |
mbed_official | 119:3921aeca8633 | 499 | uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR; |
mbed_official | 119:3921aeca8633 | 500 | } |
mbed_official | 119:3921aeca8633 | 501 | ((void (*)())uart_data[index].async_rx_callback)(); |
mbed_official | 119:3921aeca8633 | 502 | } |
mbed_official | 119:3921aeca8633 | 503 | return; |
mbed_official | 119:3921aeca8633 | 504 | } |
mbed_official | 119:3921aeca8633 | 505 | } |
mbed_official | 119:3921aeca8633 | 506 | |
mbed_official | 119:3921aeca8633 | 507 | irq_handler(uart_data[index].serial_irq_id, RxIrq); |
mbed_official | 119:3921aeca8633 | 508 | } |
bogdanm | 0:9b334a45a8ff | 509 | |
mbed_official | 119:3921aeca8633 | 510 | static void uart_err_irq(IRQn_Type irq_num, uint32_t index) { |
mbed_official | 119:3921aeca8633 | 511 | serial_t *obj = uart_data[index].receiving_obj; |
mbed_official | 119:3921aeca8633 | 512 | int was_masked, err_read; |
mbed_official | 119:3921aeca8633 | 513 | |
mbed_official | 119:3921aeca8633 | 514 | if (obj) { |
mbed_official | 119:3921aeca8633 | 515 | serial_irq_err_set(obj, 0); |
mbed_official | 119:3921aeca8633 | 516 | if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) { |
mbed_official | 119:3921aeca8633 | 517 | uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR; |
mbed_official | 119:3921aeca8633 | 518 | if (obj->serial.uart->SCFSR & 1 << 2) { |
mbed_official | 119:3921aeca8633 | 519 | uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR; |
mbed_official | 119:3921aeca8633 | 520 | } else if (obj->serial.uart->SCFSR & 1 << 3) { |
mbed_official | 119:3921aeca8633 | 521 | uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR; |
mbed_official | 119:3921aeca8633 | 522 | } |
mbed_official | 119:3921aeca8633 | 523 | ((void (*)())uart_data[index].async_rx_callback)(); |
mbed_official | 119:3921aeca8633 | 524 | } |
mbed_official | 119:3921aeca8633 | 525 | serial_rx_abort_asynch(obj); |
mbed_official | 119:3921aeca8633 | 526 | |
mbed_official | 141:a2b798ec44f6 | 527 | #if defined ( __ICCARM__ ) |
mbed_official | 141:a2b798ec44f6 | 528 | was_masked = __disable_irq_iar(); |
mbed_official | 141:a2b798ec44f6 | 529 | #else |
mbed_official | 119:3921aeca8633 | 530 | was_masked = __disable_irq(); |
mbed_official | 141:a2b798ec44f6 | 531 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 532 | if (obj->serial.uart->SCFSR & 0x93) { |
mbed_official | 119:3921aeca8633 | 533 | err_read = obj->serial.uart->SCFSR; |
mbed_official | 119:3921aeca8633 | 534 | obj->serial.uart->SCFSR = (err_read & ~0x93); |
mbed_official | 119:3921aeca8633 | 535 | } |
mbed_official | 119:3921aeca8633 | 536 | if (obj->serial.uart->SCLSR & 1) { |
mbed_official | 119:3921aeca8633 | 537 | obj->serial.uart->SCLSR = 0; |
mbed_official | 119:3921aeca8633 | 538 | } |
mbed_official | 119:3921aeca8633 | 539 | if (!was_masked) { |
mbed_official | 119:3921aeca8633 | 540 | __enable_irq(); |
mbed_official | 119:3921aeca8633 | 541 | } |
mbed_official | 119:3921aeca8633 | 542 | } |
bogdanm | 0:9b334a45a8ff | 543 | } |
bogdanm | 0:9b334a45a8ff | 544 | |
bogdanm | 0:9b334a45a8ff | 545 | /* TX handler */ |
bogdanm | 0:9b334a45a8ff | 546 | static void uart0_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 547 | uart_tx_irq(SCIFTXI0_IRQn, 0); |
bogdanm | 0:9b334a45a8ff | 548 | } |
bogdanm | 0:9b334a45a8ff | 549 | static void uart1_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 550 | uart_tx_irq(SCIFTXI1_IRQn, 1); |
bogdanm | 0:9b334a45a8ff | 551 | } |
bogdanm | 0:9b334a45a8ff | 552 | static void uart2_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 553 | uart_tx_irq(SCIFTXI2_IRQn, 2); |
bogdanm | 0:9b334a45a8ff | 554 | } |
bogdanm | 0:9b334a45a8ff | 555 | static void uart3_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 556 | uart_tx_irq(SCIFTXI3_IRQn, 3); |
bogdanm | 0:9b334a45a8ff | 557 | } |
bogdanm | 0:9b334a45a8ff | 558 | static void uart4_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 559 | uart_tx_irq(SCIFTXI4_IRQn, 4); |
bogdanm | 0:9b334a45a8ff | 560 | } |
bogdanm | 0:9b334a45a8ff | 561 | static void uart5_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 562 | uart_tx_irq(SCIFTXI5_IRQn, 5); |
bogdanm | 0:9b334a45a8ff | 563 | } |
bogdanm | 0:9b334a45a8ff | 564 | static void uart6_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 565 | uart_tx_irq(SCIFTXI6_IRQn, 6); |
bogdanm | 0:9b334a45a8ff | 566 | } |
bogdanm | 0:9b334a45a8ff | 567 | static void uart7_tx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 568 | uart_tx_irq(SCIFTXI7_IRQn, 7); |
bogdanm | 0:9b334a45a8ff | 569 | } |
bogdanm | 0:9b334a45a8ff | 570 | /* RX handler */ |
bogdanm | 0:9b334a45a8ff | 571 | static void uart0_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 572 | uart_rx_irq(SCIFRXI0_IRQn, 0); |
bogdanm | 0:9b334a45a8ff | 573 | } |
bogdanm | 0:9b334a45a8ff | 574 | static void uart1_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 575 | uart_rx_irq(SCIFRXI1_IRQn, 1); |
bogdanm | 0:9b334a45a8ff | 576 | } |
bogdanm | 0:9b334a45a8ff | 577 | static void uart2_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 578 | uart_rx_irq(SCIFRXI2_IRQn, 2); |
bogdanm | 0:9b334a45a8ff | 579 | } |
bogdanm | 0:9b334a45a8ff | 580 | static void uart3_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 581 | uart_rx_irq(SCIFRXI3_IRQn, 3); |
bogdanm | 0:9b334a45a8ff | 582 | } |
bogdanm | 0:9b334a45a8ff | 583 | static void uart4_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 584 | uart_rx_irq(SCIFRXI4_IRQn, 4); |
bogdanm | 0:9b334a45a8ff | 585 | } |
bogdanm | 0:9b334a45a8ff | 586 | static void uart5_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 587 | uart_rx_irq(SCIFRXI5_IRQn, 5); |
bogdanm | 0:9b334a45a8ff | 588 | } |
bogdanm | 0:9b334a45a8ff | 589 | static void uart6_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 590 | uart_rx_irq(SCIFRXI6_IRQn, 6); |
bogdanm | 0:9b334a45a8ff | 591 | } |
bogdanm | 0:9b334a45a8ff | 592 | static void uart7_rx_irq(void) { |
bogdanm | 0:9b334a45a8ff | 593 | uart_rx_irq(SCIFRXI7_IRQn, 7); |
bogdanm | 0:9b334a45a8ff | 594 | } |
mbed_official | 119:3921aeca8633 | 595 | /* Error handler */ |
mbed_official | 119:3921aeca8633 | 596 | static void uart0_er_irq(void) |
mbed_official | 119:3921aeca8633 | 597 | { |
mbed_official | 119:3921aeca8633 | 598 | uart_err_irq(SCIFERI0_IRQn, 0); |
mbed_official | 119:3921aeca8633 | 599 | } |
mbed_official | 119:3921aeca8633 | 600 | static void uart1_er_irq(void) |
mbed_official | 119:3921aeca8633 | 601 | { |
mbed_official | 119:3921aeca8633 | 602 | uart_err_irq(SCIFERI0_IRQn, 1); |
mbed_official | 119:3921aeca8633 | 603 | } |
mbed_official | 119:3921aeca8633 | 604 | static void uart2_er_irq(void) |
mbed_official | 119:3921aeca8633 | 605 | { |
mbed_official | 119:3921aeca8633 | 606 | uart_err_irq(SCIFERI0_IRQn, 2); |
mbed_official | 119:3921aeca8633 | 607 | } |
mbed_official | 119:3921aeca8633 | 608 | static void uart3_er_irq(void) |
mbed_official | 119:3921aeca8633 | 609 | { |
mbed_official | 119:3921aeca8633 | 610 | uart_err_irq(SCIFERI0_IRQn, 3); |
mbed_official | 119:3921aeca8633 | 611 | } |
mbed_official | 119:3921aeca8633 | 612 | static void uart4_er_irq(void) |
mbed_official | 119:3921aeca8633 | 613 | { |
mbed_official | 119:3921aeca8633 | 614 | uart_err_irq(SCIFERI0_IRQn, 4); |
mbed_official | 119:3921aeca8633 | 615 | } |
mbed_official | 119:3921aeca8633 | 616 | static void uart5_er_irq(void) |
mbed_official | 119:3921aeca8633 | 617 | { |
mbed_official | 119:3921aeca8633 | 618 | uart_err_irq(SCIFERI0_IRQn, 5); |
mbed_official | 119:3921aeca8633 | 619 | } |
mbed_official | 119:3921aeca8633 | 620 | static void uart6_er_irq(void) |
mbed_official | 119:3921aeca8633 | 621 | { |
mbed_official | 119:3921aeca8633 | 622 | uart_err_irq(SCIFERI0_IRQn, 6); |
mbed_official | 119:3921aeca8633 | 623 | } |
mbed_official | 119:3921aeca8633 | 624 | static void uart7_er_irq(void) |
mbed_official | 119:3921aeca8633 | 625 | { |
mbed_official | 119:3921aeca8633 | 626 | uart_err_irq(SCIFERI0_IRQn, 7); |
mbed_official | 119:3921aeca8633 | 627 | } |
bogdanm | 0:9b334a45a8ff | 628 | |
bogdanm | 0:9b334a45a8ff | 629 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
bogdanm | 0:9b334a45a8ff | 630 | irq_handler = handler; |
mbed_official | 119:3921aeca8633 | 631 | uart_data[obj->serial.index].serial_irq_id = id; |
mbed_official | 119:3921aeca8633 | 632 | } |
mbed_official | 119:3921aeca8633 | 633 | |
mbed_official | 119:3921aeca8633 | 634 | static void serial_irq_set_irq(IRQn_Type IRQn, IRQHandler handler, uint32_t enable) |
mbed_official | 119:3921aeca8633 | 635 | { |
mbed_official | 119:3921aeca8633 | 636 | if (enable) { |
mbed_official | 119:3921aeca8633 | 637 | InterruptHandlerRegister(IRQn, (void (*)(uint32_t))handler); |
mbed_official | 119:3921aeca8633 | 638 | GIC_SetPriority(IRQn, 5); |
mbed_official | 119:3921aeca8633 | 639 | GIC_EnableIRQ(IRQn); |
mbed_official | 119:3921aeca8633 | 640 | } else { |
mbed_official | 119:3921aeca8633 | 641 | GIC_DisableIRQ(IRQn); |
mbed_official | 119:3921aeca8633 | 642 | } |
bogdanm | 0:9b334a45a8ff | 643 | } |
bogdanm | 0:9b334a45a8ff | 644 | |
bogdanm | 0:9b334a45a8ff | 645 | static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) { |
bogdanm | 0:9b334a45a8ff | 646 | IRQn_Type IRQn; |
bogdanm | 0:9b334a45a8ff | 647 | IRQHandler handler; |
bogdanm | 0:9b334a45a8ff | 648 | |
mbed_official | 119:3921aeca8633 | 649 | IRQn = irq_set_tbl[obj->serial.index][irq]; |
mbed_official | 119:3921aeca8633 | 650 | handler = hander_set_tbl[obj->serial.index][irq]; |
bogdanm | 0:9b334a45a8ff | 651 | |
mbed_official | 119:3921aeca8633 | 652 | if ((obj->serial.index >= 0) && (obj->serial.index <= 7)) { |
mbed_official | 119:3921aeca8633 | 653 | serial_irq_set_irq(IRQn, handler, enable); |
bogdanm | 0:9b334a45a8ff | 654 | } |
bogdanm | 0:9b334a45a8ff | 655 | } |
bogdanm | 0:9b334a45a8ff | 656 | |
mbed_official | 119:3921aeca8633 | 657 | static void serial_irq_err_set(serial_t *obj, uint32_t enable) |
mbed_official | 119:3921aeca8633 | 658 | { |
mbed_official | 119:3921aeca8633 | 659 | serial_irq_set_irq(irq_set_tbl[obj->serial.index][2], hander_set_tbl[obj->serial.index][2], enable); |
mbed_official | 119:3921aeca8633 | 660 | serial_irq_set_irq(irq_set_tbl[obj->serial.index][3], hander_set_tbl[obj->serial.index][3], enable); |
mbed_official | 119:3921aeca8633 | 661 | } |
mbed_official | 119:3921aeca8633 | 662 | |
bogdanm | 0:9b334a45a8ff | 663 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
bogdanm | 0:9b334a45a8ff | 664 | if (RxIrq == irq) { |
mbed_official | 119:3921aeca8633 | 665 | uart_data[obj->serial.index].rx_irq_set_api = enable; |
bogdanm | 0:9b334a45a8ff | 666 | } |
bogdanm | 0:9b334a45a8ff | 667 | serial_irq_set_internal(obj, irq, enable); |
bogdanm | 0:9b334a45a8ff | 668 | } |
bogdanm | 0:9b334a45a8ff | 669 | |
bogdanm | 0:9b334a45a8ff | 670 | static void serial_flow_irq_set(serial_t *obj, uint32_t enable) { |
mbed_official | 119:3921aeca8633 | 671 | uart_data[obj->serial.index].rx_irq_set_flow = enable; |
bogdanm | 0:9b334a45a8ff | 672 | serial_irq_set_internal(obj, RxIrq, enable); |
bogdanm | 0:9b334a45a8ff | 673 | } |
bogdanm | 0:9b334a45a8ff | 674 | |
bogdanm | 0:9b334a45a8ff | 675 | /****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 676 | * READ/WRITE |
bogdanm | 0:9b334a45a8ff | 677 | ******************************************************************************/ |
bogdanm | 0:9b334a45a8ff | 678 | int serial_getc(serial_t *obj) { |
bogdanm | 0:9b334a45a8ff | 679 | uint16_t err_read; |
bogdanm | 0:9b334a45a8ff | 680 | int data; |
bogdanm | 0:9b334a45a8ff | 681 | int was_masked; |
bogdanm | 0:9b334a45a8ff | 682 | |
mbed_official | 66:fdb3f9f9a72f | 683 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 684 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 685 | #else |
bogdanm | 0:9b334a45a8ff | 686 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 687 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 688 | if (obj->serial.uart->SCFSR & 0x93) { |
mbed_official | 119:3921aeca8633 | 689 | err_read = obj->serial.uart->SCFSR; |
mbed_official | 119:3921aeca8633 | 690 | obj->serial.uart->SCFSR = (err_read & ~0x93); |
bogdanm | 0:9b334a45a8ff | 691 | } |
mbed_official | 119:3921aeca8633 | 692 | obj->serial.uart->SCSCR |= 0x0040; // Set RIE |
bogdanm | 0:9b334a45a8ff | 693 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 694 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 695 | } |
bogdanm | 0:9b334a45a8ff | 696 | |
mbed_official | 119:3921aeca8633 | 697 | if (obj->serial.uart->SCLSR & 0x0001) { |
mbed_official | 119:3921aeca8633 | 698 | obj->serial.uart->SCLSR = 0u; // ORER clear |
bogdanm | 0:9b334a45a8ff | 699 | } |
bogdanm | 0:9b334a45a8ff | 700 | |
bogdanm | 0:9b334a45a8ff | 701 | while (!serial_readable(obj)); |
mbed_official | 119:3921aeca8633 | 702 | data = obj->serial.uart->SCFRDR & 0xff; |
bogdanm | 0:9b334a45a8ff | 703 | |
mbed_official | 66:fdb3f9f9a72f | 704 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 705 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 706 | #else |
bogdanm | 0:9b334a45a8ff | 707 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 708 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 709 | err_read = obj->serial.uart->SCFSR; |
mbed_official | 119:3921aeca8633 | 710 | obj->serial.uart->SCFSR = (err_read & 0xfffD); // Clear RDF |
bogdanm | 0:9b334a45a8ff | 711 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 712 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 713 | } |
bogdanm | 0:9b334a45a8ff | 714 | |
bogdanm | 0:9b334a45a8ff | 715 | if (err_read & 0x80) { |
bogdanm | 0:9b334a45a8ff | 716 | data = -1; //err |
bogdanm | 0:9b334a45a8ff | 717 | } |
bogdanm | 0:9b334a45a8ff | 718 | return data; |
bogdanm | 0:9b334a45a8ff | 719 | } |
bogdanm | 0:9b334a45a8ff | 720 | |
bogdanm | 0:9b334a45a8ff | 721 | void serial_putc(serial_t *obj, int c) { |
mbed_official | 119:3921aeca8633 | 722 | while (!serial_writable(obj)); |
mbed_official | 119:3921aeca8633 | 723 | obj->serial.uart->SCFTDR = c; |
mbed_official | 119:3921aeca8633 | 724 | serial_put_done(obj); |
mbed_official | 119:3921aeca8633 | 725 | } |
mbed_official | 119:3921aeca8633 | 726 | |
mbed_official | 119:3921aeca8633 | 727 | static void serial_put_done(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 728 | { |
bogdanm | 0:9b334a45a8ff | 729 | int was_masked; |
mbed_official | 119:3921aeca8633 | 730 | volatile uint16_t dummy_read; |
mbed_official | 119:3921aeca8633 | 731 | |
mbed_official | 66:fdb3f9f9a72f | 732 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 733 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 734 | #else |
bogdanm | 0:9b334a45a8ff | 735 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 736 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 737 | dummy_read = obj->serial.uart->SCFSR; |
mbed_official | 119:3921aeca8633 | 738 | obj->serial.uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE |
mbed_official | 119:3921aeca8633 | 739 | obj->serial.uart->SCSCR |= 0x0080; // Set TIE |
bogdanm | 0:9b334a45a8ff | 740 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 741 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 742 | } |
bogdanm | 0:9b334a45a8ff | 743 | } |
bogdanm | 0:9b334a45a8ff | 744 | |
bogdanm | 0:9b334a45a8ff | 745 | int serial_readable(serial_t *obj) { |
mbed_official | 119:3921aeca8633 | 746 | return ((obj->serial.uart->SCFSR & 0x02) != 0); // RDF |
bogdanm | 0:9b334a45a8ff | 747 | } |
bogdanm | 0:9b334a45a8ff | 748 | |
bogdanm | 0:9b334a45a8ff | 749 | int serial_writable(serial_t *obj) { |
mbed_official | 119:3921aeca8633 | 750 | return ((obj->serial.uart->SCFSR & 0x20) != 0); // TDFE |
bogdanm | 0:9b334a45a8ff | 751 | } |
bogdanm | 0:9b334a45a8ff | 752 | |
bogdanm | 0:9b334a45a8ff | 753 | void serial_clear(serial_t *obj) { |
bogdanm | 0:9b334a45a8ff | 754 | int was_masked; |
mbed_official | 66:fdb3f9f9a72f | 755 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 756 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 757 | #else |
bogdanm | 0:9b334a45a8ff | 758 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 759 | #endif /* __ICCARM__ */ |
bogdanm | 0:9b334a45a8ff | 760 | |
mbed_official | 119:3921aeca8633 | 761 | obj->serial.uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1 |
mbed_official | 119:3921aeca8633 | 762 | obj->serial.uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0 |
mbed_official | 119:3921aeca8633 | 763 | obj->serial.uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0 |
bogdanm | 0:9b334a45a8ff | 764 | |
bogdanm | 0:9b334a45a8ff | 765 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 766 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 767 | } |
bogdanm | 0:9b334a45a8ff | 768 | } |
bogdanm | 0:9b334a45a8ff | 769 | |
bogdanm | 0:9b334a45a8ff | 770 | void serial_pinout_tx(PinName tx) { |
bogdanm | 0:9b334a45a8ff | 771 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 0:9b334a45a8ff | 772 | } |
bogdanm | 0:9b334a45a8ff | 773 | |
bogdanm | 0:9b334a45a8ff | 774 | void serial_break_set(serial_t *obj) { |
bogdanm | 0:9b334a45a8ff | 775 | int was_masked; |
mbed_official | 66:fdb3f9f9a72f | 776 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 777 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 778 | #else |
bogdanm | 0:9b334a45a8ff | 779 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 780 | #endif /* __ICCARM__ */ |
bogdanm | 0:9b334a45a8ff | 781 | // TxD Output(L) |
mbed_official | 119:3921aeca8633 | 782 | obj->serial.uart->SCSPTR &= ~0x0001u; // SPB2DT = 0 |
mbed_official | 119:3921aeca8633 | 783 | obj->serial.uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable) |
bogdanm | 0:9b334a45a8ff | 784 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 785 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 786 | } |
bogdanm | 0:9b334a45a8ff | 787 | } |
bogdanm | 0:9b334a45a8ff | 788 | |
bogdanm | 0:9b334a45a8ff | 789 | void serial_break_clear(serial_t *obj) { |
bogdanm | 0:9b334a45a8ff | 790 | int was_masked; |
mbed_official | 66:fdb3f9f9a72f | 791 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 792 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 793 | #else |
bogdanm | 0:9b334a45a8ff | 794 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 795 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 796 | obj->serial.uart->SCSCR |= 0x0020u; // TE = 1 (Output enable) |
mbed_official | 119:3921aeca8633 | 797 | obj->serial.uart->SCSPTR |= 0x0001u; // SPB2DT = 1 |
bogdanm | 0:9b334a45a8ff | 798 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 799 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 800 | } |
bogdanm | 0:9b334a45a8ff | 801 | } |
bogdanm | 0:9b334a45a8ff | 802 | |
bogdanm | 0:9b334a45a8ff | 803 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) { |
bogdanm | 0:9b334a45a8ff | 804 | // determine the UART to use |
bogdanm | 0:9b334a45a8ff | 805 | int was_masked; |
bogdanm | 0:9b334a45a8ff | 806 | |
bogdanm | 0:9b334a45a8ff | 807 | serial_flow_irq_set(obj, 0); |
bogdanm | 0:9b334a45a8ff | 808 | |
bogdanm | 0:9b334a45a8ff | 809 | if (type == FlowControlRTSCTS) { |
mbed_official | 66:fdb3f9f9a72f | 810 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 811 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 812 | #else |
bogdanm | 0:9b334a45a8ff | 813 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 814 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 815 | obj->serial.uart->SCFCR = 0x0008u; // CTS/RTS enable |
bogdanm | 0:9b334a45a8ff | 816 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 817 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 818 | } |
bogdanm | 0:9b334a45a8ff | 819 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
bogdanm | 0:9b334a45a8ff | 820 | pinmap_pinout(txflow, PinMap_UART_CTS); |
bogdanm | 0:9b334a45a8ff | 821 | } else { |
mbed_official | 66:fdb3f9f9a72f | 822 | #if defined ( __ICCARM__ ) |
mbed_official | 66:fdb3f9f9a72f | 823 | was_masked = __disable_irq_iar(); |
mbed_official | 66:fdb3f9f9a72f | 824 | #else |
bogdanm | 0:9b334a45a8ff | 825 | was_masked = __disable_irq(); |
mbed_official | 66:fdb3f9f9a72f | 826 | #endif /* __ICCARM__ */ |
mbed_official | 119:3921aeca8633 | 827 | obj->serial.uart->SCFCR = 0x0000u; // CTS/RTS diable |
bogdanm | 0:9b334a45a8ff | 828 | if (!was_masked) { |
bogdanm | 0:9b334a45a8ff | 829 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 830 | } |
bogdanm | 0:9b334a45a8ff | 831 | } |
bogdanm | 0:9b334a45a8ff | 832 | } |
bogdanm | 0:9b334a45a8ff | 833 | |
mbed_official | 119:3921aeca8633 | 834 | static uint8_t serial_available_buffer(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 835 | { |
mbed_official | 119:3921aeca8633 | 836 | return 1; |
mbed_official | 119:3921aeca8633 | 837 | /* Faster but unstable way */ |
mbed_official | 119:3921aeca8633 | 838 | /* |
mbed_official | 119:3921aeca8633 | 839 | uint16_t ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F); |
mbed_official | 119:3921aeca8633 | 840 | while (ret == 0) { |
mbed_official | 119:3921aeca8633 | 841 | ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F); |
mbed_official | 119:3921aeca8633 | 842 | } |
mbed_official | 119:3921aeca8633 | 843 | MBED_ASSERT(0 < ret && ret <= 16); |
mbed_official | 119:3921aeca8633 | 844 | return ret; |
mbed_official | 119:3921aeca8633 | 845 | */ |
mbed_official | 119:3921aeca8633 | 846 | } |
bogdanm | 0:9b334a45a8ff | 847 | |
mbed_official | 119:3921aeca8633 | 848 | #if DEVICE_SERIAL_ASYNCH |
mbed_official | 119:3921aeca8633 | 849 | |
mbed_official | 119:3921aeca8633 | 850 | /****************************************************************************** |
mbed_official | 119:3921aeca8633 | 851 | * ASYNCHRONOUS HAL |
mbed_official | 119:3921aeca8633 | 852 | ******************************************************************************/ |
mbed_official | 119:3921aeca8633 | 853 | |
mbed_official | 119:3921aeca8633 | 854 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
mbed_official | 119:3921aeca8633 | 855 | { |
mbed_official | 119:3921aeca8633 | 856 | int i; |
mbed_official | 119:3921aeca8633 | 857 | buffer_t *buf = &obj->tx_buff; |
mbed_official | 119:3921aeca8633 | 858 | struct serial_global_data_s *data = uart_data + obj->serial.index; |
mbed_official | 119:3921aeca8633 | 859 | |
mbed_official | 119:3921aeca8633 | 860 | if (tx_length == 0) { |
mbed_official | 119:3921aeca8633 | 861 | return 0; |
mbed_official | 119:3921aeca8633 | 862 | } |
mbed_official | 119:3921aeca8633 | 863 | |
mbed_official | 119:3921aeca8633 | 864 | buf->buffer = (void *)tx; |
mbed_official | 119:3921aeca8633 | 865 | buf->length = tx_length * tx_width / 8; |
mbed_official | 119:3921aeca8633 | 866 | buf->pos = 0; |
mbed_official | 119:3921aeca8633 | 867 | buf->width = tx_width; |
mbed_official | 119:3921aeca8633 | 868 | data->tranferring_obj = obj; |
mbed_official | 119:3921aeca8633 | 869 | data->async_tx_callback = handler; |
mbed_official | 119:3921aeca8633 | 870 | serial_irq_set(obj, TxIrq, 1); |
mbed_official | 119:3921aeca8633 | 871 | |
mbed_official | 119:3921aeca8633 | 872 | while (!serial_writable(obj)); |
mbed_official | 119:3921aeca8633 | 873 | i = buf->length; |
mbed_official | 119:3921aeca8633 | 874 | if (serial_available_buffer(obj) < i) { |
mbed_official | 119:3921aeca8633 | 875 | i = serial_available_buffer(obj); |
mbed_official | 119:3921aeca8633 | 876 | } |
mbed_official | 119:3921aeca8633 | 877 | do { |
mbed_official | 119:3921aeca8633 | 878 | uint8_t c = *(uint8_t *)buf->buffer; |
mbed_official | 119:3921aeca8633 | 879 | obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1; |
mbed_official | 119:3921aeca8633 | 880 | ++buf->pos; |
mbed_official | 119:3921aeca8633 | 881 | obj->serial.uart->SCFTDR = c; |
mbed_official | 119:3921aeca8633 | 882 | } while (--i); |
mbed_official | 119:3921aeca8633 | 883 | serial_put_done(obj); |
mbed_official | 119:3921aeca8633 | 884 | |
mbed_official | 119:3921aeca8633 | 885 | return buf->length; |
mbed_official | 119:3921aeca8633 | 886 | } |
bogdanm | 0:9b334a45a8ff | 887 | |
mbed_official | 119:3921aeca8633 | 888 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
mbed_official | 119:3921aeca8633 | 889 | { |
mbed_official | 119:3921aeca8633 | 890 | buffer_t *buf = &obj->rx_buff; |
mbed_official | 119:3921aeca8633 | 891 | struct serial_global_data_s *data = uart_data + obj->serial.index; |
mbed_official | 119:3921aeca8633 | 892 | |
mbed_official | 119:3921aeca8633 | 893 | if (rx_length == 0) { |
mbed_official | 119:3921aeca8633 | 894 | return; |
mbed_official | 119:3921aeca8633 | 895 | } |
mbed_official | 119:3921aeca8633 | 896 | |
mbed_official | 119:3921aeca8633 | 897 | buf->buffer = rx; |
mbed_official | 119:3921aeca8633 | 898 | buf->length = rx_length * rx_width / 8; |
mbed_official | 119:3921aeca8633 | 899 | buf->pos = 0; |
mbed_official | 119:3921aeca8633 | 900 | buf->width = rx_width; |
mbed_official | 119:3921aeca8633 | 901 | obj->char_match = char_match; |
mbed_official | 119:3921aeca8633 | 902 | obj->char_found = 0; |
mbed_official | 119:3921aeca8633 | 903 | data->receiving_obj = obj; |
mbed_official | 119:3921aeca8633 | 904 | data->async_rx_callback = handler; |
mbed_official | 119:3921aeca8633 | 905 | data->event = 0; |
mbed_official | 119:3921aeca8633 | 906 | data->wanted_rx_events = event; |
mbed_official | 119:3921aeca8633 | 907 | |
mbed_official | 119:3921aeca8633 | 908 | serial_irq_set(obj, RxIrq, 1); |
mbed_official | 119:3921aeca8633 | 909 | serial_irq_err_set(obj, 1); |
mbed_official | 119:3921aeca8633 | 910 | } |
bogdanm | 0:9b334a45a8ff | 911 | |
mbed_official | 119:3921aeca8633 | 912 | uint8_t serial_tx_active(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 913 | { |
mbed_official | 119:3921aeca8633 | 914 | return uart_data[obj->serial.index].tranferring_obj != NULL; |
mbed_official | 119:3921aeca8633 | 915 | } |
mbed_official | 119:3921aeca8633 | 916 | |
mbed_official | 119:3921aeca8633 | 917 | uint8_t serial_rx_active(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 918 | { |
mbed_official | 119:3921aeca8633 | 919 | return uart_data[obj->serial.index].receiving_obj != NULL; |
mbed_official | 119:3921aeca8633 | 920 | } |
mbed_official | 119:3921aeca8633 | 921 | |
mbed_official | 119:3921aeca8633 | 922 | int serial_irq_handler_asynch(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 923 | { |
mbed_official | 119:3921aeca8633 | 924 | return uart_data[obj->serial.index].event; |
mbed_official | 119:3921aeca8633 | 925 | } |
mbed_official | 119:3921aeca8633 | 926 | |
mbed_official | 119:3921aeca8633 | 927 | void serial_tx_abort_asynch(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 928 | { |
mbed_official | 119:3921aeca8633 | 929 | uart_data[obj->serial.index].tranferring_obj = NULL; |
mbed_official | 119:3921aeca8633 | 930 | obj->serial.uart->SCFCR |= 1 << 2; |
mbed_official | 119:3921aeca8633 | 931 | obj->serial.uart->SCFCR &= ~(1 << 2); |
mbed_official | 119:3921aeca8633 | 932 | } |
mbed_official | 119:3921aeca8633 | 933 | |
mbed_official | 119:3921aeca8633 | 934 | void serial_rx_abort_asynch(serial_t *obj) |
mbed_official | 119:3921aeca8633 | 935 | { |
mbed_official | 119:3921aeca8633 | 936 | uart_data[obj->serial.index].receiving_obj = NULL; |
mbed_official | 119:3921aeca8633 | 937 | obj->serial.uart->SCFCR |= 1 << 1; |
mbed_official | 119:3921aeca8633 | 938 | obj->serial.uart->SCFCR &= ~(1 << 1); |
mbed_official | 119:3921aeca8633 | 939 | } |
mbed_official | 119:3921aeca8633 | 940 | |
mbed_official | 119:3921aeca8633 | 941 | #endif |